@@ -88,7 +88,6 @@ int main(void) | |||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */ | |||
HAL_Init(); | |||
/* USER CODE BEGIN Init */ | |||
/* USER CODE END Init */ | |||
/* Configure the system clock */ | |||
@@ -209,6 +209,8 @@ void MX_TIM10_Init(void) | |||
htim10.Init.Period = 9999; | |||
htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV2; | |||
htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; | |||
htim10.Instance->CR1 |= TIM_CR1_ARPE; // 启用自动重载预加载 | |||
htim10.Instance->CCMR1 |= TIM_CCMR1_OC1PE; | |||
if (HAL_TIM_Base_Init(&htim10) != HAL_OK) | |||
{ | |||
Error_Handler(); | |||
@@ -675,17 +677,17 @@ void PLSR_PWM_Start(void) | |||
break; | |||
case 1: // TIM11 | |||
__HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, htim10.Init.Period / 2); | |||
__HAL_TIM_SET_COMPARE(&htim11, TIM_CHANNEL_1, htim10.Init.Period / 2); | |||
//HAL_TIM_PWM_Start_IT(&htim11, TIM_CHANNEL_1); | |||
break; | |||
case 2: // TIM13 | |||
__HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, htim10.Init.Period / 2); | |||
__HAL_TIM_SET_COMPARE(&htim13, TIM_CHANNEL_1, htim10.Init.Period / 2); | |||
//HAL_TIM_PWM_Start_IT(&htim13, TIM_CHANNEL_1); | |||
break; | |||
case 3: // TIM14 | |||
__HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, htim10.Init.Period / 2); | |||
__HAL_TIM_SET_COMPARE(&htim14, TIM_CHANNEL_1, htim10.Init.Period / 2); | |||
//HAL_TIM_PWM_Start_IT(&htim14, TIM_CHANNEL_1); | |||
break; | |||
@@ -719,17 +721,17 @@ void PLSR_PWM_Stop(void) | |||
break; | |||
case 1: // TIM11 | |||
__HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, htim10.Init.Period); // | |||
__HAL_TIM_SET_COMPARE(&htim11, TIM_CHANNEL_1, htim10.Init.Period); // | |||
//HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); | |||
break; | |||
case 2: // TIM13 | |||
__HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, htim10.Init.Period); // | |||
__HAL_TIM_SET_COMPARE(&htim13, TIM_CHANNEL_1, htim10.Init.Period); // | |||
//HAL_TIM_PWM_Stop(&htim13, TIM_CHANNEL_1); | |||
break; | |||
case 3: // TIM14 | |||
__HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, htim10.Init.Period); // | |||
__HAL_TIM_SET_COMPARE(&htim14, TIM_CHANNEL_1, htim10.Init.Period); // | |||
//HAL_TIM_PWM_Stop(&htim14, TIM_CHANNEL_1); | |||
break; | |||
@@ -1122,8 +1124,8 @@ void Calculate_PluseNum_Simplified(PLSR_RouteConfig_t *route) | |||
// 加速阶段脉冲数 = (起始频率 + 目标频率) * 时间 / 2000 | |||
// 使用梯形积分公式:面积 = (上底 + 下底) * 高 / 2 | |||
uint64_t temp_accel = (uint64_t)(v0 + vt) * accel_time; | |||
int32_t required_accel_pulses = (int32_t)(temp_accel / 2000); | |||
/* 使用整数偏移法进行四舍五入 */ | |||
int32_t required_accel_pulses = (int32_t)(((uint64_t)(v0 + vt) * accel_time + 1000) / 2000); | |||
if(required_accel_pulses == 0) required_accel_pulses = 1; // 至少1个脉冲 | |||
if (required_accel_pulses <= total_pulses) | |||
@@ -1169,8 +1171,8 @@ void Calculate_PluseNum_Simplified(PLSR_RouteConfig_t *route) | |||
if (decel_time == 0) decel_time = 1; // 至少1ms | |||
// 减速阶段脉冲数 = (起始频率 + 目标频率) * 时间 / 2000 | |||
uint64_t temp_decel = (uint64_t)(v0 + vt) * decel_time; | |||
int32_t required_decel_pulses = (int32_t)(temp_decel / 2000); | |||
/* 使用整数偏移法进行四舍五入 */ | |||
int32_t required_decel_pulses = (int32_t)(((uint64_t)(v0 + vt) * decel_time + 1000) / 2000); | |||
if(required_decel_pulses == 0) required_decel_pulses = 1; // 至少1个脉冲 | |||
if (required_decel_pulses <= total_pulses) | |||
@@ -1220,6 +1222,7 @@ void Calculate_PluseNum_Simplified(PLSR_RouteConfig_t *route) | |||
route->accel_pulse_count = accel_pulse_num; | |||
route->const_pulse_count = const_pulse_num; | |||
route->decel_pulse_count = decel_pulse_num; | |||
route->accel_pulse_count -= 1; | |||
} | |||
} | |||
void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
@@ -1270,8 +1273,8 @@ void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
part1_time = (vt - v0) / a; | |||
if (part1_time == 0) part1_time = 1; | |||
uint64_t temp_calc = (uint64_t)(v0 + vt) * part1_time; | |||
part1_pulse_num = (uint32_t)(temp_calc / 2000); | |||
/* 使用整数偏移法进行四舍五入 */ | |||
part1_pulse_num = (uint32_t)(((uint64_t)(v0 + vt) * part1_time + 1000) / 2000); | |||
if(part1_pulse_num == 0) part1_pulse_num = 1; // 防止为0 | |||
} | |||
else if (v0 > vt) | |||
@@ -1281,8 +1284,8 @@ void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
part1_time = (v0 - vt) / d; | |||
if (part1_time == 0) part1_time = 1; | |||
uint64_t temp_calc = (uint64_t)(v0 + vt) * part1_time; | |||
part1_pulse_num = (uint32_t)(temp_calc / 2000); | |||
/* 使用整数偏移法进行四舍五入 */ | |||
part1_pulse_num = (uint32_t)(((uint64_t)(v0 + vt) * part1_time + 1000) / 2000); | |||
if(part1_pulse_num == 0) part1_pulse_num = 1; // 防止为0 | |||
} | |||
else { | |||
@@ -1300,8 +1303,8 @@ void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
if (part3_time == 0) part3_time = 1; | |||
// 从vt减速到0的脉冲数:(vt + 0) * part3_time / 2000 | |||
uint64_t temp_calc = (uint64_t)vt * part3_time; | |||
part3_pulse_num = (uint32_t)(temp_calc / 2000); | |||
/* 使用整数偏移法进行四舍五入 */ | |||
part3_pulse_num = (uint32_t)(((uint64_t)vt * part3_time + 1000) / 2000); | |||
if(part3_pulse_num == 0) part3_pulse_num = 1; // 防止为0 | |||
} | |||
else | |||
@@ -1352,8 +1355,8 @@ void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
// 重新计算第三部分 | |||
part3_time = vt / d; | |||
if (part3_time == 0) part3_time = 1; | |||
uint64_t temp_calc = (uint64_t)vt * part3_time; | |||
part3_pulse_num = (uint32_t)(temp_calc / 2000); | |||
/* 使用整数偏移法进行四舍五入 */ | |||
part3_pulse_num = (uint32_t)(((uint64_t)vt * part3_time + 1000) / 2000); | |||
} | |||
} | |||
else if (v0 > vt) { | |||
@@ -1376,8 +1379,8 @@ void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
// 重新计算第三部分 | |||
part3_time = vt / d; | |||
if (part3_time == 0) part3_time = 1; | |||
uint64_t temp_calc = (uint64_t)vt * part3_time; | |||
part3_pulse_num = (uint32_t)(temp_calc / 2000); | |||
/* 使用整数偏移法进行四舍五入 */ | |||
part3_pulse_num = (uint32_t)(((uint64_t)vt * part3_time + 1000) / 2000); | |||
} | |||
} | |||
else { | |||
@@ -1432,6 +1435,7 @@ void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
// 保存三个部分的状态和脉冲计数到结构体 | |||
// 使用现有的字段来存储三个部分的信息 | |||
// 第一部分 | |||
if (part1_state == PLSR_STATE_ACCEL) { | |||
route->accel_pulse_count = part1_pulse_num; | |||
@@ -1444,6 +1448,16 @@ void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
// 第三部分(减速到0) | |||
route->decel_pulse_count = part3_pulse_num; | |||
// uint8_t d_count = 0; | |||
// if(route->accel_pulse_count > 0) d_count++; | |||
// if(route->decel_pulse_count > 0) d_count++; | |||
// if(route->const_pulse_count > 0) d_count++; | |||
// if(route->const_pulse_count >= 3 ) | |||
// route->const_pulse_count -= d_count; | |||
// else | |||
route->accel_pulse_count -= 1; | |||
route->part1_state = part1_state; // 保存第一部分状态 | |||
route->part2_state = part2_state; // 保存第二部分状态 | |||
@@ -1452,16 +1466,23 @@ void Calculate_PluseNum(PLSR_RouteConfig_t *route) | |||
route->part2_target_freq = vt; // 第二部分结束频率 | |||
route->part3_target_freq = 0; // 第三部分结束频率必须为0 | |||
// 设置初始运行状态 | |||
if (part1_pulse_num > 0) { | |||
if (part1_pulse_num > 0) | |||
{ | |||
route->run_state = part1_state; | |||
route->target_freq = vt; | |||
} else if (part2_pulse_num > 0) { | |||
} | |||
else if (part2_pulse_num > 0) | |||
{ | |||
route->run_state = PLSR_STATE_CONST; | |||
route->target_freq = vt; | |||
} else if (part3_pulse_num > 0) { | |||
} | |||
else if (part3_pulse_num > 0) | |||
{ | |||
route->run_state = PLSR_STATE_DECEL; | |||
route->target_freq = 0; | |||
} else { | |||
} | |||
else | |||
{ | |||
route->run_state = PLSR_STATE_CONST; | |||
route->target_freq = v0; | |||
} | |||
@@ -1511,7 +1532,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) | |||
PLSR_PWM_Stop(); | |||
// 精确累加当前段已发送的脉冲数 | |||
int32_t current_section_pulses = __HAL_TIM_GetAutoreload(&htim2); | |||
AllPluse += current_section_pulses; | |||
AllPluse += current_section_pulses + 1; | |||
g_plsr_route.pulse_count = AllPluse; | |||
PLSR_UpdateGlobalPulseCount(AllPluse); | |||
// 三部分状态机处理 | |||
@@ -1530,8 +1551,9 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) | |||
g_plsr_route.target_freq = g_plsr_route.part2_target_freq; | |||
g_plsr_route.initial_freq = g_plsr_route.current_freq; // 更新加减速初始频率 | |||
g_last_freq = 0; // 清零g_last_freq,防止频率计算时的累加效果 | |||
__HAL_TIM_SetAutoreload(&htim2, g_plsr_route.const_pulse_count); | |||
if(g_plsr_route.const_pulse_count > 1) | |||
__HAL_TIM_SetAutoreload(&htim2, g_plsr_route.const_pulse_count - 1); | |||
__HAL_TIM_SET_COUNTER(&htim2, 0); | |||
PLSR_PWM_Start(); | |||
} | |||
@@ -1544,6 +1566,9 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) | |||
g_plsr_route.initial_freq = g_plsr_route.current_freq; // 更新加减速初始频率 | |||
g_last_freq = 0; // 清零g_last_freq,防止频率计算时的累加效果 | |||
if(g_plsr_route.decel_pulse_count > 1) | |||
__HAL_TIM_SetAutoreload(&htim2, g_plsr_route.decel_pulse_count - 1); | |||
else | |||
__HAL_TIM_SetAutoreload(&htim2, g_plsr_route.decel_pulse_count); | |||
__HAL_TIM_SET_COUNTER(&htim2, 0); | |||
PLSR_PWM_Start(); | |||
@@ -1566,8 +1591,12 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) | |||
g_plsr_route.current_part = PLSR_PART_3; | |||
g_plsr_route.run_state = g_plsr_route.part3_state; | |||
g_plsr_route.target_freq = g_plsr_route.part3_target_freq; | |||
if(g_plsr_route.decel_pulse_count > 1) | |||
__HAL_TIM_SetAutoreload(&htim2, g_plsr_route.decel_pulse_count - 1); | |||
else | |||
__HAL_TIM_SetAutoreload(&htim2, g_plsr_route.decel_pulse_count); | |||
__HAL_TIM_SET_COUNTER(&htim2, 0); | |||
PLSR_PWM_Start(); | |||
} | |||
@@ -1744,10 +1773,23 @@ void PLSR_Route_Start(PLSR_RouteConfig_t* route) | |||
// 启动定时器 | |||
PLSR_TIM6_Start(); // 启动TIM6用于频率更新和等待时间计时 | |||
HAL_TIM_Base_Start_IT(&htim2); // 启动TIM2中断用于段切换 | |||
HAL_TIM_PWM_Start(&htim10, TIM_CHANNEL_1); | |||
HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); | |||
HAL_TIM_PWM_Start(&htim13, TIM_CHANNEL_1); | |||
HAL_TIM_PWM_Start(&htim14, TIM_CHANNEL_1); | |||
switch (route->output_port) | |||
{ | |||
case 0 : | |||
HAL_TIM_PWM_Start(&htim10, TIM_CHANNEL_1); | |||
break; | |||
case 1 : | |||
HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); | |||
break; | |||
case 2 : | |||
HAL_TIM_PWM_Start(&htim13, TIM_CHANNEL_1); | |||
break; | |||
case 3 : | |||
HAL_TIM_PWM_Start(&htim14, TIM_CHANNEL_1); | |||
break; | |||
default: | |||
break; | |||
} | |||
} | |||
/** | |||
@@ -20,7 +20,7 @@ | |||
<stlinkResetStrategy>2</stlinkResetStrategy> | |||
</StLinkDriver> | |||
<DebugChecksum> | |||
<Checksum>2012208745</Checksum> | |||
<Checksum>3785312791</Checksum> | |||
</DebugChecksum> | |||
<Exceptions> | |||
<StopOnUncaught>_ 0</StopOnUncaught> | |||
@@ -39,6 +39,7 @@ | |||
; Cortex-M version | |||
; | |||
MODULE ?cstartup | |||
;; Forward declaration of sections. | |||
@@ -69,3 +69,75 @@ | |||
415 955 7768544361556770 test.1_part1.pbi 72148e63fe682e2f | |||
955 1326 7768544365284012 test.1.pbd 363d5d355a216cdf | |||
1327 3036 7768544381928778 test.1.pbw f11e09b552b4c82f | |||
53 512 7774757765418465 modbus_crc.pbi 9b76681ddf289794 | |||
58 653 7774757766821431 stm32f4xx_hal_dma.pbi 2d6aa8f3983bf80a | |||
61 660 7774757766861293 stm32f4xx_hal_flash.pbi eccf13860e1d0c6a | |||
64 681 7774757767105566 stm32f4xx_hal_msp.pbi 8144db72f01a260b | |||
55 793 7774757768209498 usart.pbi 7c2d93866867ab60 | |||
50 796 7774757767932786 gpio.pbi a088b5271f02118a | |||
513 976 7774757769998117 dma.pbi 4f5ebe00ac67ed57 | |||
654 1103 7774757771261951 stm32f4xx_hal_flash_ex.pbi ac2d035774fe6a2e | |||
662 1117 7774757771471254 stm32f4xx_hal_gpio.pbi 53b438f48be9a8d0 | |||
682 1255 7774757772829950 stm32f4xx_hal_i2c.pbi 74395538aa12fa10 | |||
797 1266 7774757772959510 stm32f4xx_hal_exti.pbi 373789209d565f00 | |||
794 1334 7774757773637248 modbus_log.pbi 596603da5f343c45 | |||
977 1595 7774757775528721 stm32f4xx_hal_timebase_tim.pbi b6f5ce0feaca8054 | |||
1103 1598 7774757775668265 stm32f4xx_hal_cortex.pbi 2c6d2473a153fb5a | |||
1256 1728 7774757777505243 stm32f4xx_hal_dma_ex.pbi 1960c5ab56ffede7 | |||
1118 1731 7774757777348937 main.pbi 9c0a6aa02351636a | |||
1267 1776 7774757778071154 stm32f4xx_hal_flash_ramfunc.pbi ae498685b336a49c | |||
1334 1939 7774757779680060 flash_save.pbi dc7405226be28cc6 | |||
1729 2087 7774757781171735 system_stm32f4xx.pbi f50e519d7e78a5de | |||
1732 2090 7774757781191666 stm32f4xx_hal.pbi a073c739b6b34173 | |||
1595 2122 7774757781371064 stm32f4xx_it.pbi d01766022cb163bc | |||
1599 2182 7774757781696829 tim.pbi f07c6d790a519d93 | |||
2182 2219 7774757782489253 stm32f4xx_ll_crc.pbi dcf41d4b97590765 | |||
1777 2226 7774757782545315 stm32f4xx_hal_crc.pbi 881b29e4c80746b3 | |||
1939 2355 7774757783677455 stm32f4xx_hal_rcc_ex.pbi c1d751d24d77a2df | |||
2226 2358 7774757783412413 stm32f4xx_ll_pwr.pbi 952cb4e4f4edb65b | |||
2219 2362 7774757783863005 stm32f4xx_ll_i2c.pbi 7f1151d8874c40c9 | |||
2362 2426 7774757784281614 stm32f4xx_ll_rng.pbi 5e12b9ea00d0b826 | |||
2359 2428 7774757784261676 stm32f4xx_ll_rcc.pbi fb9ace481decf8ab | |||
2426 2470 7774757784937681 stm32f4xx_ll_usart.pbi 783190689e783d9 | |||
2429 2511 7774757785326375 app_hooks.pbi ffd399489d189d5a | |||
2470 2516 7774757785416109 stm32f4xx_ll_dma.pbi f9e6142ede2883b4 | |||
2122 2599 7774757786284402 stm32f4xx_hal_tim_ex.pbi 3c68a2e86514987f | |||
2090 2621 7774757786503677 stm32f4xx_hal_tim.pbi 71840baae88d57c4 | |||
2087 2628 7774757786573447 stm32f4xx_hal_sram.pbi 4652c5af4efd4e19 | |||
2599 2643 7774757786703004 stm32f4xx_ll_tim.pbi b88554c6464192f5 | |||
2621 2687 7774757786958201 stm32f4xx_ll_spi.pbi ce805017b70a4f43 | |||
2629 2711 7774757787406701 os_cpu_c.pbi eb75b848b406ea34 | |||
2711 2758 7774757787835262 stm32f4xx_ll_gpio.pbi df8b54563945d41d | |||
2356 2798 7774757788279456 stm32f4xx_hal_pwr.pbi b347497fce55b6a8 | |||
2799 2981 7774757789782474 stm32f4xx_ll_exti.pbi 883a2fd463949e02 | |||
2981 3054 7774757790828172 os_dbg.pbi f7287a072fe86a55 | |||
3054 3090 7774757791133180 test.1_part6.pbi b9d684e502f25afa | |||
2687 3142 7774757791723241 stm32f4xx_hal_uart.pbi e7ca7ebbb4330340 | |||
2758 3191 7774757791832868 stm32f4xx_hal_rcc.pbi 50976e6b18f3b8bc | |||
2512 3222 7774757792456595 test.1_part0.pbi 60db414ccd7a80f4 | |||
2517 3226 7774757792406773 test.1_part1.pbi 72148e63fe682e2f | |||
3227 3262 7774757792901125 stm32f4xx_ll_dac.pbi 7dfc4be0933cdfaf | |||
2643 3274 7774757793030690 test.1_part2.pbi 932c7a5b50912170 | |||
3263 3277 7774757793070559 test.1_part5.pbi 41f12be61ce67c27 | |||
3091 3329 7774757793584348 ucos_ii.pbi 4e0ab25e0060431e | |||
3329 3408 7774757793919877 test.1_part7.pbi 67c64030b23c9b51 | |||
3142 3463 7774757794922970 stm32f4xx_hal_wwdg.pbi fca2b44f67349f99 | |||
3192 3538 7774757795381443 stm32f4xx_hal_usart.pbi b368fafd8b8b8bb9 | |||
3223 3562 7774757795755841 stm32f4xx_hal_pwr_ex.pbi b84426bf5a4ce0cf | |||
3275 3719 7774757797186849 stm32f4xx_hal_i2c_ex.pbi 7798e48f8e6ef374 | |||
3538 4035 7774757800662008 test.1_part4.pbi b15d70d6e2dea5ca | |||
3720 4222 7774757802537525 test.1_part3.pbi 2c7780fc3f88c160 | |||
4223 4570 7774757806008919 test.1.pbd 363d5d355a216cdf | |||
4570 6215 7774757822110213 test.1.pbw f11e09b552b4c82f | |||
32 503 7774758302187140 tim.pbi f07c6d790a519d93 | |||
504 1035 7774758307518345 test.1_part1.pbi 72148e63fe682e2f | |||
1036 1380 7774758310962764 test.1.pbd 363d5d355a216cdf | |||
1380 3020 7774758326958792 test.1.pbw f11e09b552b4c82f | |||
36 418 7774758353867993 tim.pbi f07c6d790a519d93 | |||
419 948 7774758359181271 test.1_part1.pbi 72148e63fe682e2f | |||
949 1296 7774758362662264 test.1.pbd 363d5d355a216cdf | |||
1296 2901 7774758378363869 test.1.pbw f11e09b552b4c82f | |||
44 489 7774760193113989 tim.pbi f07c6d790a519d93 | |||
490 1101 7774760199253685 test.1_part1.pbi 72148e63fe682e2f | |||
1102 1489 7774760203131502 test.1.pbd 363d5d355a216cdf | |||
1490 3121 7774760219100007 test.1.pbw f11e09b552b4c82f |
@@ -36,4 +36,21 @@ gpio.pbi: \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/tim.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \ | |||
E:\Software\IAR\arm\inc\c\stdio.h E:\Software\IAR\arm\inc\c\string.h \ | |||
E:\Software\IAR\arm\inc\c\DLib_Product_string.h \ | |||
E:\Software\IAR\arm\inc\c\ctype.h E:\Software\IAR\arm\inc\c\stdlib.h \ | |||
E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \ | |||
E:\Software\IAR\arm\inc\c\stdarg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h \ | |||
E:\Software\IAR\arm\inc\c\math.h \ | |||
E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h |
@@ -1,22 +1,22 @@ | |||
main.pbi: \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\dma.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\os_trace.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \ | |||
E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ | |||
E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\math.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\usart.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_log.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\flash_save.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_crc.h \ | |||
E:\Software\IAR\arm\inc\c\stdarg.h \ | |||
E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \ | |||
E:\Software\IAR\arm\inc\c\stdlib.h E:\Software\IAR\arm\inc\c\ctype.h \ | |||
E:\Software\IAR\arm\inc\c\DLib_Product_string.h \ | |||
E:\Software\IAR\arm\inc\c\string.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\os_trace.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ | |||
E:\Software\IAR\arm\inc\c\stdio.h E:\Software\IAR\arm\inc\c\stdarg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \ | |||
E:\Software\IAR\arm\inc\c\string.h E:\Software\IAR\arm\inc\c\stdio.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\gpio.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h \ | |||
@@ -1,5 +1,12 @@ | |||
tim.pbi: E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ | |||
tim.pbi: \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\os_trace.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \ | |||
E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ | |||
E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\math.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\usart.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_log.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\flash_save.h \ | |||
@@ -43,5 +50,4 @@ tim.pbi: E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\stm32f4xx_hal_conf.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\main.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\tim.c |
@@ -45,4 +45,12 @@ usart.pbi: \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/tim.h \ | |||
E:\Software\IAR\arm\inc\c\math.h \ | |||
E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ | |||
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h |