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优化代码管理

2
JIU JIALIN 1 month ago
parent
28c78db0d4
commit
871e4896e5
28 changed files with 30199 additions and 31214 deletions
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  1. +10
    -11
      PLSR/PLSR/Core/Inc/tim.h
  2. +1
    -713
      PLSR/PLSR/Core/Src/tim.c
  3. +0
    -1
      PLSR/PLSR/Core/Src/usart.c
  4. +7
    -7
      PLSR/PLSR/EWARM/settings/Project.wsdt
  5. +464
    -692
      PLSR/PLSR/EWARM/test.1.dep
  6. +3
    -0
      PLSR/PLSR/EWARM/test.1.ewp
  7. +3
    -0
      PLSR/PLSR/EWARM/test.1.ewt
  8. BIN
      PLSR/PLSR/EWARM/test.1/Exe/test.1.sim
  9. +162
    -80
      PLSR/PLSR/EWARM/test.1/Obj/.ninja_log
  10. +8
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      PLSR/PLSR/EWARM/test.1/Obj/build.ninja
  11. BIN
      PLSR/PLSR/EWARM/test.1/Obj/gpio.pbi
  12. +2
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  13. BIN
      PLSR/PLSR/EWARM/test.1/Obj/main.pbi
  14. +1
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      PLSR/PLSR/EWARM/test.1/Obj/main.pbi.dep
  15. BIN
      PLSR/PLSR/EWARM/test.1/Obj/test.1.pbd
  16. BIN
      PLSR/PLSR/EWARM/test.1/Obj/test.1.pbd.browse
  17. +29481
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      PLSR/PLSR/EWARM/test.1/Obj/test.1.pbw
  18. BIN
      PLSR/PLSR/EWARM/test.1/Obj/test.1_part0.pbi
  19. BIN
      PLSR/PLSR/EWARM/test.1/Obj/test.1_part1.pbi
  20. BIN
      PLSR/PLSR/EWARM/test.1/Obj/test.1_part2.pbi
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  23. BIN
      PLSR/PLSR/EWARM/test.1/Obj/test.1_part6.pbi
  24. BIN
      PLSR/PLSR/EWARM/test.1/Obj/test.1_part7.pbi
  25. BIN
      PLSR/PLSR/EWARM/test.1/Obj/tim.pbi
  26. +55
    -52
      PLSR/PLSR/EWARM/test.1/Obj/tim.pbi.dep
  27. BIN
      PLSR/PLSR/EWARM/test.1/Obj/usart.pbi
  28. +2
    -1
      PLSR/PLSR/EWARM/test.1/Obj/usart.pbi.dep

+ 10
- 11
PLSR/PLSR/Core/Inc/tim.h View File

@@ -31,7 +31,7 @@ extern "C" {
#include "math.h" #include "math.h"
#include "ucos_ii.h" #include "ucos_ii.h"
#include "app_cfg.h" #include "app_cfg.h"
#include "gpio.h"
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */


/* USER CODE END Includes */ /* USER CODE END Includes */
@@ -218,13 +218,20 @@ typedef enum {
#define PLSR_DEFAULT_ACT_TIME_MS 200 // 默认ACT时间200ms #define PLSR_DEFAULT_ACT_TIME_MS 200 // 默认ACT时间200ms
#define PLSR_DEFAULT_WAIT_TIME_MS 200 // 默认等待时间200ms #define PLSR_DEFAULT_WAIT_TIME_MS 200 // 默认等待时间200ms
#define SCALE_FACTOR 2000ULL #define SCALE_FACTOR 2000ULL
// 基础PWM函数
// ==================== PWM控制函数 ====================

void Calculate_PluseNum(PLSR_RouteConfig_t *route); //<计算段脉冲数,根据加减速率和目标频率计算每段的加速、匀速、减速脉冲数
void Calculate_PluseNum_Simplified(PLSR_RouteConfig_t *route); //<简化的脉冲数计算,用于快速计算每段的脉冲数,不考虑加减速

uint32_t integer_sqrt_64(uint64_t x); //<64位整数开平方函数
uint32_t integer_sqrt(uint32_t x);
uint64_t square_u32(uint32_t x);

void PLSR_PWM_Init(void); void PLSR_PWM_Init(void);
void PLSR_PWM_Start(void); void PLSR_PWM_Start(void);
void PLSR_Section_PWM_Stop(void); void PLSR_Section_PWM_Stop(void);
void PLSR_Route_PWM_Stop(); void PLSR_Route_PWM_Stop();
void PLSR_PWM_SetFrequency(uint32_t frequency); void PLSR_PWM_SetFrequency(uint32_t frequency);
void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, uint32_t* period);


// ==================== PLSR路径控制函数 ==================== // ==================== PLSR路径控制函数 ====================
void PLSR_Route_Init(PLSR_RouteConfig_t* route); //<路径初始化 void PLSR_Route_Init(PLSR_RouteConfig_t* route); //<路径初始化
@@ -236,8 +243,6 @@ void PLSR_Route_Stop(PLSR_RouteConfig_t* route); //<路径停止
void PLSR_Section_SwitchNext(PLSR_RouteConfig_t* route, uint8_t is_pulse_complete); //<切换段 void PLSR_Section_SwitchNext(PLSR_RouteConfig_t* route, uint8_t is_pulse_complete); //<切换段
uint8_t PLSR_Section_CheckWaitCondition(PLSR_RouteConfig_t* route); //<检查等待条件是否满足 uint8_t PLSR_Section_CheckWaitCondition(PLSR_RouteConfig_t* route); //<检查等待条件是否满足
void PLSR_Section_StartNewSection(PLSR_RouteConfig_t* route); //<启动新段,段更新后调用 void PLSR_Section_StartNewSection(PLSR_RouteConfig_t* route); //<启动新段,段更新后调用
void Calculate_PluseNum(PLSR_RouteConfig_t *route); //<计算段脉冲数,根据加减速率和目标频率计算每段的加速、匀速、减速脉冲数
void Calculate_PluseNum_Simplified(PLSR_RouteConfig_t *route); //<简化的脉冲数计算,用于快速计算每段的脉冲数,不考虑加减速
void PLSR_SetupThreePartExecution(PLSR_RouteConfig_t* route); //<设置三部分执行状态和目标频率 void PLSR_SetupThreePartExecution(PLSR_RouteConfig_t* route); //<设置三部分执行状态和目标频率


// ==================== PLSR加减速算法函数 ==================== // ==================== PLSR加减速算法函数 ====================
@@ -245,12 +250,6 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route); //<加减速执行函数(新
void PLSR_Accel_UpdateRates(PLSR_RouteConfig_t* route); //<更新加减速度 void PLSR_Accel_UpdateRates(PLSR_RouteConfig_t* route); //<更新加减速度
void PLSR_Accel_SetDefaultParams(PLSR_RouteConfig_t* route, uint32_t accel_time_ms, uint32_t decel_time_ms); //<设置默认加减速参数 void PLSR_Accel_SetDefaultParams(PLSR_RouteConfig_t* route, uint32_t accel_time_ms, uint32_t decel_time_ms); //<设置默认加减速参数
uint32_t PLSR_Calculate_FreqByPosition(PLSR_RouteConfig_t* route, uint8_t is_accel); //<根据当前脉冲位置计算频率 uint32_t PLSR_Calculate_FreqByPosition(PLSR_RouteConfig_t* route, uint8_t is_accel); //<根据当前脉冲位置计算频率
uint32_t integer_sqrt_64(uint64_t x); //<64位整数开平方函数

// ==================== PLSR等待条件处理函数 ====================
void PLSR_Wait_StartTimer(PLSR_RouteConfig_t* route); //<等待条件计数器
uint8_t PLSR_Wait_CheckTime(PLSR_RouteConfig_t* route); //<检查等待时间是否满足 ACT时间或等待时间



// ==================== PLSR TIM6频率配置函数 ==================== // ==================== PLSR TIM6频率配置函数 ====================
void PLSR_TIM6_SetUpdateFreq(uint32_t freq_us); void PLSR_TIM6_SetUpdateFreq(uint32_t freq_us);


+ 1
- 713
PLSR/PLSR/Core/Src/tim.c View File

@@ -38,78 +38,6 @@ uint32_t total_se_pluse = 0;
// ==================== PLSR内部变量 ==================== // ==================== PLSR内部变量 ====================
static uint32_t s_tim6_update_freq_us = 1000; // TIM6更新频率(微秒) static uint32_t s_tim6_update_freq_us = 1000; // TIM6更新频率(微秒)


// ==================== 等待时间相关变量 ====================
static volatile uint32_t s_wait_time_counter = 0; // 等待时间计数器
static volatile uint32_t s_wait_time_target = 0; // 等待时间目标值
static volatile uint8_t s_wait_time_flag = 0; // 等待时间到达标志
static volatile uint32_t s_act_time_counter = 0; // ACT时间计数器
static volatile uint32_t s_act_time_target = 0; // ACT时间目标值
static volatile uint8_t s_act_time_flag = 0; // ACT时间到达标志

// ==================== PLSR等待条件处理函数实现 ====================

/**
* @brief 启动等待条件计时器
* @param route: 路径控制结构体指针
* @retval None
* @note 根据等待条件类型启动相应的计时器
*/
void PLSR_Wait_StartTimer(PLSR_RouteConfig_t* route)
{
if (route == NULL) return;
PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1];
PLSR_WaitCondition_t* wait_cond = &current_section->wait_condition;
// 根据等待类型设置TIM6计时器
switch (wait_cond->wait_type)
{
case PLSR_WAIT_TIME:
s_wait_time_target = wait_cond->wait_time_ms;
s_wait_time_counter = 0;
s_wait_time_flag = 0;
//PLSR_TIM6_Start();
break;
case PLSR_WAIT_ACT_TIME:
s_act_time_target = wait_cond->act_time_ms;
s_act_time_counter = 0;
s_act_time_flag = 0;
//PLSR_TIM6_Start();
break;
case PLSR_WAIT_CONDITION:
case PLSR_WAIT_EXT_EVENT:
case PLSR_WAIT_EXT_OR_END:
// 这些条件不需要TIM6计时器
break;
default:
break;
}
}

/**
* @brief 检查等待时间条件
* @param route: 路径控制结构体指针
* @retval 1: 时间到达, 0: 时间未到
* @note 检查WAIT_TIME条件是否满足
*/
uint8_t PLSR_Wait_CheckTime(PLSR_RouteConfig_t* route)
{
if (route == NULL) return 0;
// 检查等待时间标志位
if (s_wait_time_flag) {
// 清除标志位和停止计时器
s_wait_time_flag = 0;
s_wait_time_target = 0;
return 1; // 等待时间已到
}
return 0; // 等待时间未到
}

/* USER CODE END 1 */ /* USER CODE END 1 */


TIM_HandleTypeDef htim2; // TIM2恢复用于脉冲计数 TIM_HandleTypeDef htim2; // TIM2恢复用于脉冲计数
@@ -768,45 +696,6 @@ void PLSR_Route_PWM_Stop()
} }
} }


/**
* @brief 计算定时器参数
* @param frequency: 目标频率(Hz)
* @param prescaler: 预分频器值指针
* @param period: 周期值指针
* @retval None
* @note 根据目标频率计算TIM10的预分频器和周期值
*/
static void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, uint32_t* period)
{
if (frequency < PLSR_PWM_FREQ_MIN) frequency = PLSR_PWM_FREQ_MIN;
if (frequency > PLSR_PWM_FREQ_MAX) frequency = PLSR_PWM_FREQ_MAX;
uint32_t timer_clock = 0;
if(g_plsr_route.output_port == 0 || g_plsr_route.output_port == 1)
{
timer_clock = 168000000UL; // TIM10/TIM11时钟 (APB2 84MHz)
}
else
{
timer_clock = 84000000UL; // TIM13/TIM14时钟 (APB1 42MHz)
}
uint32_t divider = (timer_clock + frequency / 2) / frequency; // 四舍五入

if (divider > 0xFFFFFFFF) divider = 0xFFFFFFFF; // 防止溢出
if (divider < 2) divider = 2; // 至少 2

// 限制 ARR <= 65535
uint32_t psc = (divider + 65535) / 65536; // 向上取整
if (psc > 0xFFFF) psc = 0xFFFF;

uint32_t arr = (divider / psc) - 1;
if (arr < 1) arr = 1;
if (arr > 65535) arr = 65535;

*prescaler = (uint16_t)(psc - 1);
*period = arr;
}


/** /**
* @brief 设置PWM频率 * @brief 设置PWM频率
* @param frequency: PWM频率 (1Hz-100kHz) * @param frequency: PWM频率 (1Hz-100kHz)
@@ -966,565 +855,6 @@ static void PLSR_UpdateGlobalPulseCount(int32_t current_pulse_count)
ModbusSlave.holding_regs[0x1001] = (signed_count >> 16) & 0xFFFF; // 高16位 ModbusSlave.holding_regs[0x1001] = (signed_count >> 16) & 0xFFFF; // 高16位
} }



// 简单的整数开方函数 (使用二分法)
uint32_t integer_sqrt(uint32_t x)
{
if (x == 0) return 0;
if (x == 1) return 1;
uint32_t left = 0;
uint32_t right = x;
uint32_t result = 0;
while (left <= right) {
uint32_t mid = left + (right - left) / 2;
// 防止溢出：检查 mid * mid
if (mid <= x / mid) { // 等价于 mid * mid <= x，但避免溢出
result = mid;
left = mid + 1;
} else {
right = mid - 1;
}
}
return result;
}

/**
* @brief 64位整数开平方函数 (使用二分法)
* @param x 需要开平方的64位无符号整数
* @return 开平方结果
* @note 用于处理大数值的开平方，避免溢出
*/
uint32_t integer_sqrt_64(uint64_t x)
{
if (x == 0) return 0;
if (x == 1) return 1;
// 对于64位整数，最大平方根不会超过2^32
uint64_t left = 0;
uint64_t right = (x > 0xFFFFFFFF) ? 0xFFFFFFFF : x;
uint64_t result = 0;
while (left <= right) {
uint64_t mid = left + (right - left) / 2;
// 防止溢出：检查 mid * mid
if (mid <= x / mid) { // 等价于 mid * mid <= x，但避免溢出
result = mid;
left = mid + 1;
} else {
right = mid - 1;
}
}
// 确保结果不超过uint32_t范围
if (result > 0xFFFFFFFF) {
return 0xFFFFFFFF;
}
return (uint32_t)result;
}

// ==================== PLSR 路径计算函数实现 ====================
//在加速度较小时,可能会出现计算脉冲数为0的情况,此时会导致无法进入加速状态
void Calculate_PluseNum_Simplified(PLSR_RouteConfig_t *route)
{
int32_t accel_pulse_num = 0; // 加速过程脉冲数
int32_t decel_pulse_num = 0; // 减速过程脉冲数
int32_t const_pulse_num = 0; // 匀速过程脉冲数
uint32_t accel_time = 0; // 加速时间(ms)
uint32_t decel_time = 0; // 减速时间(ms)
// 参数有效性检查
if (route == NULL || route->current_section_num == 0) return;
// 边界检查
if (route->current_section_num > PLSR_MAX_SECTIONS) return;
// 获取当前段配置（段号从1开始，数组索引从0开始）
PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1];
// 只处理线性加减速算法
if (route->accel_config.accel_algorithm == PLSR_ACCEL_LINEAR)
{
uint32_t v0 = route->current_freq; // 起始频率
uint32_t vt = current_section->target_freq; // 目标频率
uint32_t a = route->accel_rate; // 加速度
uint32_t d = route->decel_rate; // 减速度
// 使用实际可发脉冲数，不再区分相对/绝对模式
int32_t total_pulses = current_section->actual_pulse; // 总脉冲数
// 防止除零错误
if (a == 0) a = 1;
if (d == 0) d = 1;
if (vt > v0)
{
// 情况1：目标频率大于当前频率，需要加速
route->run_state = PLSR_STATE_ACCEL;
// 计算从v0加速到vt所需的时间和脉冲数
accel_time = (vt - v0) / a; // 加速时间(ms)
if (accel_time == 0) accel_time = 1; // 至少1ms
// 加速阶段脉冲数 = (起始频率 + 目标频率) * 时间 / 2000
// 使用梯形积分公式：面积 = (上底 + 下底) * 高 / 2
uint64_t temp_accel = (uint64_t)(v0 + vt) * accel_time;
int32_t required_accel_pulses = (int32_t)(temp_accel / 2000);
if(required_accel_pulses == 0) required_accel_pulses = 1; // 至少1个脉冲
if (required_accel_pulses <= total_pulses)
{
// 脉冲数足够完成加速，剩余脉冲用于匀速
accel_pulse_num = required_accel_pulses;
const_pulse_num = total_pulses - required_accel_pulses;
decel_pulse_num = 0;
}
else
{
// 脉冲数不够完成完整加速，全部用于加速
accel_pulse_num = total_pulses;
const_pulse_num = 0;
decel_pulse_num = 0;
// 重新计算实际能达到的最大频率
// 根据：pulses = (v0 + v_actual) * t / 2000，且 t = (v_actual - v0) / a
// 代入得：pulses = (v0 + v_actual) * (v_actual - v0) / (2000 * a)
// 整理得：pulses * 2000 * a = v_actual^2 - v0^2
// 所以：v_actual^2 = pulses * 2000 * a + v0^2
uint64_t v_actual_squared = (uint64_t)total_pulses * 2000ULL * a + (uint64_t)v0 * v0;
// 检查是否溢出
if (v_actual_squared <= 0xFFFFFFFFULL)
{
uint32_t v_actual = integer_sqrt((uint32_t)v_actual_squared);
// 确保不超过目标频率
if (v_actual > vt)
v_actual = vt;
}
}
}
else if (vt < v0)
{
// 情况2：目标频率小于当前频率，需要减速
route->run_state = PLSR_STATE_DECEL;
// 计算从v0减速到vt所需的时间和脉冲数
decel_time = (v0 - vt) / d; // 减速时间(ms)
if (decel_time == 0) decel_time = 1; // 至少1ms
// 减速阶段脉冲数 = (起始频率 + 目标频率) * 时间 / 2000
uint64_t temp_decel = (uint64_t)(v0 + vt) * decel_time;
int32_t required_decel_pulses = (int32_t)(temp_decel / 2000);
if(required_decel_pulses == 0) required_decel_pulses = 1; // 至少1个脉冲
if (required_decel_pulses <= total_pulses)
{
// 脉冲数足够完成减速，剩余脉冲用于匀速
decel_pulse_num = required_decel_pulses;
const_pulse_num = total_pulses - required_decel_pulses;
accel_pulse_num = 0;
}
else
{
// 脉冲数不够完成完整减速，全部用于减速
decel_pulse_num = total_pulses;
const_pulse_num = 0;
accel_pulse_num = 0;
// 重新计算实际能减速到的最低频率
// 根据：pulses = (v0 + v_actual) * t / 2000，且 t = (v0 - v_actual) / d
// 代入得：pulses = (v0 + v_actual) * (v0 - v_actual) / (2000 * d)
// 整理得：pulses * 2000 * d = v0^2 - v_actual^2
// 所以：v_actual^2 = v0^2 - pulses * 2000 * d
uint64_t v0_squared = (uint64_t)v0 * v0; // 起始频率的平方
uint64_t reduction = (uint64_t)total_pulses * 2000ULL * d; // 减速所需的脉冲数
if (v0_squared > reduction)
{
uint32_t v_actual_squared = (uint32_t)(v0_squared - reduction);
uint32_t v_actual = integer_sqrt(v_actual_squared);
// 确保不低于目标频率（理论上不应该，但防御性编程）
if (v_actual < vt)
v_actual = vt;
}
}
}
else
{
// 情况3：目标频率等于当前频率，全部为匀速
route->run_state = PLSR_STATE_CONST;
accel_pulse_num = 0;
const_pulse_num = total_pulses;
decel_pulse_num = 0;
}
// 保存计算结果
route->accel_pulse_count = accel_pulse_num;
route->const_pulse_count = const_pulse_num;
route->decel_pulse_count = decel_pulse_num;
}
}

void Calculate_PluseNum(PLSR_RouteConfig_t *route)
{
int32_t part1_pulse_num = 0; // 第一部分脉冲数
int32_t part2_pulse_num = 0; // 第二部分脉冲数
int32_t part3_pulse_num = 0; // 第三部分脉冲数
uint32_t part1_time = 0; // 第一部分时间(ms)
uint32_t part2_time = 0; // 第二部分时间(ms)
uint32_t part3_time = 0; // 第三部分时间(ms)
// 参数有效性检查
if (route == NULL || route->current_section_num == 0) return;
// 边界检查
if (route->current_section_num > PLSR_MAX_SECTIONS) return;
// 获取当前段配置（段号从1开始，数组索引从0开始）
PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1];
// 只处理线性加减速算法
if (route->accel_config.accel_algorithm == PLSR_ACCEL_LINEAR)
{
uint32_t v0 = route->current_freq; // 起始频率
uint32_t vt_desired = current_section->target_freq; // 期望目标频率
uint32_t vt = vt_desired; // 实际目标频率（可能会被调整）
uint32_t vf = 0; // 最终频率（必须为0）
uint32_t a = route->accel_rate; // 加速度
uint32_t d = route->decel_rate; // 减速度
// 在PLSR_Section_StartNewSection中已经根据模式计算了actual_pulse
int32_t total_pulses = current_section->actual_pulse; // 总脉冲数
// 防止除零错误
if (a == 0) a = 1;
if (d == 0) d = 1;
// 初始计算：按理想情况计算各部分脉冲数
PLSR_RunState_t part1_state = PLSR_STATE_CONST;
PLSR_RunState_t part2_state = PLSR_STATE_CONST;
PLSR_RunState_t part3_state = PLSR_STATE_DECEL;
// 计算理想情况下的第一部分：v0 -> vt
if (v0 < vt)
{
part1_state = PLSR_STATE_ACCEL;
part1_time = (vt - v0) / a;
if (part1_time == 0) part1_time = 1;
uint64_t temp_calc = (uint64_t)(v0 + vt) * part1_time;
part1_pulse_num = (uint32_t)(temp_calc / 2000);
if(part1_pulse_num == 0) part1_pulse_num = 1;
}
else if (v0 > vt)
{
part1_state = PLSR_STATE_DECEL;
part1_time = (v0 - vt) / d;
if (part1_time == 0) part1_time = 1;
uint64_t temp_calc = (uint64_t)(v0 + vt) * part1_time;
part1_pulse_num = (uint32_t)(temp_calc / 2000);
if(part1_pulse_num == 0) part1_pulse_num = 1;
}
else
{
part1_pulse_num = 0;
part1_time = 0;
}
// 计算理想情况下的第三部分：vt -> 0
if (vt > 0)
{
part3_time = vt / d;
if (part3_time == 0) part3_time = 1;
uint64_t temp_calc = (uint64_t)vt * part3_time;
part3_pulse_num = (uint32_t)(temp_calc / 2000);
if(part3_pulse_num == 0) part3_pulse_num = 1;
}
else
{
part3_pulse_num = 0;
part3_time = 0;
}
// 检查脉冲数是否足够
int32_t used_pulses = part1_pulse_num + part3_pulse_num;
if (used_pulses <= total_pulses)
{
// 脉冲数足够，计算匀速部分
part2_pulse_num = total_pulses - used_pulses;
if (vt > 0 && part2_pulse_num > 0) {
part2_time = (part2_pulse_num * 1000) / vt;
}
}
else
{
// 脉冲数不足，需要重新规划运动
part2_pulse_num = 0; // 没有匀速阶段
// 优化策略：寻找最优的中间频率vm，使得总脉冲数刚好等于available_pulses
uint32_t vm = OptimalIntermediateFrequency(v0, vt_desired, total_pulses, a, d);
if (vm != v0) // 找到了有效的中间频率
{
vt = vm; // 更新实际目标频率
// 重新计算第一部分
if (v0 < vm)
{
part1_state = PLSR_STATE_ACCEL;
// 使用运动学公式：s = (v0 + vm) * t / 2，其中 t = (vm - v0) / a
// 所以：s = (v0 + vm) * (vm - v0) / (2 * a) = (vm^2 - v0^2) / (2 * a)
uint64_t numerator = (uint64_t)vm * vm - (uint64_t)v0 * v0;
part1_pulse_num = (uint32_t)(numerator / (2000ULL * a));
if (part1_pulse_num == 0) part1_pulse_num = 1;
part1_time = (vm - v0) / a;
if (part1_time == 0) part1_time = 1;
}
else if (v0 > vm)
{
part1_state = PLSR_STATE_DECEL;
// 减速情况：s = (v0^2 - vm^2) / (2 * d)
uint64_t numerator = (uint64_t)v0 * v0 - (uint64_t)vm * vm;
part1_pulse_num = (uint32_t)(numerator / (2000ULL * d));
if (part1_pulse_num == 0) part1_pulse_num = 1;
part1_time = (v0 - vm) / d;
if (part1_time == 0) part1_time = 1;
}
else
{
part1_state = PLSR_STATE_CONST;
part1_pulse_num = 0;
part1_time = 0;
}
// 重新计算第三部分：vm -> 0
if (vm > 0)
{
part3_state = PLSR_STATE_DECEL;
// s = vm^2 / (2 * d)
uint64_t numerator = (uint64_t)vm * vm;
part3_pulse_num = (uint32_t)(numerator / (2000ULL * d));
if (part3_pulse_num == 0) part3_pulse_num = 1;
part3_time = vm / d;
if (part3_time == 0) part3_time = 1;
}
else
{
part3_pulse_num = 0;
part3_time = 0;
}
// 确保总脉冲数完全匹配
int32_t calculated_total = part1_pulse_num + part3_pulse_num;
if (calculated_total != total_pulses)
{
if (calculated_total > total_pulses)
{
// 脉冲数超出限制，按比例缩减
if (part1_pulse_num > 0 && part3_pulse_num > 0)
{
// 两个阶段都有脉冲，按比例分配
part1_pulse_num = ((part1_pulse_num * total_pulses) + calculated_total / 2) / calculated_total; //解决脉冲数过小时导致的问题
part3_pulse_num = total_pulses - part1_pulse_num;
}
else if (part1_pulse_num > 0)
{
// 只有第一阶段有脉冲
part1_pulse_num = total_pulses;
}
else if (part3_pulse_num > 0)
{
// 只有第三阶段有脉冲
part3_pulse_num = total_pulses;
}
}
else
{
// 脉冲数不足，将剩余脉冲分配给匀速阶段
int32_t remaining_pulses = total_pulses - calculated_total;
// 将剩余脉冲分配给第二阶段（匀速阶段）
// 这样既不影响加减速的数学精确性，又能充分利用所有脉冲
part2_pulse_num = remaining_pulses;

// 更新第二阶段状态为匀速
part2_state = PLSR_STATE_CONST;
}
}
}
else
{
// 无法找到有效的运动规划，保持当前频率
part1_state = PLSR_STATE_DECEL;
part1_pulse_num = total_pulses;
part1_time = (total_pulses * 1000) / v0;
part3_pulse_num = 0;
part3_time = 0;
vt = 0; // 实际目标频率等于起始频率
}
}
// 保存计算结果到结构体
if (part1_state == PLSR_STATE_ACCEL)
{
route->accel_pulse_count = part1_pulse_num;
}
else
{
route->accel_pulse_count = (part1_state == PLSR_STATE_DECEL) ? part1_pulse_num : 0;
}
route->const_pulse_count = part2_pulse_num;
route->decel_pulse_count = part3_pulse_num;
route->part1_state = part1_state;
route->part2_state = part2_state;
route->part3_state = part3_state;
route->part1_target_freq = vt;
route->part2_target_freq = vt;
route->part3_target_freq = 0;
// 设置初始运行状态
if (part1_pulse_num > 0)
{
route->run_state = part1_state;
route->target_freq = vt;
} else if (part2_pulse_num > 0)
{
route->run_state = PLSR_STATE_CONST;
route->target_freq = vt;
} else if (part3_pulse_num > 0)
{
route->run_state = PLSR_STATE_DECEL;
route->target_freq = 0;
} else
{
route->run_state = PLSR_STATE_CONST;
route->target_freq = v0;
}
}
}


static inline uint64_t square_u32(uint32_t x) {
return (uint64_t)x * (uint64_t)x;
}

/**
* @brief 计算最优中间频率
*/
uint32_t OptimalIntermediateFrequency(uint32_t v0, uint32_t vt_desired,
int32_t total_pulses, uint32_t a, uint32_t d)
{
if (total_pulses <= 0 || a == 0 || d == 0) {
return v0; // 无法优化
}

uint32_t vm = v0;

// 统一平方项
uint64_t v0_sq = square_u32(v0);

if (v0 < vt_desired)
{
// 加速情况
// 公式：vm^2 = [(total + v0^2/(2a)) * 2ad] / (a+d)
uint64_t rhs = (uint64_t)total_pulses * SCALE_FACTOR + (v0_sq / a); //total*2000 + v0^2/a
uint64_t vm_sq = (rhs * a * d) / (a + d);

if (vm_sq > 0xFFFFFFFFULL) vm_sq = 0xFFFFFFFFULL;
vm = integer_sqrt((uint32_t)vm_sq);

if (vm > vt_desired * 2) vm = vt_desired * 2;

// 验证是否超出 total_pulses
uint64_t s1 = (square_u32(vm) - v0_sq) / (SCALE_FACTOR * a);
uint64_t s3 = square_u32(vm) / (SCALE_FACTOR * d);
if (s1 + s3 > (uint64_t)total_pulses) {
vm = BinarySearchOptimalFreq(v0, vt_desired, total_pulses, a, d, 1);
}

} else if (v0 > vt_desired) {
// 减速情况
uint64_t required = v0_sq / (SCALE_FACTOR * d);
if (required <= (uint64_t)total_pulses) {
vm = (vt_desired < v0) ? vt_desired : v0 / 2;
} else {
uint64_t reduction = (uint64_t)total_pulses * SCALE_FACTOR * d;
vm = (v0_sq > reduction) ? integer_sqrt((uint32_t)(v0_sq - reduction)) : 0;
}
}

return vm;
}

/**
* @brief 二分搜索寻找最优频率
* @param v0 起始频率
* @param vt_desired 期望目标频率
* @param total_pulses 可用总脉冲数
* @param a 加速度
* @param d 减速度
* @param is_accel 是否为加速情况
* @return 最优频率
*/
uint32_t BinarySearchOptimalFreq(uint32_t v0, uint32_t vt_desired,
int32_t total_pulses, uint32_t a, uint32_t d,
uint8_t is_accel)
{
uint32_t low = is_accel ? v0 : 0;
uint32_t high = is_accel ? (vt_desired * 2) : v0;
uint32_t best_vm = v0;
for (int iterations = 0; iterations < 20; iterations++) // 限制迭代次数
{
uint32_t mid = low + (high - low) / 2;
// 计算当前频率下的脉冲数
uint32_t s1, s3;
if (is_accel)
{
s1 = ((uint64_t)mid * mid - (uint64_t)v0 * v0) / (2000ULL * a);
}
else
{
s1 = ((uint64_t)v0 * v0 - (uint64_t)mid * mid) / (2000ULL * d);
}
s3 = ((uint64_t)mid * mid) / (2000ULL * d);
int32_t total_calc = s1 + s3;
if (total_calc == total_pulses) {
return mid; // 找到精确解
} else if (total_calc < total_pulses) {
best_vm = mid;
low = mid + 1;
} else {
high = mid - 1;
}
if (low > high) break;
}
return best_vm;
}

void PLSR_HandleSectionEnd(void) void PLSR_HandleSectionEnd(void)
{ {
// 清零所有部分的脉冲计数 // 清零所有部分的脉冲计数
@@ -1549,7 +879,6 @@ void PLSR_HandleSectionEnd(void)
if(g_plsr_route.section[g_plsr_route.current_section_num - 1].wait_condition.wait_type == PLSR_WAIT_PLUSEEND) if(g_plsr_route.section[g_plsr_route.current_section_num - 1].wait_condition.wait_type == PLSR_WAIT_PLUSEEND)
{ {
// g_plsr_route.current_freq = g_plsr_route.section[g_plsr_route.current_section_num - 1].target_freq; //加速不到目标频率的情况可能不成立. // g_plsr_route.current_freq = g_plsr_route.section[g_plsr_route.current_section_num - 1].target_freq; //加速不到目标频率的情况可能不成立.

} }
else else
{ {
@@ -1557,7 +886,6 @@ void PLSR_HandleSectionEnd(void)
g_plsr_route.current_freq = 0; g_plsr_route.current_freq = 0;
g_plsr_route.initial_freq = 0; g_plsr_route.initial_freq = 0;
} }
PLSR_SectionSwitchSignal(); PLSR_SectionSwitchSignal();
} }
} }
@@ -1710,8 +1038,6 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
// TIM6中断：负责加减速过程的频率更新、等待时间计时和实时脉冲计数更新 // TIM6中断：负责加减速过程的频率更新、等待时间计时和实时脉冲计数更新
if(htim->Instance == TIM6) if(htim->Instance == TIM6)
{ {
// 等待时间计数器累加
s_wait_time_counter++;
uint32_t current_tim2_count = __HAL_TIM_GET_COUNTER(&htim2); uint32_t current_tim2_count = __HAL_TIM_GET_COUNTER(&htim2);
// 计算当前段已发送的总脉冲数 // 计算当前段已发送的总脉冲数
@@ -1848,14 +1174,6 @@ void PLSR_Route_Start(PLSR_RouteConfig_t* route)
s_pulse_count_direction = 1; // 重置脉冲计数方向为默认值 s_pulse_count_direction = 1; // 重置脉冲计数方向为默认值
g_plsr_mod_flag = 0; // 重置修改标志 g_plsr_mod_flag = 0; // 重置修改标志
// 重置等待时间相关静态变量
s_wait_time_counter = 0; // 重置等待时间计数器
s_wait_time_target = 0; // 重置等待时间目标值
s_wait_time_flag = 0; // 重置等待时间到达标志
s_act_time_counter = 0; // 重置ACT时间计数器
s_act_time_target = 0; // 重置ACT时间目标值
s_act_time_flag = 0; // 重置ACT时间到达标志
// 重置所有PWM定时器状态，确保每次启动都是干净的状态 // 重置所有PWM定时器状态，确保每次启动都是干净的状态
__HAL_TIM_SET_COUNTER(&htim10, 0); // 重置TIM10计数器 __HAL_TIM_SET_COUNTER(&htim10, 0); // 重置TIM10计数器
__HAL_TIM_SET_COUNTER(&htim11, 0); // 重置TIM11计数器 __HAL_TIM_SET_COUNTER(&htim11, 0); // 重置TIM11计数器
@@ -2186,9 +1504,6 @@ void PLSR_Section_StartNewSection(PLSR_RouteConfig_t* route)


// 清除外部事件标志，确保新段开始时状态干净 // 清除外部事件标志，确保新段开始时状态干净
PLSR_ClearExtEvent(route); PLSR_ClearExtEvent(route);
// 为等待时间计数赋值
PLSR_Wait_StartTimer(route);
} }


/** /**
@@ -2356,21 +1671,6 @@ void PLSR_Section_SwitchNext(PLSR_RouteConfig_t* route, uint8_t is_pulse_complet
total_se_pluse += g_plsr_total_pulse_count; total_se_pluse += g_plsr_total_pulse_count;
} }
} }
// // 检查下一段是否有效
// if(next_section_num == 0 && current_section->section_num == route->section_num)
// {
// // 如果是最后一段且下一段为0，结束路径
// route->route_state = PLSR_ROUTE_COMPLETED;
// PLSR_Route_Stop(route);
// return;
// }
// if (next_section_num > PLSR_MAX_SECTIONS)
// {
// // 路径结束
// route->route_state = PLSR_ROUTE_COMPLETED;
// PLSR_Route_Stop(route);
// return;
// }
if(next_section_num == 0) if(next_section_num == 0)
{ {
route->current_section_num = current_section->section_num + 1; route->current_section_num = current_section->section_num + 1;
@@ -2406,9 +1706,6 @@ uint32_t PLSR_Calculate_FreqByPosition(PLSR_RouteConfig_t* route, uint8_t is_acc
static uint8_t s_last_is_accel = 0xFF; // 初始化为无效值 static uint8_t s_last_is_accel = 0xFF; // 初始化为无效值
static uint8_t s_last_section_num = 0xFF; // 初始化为无效值 static uint8_t s_last_section_num = 0xFF; // 初始化为无效值
// 获取当前段配置
PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1];
// 获取当前脉冲位置 // 获取当前脉冲位置
int32_t current_tim2_count = __HAL_TIM_GET_COUNTER(&htim2); int32_t current_tim2_count = __HAL_TIM_GET_COUNTER(&htim2);
int32_t executed_pulses = 0; int32_t executed_pulses = 0;
@@ -2784,7 +2081,7 @@ uint8_t PLSR_Section_CheckPulseComplete(PLSR_RouteConfig_t* route)
// 根据等待条件类型检查 // 根据等待条件类型检查
if (current_section->wait_condition.wait_type == PLSR_WAIT_PLUSEEND || if (current_section->wait_condition.wait_type == PLSR_WAIT_PLUSEEND ||
current_section->wait_condition.wait_type == PLSR_WAIT_EXT_OR_END) current_section->wait_condition.wait_type == PLSR_WAIT_EXT_OR_END)
{
{
int32_t target_pulse = current_section->actual_pulse; int32_t target_pulse = current_section->actual_pulse;
if(target_pulse < 0) target_pulse = -target_pulse; if(target_pulse < 0) target_pulse = -target_pulse;
target_pulse += route->prevPulseCount; // 累加上次的脉冲计数 target_pulse += route->prevPulseCount; // 累加上次的脉冲计数
@@ -2813,19 +2110,10 @@ uint8_t PLSR_Section_CheckWaitCondition(PLSR_RouteConfig_t* route)
switch (wait_cond->wait_type) { switch (wait_cond->wait_type) {
case PLSR_WAIT_PLUSEEND: case PLSR_WAIT_PLUSEEND:
return PLSR_Section_CheckPulseComplete(route); return PLSR_Section_CheckPulseComplete(route);
case PLSR_WAIT_TIME:
// 等待指定时间条件：检查是否达到设定的等待时间
return PLSR_Wait_CheckTime(route);
case PLSR_WAIT_CONDITION: case PLSR_WAIT_CONDITION:
// 该标志可通过PLSR_SetSectionCondition函数设置 // 该标志可通过PLSR_SetSectionCondition函数设置
return wait_cond->condition_flag; return wait_cond->condition_flag;
case PLSR_WAIT_ACT_TIME:
// ACT时间条件：检查是否达到ACT（动作）时间
return PLSR_Wait_CheckTime(route);
case PLSR_WAIT_EXT_EVENT: case PLSR_WAIT_EXT_EVENT:
// 外部事件条件：等待外部事件触发 // 外部事件条件：等待外部事件触发
// 外部事件可通过PLSR_SetExtEvent函数设置 // 外部事件可通过PLSR_SetExtEvent函数设置


+ 0
- 1
PLSR/PLSR/Core/Src/usart.c View File

@@ -501,7 +501,6 @@ void Modbus_Handle_SendLog(uint8_t* frame, uint16_t length)
uint16_t start_addr = ((frame[2] << 8) | frame[3]); uint16_t start_addr = ((frame[2] << 8) | frame[3]);
uint16_t write_addr = ((frame[2] << 8) | frame[3]) - MODBUS_OFFSET; uint16_t write_addr = ((frame[2] << 8) | frame[3]) - MODBUS_OFFSET;
uint16_t reg_count = (frame[4] << 8) | frame[5]; uint16_t reg_count = (frame[4] << 8) | frame[5];
uint8_t byte_count = frame[6];
if((reg_count == 0) || (reg_count > 123) || ((write_addr + reg_count) > MODBUS_HOLDING_REG_COUNT)) if((reg_count == 0) || (reg_count > 123) || ((write_addr + reg_count) > MODBUS_HOLDING_REG_COUNT))
{ {


+ 7
- 7
PLSR/PLSR/EWARM/settings/Project.wsdt
File diff suppressed because it is too large
View File


+ 464
- 692
PLSR/PLSR/EWARM/test.1.dep
File diff suppressed because it is too large
View File


+ 3
- 0
PLSR/PLSR/EWARM/test.1.ewp View File

@@ -1103,6 +1103,9 @@
<file> <file>
<name>$PROJ_DIR$\..\Core\Src\tim.c</name> <name>$PROJ_DIR$\..\Core\Src\tim.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\Core\Src\tools.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\Core\Src\usart.c</name> <name>$PROJ_DIR$\..\Core\Src\usart.c</name>
</file> </file>


+ 3
- 0
PLSR/PLSR/EWARM/test.1.ewt View File

@@ -1227,6 +1227,9 @@
<file> <file>
<name>$PROJ_DIR$\..\Core\Src\tim.c</name> <name>$PROJ_DIR$\..\Core\Src\tim.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\Core\Src\tools.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\Core\Src\usart.c</name> <name>$PROJ_DIR$\..\Core\Src\usart.c</name>
</file> </file>


BIN
PLSR/PLSR/EWARM/test.1/Exe/test.1.sim View File


+ 162
- 80
PLSR/PLSR/EWARM/test.1/Obj/.ninja_log View File

@@ -1,83 +1,165 @@
# ninja log v5 # ninja log v5
888 917 7779864086288437 stm32f4xx_ll_rng.pbi 5e12b9ea00d0b826
917 985 7779864086587439 stm32f4xx_ll_gpio.pbi df8b54563945d41d
243 401 7779864080921316 stm32f4xx_ll_tim.pbi b88554c6464192f5
2003 2332 7779864100361377 stm32f4xx_hal_flash_ex.pbi ac2d035774fe6a2e
781 1102 7779864088132275 stm32f4xx_hal_pwr.pbi b347497fce55b6a8
212 242 7779864079545921 stm32f4xx_ll_pwr.pbi 952cb4e4f4edb65b
1067 1099 7779864088122309 test.1_part7.pbi 67c64030b23c9b51
1102 1727 7779864093883046 test.1_part3.pbi 2c7780fc3f88c160
451 781 7779864084888048 stm32f4xx_hal_rcc_ex.pbi c1d751d24d77a2df
394 451 7779864081648875 app_hooks.pbi ffd399489d189d5a
1096 1627 7779864093404651 test.1_part4.pbi b15d70d6e2dea5ca
426 887 7779864085810070 stm32f4xx_hal_pwr_ex.pbi b84426bf5a4ce0cf
41 95 7779864078080814 os_cpu_c.pbi eb75b848b406ea34
428 783 7779864084878102 stm32f4xx_hal_rcc.pbi 50976e6b18f3b8bc
95 533 7779864082326621 stm32f4xx_hal_tim.pbi 71840baae88d57c4
737 1070 7779864087653873 stm32f4xx_hal_usart.pbi b368fafd8b8b8bb9
1258 2822 7779891595710928 test.1.pbw f11e09b552b4c82f
378 450 7780461774539276 stm32f4xx_ll_rng.pbi 5e12b9ea00d0b826
50 80 7780461771269274 stm32f4xx_ll_gpio.pbi df8b54563945d41d
615 913 7780461779459318 stm32f4xx_hal_flash_ex.pbi ac2d035774fe6a2e
889 1272 7780461782149313 stm32f4xx_hal_pwr.pbi b347497fce55b6a8
1014 1269 7780461781969321 stm32f4xx_ll_pwr.pbi 952cb4e4f4edb65b
481 526 7780461775529274 stm32f4xx_ll_tim.pbi b88554c6464192f5
47 144 7780462373994019 test.1_part7.pbi 500429da32d98820
38 560 7780462378784040 test.1_part3.pbi 351715abf331fd8f
991 1326 7780461783379312 stm32f4xx_hal_rcc_ex.pbi c1d751d24d77a2df
479 619 7780461775789269 app_hooks.pbi ffd399489d189d5a
527 617 7780461776269275 os_cpu_c.pbi eb75b848b406ea34
52 373 7780461774129272 stm32f4xx_hal_pwr_ex.pbi b84426bf5a4ce0cf
40 585 7780462378964038 test.1_part4.pbi 56a4af6f8e33d2b8
913 1324 7780461783479311 stm32f4xx_hal_rcc.pbi 50976e6b18f3b8bc
686 1097 7780461781239312 stm32f4xx_hal_usart.pbi b368fafd8b8b8bb9
1064 1507 7780461784809310 stm32f4xx_hal_tim.pbi 71840baae88d57c4
1010 1064 7780461780849323 stm32f4xx_ll_dac.pbi 7dfc4be0933cdfaf
2014 2487 7762488664073707 uart.pbi 5ce52444157923c9 2014 2487 7762488664073707 uart.pbi 5ce52444157923c9
533 562 7779864082755179 stm32f4xx_ll_dac.pbi 7dfc4be0933cdfaf
37 180 7779864078808381 stm32f4xx_ll_crc.pbi dcf41d4b97590765
39 66 7779864077801756 stm32f4xx_ll_rcc.pbi fb9ace481decf8ab
1411 1888 7779864095427880 stm32f4xx_hal_msp.pbi 8144db72f01a260b
988 1018 7779864087315011 stm32f4xx_ll_spi.pbi ce805017b70a4f43
397 454 7779864081678775 os_dbg.pbi f7287a072fe86a55
985 1022 7779864087315011 stm32f4xx_ll_usart.pbi 783190689e783d9
1087 1561 7779864092427902 stm32f4xx_hal_crc.pbi 881b29e4c80746b3
1018 1072 7779864087614016 stm32f4xx_ll_dma.pbi f9e6142ede2883b4
835 988 7779864086836620 stm32f4xx_ll_exti.pbi 883a2fd463949e02
1073 1086 7779864087982776 test.1_part5.pbi 41f12be61ce67c27
915 1067 7779864087484440 ucos_ii.pbi 4e0ab25e0060431e
1065 1411 7779864091241871 stm32f4xx_hal.pbi a073c739b6b34173
180 211 7779864079236951 stm32f4xx_ll_i2c.pbi 7f1151d8874c40c9
31 394 7779864081011018 stm32f4xx_hal_sram.pbi 4652c5af4efd4e19
1928 2249 7779864099623837 stm32f4xx_hal_flash.pbi eccf13860e1d0c6a
1022 1064 7779864087623976 test.1_part6.pbi b9d684e502f25afa
562 915 7779864086228662 stm32f4xx_hal_tim_ex.pbi 3c68a2e86514987f
34 397 7779864080991086 stm32f4xx_hal_flash_ramfunc.pbi ae498685b336a49c
784 1096 7779864088092417 stm32f4xx_hal_wwdg.pbi fca2b44f67349f99
455 835 7779864085276750 stm32f4xx_hal_uart.pbi e7ca7ebbb4330340
1261 2858 7780470571228417 test.1.pbw f11e09b552b4c82f
693 721 7780461777659316 stm32f4xx_ll_crc.pbi dcf41d4b97590765
388 448 7780461774619272 stm32f4xx_ll_rcc.pbi fb9ace481decf8ab
448 481 7780461775219269 stm32f4xx_ll_spi.pbi ce805017b70a4f43
1325 1621 7780461786529305 stm32f4xx_hal_msp.pbi 8144db72f01a260b
451 478 7780461775239272 stm32f4xx_ll_usart.pbi 783190689e783d9
45 117 7780461771629276 os_dbg.pbi f7287a072fe86a55
617 688 7780461776899319 stm32f4xx_ll_dma.pbi f9e6142ede2883b4
1719 2018 7780461790419305 stm32f4xx_hal_crc.pbi 881b29e4c80746b3
688 718 7780461777619318 stm32f4xx_ll_exti.pbi 883a2fd463949e02
40 189 7780461772229275 ucos_ii.pbi 4e0ab25e0060431e
44 80 7780462373734019 test.1_part5.pbi 6e09abdb5099df5f
118 194 7780461771909277 stm32f4xx_ll_i2c.pbi 7f1151d8874c40c9
2018 2345 7780461793809305 stm32f4xx_hal.pbi a073c739b6b34173
721 1010 7780461780559314 stm32f4xx_hal_sram.pbi 4652c5af4efd4e19
42 75 7780462373834020 test.1_part6.pbi 1f990020cfbdc2d2
691 991 7780461780359316 stm32f4xx_hal_flash.pbi eccf13860e1d0c6a
195 615 7780461775779270 stm32f4xx_hal_tim_ex.pbi 3c68a2e86514987f
277 690 7780461777289341 stm32f4xx_hal_wwdg.pbi fca2b44f67349f99
446 889 7780461778769317 stm32f4xx_hal_flash_ramfunc.pbi ae498685b336a49c
48 446 7780461774499276 stm32f4xx_hal_uart.pbi e7ca7ebbb4330340
35 454 7762489045860992 timer.pbi 8f8acc6a162957f 35 454 7762489045860992 timer.pbi 8f8acc6a162957f
43 425 7779864081170493 stm32f4xx_hal_i2c.pbi 74395538aa12fa10
1558 1928 7779864096055799 stm32f4xx_hal_dma.pbi 2d6aa8f3983bf80a
2329 2853 7779864104816466 stm32f4xx_hal_timebase_tim.pbi b6f5ce0feaca8054
1728 2077 7779864097620538 stm32f4xx_hal_dma_ex.pbi 1960c5ab56ffede7
67 428 7779864081220326 stm32f4xx_hal_i2c_ex.pbi 7798e48f8e6ef374
1889 2329 7779864100421194 stm32f4xx_hal_exti.pbi 373789209d565f00
1099 1558 7779864092248503 main.pbi 9c0a6aa02351636a
1416 1884 7779864095776716 stm32f4xx_it.pbi d01766022cb163bc
1070 1415 7779864091281756 stm32f4xx_hal_cortex.pbi 2c6d2473a153fb5a
1884 2191 7779864099025844 system_stm32f4xx.pbi f50e519d7e78a5de
1628 2074 7779864097311580 gpio.pbi a088b5271f02118a
920 1258 7779891580405582 test.1.pbd 363d5d355a216cdf
2725 3265 7779864109759959 test.1_part0.pbi 60db414ccd7a80f4
402 737 7779864084329914 stm32f4xx_hal_gpio.pbi 53b438f48be9a8d0
402 919 7779891577026902 test.1_part1.pbi 72148e63fe682e2f
2332 2890 7779864105902840 test.1_part2.pbi 932c7a5b50912170
2191 2534 7779864102454373 dma.pbi 4f5ebe00ac67ed57
33 401 7779891571834254 tim.pbi f07c6d790a519d93
1561 2003 7779864096922881 usart.pbi 7c2d93866867ab60
2075 2466 7779864101716839 modbus_log.pbi 596603da5f343c45
2077 2403 7779864101049066 modbus_crc.pbi 9b76681ddf289794
2250 2725 7779864103859675 flash_save.pbi dc7405226be28cc6
33 404 7779895154680307 tim.pbi f07c6d790a519d93
404 923 7779895159888052 test.1_part1.pbi 72148e63fe682e2f
924 1272 7779895163346472 test.1.pbd 363d5d355a216cdf
1273 2835 7779895178675206 test.1.pbw f11e09b552b4c82f
47 518 7779895804014075 tim.pbi f07c6d790a519d93
519 1107 7779895809839578 test.1_part1.pbi 72148e63fe682e2f
1107 1466 7779895813689518 test.1.pbd 363d5d355a216cdf
1466 3114 7779895829746730 test.1.pbw f11e09b552b4c82f
35 422 7779896370555654 tim.pbi f07c6d790a519d93
422 952 7779896375867886 test.1_part1.pbi 72148e63fe682e2f
953 1298 7779896379326313 test.1.pbd 363d5d355a216cdf
1299 2879 7779896394799603 test.1.pbw f11e09b552b4c82f
33 440 7779896565405484 tim.pbi f07c6d790a519d93
440 991 7779896570917038 test.1_part1.pbi 72148e63fe682e2f
991 1332 7779896574325634 test.1.pbd 363d5d355a216cdf
1332 3019 7779896590528358 test.1.pbw f11e09b552b4c82f
34 437 7779898424332537 tim.pbi f07c6d790a519d93
437 971 7779898429684634 test.1_part1.pbi 72148e63fe682e2f
972 1396 7779898433906931 test.1.pbd 363d5d355a216cdf
1397 3014 7779898449772061 test.1.pbw f11e09b552b4c82f
47 378 7780461774229269 stm32f4xx_hal_i2c.pbi 74395538aa12fa10
2023 2368 7780461794079309 stm32f4xx_hal_dma.pbi 2d6aa8f3983bf80a
1422 1719 7780461787599306 stm32f4xx_hal_timebase_tim.pbi b6f5ce0feaca8054
719 1014 7780461780599316 stm32f4xx_hal_i2c_ex.pbi 7798e48f8e6ef374
2050 2464 7780461794329307 stm32f4xx_hal_dma_ex.pbi 1960c5ab56ffede7
44 591 7780469796152486 main.pbi 9c0a6aa02351636a
81 388 7780461774339277 stm32f4xx_hal_exti.pbi 373789209d565f00
1622 2023 7780461789759305 stm32f4xx_it.pbi d01766022cb163bc
2021 2467 7780461795059304 stm32f4xx_hal_cortex.pbi 2c6d2473a153fb5a
2224 2537 7780461795729298 system_stm32f4xx.pbi f50e519d7e78a5de
38 483 7780469795402503 gpio.pbi a088b5271f02118a
374 693 7780461777229326 stm32f4xx_hal_gpio.pbi 53b438f48be9a8d0
806 1346 7780469804282493 test.1_part0.pbi 60db414ccd7a80f4
916 1260 7780470555588416 test.1.pbd 363d5d355a216cdf
386 915 7780470552138436 test.1_part1.pbi 132c9eecf11b0e50
75 585 7780462379034036 test.1_part2.pbi 9358ff0702a0a659
1097 1422 7780461784319308 dma.pbi 4f5ebe00ac67ed57
32 386 7780470546838343 tim.pbi f07c6d790a519d93
32 375 7780470434382331 usart.pbi 7c2d93866867ab60
458 806 7780469798872479 modbus_log.pbi 596603da5f343c45
42 484 7780469795422485 flash_save.pbi dc7405226be28cc6
1322 1716 7780461787579307 modbus_crc.pbi 9b76681ddf289794
33 489 7780470178140982 tools.pbi 50c1b905eccec5a9
30 552 7780470639100713 main.pbi 9c0a6aa02351636a
40 561 7780470639170712 usart.pbi 7c2d93866867ab60
38 573 7780470639300709 flash_save.pbi dc7405226be28cc6
42 573 7780470639240708 gpio.pbi a088b5271f02118a
36 573 7780470639300709 tools.pbi 50c1b905eccec5a9
33 595 7780470639540709 tim.pbi f07c6d790a519d93
553 985 7780470642960704 modbus_log.pbi 596603da5f343c45
596 1224 7780470645760723 test.1_part1.pbi 132c9eecf11b0e50
985 1599 7780470649420706 test.1_part0.pbi 60db414ccd7a80f4
1600 2007 7780470653570714 test.1.pbd 363d5d355a216cdf
2008 3808 7780470671250697 test.1.pbw f11e09b552b4c82f
31 407 7780470841607438 tim.pbi f07c6d790a519d93
408 957 7780470847147452 test.1_part1.pbi 132c9eecf11b0e50
958 1331 7780470850817453 test.1.pbd 363d5d355a216cdf
1331 2960 7780470866947418 test.1.pbw f11e09b552b4c82f
32 490 7780470894370915 tim.pbi f07c6d790a519d93
491 1020 7780470899670910 test.1_part1.pbi 132c9eecf11b0e50
1020 1362 7780470903100885 test.1.pbd 363d5d355a216cdf
1363 2958 7780470918730892 test.1.pbw f11e09b552b4c82f
32 403 7780471109402400 tim.pbi f07c6d790a519d93
404 961 7780471114982410 test.1_part1.pbi 132c9eecf11b0e50
961 1303 7780471118412410 test.1.pbd 363d5d355a216cdf
1304 2897 7780471133992395 test.1.pbw f11e09b552b4c82f
36 429 7780471284169802 tim.pbi f07c6d790a519d93
429 1024 7780471290249805 test.1_part1.pbi 132c9eecf11b0e50
1024 1404 7780471293869813 test.1.pbd 363d5d355a216cdf
1405 3011 7780471309799785 test.1.pbw f11e09b552b4c82f
32 400 7780472177900002 tim.pbi f07c6d790a519d93
400 933 7780472183299998 test.1_part1.pbi 132c9eecf11b0e50
933 1272 7780472186699991 test.1.pbd 363d5d355a216cdf
1273 2856 7780472202159955 test.1.pbw f11e09b552b4c82f
32 396 7780472310710283 tim.pbi f07c6d790a519d93
396 931 7780472316070276 test.1_part1.pbi 132c9eecf11b0e50
931 1272 7780472319490274 test.1.pbd 363d5d355a216cdf
1273 2867 7780472335087873 test.1.pbw f11e09b552b4c82f
33 487 7780472485696402 tim.pbi f07c6d790a519d93
487 1037 7780472491206375 test.1_part1.pbi 132c9eecf11b0e50
1037 1376 7780472494596371 test.1.pbd 363d5d355a216cdf
1376 2942 7780472509926379 test.1.pbw f11e09b552b4c82f
32 393 7780472618508036 tim.pbi f07c6d790a519d93
393 937 7780472623938033 test.1_part1.pbi 132c9eecf11b0e50
938 1286 7780472627418015 test.1.pbd 363d5d355a216cdf
1287 2894 7780472643188022 test.1.pbw f11e09b552b4c82f
32 396 7780472669579323 tim.pbi f07c6d790a519d93
397 930 7780472674929320 test.1_part1.pbi 132c9eecf11b0e50
931 1274 7780472678359320 test.1.pbd 363d5d355a216cdf
1274 2867 7780472693979325 test.1.pbw f11e09b552b4c82f
32 377 7780472720204098 tim.pbi f07c6d790a519d93
378 912 7780472725554115 test.1_part1.pbi 132c9eecf11b0e50
912 1251 7780472728944091 test.1.pbd 363d5d355a216cdf
1251 2835 7780472744444077 test.1.pbw f11e09b552b4c82f
32 503 7780472812669599 tim.pbi f07c6d790a519d93
503 1043 7780472818069572 test.1_part1.pbi 132c9eecf11b0e50
1043 1387 7780472821519595 test.1.pbd 363d5d355a216cdf
1388 2967 7780472836985557 test.1.pbw f11e09b552b4c82f
32 399 7780472945623290 tim.pbi f07c6d790a519d93
400 955 7780472951193262 test.1_part1.pbi 132c9eecf11b0e50
956 1304 7780472954673258 test.1.pbd 363d5d355a216cdf
1305 2921 7780472970513264 test.1.pbw f11e09b552b4c82f
33 378 7780473079008484 tools.pbi 50c1b905eccec5a9
378 914 7780473084398478 test.1_part1.pbi 132c9eecf11b0e50
914 1259 7780473087857663 test.1.pbd 363d5d355a216cdf
1259 2884 7780473103767648 test.1.pbw f11e09b552b4c82f
33 404 7780473130243055 tools.pbi 50c1b905eccec5a9
404 960 7780473135933134 test.1_part1.pbi 132c9eecf11b0e50
960 1350 7780473139633060 test.1.pbd 363d5d355a216cdf
1351 2947 7780473155573124 test.1.pbw f11e09b552b4c82f
36 378 7780473243562326 tools.pbi 50c1b905eccec5a9
378 913 7780473248922322 test.1_part1.pbi 132c9eecf11b0e50
914 1265 7780473252442315 test.1.pbd 363d5d355a216cdf
1265 2866 7780473268092329 test.1.pbw f11e09b552b4c82f
34 469 7780473396839426 usart.pbi 7c2d93866867ab60
35 472 7780473396879440 tools.pbi 50c1b905eccec5a9
41 472 7780473396769433 flash_save.pbi dc7405226be28cc6
31 544 7780473397119437 tim.pbi f07c6d790a519d93
37 574 7780473397959426 modbus_log.pbi 596603da5f343c45
39 591 7780473398079435 gpio.pbi a088b5271f02118a
469 859 7780473400699426 main.pbi 9c0a6aa02351636a
544 1165 7780473403659423 test.1_part1.pbi 132c9eecf11b0e50
860 1450 7780473406729420 test.1_part0.pbi 60db414ccd7a80f4
1451 1827 7780473410439429 test.1.pbd 363d5d355a216cdf
1828 3717 7780473428979417 test.1.pbw f11e09b552b4c82f
42 487 7780473558806508 main.pbi 9c0a6aa02351636a
36 490 7780473558806508 usart.pbi 7c2d93866867ab60
31 508 7780473559096507 tim.pbi f07c6d790a519d93
40 610 7780473559966506 gpio.pbi a088b5271f02118a
38 610 7780473559986502 flash_save.pbi dc7405226be28cc6
34 610 7780473560026504 tools.pbi 50c1b905eccec5a9
488 852 7780473562536529 modbus_log.pbi 596603da5f343c45
611 1177 7780473565726508 test.1_part1.pbi 132c9eecf11b0e50
852 1387 7780473567896500 test.1_part0.pbi 60db414ccd7a80f4
1387 1740 7780473571426514 test.1.pbd 363d5d355a216cdf
1741 3363 7780473587252683 test.1.pbw f11e09b552b4c82f
33 489 7780473614741806 tim.pbi f07c6d790a519d93
489 1016 7780473620031805 test.1_part1.pbi 132c9eecf11b0e50
1017 1355 7780473623411784 test.1.pbd 363d5d355a216cdf
1355 2994 7780473639301880 test.1.pbw f11e09b552b4c82f
32 504 7780473667090505 tim.pbi f07c6d790a519d93
505 1038 7780473672440500 test.1_part1.pbi 132c9eecf11b0e50
1039 1374 7780473675800494 test.1.pbd 363d5d355a216cdf
1375 2989 7780473691571675 test.1.pbw f11e09b552b4c82f

+ 8
- 7
PLSR/PLSR/EWARM/test.1/Obj/build.ninja View File

@@ -30,6 +30,7 @@ build stm32f4xx_hal_msp.pbi : index stm32f4xx_hal_msp.xcl
build stm32f4xx_hal_timebase_tim.pbi : index stm32f4xx_hal_timebase_tim.xcl build stm32f4xx_hal_timebase_tim.pbi : index stm32f4xx_hal_timebase_tim.xcl
build stm32f4xx_it.pbi : index stm32f4xx_it.xcl build stm32f4xx_it.pbi : index stm32f4xx_it.xcl
build tim.pbi : index tim.xcl build tim.pbi : index tim.xcl
build tools.pbi : index tools.xcl
build usart.pbi : index usart.xcl build usart.pbi : index usart.xcl
build system_stm32f4xx.pbi : index system_stm32f4xx.xcl build system_stm32f4xx.pbi : index system_stm32f4xx.xcl
build stm32f4xx_hal.pbi : index stm32f4xx_hal.xcl build stm32f4xx_hal.pbi : index stm32f4xx_hal.xcl
@@ -71,13 +72,13 @@ build os_cpu_c.pbi : index os_cpu_c.xcl
build os_dbg.pbi : index os_dbg.xcl build os_dbg.pbi : index os_dbg.xcl
build ucos_ii.pbi : index ucos_ii.xcl build ucos_ii.pbi : index ucos_ii.xcl
build test.1_part0.pbi : link dma.pbi flash_save.pbi gpio.pbi main.pbi modbus_crc.pbi modbus_log.pbi stm32f4xx_hal_msp.pbi build test.1_part0.pbi : link dma.pbi flash_save.pbi gpio.pbi main.pbi modbus_crc.pbi modbus_log.pbi stm32f4xx_hal_msp.pbi
build test.1_part1.pbi : link stm32f4xx_hal_timebase_tim.pbi stm32f4xx_it.pbi tim.pbi usart.pbi system_stm32f4xx.pbi stm32f4xx_hal.pbi stm32f4xx_hal_cortex.pbi
build test.1_part2.pbi : link stm32f4xx_hal_crc.pbi stm32f4xx_hal_dma.pbi stm32f4xx_hal_dma_ex.pbi stm32f4xx_hal_exti.pbi stm32f4xx_hal_flash.pbi stm32f4xx_hal_flash_ex.pbi stm32f4xx_hal_flash_ramfunc.pbi
build test.1_part3.pbi : link stm32f4xx_hal_gpio.pbi stm32f4xx_hal_i2c.pbi stm32f4xx_hal_i2c_ex.pbi stm32f4xx_hal_pwr.pbi stm32f4xx_hal_pwr_ex.pbi stm32f4xx_hal_rcc.pbi stm32f4xx_hal_rcc_ex.pbi
build test.1_part4.pbi : link stm32f4xx_hal_sram.pbi stm32f4xx_hal_tim.pbi stm32f4xx_hal_tim_ex.pbi stm32f4xx_hal_uart.pbi stm32f4xx_hal_usart.pbi stm32f4xx_hal_wwdg.pbi stm32f4xx_ll_crc.pbi
build test.1_part5.pbi : link stm32f4xx_ll_dac.pbi stm32f4xx_ll_dma.pbi stm32f4xx_ll_exti.pbi stm32f4xx_ll_gpio.pbi stm32f4xx_ll_i2c.pbi stm32f4xx_ll_pwr.pbi stm32f4xx_ll_rcc.pbi
build test.1_part6.pbi : link stm32f4xx_ll_rng.pbi stm32f4xx_ll_spi.pbi stm32f4xx_ll_tim.pbi stm32f4xx_ll_usart.pbi app_hooks.pbi os_cpu_c.pbi os_dbg.pbi
build test.1_part7.pbi : link ucos_ii.pbi
build test.1_part1.pbi : link stm32f4xx_hal_timebase_tim.pbi stm32f4xx_it.pbi tim.pbi tools.pbi usart.pbi system_stm32f4xx.pbi stm32f4xx_hal.pbi
build test.1_part2.pbi : link stm32f4xx_hal_cortex.pbi stm32f4xx_hal_crc.pbi stm32f4xx_hal_dma.pbi stm32f4xx_hal_dma_ex.pbi stm32f4xx_hal_exti.pbi stm32f4xx_hal_flash.pbi stm32f4xx_hal_flash_ex.pbi
build test.1_part3.pbi : link stm32f4xx_hal_flash_ramfunc.pbi stm32f4xx_hal_gpio.pbi stm32f4xx_hal_i2c.pbi stm32f4xx_hal_i2c_ex.pbi stm32f4xx_hal_pwr.pbi stm32f4xx_hal_pwr_ex.pbi stm32f4xx_hal_rcc.pbi
build test.1_part4.pbi : link stm32f4xx_hal_rcc_ex.pbi stm32f4xx_hal_sram.pbi stm32f4xx_hal_tim.pbi stm32f4xx_hal_tim_ex.pbi stm32f4xx_hal_uart.pbi stm32f4xx_hal_usart.pbi stm32f4xx_hal_wwdg.pbi
build test.1_part5.pbi : link stm32f4xx_ll_crc.pbi stm32f4xx_ll_dac.pbi stm32f4xx_ll_dma.pbi stm32f4xx_ll_exti.pbi stm32f4xx_ll_gpio.pbi stm32f4xx_ll_i2c.pbi stm32f4xx_ll_pwr.pbi
build test.1_part6.pbi : link stm32f4xx_ll_rcc.pbi stm32f4xx_ll_rng.pbi stm32f4xx_ll_spi.pbi stm32f4xx_ll_tim.pbi stm32f4xx_ll_usart.pbi app_hooks.pbi os_cpu_c.pbi
build test.1_part7.pbi : link os_dbg.pbi ucos_ii.pbi
build test.1.pbd : link test.1_part0.pbi test.1_part1.pbi test.1_part2.pbi test.1_part3.pbi test.1_part4.pbi test.1_part5.pbi test.1_part6.pbi test.1_part7.pbi build test.1.pbd : link test.1_part0.pbi test.1_part1.pbi test.1_part2.pbi test.1_part3.pbi test.1_part4.pbi test.1_part5.pbi test.1_part6.pbi test.1_part7.pbi
build test.1.pbw : browsedata test.1.pbd build test.1.pbw : browsedata test.1.pbd




BIN
PLSR/PLSR/EWARM/test.1/Obj/gpio.pbi View File


+ 2
- 1
PLSR/PLSR/EWARM/test.1/Obj/gpio.pbi.dep View File

@@ -53,4 +53,5 @@ gpio.pbi: \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h

BIN
PLSR/PLSR/EWARM/test.1/Obj/main.pbi View File


+ 1
- 0
PLSR/PLSR/EWARM/test.1/Obj/main.pbi.dep View File

@@ -55,6 +55,7 @@ main.pbi: \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\tim.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\tim.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\usart.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\usart.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\dma.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\dma.h \


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1.pbd View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1.pbd.browse View File


+ 29481
- 29649
PLSR/PLSR/EWARM/test.1/Obj/test.1.pbw
File diff suppressed because it is too large
View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1_part0.pbi View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1_part1.pbi View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1_part2.pbi View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1_part3.pbi View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1_part4.pbi View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1_part6.pbi View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/test.1_part7.pbi View File


BIN
PLSR/PLSR/EWARM/test.1/Obj/tim.pbi View File


+ 55
- 52
PLSR/PLSR/EWARM/test.1/Obj/tim.pbi.dep View File

@@ -1,53 +1,56 @@
tim.pbi: \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\os_trace.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \
E:\Software\IAR\arm\inc\c\DLib_float_setup.h \
E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\math.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\usart.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_log.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\flash_save.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_crc.h \
E:\Software\IAR\arm\inc\c\stdarg.h \
E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \
E:\Software\IAR\arm\inc\c\stdlib.h E:\Software\IAR\arm\inc\c\ctype.h \
E:\Software\IAR\arm\inc\c\DLib_Product_string.h \
E:\Software\IAR\arm\inc\c\string.h E:\Software\IAR\arm\inc\c\stdio.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h \
E:\Software\IAR\arm\inc\c\ysizet.h E:\Software\IAR\arm\inc\c\stddef.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\mpu_armv7.h \
E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_iccarm.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_compiler.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_version.h \
E:\Software\IAR\arm\inc\c\DLib_Product.h \
tim.pbi: e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\tim.c \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\tim.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/main.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\stm32f4xx_hal_conf.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_rcc.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include\stm32f4xx.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\core_cm4.h \
E:\Software\IAR\arm\inc\c\stdint.h E:\Software\IAR\arm\inc\c\ycheck.h \
E:\Software\IAR\arm\inc\c\yvals.h \
E:\Software\IAR\arm\inc\c\DLib_Defaults.h \ E:\Software\IAR\arm\inc\c\DLib_Defaults.h \
E:\Software\IAR\arm\inc\c\yvals.h E:\Software\IAR\arm\inc\c\stdint.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\core_cm4.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\stm32f4xx_hal_conf.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\main.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\tim.c
E:\\Software\\IAR\\arm\\inc\\c\\DLib_Config_Full.h \
E:\Software\IAR\arm\inc\c\DLib_Product.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_version.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_compiler.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\cmsis_iccarm.h \
E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/mpu_armv7.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
E:\Software\IAR\arm\inc\c\stddef.h E:\Software\IAR\arm\inc\c\ysizet.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_gpio.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_exti.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_dma.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_cortex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_flash.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_pwr.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \
E:\Software\IAR\arm\inc\c\stdio.h E:\Software\IAR\arm\inc\c\string.h \
E:\Software\IAR\arm\inc\c\DLib_Product_string.h \
E:\Software\IAR\arm\inc\c\ctype.h E:\Software\IAR\arm\inc\c\stdlib.h \
E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \
E:\Software\IAR\arm\inc\c\stdarg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/tim.h \
E:\Software\IAR\arm\inc\c\math.h \
E:\Software\IAR\arm\inc\c\DLib_float_setup.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h

BIN
PLSR/PLSR/EWARM/test.1/Obj/usart.pbi View File


+ 2
- 1
PLSR/PLSR/EWARM/test.1/Obj/usart.pbi.dep View File

@@ -53,4 +53,5 @@ usart.pbi: \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h

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