训练营PLSR题目
Nie możesz wybrać więcej, niż 25 tematów Tematy muszą się zaczynać od litery lub cyfry, mogą zawierać myślniki ('-') i mogą mieć do 35 znaków.
 
 
 
 
 
 

287 wiersze
13 KiB

  1. ;********************************************************************************************************
  2. ; uC/CPU
  3. ; CPU CONFIGURATION & PORT LAYER
  4. ;
  5. ; (c) Copyright 2004-2013; Micrium, Inc.; Weston, FL
  6. ;
  7. ; All rights reserved. Protected by international copyright laws.
  8. ;
  9. ; uC/CPU is provided in source form to registered licensees ONLY. It is
  10. ; illegal to distribute this source code to any third party unless you receive
  11. ; written permission by an authorized Micrium representative. Knowledge of
  12. ; the source code may NOT be used to develop a similar product.
  13. ;
  14. ; Please help us continue to provide the Embedded community with the finest
  15. ; software available. Your honesty is greatly appreciated.
  16. ;
  17. ; You can find our product's user manual, API reference, release notes and
  18. ; more information at https://doc.micrium.com.
  19. ; You can contact us at www.micrium.com.
  20. ;********************************************************************************************************
  21. ;********************************************************************************************************
  22. ;
  23. ; CPU PORT FILE
  24. ;
  25. ; ARM-Cortex-M4
  26. ; RealView Development Suite
  27. ; RealView Microcontroller Development Kit (MDK)
  28. ; ARM Developer Suite (ADS)
  29. ; Keil uVision
  30. ;
  31. ; Filename : cpu_a.asm
  32. ; Version : V1.30.01.00
  33. ; Programmer(s) : JJL
  34. ;********************************************************************************************************
  35. ;********************************************************************************************************
  36. ; PUBLIC FUNCTIONS
  37. ;********************************************************************************************************
  38. EXPORT CPU_IntDis
  39. EXPORT CPU_IntEn
  40. EXPORT CPU_SR_Save
  41. EXPORT CPU_SR_Restore
  42. EXPORT CPU_WaitForInt
  43. EXPORT CPU_WaitForExcept
  44. EXPORT CPU_CntLeadZeros
  45. EXPORT CPU_CntTrailZeros
  46. EXPORT CPU_RevBits
  47. ;********************************************************************************************************
  48. ; CODE GENERATION DIRECTIVES
  49. ;********************************************************************************************************
  50. AREA |.text|, CODE, READONLY, ALIGN=2
  51. THUMB
  52. REQUIRE8
  53. PRESERVE8
  54. ;********************************************************************************************************
  55. ; DISABLE and ENABLE INTERRUPTS
  56. ;
  57. ; Description: Disable/Enable interrupts.
  58. ;
  59. ; Prototypes : void CPU_IntDis(void);
  60. ; void CPU_IntEn (void);
  61. ;********************************************************************************************************
  62. CPU_IntDis
  63. CPSID I
  64. BX LR
  65. CPU_IntEn
  66. CPSIE I
  67. BX LR
  68. ;********************************************************************************************************
  69. ; CRITICAL SECTION FUNCTIONS
  70. ;
  71. ; Description : Disable/Enable interrupts by preserving the state of interrupts. Generally speaking, the
  72. ; state of the interrupt disable flag is stored in the local variable 'cpu_sr' & interrupts
  73. ; are then disabled ('cpu_sr' is allocated in all functions that need to disable interrupts).
  74. ; The previous interrupt state is restored by copying 'cpu_sr' into the CPU's status register.
  75. ;
  76. ; Prototypes : CPU_SR CPU_SR_Save (void);
  77. ; void CPU_SR_Restore(CPU_SR cpu_sr);
  78. ;
  79. ; Note(s) : (1) These functions are used in general like this :
  80. ;
  81. ; void Task (void *p_arg)
  82. ; {
  83. ; CPU_SR_ALLOC(); /* Allocate storage for CPU status register */
  84. ; :
  85. ; :
  86. ; CPU_CRITICAL_ENTER(); /* cpu_sr = CPU_SR_Save(); */
  87. ; :
  88. ; :
  89. ; CPU_CRITICAL_EXIT(); /* CPU_SR_Restore(cpu_sr); */
  90. ; :
  91. ; }
  92. ;********************************************************************************************************
  93. CPU_SR_Save
  94. MRS R0, PRIMASK ; Set prio int mask to mask all (except faults)
  95. CPSID I
  96. BX LR
  97. CPU_SR_Restore ; See Note #2.
  98. MSR PRIMASK, R0
  99. BX LR
  100. ;********************************************************************************************************
  101. ; WAIT FOR INTERRUPT
  102. ;
  103. ; Description : Enters sleep state, which will be exited when an interrupt is received.
  104. ;
  105. ; Prototypes : void CPU_WaitForInt (void)
  106. ;
  107. ; Argument(s) : none.
  108. ;********************************************************************************************************
  109. CPU_WaitForInt
  110. WFI ; Wait for interrupt
  111. BX LR
  112. ;********************************************************************************************************
  113. ; WAIT FOR EXCEPTION
  114. ;
  115. ; Description : Enters sleep state, which will be exited when an exception is received.
  116. ;
  117. ; Prototypes : void CPU_WaitForExcept (void)
  118. ;
  119. ; Argument(s) : none.
  120. ;********************************************************************************************************
  121. CPU_WaitForExcept
  122. WFE ; Wait for exception
  123. BX LR
  124. ;********************************************************************************************************
  125. ; CPU_CntLeadZeros()
  126. ; COUNT LEADING ZEROS
  127. ;
  128. ; Description : Counts the number of contiguous, most-significant, leading zero bits before the
  129. ; first binary one bit in a data value.
  130. ;
  131. ; Prototype : CPU_DATA CPU_CntLeadZeros(CPU_DATA val);
  132. ;
  133. ; Argument(s) : val Data value to count leading zero bits.
  134. ;
  135. ; Return(s) : Number of contiguous, most-significant, leading zero bits in 'val'.
  136. ;
  137. ; Caller(s) : Application.
  138. ;
  139. ; This function is an INTERNAL CPU module function but MAY be called by application
  140. ; function(s).
  141. ;
  142. ; Note(s) : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
  143. ; CPU WORD CONFIGURATION Note #1').
  144. ;
  145. ; (b) For 32-bit values :
  146. ;
  147. ; b31 b30 b29 ... b04 b03 b02 b01 b00 # Leading Zeros
  148. ; --- --- --- --- --- --- --- --- ---------------
  149. ; 1 x x x x x x x 0
  150. ; 0 1 x x x x x x 1
  151. ; 0 0 1 x x x x x 2
  152. ; : : : : : : : : :
  153. ; : : : : : : : : :
  154. ; 0 0 0 1 x x x x 27
  155. ; 0 0 0 0 1 x x x 28
  156. ; 0 0 0 0 0 1 x x 29
  157. ; 0 0 0 0 0 0 1 x 30
  158. ; 0 0 0 0 0 0 0 1 31
  159. ; 0 0 0 0 0 0 0 0 32
  160. ;
  161. ;
  162. ; (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_LEAD_ZEROS_ASM_PRESENT is
  163. ; #define'd in 'cpu_cfg.h' or 'cpu.h'.
  164. ;********************************************************************************************************
  165. CPU_CntLeadZeros
  166. CLZ R0, R0 ; Count leading zeros
  167. BX LR
  168. ;********************************************************************************************************
  169. ; CPU_CntTrailZeros()
  170. ; COUNT TRAILING ZEROS
  171. ;
  172. ; Description : Counts the number of contiguous, least-significant, trailing zero bits before the
  173. ; first binary one bit in a data value.
  174. ;
  175. ; Prototype : CPU_DATA CPU_CntTrailZeros(CPU_DATA val);
  176. ;
  177. ; Argument(s) : val Data value to count trailing zero bits.
  178. ;
  179. ; Return(s) : Number of contiguous, least-significant, trailing zero bits in 'val'.
  180. ;
  181. ; Caller(s) : Application.
  182. ;
  183. ; This function is an INTERNAL CPU module function but MAY be called by application
  184. ; function(s).
  185. ;
  186. ; Note(s) : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
  187. ; CPU WORD CONFIGURATION Note #1').
  188. ;
  189. ; (b) For 32-bit values :
  190. ;
  191. ; b31 b30 b29 b28 b27 ... b02 b01 b00 # Trailing Zeros
  192. ; --- --- --- --- --- --- --- --- ----------------
  193. ; x x x x x x x 1 0
  194. ; x x x x x x 1 0 1
  195. ; x x x x x 1 0 0 2
  196. ; : : : : : : : : :
  197. ; : : : : : : : : :
  198. ; x x x x 1 0 0 0 27
  199. ; x x x 1 0 0 0 0 28
  200. ; x x 1 0 0 0 0 0 29
  201. ; x 1 0 0 0 0 0 0 30
  202. ; 1 0 0 0 0 0 0 0 31
  203. ; 0 0 0 0 0 0 0 0 32
  204. ;
  205. ;
  206. ; (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT is
  207. ; #define'd in 'cpu_cfg.h' or 'cpu.h'.
  208. ;********************************************************************************************************
  209. CPU_CntTrailZeros
  210. RBIT R0, R0 ; Reverse bits
  211. CLZ R0, R0 ; Count trailing zeros
  212. BX LR
  213. ;********************************************************************************************************
  214. ; CPU_RevBits()
  215. ; REVERSE BITS
  216. ;
  217. ; Description : Reverses the bits in a data value.
  218. ;
  219. ; Prototypes : CPU_DATA CPU_RevBits(CPU_DATA val);
  220. ;
  221. ; Argument(s) : val Data value to reverse bits.
  222. ;
  223. ; Return(s) : Value with all bits in 'val' reversed (see Note #1).
  224. ;
  225. ; Caller(s) : Application.
  226. ;
  227. ; This function is an INTERNAL CPU module function but MAY be called by application function(s).
  228. ;
  229. ; Note(s) : (1) The final, reversed data value for 'val' is such that :
  230. ;
  231. ; 'val's final bit 0 = 'val's original bit N
  232. ; 'val's final bit 1 = 'val's original bit (N - 1)
  233. ; 'val's final bit 2 = 'val's original bit (N - 2)
  234. ;
  235. ; ... ...
  236. ;
  237. ; 'val's final bit (N - 2) = 'val's original bit 2
  238. ; 'val's final bit (N - 1) = 'val's original bit 1
  239. ; 'val's final bit N = 'val's original bit 0
  240. ;********************************************************************************************************
  241. CPU_RevBits
  242. RBIT R0, R0 ; Reverse bits
  243. BX LR
  244. ;********************************************************************************************************
  245. ; CPU ASSEMBLY PORT FILE END
  246. ;********************************************************************************************************
  247. END