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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32F4xx_LL_DMA2D_H
  20. #define STM32F4xx_LL_DMA2D_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f4xx.h"
  26. /** @addtogroup STM32F4xx_LL_Driver
  27. * @{
  28. */
  29. #if defined (DMA2D)
  30. /** @defgroup DMA2D_LL DMA2D
  31. * @{
  32. */
  33. /* Private types -------------------------------------------------------------*/
  34. /* Private variables ---------------------------------------------------------*/
  35. /* Private constants ---------------------------------------------------------*/
  36. /* Private macros ------------------------------------------------------------*/
  37. #if defined(USE_FULL_LL_DRIVER)
  38. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  39. * @{
  40. */
  41. /**
  42. * @}
  43. */
  44. #endif /*USE_FULL_LL_DRIVER*/
  45. /* Exported types ------------------------------------------------------------*/
  46. #if defined(USE_FULL_LL_DRIVER)
  47. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  48. * @{
  49. */
  50. /**
  51. * @brief LL DMA2D Init Structure Definition
  52. */
  53. typedef struct
  54. {
  55. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  56. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  57. This parameter can be modified afterwards,
  58. using unitary function @ref LL_DMA2D_SetMode(). */
  59. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  60. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  61. This parameter can be modified afterwards using,
  62. unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  63. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  64. - This parameter must be a number between:
  65. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  66. - This parameter must be a number between:
  67. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  68. - This parameter must be a number between:
  69. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  70. - This parameter must be a number between:
  71. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  72. - This parameter must be a number between:
  73. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  74. This parameter can be modified afterwards,
  75. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  76. function @ref LL_DMA2D_ConfigOutputColor(). */
  77. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  78. - This parameter must be a number between:
  79. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between:
  81. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  82. - This parameter must be a number between:
  83. Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  84. - This parameter must be a number between:
  85. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  86. - This parameter must be a number between:
  87. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  88. This parameter can be modified afterwards
  89. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  90. function @ref LL_DMA2D_ConfigOutputColor(). */
  91. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  92. - This parameter must be a number between:
  93. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  94. - This parameter must be a number between:
  95. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  96. - This parameter must be a number between:
  97. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  98. - This parameter must be a number between:
  99. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  100. - This parameter must be a number between:
  101. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  102. This parameter can be modified afterwards
  103. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  104. function @ref LL_DMA2D_ConfigOutputColor(). */
  105. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  106. - This parameter must be a number between:
  107. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  108. - This parameter must be a number between:
  109. Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  110. - This parameter must be a number between:
  111. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  112. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  113. This parameter can be modified afterwards using,
  114. unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  115. function @ref LL_DMA2D_ConfigOutputColor(). */
  116. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  117. - This parameter must be a number between:
  118. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  119. This parameter can be modified afterwards,
  120. using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  121. uint32_t LineOffset; /*!< Specifies the output line offset value.
  122. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  123. This parameter can be modified afterwards,
  124. using unitary function @ref LL_DMA2D_SetLineOffset(). */
  125. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  126. - This parameter must be a number between:
  127. Min_Data = 0x0000 and Max_Data = 0xFFFF.
  128. This parameter can be modified afterwards,
  129. using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  130. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transferred.
  131. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  132. This parameter can be modified afterwards using,
  133. unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  134. } LL_DMA2D_InitTypeDef;
  135. /**
  136. * @brief LL DMA2D Layer Configuration Structure Definition
  137. */
  138. typedef struct
  139. {
  140. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  141. - This parameter must be a number between:
  142. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  143. This parameter can be modified afterwards using unitary functions
  144. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  145. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  146. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  147. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  148. This parameter can be modified afterwards using unitary functions
  149. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  150. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  151. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  152. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  153. This parameter can be modified afterwards using unitary functions
  154. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  155. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  156. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  157. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  158. This parameter can be modified afterwards using unitary functions
  159. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  160. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  161. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  162. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  163. This parameter can be modified afterwards using unitary functions
  164. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  165. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  166. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  167. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  168. This parameter can be modified afterwards using unitary functions
  169. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  170. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  171. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  172. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  173. This parameter can be modified afterwards using unitary functions
  174. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  175. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  176. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  177. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  178. This parameter can be modified afterwards using unitary functions
  179. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  180. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  181. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  182. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  183. This parameter can be modified afterwards using unitary functions
  184. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  185. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  186. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  187. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  188. This parameter can be modified afterwards using unitary functions
  189. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  190. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  191. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  192. - This parameter must be a number between:
  193. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  194. This parameter can be modified afterwards using unitary functions
  195. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  196. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  197. } LL_DMA2D_LayerCfgTypeDef;
  198. /**
  199. * @brief LL DMA2D Output Color Structure Definition
  200. */
  201. typedef struct
  202. {
  203. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  204. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  205. This parameter can be modified afterwards using
  206. unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  207. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  208. - This parameter must be a number between:
  209. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  210. - This parameter must be a number between:
  211. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  212. - This parameter must be a number between:
  213. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  214. - This parameter must be a number between:
  215. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  216. - This parameter must be a number between:
  217. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  218. This parameter can be modified afterwards using,
  219. unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  220. function @ref LL_DMA2D_ConfigOutputColor(). */
  221. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  222. - This parameter must be a number between:
  223. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  224. - This parameter must be a number between
  225. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  226. - This parameter must be a number between:
  227. Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  228. - This parameter must be a number between:
  229. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  230. - This parameter must be a number between:
  231. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  232. This parameter can be modified afterwards,
  233. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  234. function @ref LL_DMA2D_ConfigOutputColor(). */
  235. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  236. - This parameter must be a number between:
  237. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  238. - This parameter must be a number between:
  239. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  240. - This parameter must be a number between:
  241. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  242. - This parameter must be a number between:
  243. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  244. - This parameter must be a number between:
  245. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  246. This parameter can be modified afterwards,
  247. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  248. function @ref LL_DMA2D_ConfigOutputColor(). */
  249. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  250. - This parameter must be a number between:
  251. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  252. - This parameter must be a number between:
  253. Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  254. - This parameter must be a number between:
  255. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  256. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  257. This parameter can be modified afterwards,
  258. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  259. function @ref LL_DMA2D_ConfigOutputColor(). */
  260. } LL_DMA2D_ColorTypeDef;
  261. /**
  262. * @}
  263. */
  264. #endif /* USE_FULL_LL_DRIVER */
  265. /* Exported constants --------------------------------------------------------*/
  266. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  267. * @{
  268. */
  269. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  270. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  271. * @{
  272. */
  273. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  274. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  275. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  276. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  277. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  278. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  279. /**
  280. * @}
  281. */
  282. /** @defgroup DMA2D_LL_EC_IT IT Defines
  283. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  284. * @{
  285. */
  286. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  287. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  288. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  289. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  290. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  291. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  292. /**
  293. * @}
  294. */
  295. /** @defgroup DMA2D_LL_EC_MODE Mode
  296. * @{
  297. */
  298. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  299. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  300. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  301. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  302. /**
  303. * @}
  304. */
  305. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  306. * @{
  307. */
  308. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  309. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  310. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  311. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  312. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  313. /**
  314. * @}
  315. */
  316. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  317. * @{
  318. */
  319. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  320. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  321. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  322. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  323. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  324. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  325. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  326. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  327. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  328. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  329. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  330. /**
  331. * @}
  332. */
  333. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  334. * @{
  335. */
  336. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  337. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by
  338. programmed alpha value */
  339. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by
  340. programmed alpha value with,
  341. original alpha channel value */
  342. /**
  343. * @}
  344. */
  345. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  346. * @{
  347. */
  348. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  349. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  350. /**
  351. * @}
  352. */
  353. /**
  354. * @}
  355. */
  356. /* Exported macro ------------------------------------------------------------*/
  357. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  358. * @{
  359. */
  360. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  361. * @{
  362. */
  363. /**
  364. * @brief Write a value in DMA2D register.
  365. * @param __INSTANCE__ DMA2D Instance
  366. * @param __REG__ Register to be written
  367. * @param __VALUE__ Value to be written in the register
  368. * @retval None
  369. */
  370. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
  371. /**
  372. * @brief Read a value in DMA2D register.
  373. * @param __INSTANCE__ DMA2D Instance
  374. * @param __REG__ Register to be read
  375. * @retval Register value
  376. */
  377. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
  378. /**
  379. * @}
  380. */
  381. /**
  382. * @}
  383. */
  384. /* Exported functions --------------------------------------------------------*/
  385. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  386. * @{
  387. */
  388. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  389. * @{
  390. */
  391. /**
  392. * @brief Start a DMA2D transfer.
  393. * @rmtoll CR START LL_DMA2D_Start
  394. * @param DMA2Dx DMA2D Instance
  395. * @retval None
  396. */
  397. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  398. {
  399. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  400. }
  401. /**
  402. * @brief Indicate if a DMA2D transfer is ongoing.
  403. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  404. * @param DMA2Dx DMA2D Instance
  405. * @retval State of bit (1 or 0).
  406. */
  407. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  408. {
  409. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
  410. }
  411. /**
  412. * @brief Suspend DMA2D transfer.
  413. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  414. * @rmtoll CR SUSP LL_DMA2D_Suspend
  415. * @param DMA2Dx DMA2D Instance
  416. * @retval None
  417. */
  418. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  419. {
  420. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  421. }
  422. /**
  423. * @brief Resume DMA2D transfer.
  424. * @note This API can be used to resume automatic foreground or background CLUT loading.
  425. * @rmtoll CR SUSP LL_DMA2D_Resume
  426. * @param DMA2Dx DMA2D Instance
  427. * @retval None
  428. */
  429. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  430. {
  431. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  432. }
  433. /**
  434. * @brief Indicate if DMA2D transfer is suspended.
  435. * @note This API can be used to indicate whether or not automatic foreground or
  436. * background CLUT loading is suspended.
  437. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  438. * @param DMA2Dx DMA2D Instance
  439. * @retval State of bit (1 or 0).
  440. */
  441. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  442. {
  443. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
  444. }
  445. /**
  446. * @brief Abort DMA2D transfer.
  447. * @note This API can be used to abort automatic foreground or background CLUT loading.
  448. * @rmtoll CR ABORT LL_DMA2D_Abort
  449. * @param DMA2Dx DMA2D Instance
  450. * @retval None
  451. */
  452. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  453. {
  454. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  455. }
  456. /**
  457. * @brief Indicate if DMA2D transfer is aborted.
  458. * @note This API can be used to indicate whether or not automatic foreground or
  459. * background CLUT loading is aborted.
  460. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  461. * @param DMA2Dx DMA2D Instance
  462. * @retval State of bit (1 or 0).
  463. */
  464. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  465. {
  466. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
  467. }
  468. /**
  469. * @brief Set DMA2D mode.
  470. * @rmtoll CR MODE LL_DMA2D_SetMode
  471. * @param DMA2Dx DMA2D Instance
  472. * @param Mode This parameter can be one of the following values:
  473. * @arg @ref LL_DMA2D_MODE_M2M
  474. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  475. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  476. * @arg @ref LL_DMA2D_MODE_R2M
  477. * @retval None
  478. */
  479. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  480. {
  481. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  482. }
  483. /**
  484. * @brief Return DMA2D mode
  485. * @rmtoll CR MODE LL_DMA2D_GetMode
  486. * @param DMA2Dx DMA2D Instance
  487. * @retval Returned value can be one of the following values:
  488. * @arg @ref LL_DMA2D_MODE_M2M
  489. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  490. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  491. * @arg @ref LL_DMA2D_MODE_R2M
  492. */
  493. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  494. {
  495. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  496. }
  497. /**
  498. * @brief Set DMA2D output color mode.
  499. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  500. * @param DMA2Dx DMA2D Instance
  501. * @param ColorMode This parameter can be one of the following values:
  502. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  503. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  504. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  505. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  506. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  507. * @retval None
  508. */
  509. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  510. {
  511. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  512. }
  513. /**
  514. * @brief Return DMA2D output color mode.
  515. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  516. * @param DMA2Dx DMA2D Instance
  517. * @retval Returned value can be one of the following values:
  518. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  519. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  520. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  521. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  522. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  523. */
  524. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  525. {
  526. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  527. }
  528. /**
  529. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  530. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  531. * @param DMA2Dx DMA2D Instance
  532. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  533. * @retval None
  534. */
  535. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  536. {
  537. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  538. }
  539. /**
  540. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  541. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  542. * @param DMA2Dx DMA2D Instance
  543. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  544. */
  545. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  546. {
  547. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  548. }
  549. /**
  550. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  551. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  552. * @param DMA2Dx DMA2D Instance
  553. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  554. * @retval None
  555. */
  556. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  557. {
  558. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  559. }
  560. /**
  561. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  562. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  563. * @param DMA2Dx DMA2D Instance
  564. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  565. */
  566. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  567. {
  568. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  569. }
  570. /**
  571. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  572. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  573. * @param DMA2Dx DMA2D Instance
  574. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  575. * @retval None
  576. */
  577. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  578. {
  579. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  580. }
  581. /**
  582. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  583. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  584. * @param DMA2Dx DMA2D Instance
  585. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  586. */
  587. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  588. {
  589. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  590. }
  591. /**
  592. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  593. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  594. * @param DMA2Dx DMA2D Instance
  595. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  596. * @retval None
  597. */
  598. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  599. {
  600. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  601. }
  602. /**
  603. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  604. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  605. * @param DMA2Dx DMA2D Instance
  606. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  607. */
  608. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  609. {
  610. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  611. }
  612. /**
  613. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  614. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  615. * RGB565, ARGB1555 or ARGB4444.
  616. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  617. * with respect to color mode is not done by the user code.
  618. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  619. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  620. * OCOLR RED LL_DMA2D_SetOutputColor\n
  621. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  622. * @param DMA2Dx DMA2D Instance
  623. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  624. * @retval None
  625. */
  626. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  627. {
  628. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  629. OutputColor);
  630. }
  631. /**
  632. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  633. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  634. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  635. * as set by @ref LL_DMA2D_SetOutputColorMode.
  636. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  637. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  638. * OCOLR RED LL_DMA2D_GetOutputColor\n
  639. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  640. * @param DMA2Dx DMA2D Instance
  641. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  642. */
  643. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  644. {
  645. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  646. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  647. }
  648. /**
  649. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  650. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  651. * @param DMA2Dx DMA2D Instance
  652. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  653. * @retval None
  654. */
  655. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  656. {
  657. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  658. }
  659. /**
  660. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  661. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  662. * @param DMA2Dx DMA2D Instance
  663. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  664. */
  665. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  666. {
  667. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  668. }
  669. /**
  670. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  671. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  672. * @param DMA2Dx DMA2D Instance
  673. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  674. * @retval None
  675. */
  676. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  677. {
  678. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  679. }
  680. /**
  681. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  682. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  683. * @param DMA2Dx DMA2D Instance
  684. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  685. */
  686. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  687. {
  688. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  689. }
  690. /**
  691. * @brief Enable DMA2D dead time functionality.
  692. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  693. * @param DMA2Dx DMA2D Instance
  694. * @retval None
  695. */
  696. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  697. {
  698. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  699. }
  700. /**
  701. * @brief Disable DMA2D dead time functionality.
  702. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  703. * @param DMA2Dx DMA2D Instance
  704. * @retval None
  705. */
  706. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  707. {
  708. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  709. }
  710. /**
  711. * @brief Indicate if DMA2D dead time functionality is enabled.
  712. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  713. * @param DMA2Dx DMA2D Instance
  714. * @retval State of bit (1 or 0).
  715. */
  716. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  717. {
  718. return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
  719. }
  720. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  721. * @{
  722. */
  723. /**
  724. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  725. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  726. * @param DMA2Dx DMA2D Instance
  727. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  728. * @retval None
  729. */
  730. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  731. {
  732. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  733. }
  734. /**
  735. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  736. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  737. * @param DMA2Dx DMA2D Instance
  738. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  739. */
  740. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  741. {
  742. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  743. }
  744. /**
  745. * @brief Enable DMA2D foreground CLUT loading.
  746. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  747. * @param DMA2Dx DMA2D Instance
  748. * @retval None
  749. */
  750. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  751. {
  752. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  753. }
  754. /**
  755. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  756. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  757. * @param DMA2Dx DMA2D Instance
  758. * @retval State of bit (1 or 0).
  759. */
  760. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  761. {
  762. return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
  763. }
  764. /**
  765. * @brief Set DMA2D foreground color mode.
  766. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  767. * @param DMA2Dx DMA2D Instance
  768. * @param ColorMode This parameter can be one of the following values:
  769. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  770. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  771. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  772. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  773. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  774. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  775. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  776. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  777. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  778. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  779. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  780. * @retval None
  781. */
  782. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  783. {
  784. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  785. }
  786. /**
  787. * @brief Return DMA2D foreground color mode.
  788. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  789. * @param DMA2Dx DMA2D Instance
  790. * @retval Returned value can be one of the following values:
  791. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  792. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  793. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  794. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  795. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  796. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  797. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  798. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  799. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  800. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  801. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  802. */
  803. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  804. {
  805. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  806. }
  807. /**
  808. * @brief Set DMA2D foreground alpha mode.
  809. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  810. * @param DMA2Dx DMA2D Instance
  811. * @param AphaMode This parameter can be one of the following values:
  812. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  813. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  814. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  815. * @retval None
  816. */
  817. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  818. {
  819. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  820. }
  821. /**
  822. * @brief Return DMA2D foreground alpha mode.
  823. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  824. * @param DMA2Dx DMA2D Instance
  825. * @retval Returned value can be one of the following values:
  826. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  827. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  828. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  829. */
  830. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  831. {
  832. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  833. }
  834. /**
  835. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  836. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  837. * @param DMA2Dx DMA2D Instance
  838. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  839. * @retval None
  840. */
  841. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  842. {
  843. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  844. }
  845. /**
  846. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  847. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  848. * @param DMA2Dx DMA2D Instance
  849. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  850. */
  851. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  852. {
  853. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  854. }
  855. /**
  856. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  857. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  858. * @param DMA2Dx DMA2D Instance
  859. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  860. * @retval None
  861. */
  862. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  863. {
  864. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  865. }
  866. /**
  867. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  868. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  869. * @param DMA2Dx DMA2D Instance
  870. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  871. */
  872. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  873. {
  874. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  875. }
  876. /**
  877. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  878. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  879. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  880. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  881. * @param DMA2Dx DMA2D Instance
  882. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  883. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  884. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  885. * @retval None
  886. */
  887. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  888. {
  889. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  890. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  891. }
  892. /**
  893. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  894. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  895. * @param DMA2Dx DMA2D Instance
  896. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  897. * @retval None
  898. */
  899. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  900. {
  901. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  902. }
  903. /**
  904. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  905. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  906. * @param DMA2Dx DMA2D Instance
  907. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  908. */
  909. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  910. {
  911. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  912. }
  913. /**
  914. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  915. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  916. * @param DMA2Dx DMA2D Instance
  917. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  918. * @retval None
  919. */
  920. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  921. {
  922. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  923. }
  924. /**
  925. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  926. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  927. * @param DMA2Dx DMA2D Instance
  928. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  929. */
  930. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  931. {
  932. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  933. }
  934. /**
  935. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  936. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  937. * @param DMA2Dx DMA2D Instance
  938. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  939. * @retval None
  940. */
  941. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  942. {
  943. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  944. }
  945. /**
  946. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  947. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  948. * @param DMA2Dx DMA2D Instance
  949. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  950. */
  951. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  952. {
  953. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  954. }
  955. /**
  956. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  957. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  958. * @param DMA2Dx DMA2D Instance
  959. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  960. * @retval None
  961. */
  962. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  963. {
  964. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  965. }
  966. /**
  967. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  968. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  969. * @param DMA2Dx DMA2D Instance
  970. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  971. */
  972. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  973. {
  974. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  975. }
  976. /**
  977. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  978. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  979. * @param DMA2Dx DMA2D Instance
  980. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  981. * @retval None
  982. */
  983. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  984. {
  985. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  986. }
  987. /**
  988. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  989. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  990. * @param DMA2Dx DMA2D Instance
  991. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  992. */
  993. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  994. {
  995. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  996. }
  997. /**
  998. * @brief Set DMA2D foreground CLUT color mode.
  999. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1000. * @param DMA2Dx DMA2D Instance
  1001. * @param CLUTColorMode This parameter can be one of the following values:
  1002. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1003. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1004. * @retval None
  1005. */
  1006. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1007. {
  1008. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1009. }
  1010. /**
  1011. * @brief Return DMA2D foreground CLUT color mode.
  1012. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1013. * @param DMA2Dx DMA2D Instance
  1014. * @retval Returned value can be one of the following values:
  1015. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1016. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1017. */
  1018. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1019. {
  1020. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1021. }
  1022. /**
  1023. * @}
  1024. */
  1025. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1026. * @{
  1027. */
  1028. /**
  1029. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1030. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1031. * @param DMA2Dx DMA2D Instance
  1032. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1033. * @retval None
  1034. */
  1035. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1036. {
  1037. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1038. }
  1039. /**
  1040. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1041. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1042. * @param DMA2Dx DMA2D Instance
  1043. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1044. */
  1045. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1046. {
  1047. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1048. }
  1049. /**
  1050. * @brief Enable DMA2D background CLUT loading.
  1051. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1052. * @param DMA2Dx DMA2D Instance
  1053. * @retval None
  1054. */
  1055. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1056. {
  1057. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1058. }
  1059. /**
  1060. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1061. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1062. * @param DMA2Dx DMA2D Instance
  1063. * @retval State of bit (1 or 0).
  1064. */
  1065. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1066. {
  1067. return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
  1068. }
  1069. /**
  1070. * @brief Set DMA2D background color mode.
  1071. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1072. * @param DMA2Dx DMA2D Instance
  1073. * @param ColorMode This parameter can be one of the following values:
  1074. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1075. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1076. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1077. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1078. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1079. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1080. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1081. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1082. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1083. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1084. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1085. * @retval None
  1086. */
  1087. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1088. {
  1089. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1090. }
  1091. /**
  1092. * @brief Return DMA2D background color mode.
  1093. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1094. * @param DMA2Dx DMA2D Instance
  1095. * @retval Returned value can be one of the following values:
  1096. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1097. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1098. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1099. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1100. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1101. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1102. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1103. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1104. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1105. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1106. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1107. */
  1108. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1109. {
  1110. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1111. }
  1112. /**
  1113. * @brief Set DMA2D background alpha mode.
  1114. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1115. * @param DMA2Dx DMA2D Instance
  1116. * @param AphaMode This parameter can be one of the following values:
  1117. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1118. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1119. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1120. * @retval None
  1121. */
  1122. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1123. {
  1124. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1125. }
  1126. /**
  1127. * @brief Return DMA2D background alpha mode.
  1128. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1129. * @param DMA2Dx DMA2D Instance
  1130. * @retval Returned value can be one of the following values:
  1131. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1132. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1133. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1134. */
  1135. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1136. {
  1137. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1138. }
  1139. /**
  1140. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1141. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1142. * @param DMA2Dx DMA2D Instance
  1143. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1144. * @retval None
  1145. */
  1146. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1147. {
  1148. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1149. }
  1150. /**
  1151. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1152. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1153. * @param DMA2Dx DMA2D Instance
  1154. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1155. */
  1156. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1157. {
  1158. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1159. }
  1160. /**
  1161. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1162. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1163. * @param DMA2Dx DMA2D Instance
  1164. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1165. * @retval None
  1166. */
  1167. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1168. {
  1169. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1170. }
  1171. /**
  1172. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1173. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1174. * @param DMA2Dx DMA2D Instance
  1175. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1176. */
  1177. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1178. {
  1179. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1180. }
  1181. /**
  1182. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1183. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1184. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1185. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1186. * @param DMA2Dx DMA2D Instance
  1187. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1188. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1189. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1190. * @retval None
  1191. */
  1192. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1193. {
  1194. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1195. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1196. }
  1197. /**
  1198. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1199. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1200. * @param DMA2Dx DMA2D Instance
  1201. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1202. * @retval None
  1203. */
  1204. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1205. {
  1206. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1207. }
  1208. /**
  1209. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1210. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1211. * @param DMA2Dx DMA2D Instance
  1212. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1213. */
  1214. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1215. {
  1216. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1217. }
  1218. /**
  1219. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1220. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1221. * @param DMA2Dx DMA2D Instance
  1222. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1223. * @retval None
  1224. */
  1225. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1226. {
  1227. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1228. }
  1229. /**
  1230. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1231. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1232. * @param DMA2Dx DMA2D Instance
  1233. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1234. */
  1235. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1236. {
  1237. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1238. }
  1239. /**
  1240. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1241. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1242. * @param DMA2Dx DMA2D Instance
  1243. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1244. * @retval None
  1245. */
  1246. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1247. {
  1248. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1249. }
  1250. /**
  1251. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1252. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1253. * @param DMA2Dx DMA2D Instance
  1254. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1255. */
  1256. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1257. {
  1258. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1259. }
  1260. /**
  1261. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1262. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1263. * @param DMA2Dx DMA2D Instance
  1264. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1265. * @retval None
  1266. */
  1267. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1268. {
  1269. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1270. }
  1271. /**
  1272. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1273. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1274. * @param DMA2Dx DMA2D Instance
  1275. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1276. */
  1277. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1278. {
  1279. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1280. }
  1281. /**
  1282. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1283. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1284. * @param DMA2Dx DMA2D Instance
  1285. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1286. * @retval None
  1287. */
  1288. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1289. {
  1290. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1291. }
  1292. /**
  1293. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1294. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1295. * @param DMA2Dx DMA2D Instance
  1296. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1297. */
  1298. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1299. {
  1300. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1301. }
  1302. /**
  1303. * @brief Set DMA2D background CLUT color mode.
  1304. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1305. * @param DMA2Dx DMA2D Instance
  1306. * @param CLUTColorMode This parameter can be one of the following values:
  1307. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1308. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1309. * @retval None
  1310. */
  1311. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1312. {
  1313. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1314. }
  1315. /**
  1316. * @brief Return DMA2D background CLUT color mode.
  1317. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1318. * @param DMA2Dx DMA2D Instance
  1319. * @retval Returned value can be one of the following values:
  1320. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1321. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1322. */
  1323. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1324. {
  1325. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1326. }
  1327. /**
  1328. * @}
  1329. */
  1330. /**
  1331. * @}
  1332. */
  1333. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1334. * @{
  1335. */
  1336. /**
  1337. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1338. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1339. * @param DMA2Dx DMA2D Instance
  1340. * @retval State of bit (1 or 0).
  1341. */
  1342. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1343. {
  1344. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
  1345. }
  1346. /**
  1347. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1348. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1349. * @param DMA2Dx DMA2D Instance
  1350. * @retval State of bit (1 or 0).
  1351. */
  1352. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1353. {
  1354. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
  1355. }
  1356. /**
  1357. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1358. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1359. * @param DMA2Dx DMA2D Instance
  1360. * @retval State of bit (1 or 0).
  1361. */
  1362. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1363. {
  1364. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
  1365. }
  1366. /**
  1367. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1368. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1369. * @param DMA2Dx DMA2D Instance
  1370. * @retval State of bit (1 or 0).
  1371. */
  1372. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1373. {
  1374. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
  1375. }
  1376. /**
  1377. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1378. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1379. * @param DMA2Dx DMA2D Instance
  1380. * @retval State of bit (1 or 0).
  1381. */
  1382. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1383. {
  1384. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
  1385. }
  1386. /**
  1387. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1388. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1389. * @param DMA2Dx DMA2D Instance
  1390. * @retval State of bit (1 or 0).
  1391. */
  1392. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1393. {
  1394. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
  1395. }
  1396. /**
  1397. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1398. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1399. * @param DMA2Dx DMA2D Instance
  1400. * @retval None
  1401. */
  1402. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1403. {
  1404. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1405. }
  1406. /**
  1407. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1408. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1409. * @param DMA2Dx DMA2D Instance
  1410. * @retval None
  1411. */
  1412. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1413. {
  1414. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1415. }
  1416. /**
  1417. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1418. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1419. * @param DMA2Dx DMA2D Instance
  1420. * @retval None
  1421. */
  1422. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1423. {
  1424. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1425. }
  1426. /**
  1427. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1428. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1429. * @param DMA2Dx DMA2D Instance
  1430. * @retval None
  1431. */
  1432. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1433. {
  1434. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1435. }
  1436. /**
  1437. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1438. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1439. * @param DMA2Dx DMA2D Instance
  1440. * @retval None
  1441. */
  1442. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1443. {
  1444. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1445. }
  1446. /**
  1447. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1448. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1449. * @param DMA2Dx DMA2D Instance
  1450. * @retval None
  1451. */
  1452. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1453. {
  1454. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1455. }
  1456. /**
  1457. * @}
  1458. */
  1459. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1460. * @{
  1461. */
  1462. /**
  1463. * @brief Enable Configuration Error Interrupt
  1464. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1465. * @param DMA2Dx DMA2D Instance
  1466. * @retval None
  1467. */
  1468. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1469. {
  1470. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1471. }
  1472. /**
  1473. * @brief Enable CLUT Transfer Complete Interrupt
  1474. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1475. * @param DMA2Dx DMA2D Instance
  1476. * @retval None
  1477. */
  1478. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1479. {
  1480. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1481. }
  1482. /**
  1483. * @brief Enable CLUT Access Error Interrupt
  1484. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1485. * @param DMA2Dx DMA2D Instance
  1486. * @retval None
  1487. */
  1488. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1489. {
  1490. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1491. }
  1492. /**
  1493. * @brief Enable Transfer Watermark Interrupt
  1494. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1495. * @param DMA2Dx DMA2D Instance
  1496. * @retval None
  1497. */
  1498. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1499. {
  1500. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1501. }
  1502. /**
  1503. * @brief Enable Transfer Complete Interrupt
  1504. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1505. * @param DMA2Dx DMA2D Instance
  1506. * @retval None
  1507. */
  1508. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1509. {
  1510. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1511. }
  1512. /**
  1513. * @brief Enable Transfer Error Interrupt
  1514. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1515. * @param DMA2Dx DMA2D Instance
  1516. * @retval None
  1517. */
  1518. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1519. {
  1520. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1521. }
  1522. /**
  1523. * @brief Disable Configuration Error Interrupt
  1524. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1525. * @param DMA2Dx DMA2D Instance
  1526. * @retval None
  1527. */
  1528. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1529. {
  1530. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1531. }
  1532. /**
  1533. * @brief Disable CLUT Transfer Complete Interrupt
  1534. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1535. * @param DMA2Dx DMA2D Instance
  1536. * @retval None
  1537. */
  1538. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1539. {
  1540. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1541. }
  1542. /**
  1543. * @brief Disable CLUT Access Error Interrupt
  1544. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1545. * @param DMA2Dx DMA2D Instance
  1546. * @retval None
  1547. */
  1548. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1549. {
  1550. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1551. }
  1552. /**
  1553. * @brief Disable Transfer Watermark Interrupt
  1554. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1555. * @param DMA2Dx DMA2D Instance
  1556. * @retval None
  1557. */
  1558. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1559. {
  1560. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1561. }
  1562. /**
  1563. * @brief Disable Transfer Complete Interrupt
  1564. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1565. * @param DMA2Dx DMA2D Instance
  1566. * @retval None
  1567. */
  1568. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1569. {
  1570. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1571. }
  1572. /**
  1573. * @brief Disable Transfer Error Interrupt
  1574. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1575. * @param DMA2Dx DMA2D Instance
  1576. * @retval None
  1577. */
  1578. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1579. {
  1580. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1581. }
  1582. /**
  1583. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1584. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1585. * @param DMA2Dx DMA2D Instance
  1586. * @retval State of bit (1 or 0).
  1587. */
  1588. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1589. {
  1590. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
  1591. }
  1592. /**
  1593. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1594. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1595. * @param DMA2Dx DMA2D Instance
  1596. * @retval State of bit (1 or 0).
  1597. */
  1598. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1599. {
  1600. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
  1601. }
  1602. /**
  1603. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1604. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1605. * @param DMA2Dx DMA2D Instance
  1606. * @retval State of bit (1 or 0).
  1607. */
  1608. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1609. {
  1610. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
  1611. }
  1612. /**
  1613. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1614. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1615. * @param DMA2Dx DMA2D Instance
  1616. * @retval State of bit (1 or 0).
  1617. */
  1618. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1619. {
  1620. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
  1621. }
  1622. /**
  1623. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1624. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1625. * @param DMA2Dx DMA2D Instance
  1626. * @retval State of bit (1 or 0).
  1627. */
  1628. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1629. {
  1630. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
  1631. }
  1632. /**
  1633. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1634. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1635. * @param DMA2Dx DMA2D Instance
  1636. * @retval State of bit (1 or 0).
  1637. */
  1638. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1639. {
  1640. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
  1641. }
  1642. /**
  1643. * @}
  1644. */
  1645. #if defined(USE_FULL_LL_DRIVER)
  1646. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1647. * @{
  1648. */
  1649. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1650. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1651. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1652. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1653. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1654. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1655. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1656. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1657. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1658. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1659. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1660. /**
  1661. * @}
  1662. */
  1663. #endif /* USE_FULL_LL_DRIVER */
  1664. /**
  1665. * @}
  1666. */
  1667. /**
  1668. * @}
  1669. */
  1670. #endif /* defined (DMA2D) */
  1671. /**
  1672. * @}
  1673. */
  1674. #ifdef __cplusplus
  1675. }
  1676. #endif
  1677. #endif /* STM32F4xx_LL_DMA2D_H */