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TrainCamp-Jiangyunsong-PLSR/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_smbus.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32f4xx_hal_smbus.h

  4.   * @author  MCD Application Team

  5.   * @brief   Header file of SMBUS HAL module.

  6.   ******************************************************************************

  7.   * @attention

  8.   *

  9.   * Copyright (c) 2016 STMicroelectronics.

  10.   * All rights reserved.

  11.   *

  12.   * This software is licensed under terms that can be found in the LICENSE file

  13.   * in the root directory of this software component.

  14.   * If no LICENSE file comes with this software, it is provided AS-IS.

  15.   *

  16.   ******************************************************************************

  17.   */

  18. 

  19. /* Define to prevent recursive inclusion -------------------------------------*/

  20. #ifndef __STM32F4xx_HAL_SMBUS_H

  21. #define __STM32F4xx_HAL_SMBUS_H

  22. 

  23. #ifdef __cplusplus

  24. extern "C" {

  25. #endif

  26. 

  27. /* Includes ------------------------------------------------------------------*/

  28. #include "stm32f4xx_hal_def.h"

  29. 

  30. /** @addtogroup STM32F4xx_HAL_Driver

  31.   * @{

  32.   */

  33. 

  34. /** @addtogroup SMBUS

  35.   * @{

  36.   */

  37. 

  38. /* Exported types ------------------------------------------------------------*/

  39. /** @defgroup SMBUS_Exported_Types SMBUS Exported Types

  40.   * @{

  41.   */

  42. 

  43. /**

  44.   * @brief  SMBUS Configuration Structure definition

  45.   */

  46. typedef struct

  47. {

  48.   uint32_t ClockSpeed;           /*!< Specifies the clock frequency.

  49.                                     This parameter must be set to a value lower than 100kHz                  */

  50. 

  51.   uint32_t AnalogFilter;         /*!< Specifies if Analog Filter is enable or not.

  52.                                   This parameter can be a value of @ref SMBUS_Analog_Filter                  */

  53. 

  54.   uint32_t OwnAddress1;          /*!< Specifies the first device own address.

  55.                                     This parameter can be a 7-bit or 10-bit address.                         */

  56. 

  57.   uint32_t AddressingMode;       /*!< Specifies if 7-bit or 10-bit addressing mode is selected.

  58.                                     This parameter can be a value of @ref SMBUS_addressing_mode              */

  59. 

  60.   uint32_t DualAddressMode;      /*!< Specifies if dual addressing mode is selected.

  61.                                     This parameter can be a value of @ref SMBUS_dual_addressing_mode         */

  62. 

  63.   uint32_t OwnAddress2;          /*!< Specifies the second device own address if dual addressing mode is

  64.                                      selected. This parameter can be a 7-bit address.                        */

  65. 

  66.   uint32_t GeneralCallMode;      /*!< Specifies if general call mode is selected.

  67.                                     This parameter can be a value of @ref SMBUS_general_call_addressing_mode */

  68. 

  69.   uint32_t NoStretchMode;        /*!< Specifies if nostretch mode is selected.

  70.                                     This parameter can be a value of @ref SMBUS_nostretch_mode               */

  71. 

  72.   uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected.

  73.                                      This parameter can be a value of @ref SMBUS_packet_error_check_mode     */

  74. 

  75.   uint32_t PeripheralMode;       /*!< Specifies which mode of Periphal is selected.

  76.                                      This parameter can be a value of @ref SMBUS_peripheral_mode             */

  77. 

  78. } SMBUS_InitTypeDef;

  79. 

  80. /**

  81.   * @brief  HAL State structure definition

  82.   * @note  HAL SMBUS State value coding follow below described bitmap :

  83.   *          b7-b6  Error information

  84.   *             00 : No Error

  85.   *             01 : Abort (Abort user request on going)

  86.   *             10 : Timeout

  87.   *             11 : Error

  88.   *          b5     IP initialisation status

  89.   *             0  : Reset (IP not initialized)

  90.   *             1  : Init done (IP initialized and ready to use. HAL SMBUS Init function called)

  91.   *          b4     (not used)

  92.   *             x  : Should be set to 0

  93.   *          b3

  94.   *             0  : Ready or Busy (No Listen mode ongoing)

  95.   *             1  : Listen (IP in Address Listen Mode)

  96.   *          b2     Intrinsic process state

  97.   *             0  : Ready

  98.   *             1  : Busy (IP busy with some configuration or internal operations)

  99.   *          b1     Rx state

  100.   *             0  : Ready (no Rx operation ongoing)

  101.   *             1  : Busy (Rx operation ongoing)

  102.   *          b0     Tx state

  103.   *             0  : Ready (no Tx operation ongoing)

  104.   *             1  : Busy (Tx operation ongoing)

  105.   */

  106. typedef enum

  107. {

  108. 

  109.   HAL_SMBUS_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */

  110.   HAL_SMBUS_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */

  111.   HAL_SMBUS_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */

  112.   HAL_SMBUS_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */

  113.   HAL_SMBUS_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */

  114.   HAL_SMBUS_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */

  115.   HAL_SMBUS_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission

  116.                                                  process is ongoing                           */

  117.   HAL_SMBUS_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception

  118.                                                  process is ongoing                           */

  119.   HAL_SMBUS_STATE_ABORT             = 0x60U,   /*!< Abort user request ongoing                */

  120.   HAL_SMBUS_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state                             */

  121.   HAL_SMBUS_STATE_ERROR             = 0xE0U    /*!< Error                                     */

  122. } HAL_SMBUS_StateTypeDef;

  123. 

  124. /**

  125.   * @brief  HAL Mode structure definition

  126.   * @note   HAL SMBUS Mode value coding follow below described bitmap :

  127.   *          b7     (not used)

  128.   *             x  : Should be set to 0

  129.   *          b6     (not used)

  130.   *             x  : Should be set to 0

  131.   *          b5

  132.   *             0  : None

  133.   *             1  : Slave (HAL SMBUS communication is in Slave/Device Mode)

  134.   *          b4

  135.   *             0  : None

  136.   *             1  : Master (HAL SMBUS communication is in Master/Host Mode)

  137.   *          b3-b2-b1-b0  (not used)

  138.   *             xxxx : Should be set to 0000

  139.   */

  140. typedef enum

  141. {

  142.   HAL_SMBUS_MODE_NONE               = 0x00U,   /*!< No SMBUS communication on going              */

  143.   HAL_SMBUS_MODE_MASTER             = 0x10U,   /*!< SMBUS communication is in Master Mode        */

  144.   HAL_SMBUS_MODE_SLAVE              = 0x20U,   /*!< SMBUS communication is in Slave Mode         */

  145. 

  146. } HAL_SMBUS_ModeTypeDef;

  147. 

  148. /**

  149.   * @brief  SMBUS handle Structure definition

  150.   */

  151. typedef struct __SMBUS_HandleTypeDef

  152. {

  153.   I2C_TypeDef                 *Instance;        /*!< SMBUS registers base address                  */

  154. 

  155.   SMBUS_InitTypeDef             Init;           /*!< SMBUS communication parameters              */

  156. 

  157.   uint8_t                       *pBuffPtr;      /*!< Pointer to SMBUS transfer buffer            */

  158. 

  159.   uint16_t                      XferSize;       /*!< SMBUS transfer size                         */

  160. 

  161.   __IO uint16_t                 XferCount;      /*!< SMBUS transfer counter                      */

  162. 

  163.   __IO uint32_t                 XferOptions;    /*!< SMBUS transfer options this parameter can

  164.                                                      be a value of @ref SMBUS_OPTIONS            */

  165. 

  166.   __IO uint32_t                 PreviousState;  /*!< SMBUS communication Previous state and mode

  167.                                                      context for internal usage                  */

  168. 

  169.   HAL_LockTypeDef               Lock;           /*!< SMBUS locking object                        */

  170. 

  171.   __IO HAL_SMBUS_StateTypeDef   State;          /*!< SMBUS communication state                   */

  172. 

  173.   __IO HAL_SMBUS_ModeTypeDef    Mode;           /*!< SMBUS communication mode                    */

  174. 

  175.   __IO uint32_t                 ErrorCode;      /*!< SMBUS Error code                            */

  176. 

  177.   __IO uint32_t                 Devaddress;     /*!< SMBUS Target device address                 */

  178. 

  179.   __IO uint32_t                 EventCount;     /*!< SMBUS Event counter                         */

  180. 

  181.   uint8_t                       XferPEC;        /*!< SMBUS PEC data in reception mode            */

  182. 

  183. #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)

  184.   void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);           /*!< SMBUS Master Tx Transfer completed callback */

  185.   void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);           /*!< SMBUS Master Rx Transfer completed callback */

  186.   void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);            /*!< SMBUS Slave Tx Transfer completed callback  */

  187.   void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);            /*!< SMBUS Slave Rx Transfer completed callback  */

  188.   void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);             /*!< SMBUS Listen Complete callback              */

  189.   void (* MemTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              /*!< SMBUS Memory Tx Transfer completed callback */

  190.   void (* MemRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              /*!< SMBUS Memory Rx Transfer completed callback */

  191.   void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus);                  /*!< SMBUS Error callback                        */

  192.   void (* AbortCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              /*!< SMBUS Abort callback                        */

  193.   void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);  /*!< SMBUS Slave Address Match callback */

  194.   void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);                /*!< SMBUS Msp Init callback                     */

  195.   void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              /*!< SMBUS Msp DeInit callback                   */

  196. 

  197. #endif  /* USE_HAL_SMBUS_REGISTER_CALLBACKS */

  198. } SMBUS_HandleTypeDef;

  199. 

  200. #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)

  201. /**

  202.   * @brief  HAL SMBUS Callback ID enumeration definition

  203.   */

  204. typedef enum

  205. {

  206.   HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    /*!< SMBUS Master Tx Transfer completed callback ID  */

  207.   HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    /*!< SMBUS Master Rx Transfer completed callback ID  */

  208.   HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    /*!< SMBUS Slave Tx Transfer completed callback ID   */

  209.   HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    /*!< SMBUS Slave Rx Transfer completed callback ID   */

  210.   HAL_SMBUS_LISTEN_COMPLETE_CB_ID         = 0x04U,    /*!< SMBUS Listen Complete callback ID               */

  211.   HAL_SMBUS_ERROR_CB_ID                   = 0x07U,    /*!< SMBUS Error callback ID                         */

  212.   HAL_SMBUS_ABORT_CB_ID                   = 0x08U,    /*!< SMBUS Abort callback ID                         */

  213.   HAL_SMBUS_MSPINIT_CB_ID                 = 0x09U,    /*!< SMBUS Msp Init callback ID                      */

  214.   HAL_SMBUS_MSPDEINIT_CB_ID               = 0x0AU     /*!< SMBUS Msp DeInit callback ID                    */

  215. 

  216. } HAL_SMBUS_CallbackIDTypeDef;

  217. 

  218. /**

  219.   * @brief  HAL SMBUS Callback pointer definition

  220.   */

  221. typedef  void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); /*!< pointer to an I2C callback function */

  222. typedef  void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */

  223. 

  224. #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */

  225. 

  226. /**

  227.   * @}

  228.   */

  229. 

  230. /* Exported constants --------------------------------------------------------*/

  231. /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants

  232.   * @{

  233.   */

  234. 

  235. /** @defgroup SMBUS_Error_Code_definition SMBUS Error Code

  236.   * @brief    SMBUS Error Code

  237.   * @{

  238.   */

  239. #define HAL_SMBUS_ERROR_NONE              0x00000000U    /*!< No error               */

  240. #define HAL_SMBUS_ERROR_BERR              0x00000001U    /*!< BERR error             */

  241. #define HAL_SMBUS_ERROR_ARLO              0x00000002U    /*!< ARLO error             */

  242. #define HAL_SMBUS_ERROR_AF                0x00000004U    /*!< AF error               */

  243. #define HAL_SMBUS_ERROR_OVR               0x00000008U    /*!< OVR error              */

  244. #define HAL_SMBUS_ERROR_TIMEOUT           0x00000010U    /*!< Timeout Error          */

  245. #define HAL_SMBUS_ERROR_ALERT             0x00000020U    /*!< Alert error            */

  246. #define HAL_SMBUS_ERROR_PECERR            0x00000040U    /*!< PEC error              */

  247. #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)

  248. #define HAL_SMBUS_ERROR_INVALID_CALLBACK  0x00000080U    /*!< Invalid Callback error */

  249. #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */

  250. 

  251. /**

  252.   * @}

  253.   */

  254. 

  255. /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter

  256.   * @{

  257.   */

  258. #define SMBUS_ANALOGFILTER_ENABLE        0x00000000U

  259. #define SMBUS_ANALOGFILTER_DISABLE       I2C_FLTR_ANOFF

  260. /**

  261.   * @}

  262.   */

  263. 

  264. /** @defgroup SMBUS_addressing_mode SMBUS addressing mode

  265.  * @{

  266.  */

  267. #define SMBUS_ADDRESSINGMODE_7BIT        0x00004000U

  268. #define SMBUS_ADDRESSINGMODE_10BIT       (I2C_OAR1_ADDMODE | 0x00004000U)

  269. /**

  270.   * @}

  271.   */

  272. 

  273. /** @defgroup SMBUS_dual_addressing_mode  SMBUS dual addressing mode

  274.   * @{

  275.   */

  276. #define SMBUS_DUALADDRESS_DISABLE        0x00000000U

  277. #define SMBUS_DUALADDRESS_ENABLE         I2C_OAR2_ENDUAL

  278. /**

  279.   * @}

  280.   */

  281. 

  282. /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode

  283.   * @{

  284.   */

  285. #define SMBUS_GENERALCALL_DISABLE        0x00000000U

  286. #define SMBUS_GENERALCALL_ENABLE         I2C_CR1_ENGC

  287. /**

  288.   * @}

  289.   */

  290. 

  291. /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode

  292.   * @{

  293.   */

  294. #define SMBUS_NOSTRETCH_DISABLE          0x00000000U

  295. #define SMBUS_NOSTRETCH_ENABLE           I2C_CR1_NOSTRETCH

  296. /**

  297.   * @}

  298.   */

  299. 

  300. /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode

  301.   * @{

  302.   */

  303. #define SMBUS_PEC_DISABLE                0x00000000U

  304. #define SMBUS_PEC_ENABLE                 I2C_CR1_ENPEC

  305. /**

  306.   * @}

  307.   */

  308. 

  309. /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode

  310. * @{

  311. */

  312. #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST        (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)

  313. #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE       I2C_CR1_SMBUS

  314. #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP   (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP)

  315. /**

  316. * @}

  317. */

  318. 

  319. /** @defgroup SMBUS_XferDirection_definition SMBUS XferDirection definition

  320.   * @{

  321.   */

  322. #define SMBUS_DIRECTION_RECEIVE           0x00000000U

  323. #define SMBUS_DIRECTION_TRANSMIT          0x00000001U

  324. /**

  325.   * @}

  326.   */

  327. 

  328. /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition

  329.   * @{

  330.   */

  331. #define  SMBUS_FIRST_FRAME                       0x00000001U

  332. #define  SMBUS_NEXT_FRAME                        0x00000002U

  333. #define  SMBUS_FIRST_AND_LAST_FRAME_NO_PEC       0x00000003U

  334. #define  SMBUS_LAST_FRAME_NO_PEC                 0x00000004U

  335. #define  SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC     0x00000005U

  336. #define  SMBUS_LAST_FRAME_WITH_PEC               0x00000006U

  337. /**

  338.   * @}

  339.   */

  340. 

  341. /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition

  342.   * @{

  343.   */

  344. #define SMBUS_IT_BUF                      I2C_CR2_ITBUFEN

  345. #define SMBUS_IT_EVT                      I2C_CR2_ITEVTEN

  346. #define SMBUS_IT_ERR                      I2C_CR2_ITERREN

  347. /**

  348.   * @}

  349.   */

  350. 

  351. /** @defgroup SMBUS_Flag_definition SMBUS Flag definition

  352.   * @{

  353.   */

  354. #define SMBUS_FLAG_SMBALERT               0x00018000U

  355. #define SMBUS_FLAG_TIMEOUT                0x00014000U

  356. #define SMBUS_FLAG_PECERR                 0x00011000U

  357. #define SMBUS_FLAG_OVR                    0x00010800U

  358. #define SMBUS_FLAG_AF                     0x00010400U

  359. #define SMBUS_FLAG_ARLO                   0x00010200U

  360. #define SMBUS_FLAG_BERR                   0x00010100U

  361. #define SMBUS_FLAG_TXE                    0x00010080U

  362. #define SMBUS_FLAG_RXNE                   0x00010040U

  363. #define SMBUS_FLAG_STOPF                  0x00010010U

  364. #define SMBUS_FLAG_ADD10                  0x00010008U

  365. #define SMBUS_FLAG_BTF                    0x00010004U

  366. #define SMBUS_FLAG_ADDR                   0x00010002U

  367. #define SMBUS_FLAG_SB                     0x00010001U

  368. #define SMBUS_FLAG_DUALF                  0x00100080U

  369. #define SMBUS_FLAG_SMBHOST                0x00100040U

  370. #define SMBUS_FLAG_SMBDEFAULT             0x00100020U

  371. #define SMBUS_FLAG_GENCALL                0x00100010U

  372. #define SMBUS_FLAG_TRA                    0x00100004U

  373. #define SMBUS_FLAG_BUSY                   0x00100002U

  374. #define SMBUS_FLAG_MSL                    0x00100001U

  375. /**

  376.   * @}

  377.   */

  378. 

  379. /**

  380.   * @}

  381.   */

  382. 

  383. /* Exported macro ------------------------------------------------------------*/

  384. /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros

  385.   * @{

  386.   */

  387. 

  388. /** @brief Reset SMBUS handle state

  389.   * @param  __HANDLE__ specifies the SMBUS Handle.

  390.   *         This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.

  391.   * @retval None

  392.   */

  393. #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)

  394. #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__)          do{                                                  \

  395.                                                                 (__HANDLE__)->State = HAL_SMBUS_STATE_RESET;     \

  396.                                                                 (__HANDLE__)->MspInitCallback = NULL;            \

  397.                                                                 (__HANDLE__)->MspDeInitCallback = NULL;          \

  398.                                                               } while(0)

  399. #else

  400. #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)

  401. #endif

  402. 

  403. /** @brief  Enable or disable the specified SMBUS interrupts.

  404.   * @param  __HANDLE__ specifies the SMBUS Handle.

  405.   *         This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.

  406.   * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.

  407.   *         This parameter can be one of the following values:

  408.   *            @arg SMBUS_IT_BUF: Buffer interrupt enable

  409.   *            @arg SMBUS_IT_EVT: Event interrupt enable

  410.   *            @arg SMBUS_IT_ERR: Error interrupt enable

  411.   * @retval None

  412.   */

  413. #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))

  414. #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))

  415. 

  416. /** @brief  Checks if the specified SMBUS interrupt source is enabled or disabled.

  417.   * @param  __HANDLE__ specifies the SMBUS Handle.

  418.   *         This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.

  419.   * @param  __INTERRUPT__ specifies the SMBUS interrupt source to check.

  420.   *          This parameter can be one of the following values:

  421.   *            @arg SMBUS_IT_BUF: Buffer interrupt enable

  422.   *            @arg SMBUS_IT_EVT: Event interrupt enable

  423.   *            @arg SMBUS_IT_ERR: Error interrupt enable

  424.   * @retval The new state of __INTERRUPT__ (TRUE or FALSE).

  425.   */

  426. #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)

  427. 

  428. /** @brief  Checks whether the specified SMBUS flag is set or not.

  429.   * @param  __HANDLE__ specifies the SMBUS Handle.

  430.   *         This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.

  431.   * @param  __FLAG__ specifies the flag to check.

  432.   *         This parameter can be one of the following values:

  433.   *            @arg SMBUS_FLAG_SMBALERT: SMBus Alert flag

  434.   *            @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow error flag

  435.   *            @arg SMBUS_FLAG_PECERR: PEC error in reception flag

  436.   *            @arg SMBUS_FLAG_OVR: Overrun/Underrun flag

  437.   *            @arg SMBUS_FLAG_AF: Acknowledge failure flag

  438.   *            @arg SMBUS_FLAG_ARLO: Arbitration lost flag

  439.   *            @arg SMBUS_FLAG_BERR: Bus error flag

  440.   *            @arg SMBUS_FLAG_TXE: Data register empty flag

  441.   *            @arg SMBUS_FLAG_RXNE: Data register not empty flag

  442.   *            @arg SMBUS_FLAG_STOPF: Stop detection flag

  443.   *            @arg SMBUS_FLAG_ADD10: 10-bit header sent flag

  444.   *            @arg SMBUS_FLAG_BTF: Byte transfer finished flag

  445.   *            @arg SMBUS_FLAG_ADDR: Address sent flag

  446.   *                                Address matched flag

  447.   *            @arg SMBUS_FLAG_SB: Start bit flag

  448.   *            @arg SMBUS_FLAG_DUALF: Dual flag

  449.   *            @arg SMBUS_FLAG_SMBHOST: SMBus host header

  450.   *            @arg SMBUS_FLAG_SMBDEFAULT: SMBus default header

  451.   *            @arg SMBUS_FLAG_GENCALL: General call header flag

  452.   *            @arg SMBUS_FLAG_TRA: Transmitter/Receiver flag

  453.   *            @arg SMBUS_FLAG_BUSY: Bus busy flag

  454.   *            @arg SMBUS_FLAG_MSL: Master/Slave flag

  455.   * @retval The new state of __FLAG__ (TRUE or FALSE).

  456.   */

  457. #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)): \

  458.                                                  ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))

  459. 

  460. /** @brief  Clears the SMBUS pending flags which are cleared by writing 0 in a specific bit.

  461.   * @param  __HANDLE__ specifies the SMBUS Handle.

  462.   *         This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.

  463.   * @param  __FLAG__ specifies the flag to clear.

  464.   *         This parameter can be any combination of the following values:

  465.   *            @arg SMBUS_FLAG_SMBALERT: SMBus Alert flag

  466.   *            @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow error flag

  467.   *            @arg SMBUS_FLAG_PECERR: PEC error in reception flag

  468.   *            @arg SMBUS_FLAG_OVR: Overrun/Underrun flag (Slave mode)

  469.   *            @arg SMBUS_FLAG_AF: Acknowledge failure flag

  470.   *            @arg SMBUS_FLAG_ARLO: Arbitration lost flag (Master mode)

  471.   *            @arg SMBUS_FLAG_BERR: Bus error flag

  472.   * @retval None

  473.   */

  474. #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & SMBUS_FLAG_MASK))

  475. 

  476. /** @brief  Clears the SMBUS ADDR pending flag.

  477.   * @param  __HANDLE__ specifies the SMBUS Handle.

  478.   *         This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.

  479.   * @retval None

  480.   */

  481. #define __HAL_SMBUS_CLEAR_ADDRFLAG(__HANDLE__)    \

  482.   do{                                           \

  483.     __IO uint32_t tmpreg = 0x00U;               \

  484.     tmpreg = (__HANDLE__)->Instance->SR1;       \

  485.     tmpreg = (__HANDLE__)->Instance->SR2;       \

  486.     UNUSED(tmpreg);                             \

  487.   } while(0)

  488. 

  489. /** @brief  Clears the SMBUS STOPF pending flag.

  490.   * @param  __HANDLE__ specifies the SMBUS Handle.

  491.   *         This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.

  492.   * @retval None

  493.   */

  494. #define __HAL_SMBUS_CLEAR_STOPFLAG(__HANDLE__)    \

  495.   do{                                           \

  496.     __IO uint32_t tmpreg = 0x00U;               \

  497.     tmpreg = (__HANDLE__)->Instance->SR1;       \

  498.     (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE;  \

  499.     UNUSED(tmpreg);                             \

  500.   } while(0)

  501. 

  502. /** @brief  Enable the SMBUS peripheral.

  503.   * @param  __HANDLE__ specifies the SMBUS Handle.

  504.   *         This parameter can be SMBUSx where x: 1 or 2  to select the SMBUS peripheral.

  505.   * @retval None

  506.   */

  507. #define __HAL_SMBUS_ENABLE(__HANDLE__)           ((__HANDLE__)->Instance->CR1 |=  I2C_CR1_PE)

  508. 

  509. /** @brief  Disable the SMBUS peripheral.

  510.   * @param  __HANDLE__ specifies the SMBUS Handle.

  511.   *         This parameter can be SMBUSx where x: 1 or 2  to select the SMBUS peripheral.

  512.   * @retval None

  513.   */

  514. #define __HAL_SMBUS_DISABLE(__HANDLE__)          ((__HANDLE__)->Instance->CR1 &=  ~I2C_CR1_PE)

  515. 

  516. /** @brief  Generate a Non-Acknowledge SMBUS peripheral in Slave mode.

  517.   * @param  __HANDLE__ specifies the SMBUS Handle.

  518.   * @retval None

  519.   */

  520. #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__)    (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_ACK))

  521. 

  522. /**

  523.   * @}

  524.   */

  525. 

  526. /* Exported functions --------------------------------------------------------*/

  527. /** @addtogroup SMBUS_Exported_Functions

  528.   * @{

  529.   */

  530. 

  531. /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions

  532.  * @{

  533.  */

  534. 

  535. /* Initialization/de-initialization functions  **********************************/

  536. HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);

  537. HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);

  538. void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);

  539. void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);

  540. 

  541. /* Callbacks Register/UnRegister functions  ************************************/

  542. #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)

  543. HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback);

  544. HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID);

  545. 

  546. HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback);

  547. HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus);

  548. #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */

  549. 

  550. /**

  551.   * @}

  552.   */

  553. 

  554. /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions

  555.   * @{

  556.   */

  557. 

  558. /* IO operation functions  *****************************************************/

  559. /** @addtogroup Blocking_mode_Polling Blocking mode Polling

  560.  * @{

  561.  */

  562. /******* Blocking mode: Polling */

  563. HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);

  564. /**

  565.   * @}

  566.   */

  567. 

  568. /** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt

  569.  * @{

  570.  */

  571. /******* Non-Blocking mode: Interrupt */

  572. HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

  573. HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

  574. HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);

  575. HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

  576. HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

  577. 

  578. HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);

  579. HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);

  580. HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);

  581. HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);

  582. 

  583. /****** Filter Configuration functions  */

  584. #if  defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)

  585. HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);

  586. HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);

  587. #endif

  588. /**

  589.   * @}

  590.   */

  591. 

  592. /** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks

  593.  * @{

  594.  */

  595. /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */

  596. void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);

  597. void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);

  598. void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);

  599. void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);

  600. void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);

  601. void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);

  602. void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);

  603. void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);

  604. void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);

  605. void HAL_SMBUS_AbortCpltCallback(SMBUS_HandleTypeDef *hsmbus);

  606. 

  607. /**

  608.   * @}

  609.   */

  610. 

  611. /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State, Mode and Error functions

  612.   * @{

  613.   */

  614. 

  615. /* Peripheral State, mode and Errors functions  **************************************************/

  616. HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);

  617. HAL_SMBUS_ModeTypeDef HAL_SMBUS_GetMode(SMBUS_HandleTypeDef *hsmbus);

  618. uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);

  619. 

  620. /**

  621.   * @}

  622.   */

  623. 

  624. /**

  625.   * @}

  626.   */

  627. /* Private types -------------------------------------------------------------*/

  628. /* Private variables ---------------------------------------------------------*/

  629. /* Private constants ---------------------------------------------------------*/

  630. /** @defgroup SMBUS_Private_Constants SMBUS Private Constants

  631.   * @{

  632.   */

  633. #define SMBUS_FLAG_MASK  0x0000FFFFU

  634. /**

  635.   * @}

  636.   */

  637. 

  638. /* Private macros ------------------------------------------------------------*/

  639. /** @defgroup SMBUS_Private_Macros SMBUS Private Macros

  640.   * @{

  641.   */

  642. 

  643. #define SMBUS_FREQRANGE(__PCLK__)                  ((__PCLK__)/1000000U)

  644. 

  645. #define SMBUS_RISE_TIME(__FREQRANGE__)             ( ((__FREQRANGE__) + 1U))

  646. 

  647. #define SMBUS_SPEED_STANDARD(__PCLK__, __SPEED__)  (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))

  648. 

  649. #define SMBUS_7BIT_ADD_WRITE(__ADDRESS__)          ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))

  650. 

  651. #define SMBUS_7BIT_ADD_READ(__ADDRESS__)           ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))

  652. 

  653. #define SMBUS_10BIT_ADDRESS(__ADDRESS__)           ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))

  654. 

  655. #define SMBUS_10BIT_HEADER_WRITE(__ADDRESS__)      ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))

  656. 

  657. #define SMBUS_10BIT_HEADER_READ(__ADDRESS__)       ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))

  658. 

  659. #define SMBUS_GET_PEC_MODE(__HANDLE__)             ((__HANDLE__)->Instance->CR1 & I2C_CR1_ENPEC)

  660. 

  661. #define SMBUS_GET_PEC_VALUE(__HANDLE__)             ((__HANDLE__)->XferPEC)

  662. 

  663. #if  defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)

  664. #define IS_SMBUS_ANALOG_FILTER(FILTER)             (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \

  665.                                                     ((FILTER) == SMBUS_ANALOGFILTER_DISABLE))

  666. #define IS_SMBUS_DIGITAL_FILTER(FILTER)            ((FILTER) <= 0x0000000FU)

  667. #endif

  668. #define IS_SMBUS_ADDRESSING_MODE(ADDRESS)          (((ADDRESS) == SMBUS_ADDRESSINGMODE_7BIT) || \

  669.                                                     ((ADDRESS) == SMBUS_ADDRESSINGMODE_10BIT))

  670. 

  671. #define IS_SMBUS_DUAL_ADDRESS(ADDRESS)             (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \

  672.                                                     ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))

  673. 

  674. #define IS_SMBUS_GENERAL_CALL(CALL)                (((CALL) == SMBUS_GENERALCALL_DISABLE)    || \

  675.                                                     ((CALL) == SMBUS_GENERALCALL_ENABLE))

  676. 

  677. #define IS_SMBUS_NO_STRETCH(STRETCH)               (((STRETCH) == SMBUS_NOSTRETCH_DISABLE)   || \

  678.                                                     ((STRETCH) == SMBUS_NOSTRETCH_ENABLE))

  679. 

  680. #define IS_SMBUS_PEC(PEC)                          (((PEC) == SMBUS_PEC_DISABLE) || \

  681.                                                      ((PEC) == SMBUS_PEC_ENABLE))

  682. 

  683. #define IS_SMBUS_PERIPHERAL_MODE(MODE)             (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST)      || \

  684.                                                     ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE)     || \

  685.                                                     ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))

  686. 

  687. #define IS_SMBUS_CLOCK_SPEED(SPEED)                (((SPEED) > 0U) && ((SPEED) <= 100000U))

  688. 

  689. #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1)            (((ADDRESS1) & 0xFFFFFC00U) == 0U)

  690. 

  691. #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2)            (((ADDRESS2) & 0xFFFFFF01U) == 0U)

  692. 

  693. #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME)                   || \

  694.                                                     ((REQUEST) == SMBUS_NEXT_FRAME)                    || \

  695.                                                     ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC)   || \

  696.                                                     ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC)             || \

  697.                                                     ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \

  698.                                                     ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))

  699. 

  700. /**

  701.   * @}

  702.   */

  703. 

  704. /* Private Functions ---------------------------------------------------------*/

  705. /** @defgroup SMBUS_Private_Functions SMBUS Private Functions

  706.   * @{

  707.   */

  708. 

  709. /**

  710.   * @}

  711.   */

  712. 

  713. /**

  714.   * @}

  715.   */

  716. 

  717. /**

  718.   * @}

  719.   */

  720. 

  721. /**

  722. * @}

  723. */

  724. 

  725. #ifdef __cplusplus

  726. }

  727. #endif

  728. 

  729. 

  730. #endif /* __STM32F4xx_HAL_SMBUS_H */