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  1. /*
  2. *********************************************************************************************************
  3. * uC/LIB
  4. * Custom Library Modules
  5. *
  6. * Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com
  7. *
  8. * SPDX-License-Identifier: APACHE-2.0
  9. *
  10. * This software is subject to an open source license and is distributed by
  11. * Silicon Laboratories Inc. pursuant to the terms of the Apache License,
  12. * Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
  13. *
  14. *********************************************************************************************************
  15. */
  16. /*
  17. *********************************************************************************************************
  18. *
  19. * STANDARD MEMORY OPERATIONS
  20. *
  21. * Filename : lib_mem.h
  22. * Version : V1.39.01
  23. *********************************************************************************************************
  24. * Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software.
  25. *
  26. * (a) ALL standard library functions are implemented in the custom library modules :
  27. *
  28. * (1) \<Custom Library Directory>\lib_*.*
  29. *
  30. * (2) \<Custom Library Directory>\Ports\<cpu>\<compiler>\lib*_a.*
  31. *
  32. * where
  33. * <Custom Library Directory> directory path for custom library software
  34. * <cpu> directory name for specific processor (CPU)
  35. * <compiler> directory name for specific compiler
  36. *
  37. * (b) Product-specific library functions are implemented in individual products.
  38. *
  39. * (2) Assumes the following versions (or more recent) of software modules are included in
  40. * the project build :
  41. *
  42. * (a) uC/CPU V1.27
  43. *********************************************************************************************************
  44. */
  45. /*
  46. *********************************************************************************************************
  47. * MODULE
  48. *
  49. * Note(s) : (1) This memory library header file is protected from multiple pre-processor inclusion through
  50. * use of the memory library module present pre-processor macro definition.
  51. *********************************************************************************************************
  52. */
  53. #ifndef LIB_MEM_MODULE_PRESENT /* See Note #1. */
  54. #define LIB_MEM_MODULE_PRESENT
  55. /*
  56. *********************************************************************************************************
  57. * INCLUDE FILES
  58. *
  59. * Note(s) : (1) The custom library software files are located in the following directories :
  60. *
  61. * (a) \<Your Product Application>\lib_cfg.h
  62. *
  63. * (b) \<Custom Library Directory>\lib_*.*
  64. *
  65. * where
  66. * <Your Product Application> directory path for Your Product's Application
  67. * <Custom Library Directory> directory path for custom library software
  68. *
  69. * (2) CPU-configuration software files are located in the following directories :
  70. *
  71. * (a) \<CPU-Compiler Directory>\cpu_*.*
  72. * (b) \<CPU-Compiler Directory>\<cpu>\<compiler>\cpu*.*
  73. *
  74. * where
  75. * <CPU-Compiler Directory> directory path for common CPU-compiler software
  76. * <cpu> directory name for specific processor (CPU)
  77. * <compiler> directory name for specific compiler
  78. *
  79. * (3) Compiler MUST be configured to include as additional include path directories :
  80. *
  81. * (a) '\<Your Product Application>\' directory See Note #1a
  82. *
  83. * (b) '\<Custom Library Directory>\' directory See Note #1b
  84. *
  85. * (c) (1) '\<CPU-Compiler Directory>\' directory See Note #2a
  86. * (2) '\<CPU-Compiler Directory>\<cpu>\<compiler>\' directory See Note #2b
  87. *
  88. * (4) NO compiler-supplied standard library functions SHOULD be used.
  89. *********************************************************************************************************
  90. */
  91. #include <cpu.h>
  92. #include <cpu_core.h>
  93. #include <lib_def.h>
  94. #include <lib_cfg.h>
  95. /*
  96. *********************************************************************************************************
  97. * EXTERNS
  98. *********************************************************************************************************
  99. */
  100. #ifdef LIB_MEM_MODULE
  101. #define LIB_MEM_EXT
  102. #else
  103. #define LIB_MEM_EXT extern
  104. #endif
  105. /*
  106. *********************************************************************************************************
  107. * DEFINES
  108. *********************************************************************************************************
  109. */
  110. #define LIB_MEM_PADDING_ALIGN_NONE 1u
  111. #define LIB_MEM_BLK_QTY_UNLIMITED 0u
  112. /*
  113. *********************************************************************************************************
  114. * DEFAULT CONFIGURATION
  115. *********************************************************************************************************
  116. */
  117. /*
  118. *********************************************************************************************************
  119. * MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION
  120. *
  121. * Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external
  122. * argument check feature :
  123. *
  124. * (a) When ENABLED, arguments received from any port interface provided by the developer
  125. * or application are checked/validated.
  126. *
  127. * (b) When DISABLED, NO arguments received from any port interface provided by the developer
  128. * or application are checked/validated.
  129. *********************************************************************************************************
  130. */
  131. /* Cfg external argument check feature (see Note #1) : */
  132. #ifndef LIB_MEM_CFG_ARG_CHK_EXT_EN
  133. #define LIB_MEM_CFG_ARG_CHK_EXT_EN DEF_DISABLED
  134. /* DEF_DISABLED Argument check DISABLED */
  135. /* DEF_ENABLED Argument check ENABLED */
  136. #endif
  137. /*
  138. *********************************************************************************************************
  139. * MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION
  140. *
  141. * Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory
  142. * functions.
  143. *********************************************************************************************************
  144. */
  145. /* Cfg assembly-optimized function(s) [see Note #1] : */
  146. #ifndef LIB_MEM_CFG_OPTIMIZE_ASM_EN
  147. #define LIB_MEM_CFG_OPTIMIZE_ASM_EN DEF_DISABLED
  148. /* DEF_DISABLED Assembly-optimized fnct(s) DISABLED */
  149. /* DEF_ENABLED Assembly-optimized fnct(s) ENABLED */
  150. #endif
  151. /*
  152. *********************************************************************************************************
  153. * MEMORY ALLOCATION DEBUG INFORMATION CONFIGURATION
  154. *
  155. * Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable debug information associated to each
  156. * segment allocation.
  157. *********************************************************************************************************
  158. */
  159. #ifndef LIB_MEM_CFG_DBG_INFO_EN
  160. #define LIB_MEM_CFG_DBG_INFO_EN DEF_DISABLED
  161. #endif
  162. /*
  163. *********************************************************************************************************
  164. * HEAP PADDING ALIGN CONFIGURATION
  165. *
  166. * Note(s) : (1) Configure LIB_MEM_CFG_HEAP_PADDING_ALIGN to set the padding alignment of any buffer
  167. * allocated from the heap.
  168. *********************************************************************************************************
  169. */
  170. #ifndef LIB_MEM_CFG_HEAP_PADDING_ALIGN
  171. #define LIB_MEM_CFG_HEAP_PADDING_ALIGN LIB_MEM_PADDING_ALIGN_NONE
  172. #endif
  173. /*
  174. *********************************************************************************************************
  175. * DATA TYPES
  176. *********************************************************************************************************
  177. */
  178. /*
  179. *********************************************************************************************************
  180. * LIB MEM TYPE
  181. *
  182. * Note(s) : (1) 'LIB_MEM_TYPE' declared as 'CPU_INT32U' & all 'LIB_MEM_TYPE's #define'd with large, non-trivial
  183. * values to trap & discard invalid/corrupted library memory objects based on 'LIB_MEM_TYPE'.
  184. *********************************************************************************************************
  185. */
  186. typedef CPU_INT32U LIB_MEM_TYPE;
  187. /*
  188. *********************************************************************************************************
  189. * MEMORY POOL BLOCK QUANTITY DATA TYPE
  190. *********************************************************************************************************
  191. */
  192. typedef CPU_SIZE_T MEM_POOL_BLK_QTY;
  193. /*
  194. *********************************************************************************************************
  195. * MEMORY POOL TABLE IX TYPE
  196. *********************************************************************************************************
  197. */
  198. typedef MEM_POOL_BLK_QTY MEM_POOL_IX;
  199. /*
  200. *********************************************************************************************************
  201. * MEMORY ALLOCATION TRACKING INFO DATA TYPE
  202. *********************************************************************************************************
  203. */
  204. #if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
  205. typedef struct mem_alloc_info MEM_ALLOC_INFO;
  206. struct mem_alloc_info { /* ------------------ MEM ALLOC INFO ------------------ */
  207. const CPU_CHAR *NamePtr; /* Ptr to name. */
  208. CPU_SIZE_T Size; /* Total alloc'd size, in bytes. */
  209. MEM_ALLOC_INFO *NextPtr; /* Ptr to next alloc info in list. */
  210. };
  211. #endif
  212. /*
  213. *********************************************************************************************************
  214. * MEMORY SEGMENTS DATA TYPES
  215. *********************************************************************************************************
  216. */
  217. typedef struct mem_seg MEM_SEG; /* --------------------- SEG DATA --------------------- */
  218. struct mem_seg {
  219. CPU_ADDR AddrBase; /* Seg start addr. */
  220. CPU_ADDR AddrEnd; /* Seg end addr (last addr). */
  221. CPU_ADDR AddrNext; /* Next free addr. */
  222. MEM_SEG *NextPtr; /* Ptr to next seg. */
  223. CPU_SIZE_T PaddingAlign; /* Padding alignment in byte. */
  224. #if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
  225. const CPU_CHAR *NamePtr; /* Ptr to seg name. */
  226. MEM_ALLOC_INFO *AllocInfoHeadPtr; /* Ptr to head of alloc info struct list. */
  227. #endif
  228. };
  229. typedef struct mem_seg_info { /* --------------------- SEG INFO --------------------- */
  230. CPU_SIZE_T UsedSize; /* Used size, independently of alignment. */
  231. CPU_SIZE_T TotalSize; /* Total seg capacity, in octets. */
  232. CPU_ADDR AddrBase;
  233. CPU_ADDR AddrNextAlloc; /* Next aligned address, 0 if none available. */
  234. } MEM_SEG_INFO;
  235. /*
  236. *********************************************************************************************************
  237. * (STATIC) MEMORY POOL DATA TYPES
  238. *
  239. * Note(s) : (1) Free static memory pool blocks are indexed in the 'BlkFreeTbl' table. Newly freed blocks
  240. * are added at the first available position in the table and blocks are retrieved from the
  241. * last occupied position, in a LIFO fashion.
  242. *
  243. * /-------------------------------\
  244. * |/------------\ |
  245. * BlkFreeTbl || Start v v End
  246. * /--------\ || /--------------------------------------------\
  247. * |p_free_1|---/| | | | | | |
  248. * |--------| | \--------------------------------------------/
  249. * |p_free_2|----/ ^ | |
  250. * |--------| | |__Blk___|
  251. * |p_free_3|--------/ (Next block to be retrieved.) Size
  252. * |--------|
  253. * | |<-------- (Next block to be freed.)
  254. * \--------/
  255. *
  256. *********************************************************************************************************
  257. */
  258. /* --------------------- MEM POOL --------------------- */
  259. typedef struct mem_pool {
  260. void *PoolAddrStart; /* Ptr to start of mem seg for mem pool blks. */
  261. void *PoolAddrEnd; /* Ptr to end of mem seg for mem pool blks. */
  262. MEM_POOL_BLK_QTY BlkNbr; /* Nbr of mem pool blks. */
  263. CPU_SIZE_T BlkSize; /* Size of mem pool blks (in octets). */
  264. void **BlkFreeTbl; /* Tbl of free mem pool blks. */
  265. CPU_SIZE_T BlkFreeTblIx; /* Ix of next free blk free tbl entry. */
  266. } MEM_POOL;
  267. /*
  268. *********************************************************************************************************
  269. * DYNAMIC MEMORY POOL DATA TYPE
  270. *
  271. * Note(s) : (1) Dynamic memory pool blocks are not indexed in a table. Only freed blocks are linked using
  272. * a singly linked list, in a LIFO fashion; newly freed blocks are inserted at the head of the
  273. * list and blocks are also retrieved from the head of the list.
  274. *
  275. * (2) Pointers to the next block are only present when a block is free, using the first location
  276. * in the allocated memory block. The user of dynamic memory pool must not assume his data
  277. * will not be overwritten when a block is freed.
  278. *
  279. * /----------------\
  280. * /----------\ | /----------\ | /----------\ /----------\
  281. * BlkFreePtr-->|(NextPtr) |---/ | | \--->|(NextPtr) |-->|(NextPtr) |--> DEF_NULL
  282. * |----------| | Blk in | |----------| |----------|
  283. * | | | use | | | | |
  284. * | | | | | | | |
  285. * \----------/ \----------/ \----------/ \----------/
  286. *
  287. *********************************************************************************************************
  288. */
  289. typedef struct mem_dyn_pool { /* ---------------- DYN MEM POOL DATA ----------------- */
  290. MEM_SEG *PoolSegPtr; /* Mem pool from which blks are alloc'd. */
  291. CPU_SIZE_T BlkSize; /* Size of pool blks, in octets. */
  292. CPU_SIZE_T BlkAlign; /* Align req'd for blks, in octets. */
  293. CPU_SIZE_T BlkPaddingAlign; /* Padding alignment in bytes for this mem seg. */
  294. void *BlkFreePtr; /* Ptr to first free blk. */
  295. CPU_SIZE_T BlkQtyMax; /* Max qty of blk in dyn mem pool. 0 = unlimited. */
  296. CPU_SIZE_T BlkAllocCnt; /* Cnt of alloc blk. */
  297. #if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
  298. const CPU_CHAR *NamePtr; /* Ptr to mem pool name. */
  299. #endif
  300. } MEM_DYN_POOL;
  301. /*
  302. *********************************************************************************************************
  303. * GLOBAL VARIABLES
  304. *********************************************************************************************************
  305. */
  306. /*
  307. *********************************************************************************************************
  308. * MACRO'S
  309. *********************************************************************************************************
  310. */
  311. /*
  312. *********************************************************************************************************
  313. * MEMORY DATA VALUE MACRO'S
  314. *
  315. * Note(s) : (1) (a) Some variables & variable buffers to pass & receive data values MUST start on appropriate
  316. * CPU word-aligned addresses. This is required because most word-aligned processors are more
  317. * efficient & may even REQUIRE that multi-octet words start on CPU word-aligned addresses.
  318. *
  319. * (1) For 16-bit word-aligned processors, this means that
  320. *
  321. * all 16- & 32-bit words MUST start on addresses that are multiples of 2 octets
  322. *
  323. * (2) For 32-bit word-aligned processors, this means that
  324. *
  325. * all 16-bit words MUST start on addresses that are multiples of 2 octets
  326. * all 32-bit words MUST start on addresses that are multiples of 4 octets
  327. *
  328. * (b) However, some data values macro's appropriately access data values from any CPU addresses,
  329. * word-aligned or not. Thus for processors that require data word alignment, data words can
  330. * be accessed to/from any CPU address, word-aligned or not, without generating data-word-
  331. * alignment exceptions/faults.
  332. *********************************************************************************************************
  333. */
  334. /*
  335. *********************************************************************************************************
  336. * ENDIAN WORD ORDER MACRO'S
  337. *
  338. * Description : Convert data values to & from big-, little, or host-endian CPU word order.
  339. *
  340. * Argument(s) : val Data value to convert (see Notes #1 & #2).
  341. *
  342. * Return(s) : Converted data value (see Notes #1 & #2).
  343. *
  344. * Caller(s) : Application.
  345. *
  346. * Note(s) : (1) Convert data values to the desired data-word order :
  347. *
  348. * MEM_VAL_BIG_TO_LITTLE_xx() Convert big- endian data values
  349. * to little- endian data values
  350. * MEM_VAL_LITTLE_TO_BIG_xx() Convert little- endian data values
  351. * to big- endian data values
  352. * MEM_VAL_xxx_TO_HOST_xx() Convert big-/little-endian data values
  353. * to host- endian data values
  354. * MEM_VAL_HOST_TO_xxx_xx() Convert host- endian data values
  355. * to big-/little-endian data values
  356. *
  357. * See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
  358. *
  359. * (2) 'val' data value to convert & any variable to receive the returned conversion MUST
  360. * start on appropriate CPU word-aligned addresses.
  361. *
  362. * See also 'MEMORY DATA VALUE MACRO'S Note #1a'.
  363. *
  364. * (3) MEM_VAL_COPY_xxx() macro's are more efficient than generic endian word order macro's &
  365. * are also independent of CPU data-word-alignment & SHOULD be used whenever possible.
  366. *
  367. * See also 'MEM_VAL_COPY_GET_xxx() Note #4'
  368. * & 'MEM_VAL_COPY_SET_xxx() Note #4'.
  369. *
  370. * (4) Generic endian word order macro's are NOT atomic operations & MUST NOT be used on any
  371. * non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller of
  372. * the macro's providing some form of additional protection (e.g. mutual exclusion).
  373. *
  374. * (5) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
  375. * linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
  376. * constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
  377. * value (see 'cpu.h CPU WORD CONFIGURATION Note #2'). The 'else'-conditional code is
  378. * included as an extra precaution in case 'cpu.h' is incorrectly configured.
  379. *********************************************************************************************************
  380. */
  381. #if ((CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_64) || \
  382. (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32))
  383. #define MEM_VAL_BIG_TO_LITTLE_16(val) ((CPU_INT16U)(((CPU_INT16U)((((CPU_INT16U)(val)) & (CPU_INT16U) 0xFF00u) >> (1u * DEF_OCTET_NBR_BITS))) | \
  384. ((CPU_INT16U)((((CPU_INT16U)(val)) & (CPU_INT16U) 0x00FFu) << (1u * DEF_OCTET_NBR_BITS)))))
  385. #define MEM_VAL_BIG_TO_LITTLE_32(val) ((CPU_INT32U)(((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (3u * DEF_OCTET_NBR_BITS))) | \
  386. ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) >> (1u * DEF_OCTET_NBR_BITS))) | \
  387. ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) << (1u * DEF_OCTET_NBR_BITS))) | \
  388. ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) << (3u * DEF_OCTET_NBR_BITS)))))
  389. #elif (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
  390. #define MEM_VAL_BIG_TO_LITTLE_16(val) ((CPU_INT16U)(((CPU_INT16U)((((CPU_INT16U)(val)) & (CPU_INT16U) 0xFF00u) >> (1u * DEF_OCTET_NBR_BITS))) | \
  391. ((CPU_INT16U)((((CPU_INT16U)(val)) & (CPU_INT16U) 0x00FFu) << (1u * DEF_OCTET_NBR_BITS)))))
  392. #define MEM_VAL_BIG_TO_LITTLE_32(val) ((CPU_INT32U)(((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (1u * DEF_OCTET_NBR_BITS))) | \
  393. ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) << (1u * DEF_OCTET_NBR_BITS))) | \
  394. ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) >> (1u * DEF_OCTET_NBR_BITS))) | \
  395. ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) << (1u * DEF_OCTET_NBR_BITS)))))
  396. #else
  397. #define MEM_VAL_BIG_TO_LITTLE_16(val) (val)
  398. #define MEM_VAL_BIG_TO_LITTLE_32(val) (val)
  399. #endif
  400. #define MEM_VAL_LITTLE_TO_BIG_16(val) MEM_VAL_BIG_TO_LITTLE_16(val)
  401. #define MEM_VAL_LITTLE_TO_BIG_32(val) MEM_VAL_BIG_TO_LITTLE_32(val)
  402. #if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
  403. #define MEM_VAL_BIG_TO_HOST_16(val) (val)
  404. #define MEM_VAL_BIG_TO_HOST_32(val) (val)
  405. #define MEM_VAL_LITTLE_TO_HOST_16(val) MEM_VAL_LITTLE_TO_BIG_16(val)
  406. #define MEM_VAL_LITTLE_TO_HOST_32(val) MEM_VAL_LITTLE_TO_BIG_32(val)
  407. #elif (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
  408. #define MEM_VAL_BIG_TO_HOST_16(val) MEM_VAL_BIG_TO_LITTLE_16(val)
  409. #define MEM_VAL_BIG_TO_HOST_32(val) MEM_VAL_BIG_TO_LITTLE_32(val)
  410. #define MEM_VAL_LITTLE_TO_HOST_16(val) (val)
  411. #define MEM_VAL_LITTLE_TO_HOST_32(val) (val)
  412. #else /* See Note #5. */
  413. #error "CPU_CFG_ENDIAN_TYPE illegally #defined in 'cpu.h' "
  414. #error " [See 'cpu.h CONFIGURATION ERRORS']"
  415. #endif
  416. #define MEM_VAL_HOST_TO_BIG_16(val) MEM_VAL_BIG_TO_HOST_16(val)
  417. #define MEM_VAL_HOST_TO_BIG_32(val) MEM_VAL_BIG_TO_HOST_32(val)
  418. #define MEM_VAL_HOST_TO_LITTLE_16(val) MEM_VAL_LITTLE_TO_HOST_16(val)
  419. #define MEM_VAL_HOST_TO_LITTLE_32(val) MEM_VAL_LITTLE_TO_HOST_32(val)
  420. /*
  421. *********************************************************************************************************
  422. * MEM_VAL_GET_xxx()
  423. *
  424. * Description : Decode data values from any CPU memory address.
  425. *
  426. * Argument(s) : addr Lowest CPU memory address of data value to decode (see Notes #2 & #3a).
  427. *
  428. * Return(s) : Decoded data value from CPU memory address (see Notes #1 & #3b).
  429. *
  430. * Caller(s) : Application.
  431. *
  432. * Note(s) : (1) Decode data values based on the values' data-word order in CPU memory :
  433. *
  434. * MEM_VAL_GET_xxx_BIG() Decode big- endian data values -- data words' most
  435. * significant octet @ lowest memory address
  436. * MEM_VAL_GET_xxx_LITTLE() Decode little-endian data values -- data words' least
  437. * significant octet @ lowest memory address
  438. * MEM_VAL_GET_xxx() Decode data values using CPU's native or configured
  439. * data-word order
  440. *
  441. * See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
  442. *
  443. * (2) CPU memory addresses/pointers NOT checked for NULL.
  444. *
  445. * (3) (a) MEM_VAL_GET_xxx() macro's decode data values without regard to CPU word-aligned addresses.
  446. * Thus for processors that require data word alignment, data words can be decoded from any
  447. * CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
  448. *
  449. * (b) However, any variable to receive the returned data value MUST start on an appropriate CPU
  450. * word-aligned address.
  451. *
  452. * See also 'MEMORY DATA VALUE MACRO'S Note #1'.
  453. *
  454. * (4) MEM_VAL_COPY_GET_xxx() macro's are more efficient than MEM_VAL_GET_xxx() macro's & are
  455. * also independent of CPU data-word-alignment & SHOULD be used whenever possible.
  456. *
  457. * See also 'MEM_VAL_COPY_GET_xxx() Note #4'.
  458. *
  459. * (5) MEM_VAL_GET_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-static
  460. * (i.e. volatile) variables, registers, hardware, etc.; without the caller of the macro's
  461. * providing some form of additional protection (e.g. mutual exclusion).
  462. *
  463. * (6) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
  464. * linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
  465. * constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
  466. * value (see 'cpu.h CPU WORD CONFIGURATION Note #2'). The 'else'-conditional code is
  467. * included as an extra precaution in case 'cpu.h' is incorrectly configured.
  468. *********************************************************************************************************
  469. */
  470. #define MEM_VAL_GET_INT08U_BIG(addr) ((CPU_INT08U) ((CPU_INT08U)(((CPU_INT08U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))))
  471. #define MEM_VAL_GET_INT16U_BIG(addr) ((CPU_INT16U)(((CPU_INT16U)(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 0))) << (1u * DEF_OCTET_NBR_BITS))) + \
  472. ((CPU_INT16U)(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 1))) << (0u * DEF_OCTET_NBR_BITS)))))
  473. #define MEM_VAL_GET_INT24U_BIG(addr) ((CPU_INT32U)(((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (2u * DEF_OCTET_NBR_BITS))) + \
  474. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (1u * DEF_OCTET_NBR_BITS))) + \
  475. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (0u * DEF_OCTET_NBR_BITS)))))
  476. #define MEM_VAL_GET_INT32U_BIG(addr) ((CPU_INT32U)(((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (3u * DEF_OCTET_NBR_BITS))) + \
  477. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (2u * DEF_OCTET_NBR_BITS))) + \
  478. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (1u * DEF_OCTET_NBR_BITS))) + \
  479. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 3))) << (0u * DEF_OCTET_NBR_BITS)))))
  480. #define MEM_VAL_GET_INT08U_LITTLE(addr) ((CPU_INT08U) ((CPU_INT08U)(((CPU_INT08U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))))
  481. #define MEM_VAL_GET_INT16U_LITTLE(addr) ((CPU_INT16U)(((CPU_INT16U)(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))) + \
  482. ((CPU_INT16U)(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 1))) << (1u * DEF_OCTET_NBR_BITS)))))
  483. #define MEM_VAL_GET_INT24U_LITTLE(addr) ((CPU_INT32U)(((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))) + \
  484. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (1u * DEF_OCTET_NBR_BITS))) + \
  485. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (2u * DEF_OCTET_NBR_BITS)))))
  486. #define MEM_VAL_GET_INT32U_LITTLE(addr) ((CPU_INT32U)(((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))) + \
  487. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (1u * DEF_OCTET_NBR_BITS))) + \
  488. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (2u * DEF_OCTET_NBR_BITS))) + \
  489. ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 3))) << (3u * DEF_OCTET_NBR_BITS)))))
  490. #if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
  491. #define MEM_VAL_GET_INT08U(addr) MEM_VAL_GET_INT08U_BIG(addr)
  492. #define MEM_VAL_GET_INT16U(addr) MEM_VAL_GET_INT16U_BIG(addr)
  493. #define MEM_VAL_GET_INT24U(addr) MEM_VAL_GET_INT24U_BIG(addr)
  494. #define MEM_VAL_GET_INT32U(addr) MEM_VAL_GET_INT32U_BIG(addr)
  495. #elif (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
  496. #define MEM_VAL_GET_INT08U(addr) MEM_VAL_GET_INT08U_LITTLE(addr)
  497. #define MEM_VAL_GET_INT16U(addr) MEM_VAL_GET_INT16U_LITTLE(addr)
  498. #define MEM_VAL_GET_INT24U(addr) MEM_VAL_GET_INT24U_LITTLE(addr)
  499. #define MEM_VAL_GET_INT32U(addr) MEM_VAL_GET_INT32U_LITTLE(addr)
  500. #else /* See Note #6. */
  501. #error "CPU_CFG_ENDIAN_TYPE illegally #defined in 'cpu.h' "
  502. #error " [See 'cpu.h CONFIGURATION ERRORS']"
  503. #endif
  504. /*
  505. *********************************************************************************************************
  506. * MEM_VAL_SET_xxx()
  507. *
  508. * Description : Encode data values to any CPU memory address.
  509. *
  510. * Argument(s) : addr Lowest CPU memory address to encode data value (see Notes #2 & #3a).
  511. *
  512. * val Data value to encode (see Notes #1 & #3b).
  513. *
  514. * Return(s) : none.
  515. *
  516. * Caller(s) : Application.
  517. *
  518. * Note(s) : (1) Encode data values into CPU memory based on the values' data-word order :
  519. *
  520. * MEM_VAL_SET_xxx_BIG() Encode big- endian data values -- data words' most
  521. * significant octet @ lowest memory address
  522. * MEM_VAL_SET_xxx_LITTLE() Encode little-endian data values -- data words' least
  523. * significant octet @ lowest memory address
  524. * MEM_VAL_SET_xxx() Encode data values using CPU's native or configured
  525. * data-word order
  526. *
  527. * See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
  528. *
  529. * (2) CPU memory addresses/pointers NOT checked for NULL.
  530. *
  531. * (3) (a) MEM_VAL_SET_xxx() macro's encode data values without regard to CPU word-aligned addresses.
  532. * Thus for processors that require data word alignment, data words can be encoded to any
  533. * CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
  534. *
  535. * (b) However, 'val' data value to encode MUST start on an appropriate CPU word-aligned address.
  536. *
  537. * See also 'MEMORY DATA VALUE MACRO'S Note #1'.
  538. *
  539. * (4) MEM_VAL_COPY_SET_xxx() macro's are more efficient than MEM_VAL_SET_xxx() macro's & are
  540. * also independent of CPU data-word-alignment & SHOULD be used whenever possible.
  541. *
  542. * See also 'MEM_VAL_COPY_SET_xxx() Note #4'.
  543. *
  544. * (5) MEM_VAL_SET_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-static
  545. * (i.e. volatile) variables, registers, hardware, etc.; without the caller of the macro's
  546. * providing some form of additional protection (e.g. mutual exclusion).
  547. *
  548. * (6) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
  549. * linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
  550. * constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
  551. * value (see 'cpu.h CPU WORD CONFIGURATION Note #2'). The 'else'-conditional code is
  552. * included as an extra precaution in case 'cpu.h' is incorrectly configured.
  553. *********************************************************************************************************
  554. */
  555. #define MEM_VAL_SET_INT08U_BIG(addr, val) do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT08U)(val)) & (CPU_INT08U) 0xFFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
  556. #define MEM_VAL_SET_INT16U_BIG(addr, val) do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT16U)(val)) & (CPU_INT16U) 0xFF00u) >> (1u * DEF_OCTET_NBR_BITS))); \
  557. (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT16U)(val)) & (CPU_INT16U) 0x00FFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
  558. #define MEM_VAL_SET_INT24U_BIG(addr, val) do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U) 0xFF0000u) >> (2u * DEF_OCTET_NBR_BITS))); \
  559. (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U) 0x00FF00u) >> (1u * DEF_OCTET_NBR_BITS))); \
  560. (*(((CPU_INT08U *)(addr)) + 2)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U) 0x0000FFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
  561. #define MEM_VAL_SET_INT32U_BIG(addr, val) do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (3u * DEF_OCTET_NBR_BITS))); \
  562. (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) >> (2u * DEF_OCTET_NBR_BITS))); \
  563. (*(((CPU_INT08U *)(addr)) + 2)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) >> (1u * DEF_OCTET_NBR_BITS))); \
  564. (*(((CPU_INT08U *)(addr)) + 3)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
  565. #define MEM_VAL_SET_INT08U_LITTLE(addr, val) do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT08U)(val)) & (CPU_INT08U) 0xFFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
  566. #define MEM_VAL_SET_INT16U_LITTLE(addr, val) do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT16U)(val)) & (CPU_INT16U) 0x00FFu) >> (0u * DEF_OCTET_NBR_BITS))); \
  567. (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT16U)(val)) & (CPU_INT16U) 0xFF00u) >> (1u * DEF_OCTET_NBR_BITS))); } while (0)
  568. #define MEM_VAL_SET_INT24U_LITTLE(addr, val) do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U) 0x0000FFu) >> (0u * DEF_OCTET_NBR_BITS))); \
  569. (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U) 0x00FF00u) >> (1u * DEF_OCTET_NBR_BITS))); \
  570. (*(((CPU_INT08U *)(addr)) + 2)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U) 0xFF0000u) >> (2u * DEF_OCTET_NBR_BITS))); } while (0)
  571. #define MEM_VAL_SET_INT32U_LITTLE(addr, val) do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) >> (0u * DEF_OCTET_NBR_BITS))); \
  572. (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) >> (1u * DEF_OCTET_NBR_BITS))); \
  573. (*(((CPU_INT08U *)(addr)) + 2)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) >> (2u * DEF_OCTET_NBR_BITS))); \
  574. (*(((CPU_INT08U *)(addr)) + 3)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (3u * DEF_OCTET_NBR_BITS))); } while (0)
  575. #if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
  576. #define MEM_VAL_SET_INT08U(addr, val) MEM_VAL_SET_INT08U_BIG((addr), (val))
  577. #define MEM_VAL_SET_INT16U(addr, val) MEM_VAL_SET_INT16U_BIG((addr), (val))
  578. #define MEM_VAL_SET_INT24U(addr, val) MEM_VAL_SET_INT24U_BIG((addr), (val))
  579. #define MEM_VAL_SET_INT32U(addr, val) MEM_VAL_SET_INT32U_BIG((addr), (val))
  580. #elif (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
  581. #define MEM_VAL_SET_INT08U(addr, val) MEM_VAL_SET_INT08U_LITTLE((addr), (val))
  582. #define MEM_VAL_SET_INT16U(addr, val) MEM_VAL_SET_INT16U_LITTLE((addr), (val))
  583. #define MEM_VAL_SET_INT24U(addr, val) MEM_VAL_SET_INT24U_LITTLE((addr), (val))
  584. #define MEM_VAL_SET_INT32U(addr, val) MEM_VAL_SET_INT32U_LITTLE((addr), (val))
  585. #else /* See Note #6. */
  586. #error "CPU_CFG_ENDIAN_TYPE illegally #defined in 'cpu.h' "
  587. #error " [See 'cpu.h CONFIGURATION ERRORS']"
  588. #endif
  589. /*
  590. *********************************************************************************************************
  591. * MEM_VAL_COPY_GET_xxx()
  592. *
  593. * Description : Copy & decode data values from any CPU memory address to any CPU memory address.
  594. *
  595. * Argument(s) : addr_dest Lowest CPU memory address to copy/decode source address's data value
  596. * (see Notes #2 & #3).
  597. *
  598. * addr_src Lowest CPU memory address of data value to copy/decode
  599. * (see Notes #2 & #3).
  600. *
  601. * Return(s) : none.
  602. *
  603. * Caller(s) : Application.
  604. *
  605. * Note(s) : (1) Copy/decode data values based on the values' data-word order :
  606. *
  607. * MEM_VAL_COPY_GET_xxx_BIG() Decode big- endian data values -- data words' most
  608. * significant octet @ lowest memory address
  609. * MEM_VAL_COPY_GET_xxx_LITTLE() Decode little-endian data values -- data words' least
  610. * significant octet @ lowest memory address
  611. * MEM_VAL_COPY_GET_xxx() Decode data values using CPU's native or configured
  612. * data-word order
  613. *
  614. * See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
  615. *
  616. * (2) (a) CPU memory addresses/pointers NOT checked for NULL.
  617. *
  618. * (b) CPU memory addresses/buffers NOT checked for overlapping.
  619. *
  620. * (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
  621. * "copying ... between objects that overlap ... is undefined".
  622. *
  623. * (3) MEM_VAL_COPY_GET_xxx() macro's copy/decode data values without regard to CPU word-aligned
  624. * addresses. Thus for processors that require data word alignment, data words can be copied/
  625. * decoded to/from any CPU address, word-aligned or not, without generating data-word-alignment
  626. * exceptions/faults.
  627. *
  628. * (4) MEM_VAL_COPY_GET_xxx() macro's are more efficient than MEM_VAL_GET_xxx() macro's & are
  629. * also independent of CPU data-word-alignment & SHOULD be used whenever possible.
  630. *
  631. * See also 'MEM_VAL_GET_xxx() Note #4'.
  632. *
  633. * (5) Since octet-order copy/conversion are inverse operations, MEM_VAL_COPY_GET_xxx() &
  634. * MEM_VAL_COPY_SET_xxx() macros are inverse, but identical, operations & are provided
  635. * in both forms for semantics & consistency.
  636. *
  637. * See also 'MEM_VAL_COPY_SET_xxx() Note #5'.
  638. *
  639. * (6) MEM_VAL_COPY_GET_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-
  640. * static (i.e. volatile) variables, registers, hardware, etc.; without the caller of the
  641. * macro's providing some form of additional protection (e.g. mutual exclusion).
  642. *
  643. * (7) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
  644. * linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
  645. * constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
  646. * value (see 'cpu.h CPU WORD CONFIGURATION Note #2'). The 'else'-conditional code is
  647. * included as an extra precaution in case 'cpu.h' is incorrectly configured.
  648. *********************************************************************************************************
  649. */
  650. #if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
  651. #define MEM_VAL_COPY_GET_INT08U_BIG(addr_dest, addr_src) do { \
  652. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  653. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  654. (*((destptr) + 0)) = (*((srcptr) + 0)); } while (0)
  655. #define MEM_VAL_COPY_GET_INT16U_BIG(addr_dest, addr_src) do { \
  656. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  657. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  658. (*((destptr) + 0)) = (*((srcptr) + 0)); \
  659. (*((destptr) + 1)) = (*((srcptr) + 1)); } while (0)
  660. #define MEM_VAL_COPY_GET_INT24U_BIG(addr_dest, addr_src) do { \
  661. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  662. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  663. (*((destptr) + 0)) = (*((srcptr) + 0)); \
  664. (*((destptr) + 1)) = (*((srcptr) + 1)); \
  665. (*((destptr) + 2)) = (*((srcptr) + 2)); } while (0)
  666. #define MEM_VAL_COPY_GET_INT32U_BIG(addr_dest, addr_src) do { \
  667. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  668. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  669. (*((destptr) + 0)) = (*((srcptr) + 0)); \
  670. (*((destptr) + 1)) = (*((srcptr) + 1)); \
  671. (*((destptr) + 2)) = (*((srcptr) + 2)); \
  672. (*((destptr) + 3)) = (*((srcptr) + 3)); } while (0)
  673. #define MEM_VAL_COPY_GET_INT08U_LITTLE(addr_dest, addr_src) do { \
  674. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  675. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  676. (*((destptr) + 0)) = (*((srcptr) + 0)); } while (0)
  677. #define MEM_VAL_COPY_GET_INT16U_LITTLE(addr_dest, addr_src) do { \
  678. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  679. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  680. (*((destptr) + 0)) = (*((srcptr) + 1)); \
  681. (*((destptr) + 1)) = (*((srcptr) + 0)); } while (0)
  682. #define MEM_VAL_COPY_GET_INT24U_LITTLE(addr_dest, addr_src) do { \
  683. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  684. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  685. (*((destptr) + 0)) = (*((srcptr) + 2)); \
  686. (*((destptr) + 1)) = (*((srcptr) + 1)); \
  687. (*((destptr) + 2)) = (*((srcptr) + 0)); } while (0)
  688. #define MEM_VAL_COPY_GET_INT32U_LITTLE(addr_dest, addr_src) do { \
  689. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  690. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  691. (*((destptr) + 0)) = (*((srcptr) + 3)); \
  692. (*((destptr) + 1)) = (*((srcptr) + 2)); \
  693. (*((destptr) + 2)) = (*((srcptr) + 1)); \
  694. (*((destptr) + 3)) = (*((srcptr) + 0)); } while (0)
  695. #define MEM_VAL_COPY_GET_INT08U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT08U_BIG((addr_dest), (addr_src))
  696. #define MEM_VAL_COPY_GET_INT16U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT16U_BIG((addr_dest), (addr_src))
  697. #define MEM_VAL_COPY_GET_INT24U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT24U_BIG((addr_dest), (addr_src))
  698. #define MEM_VAL_COPY_GET_INT32U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT32U_BIG((addr_dest), (addr_src))
  699. #elif (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
  700. #define MEM_VAL_COPY_GET_INT08U_BIG(addr_dest, addr_src) do { \
  701. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  702. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  703. (*((destptr) + 0)) = (*((srcptr) + 0)); } while (0)
  704. #define MEM_VAL_COPY_GET_INT16U_BIG(addr_dest, addr_src) do { \
  705. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  706. CPU_INT08U * srcptr = (CPU_INT08U *)(addr_src); \
  707. (*((destptr) + 0)) = (*((srcptr) + 1)); \
  708. (*((destptr) + 1)) = (*((srcptr) + 0)); } while (0)
  709. #define MEM_VAL_COPY_GET_INT24U_BIG(addr_dest, addr_src) do { \
  710. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  711. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  712. (*((destptr) + 0)) = (*((srcptr) + 2)); \
  713. (*((destptr) + 1)) = (*((srcptr) + 1)); \
  714. (*((destptr) + 2)) = (*((srcptr) + 0)); } while (0)
  715. #define MEM_VAL_COPY_GET_INT32U_BIG(addr_dest, addr_src) do { \
  716. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  717. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  718. (*((destptr) + 0)) = (*((srcptr) + 3)); \
  719. (*((destptr) + 1)) = (*((srcptr) + 2)); \
  720. (*((destptr) + 2)) = (*((srcptr) + 1)); \
  721. (*((destptr) + 3)) = (*((srcptr) + 0)); } while (0)
  722. #define MEM_VAL_COPY_GET_INT08U_LITTLE(addr_dest, addr_src) do { \
  723. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  724. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  725. (*((destptr) + 0)) = (*((srcptr) + 0)); } while (0)
  726. #define MEM_VAL_COPY_GET_INT16U_LITTLE(addr_dest, addr_src) do { \
  727. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  728. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  729. (*((destptr) + 0)) = (*((srcptr) + 0)); \
  730. (*((destptr) + 1)) = (*((srcptr) + 1)); } while (0)
  731. #define MEM_VAL_COPY_GET_INT24U_LITTLE(addr_dest, addr_src) do { \
  732. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  733. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  734. (*((destptr) + 0)) = (*((srcptr) + 0)); \
  735. (*((destptr) + 1)) = (*((srcptr) + 1)); \
  736. (*((destptr) + 2)) = (*((srcptr) + 2)); } while (0)
  737. #define MEM_VAL_COPY_GET_INT32U_LITTLE(addr_dest, addr_src) do { \
  738. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  739. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  740. (*((destptr) + 0)) = (*((srcptr) + 0)); \
  741. (*((destptr) + 1)) = (*((srcptr) + 1)); \
  742. (*((destptr) + 2)) = (*((srcptr) + 2)); \
  743. (*((destptr) + 3)) = (*((srcptr) + 3)); } while (0)
  744. #define MEM_VAL_COPY_GET_INT08U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT08U_LITTLE((addr_dest), (addr_src))
  745. #define MEM_VAL_COPY_GET_INT16U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT16U_LITTLE((addr_dest), (addr_src))
  746. #define MEM_VAL_COPY_GET_INT24U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT24U_LITTLE((addr_dest), (addr_src))
  747. #define MEM_VAL_COPY_GET_INT32U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT32U_LITTLE((addr_dest), (addr_src))
  748. #else /* See Note #7. */
  749. #error "CPU_CFG_ENDIAN_TYPE illegally #defined in 'cpu.h' "
  750. #error " [See 'cpu.h CONFIGURATION ERRORS']"
  751. #endif
  752. /*
  753. *********************************************************************************************************
  754. * MEM_VAL_COPY_GET_INTU_xxx()
  755. *
  756. * Description : Copy & decode data values from any CPU memory address to any CPU memory address for
  757. * any sized data values.
  758. *
  759. * Argument(s) : addr_dest Lowest CPU memory address to copy/decode source address's data value
  760. * (see Notes #2 & #3).
  761. *
  762. * addr_src Lowest CPU memory address of data value to copy/decode
  763. * (see Notes #2 & #3).
  764. *
  765. * val_size Number of data value octets to copy/decode.
  766. *
  767. * Return(s) : none.
  768. *
  769. * Caller(s) : Application.
  770. *
  771. * Note(s) : (1) Copy/decode data values based on the values' data-word order :
  772. *
  773. * MEM_VAL_COPY_GET_INTU_BIG() Decode big- endian data values -- data words' most
  774. * significant octet @ lowest memory address
  775. * MEM_VAL_COPY_GET_INTU_LITTLE() Decode little-endian data values -- data words' least
  776. * significant octet @ lowest memory address
  777. * MEM_VAL_COPY_GET_INTU() Decode data values using CPU's native or configured
  778. * data-word order
  779. *
  780. * See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
  781. *
  782. * (2) (a) CPU memory addresses/pointers NOT checked for NULL.
  783. *
  784. * (b) CPU memory addresses/buffers NOT checked for overlapping.
  785. *
  786. * (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
  787. * "copying ... between objects that overlap ... is undefined".
  788. *
  789. * (3) MEM_VAL_COPY_GET_INTU_xxx() macro's copy/decode data values without regard to CPU word-
  790. * aligned addresses. Thus for processors that require data word alignment, data words
  791. * can be copied/decoded to/from any CPU address, word-aligned or not, without generating
  792. * data-word-alignment exceptions/faults.
  793. *
  794. * (4) MEM_VAL_COPY_GET_xxx() macro's are more efficient than MEM_VAL_COPY_GET_INTU_xxx()
  795. * macro's & SHOULD be used whenever possible.
  796. *
  797. * See also 'MEM_VAL_COPY_GET_xxx() Note #4'.
  798. *
  799. * (5) Since octet-order copy/conversion are inverse operations, MEM_VAL_COPY_GET_INTU_xxx() &
  800. * MEM_VAL_COPY_SET_INTU_xxx() macros are inverse, but identical, operations & are provided
  801. * in both forms for semantics & consistency.
  802. *
  803. * See also 'MEM_VAL_COPY_SET_INTU_xxx() Note #5'.
  804. *
  805. * (6) MEM_VAL_COPY_GET_INTU_xxx() macro's are NOT atomic operations & MUST NOT be used on any
  806. * non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller of
  807. * the macro's providing some form of additional protection (e.g. mutual exclusion).
  808. *
  809. * (7) MISRA-C 2004 Rule 5.2 states that "identifiers in an inner scope shall not use the same
  810. * name as an indentifier in an outer scope, and therefore hide that identifier".
  811. *
  812. * Therefore, to avoid possible redeclaration of commonly-used loop counter identifier names,
  813. * 'i' & 'j', MEM_VAL_COPY_GET_INTU_xxx() loop counter identifier names are prefixed with a
  814. * single underscore.
  815. *
  816. * (8) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
  817. * linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
  818. * constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
  819. * value (see 'cpu.h CPU WORD CONFIGURATION Note #2'). The 'else'-conditional code is
  820. * included as an extra precaution in case 'cpu.h' is incorrectly configured.
  821. *********************************************************************************************************
  822. */
  823. #if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
  824. #define MEM_VAL_COPY_GET_INTU_BIG(addr_dest, addr_src, val_size) do { \
  825. CPU_SIZE_T _i; \
  826. \
  827. for (_i = 0; _i < (val_size); _i++) { \
  828. (*(((CPU_INT08U *)(addr_dest)) + _i)) = (*(((CPU_INT08U *)(addr_src)) + _i)); \
  829. } \
  830. } while (0)
  831. #define MEM_VAL_COPY_GET_INTU_LITTLE(addr_dest, addr_src, val_size) do { \
  832. CPU_SIZE_T _i; \
  833. CPU_SIZE_T _j; \
  834. \
  835. \
  836. _j = (val_size) - 1; \
  837. \
  838. for (_i = 0; _i < (val_size); _i++) { \
  839. (*(((CPU_INT08U *)(addr_dest)) + _i)) = (*(((CPU_INT08U *)(addr_src)) + _j)); \
  840. _j--; \
  841. } \
  842. } while (0)
  843. #define MEM_VAL_COPY_GET_INTU(addr_dest, addr_src, val_size) MEM_VAL_COPY_GET_INTU_BIG((addr_dest), (addr_src), (val_size))
  844. #elif (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
  845. #define MEM_VAL_COPY_GET_INTU_BIG(addr_dest, addr_src, val_size) do { \
  846. CPU_SIZE_T _i; \
  847. CPU_SIZE_T _j; \
  848. \
  849. \
  850. _j = (val_size) - 1; \
  851. \
  852. for (_i = 0; _i < (val_size); _i++) { \
  853. (*(((CPU_INT08U *)(addr_dest)) + _i)) = (*(((CPU_INT08U *)(addr_src)) + _j)); \
  854. _j--; \
  855. } \
  856. } while (0)
  857. #define MEM_VAL_COPY_GET_INTU_LITTLE(addr_dest, addr_src, val_size) do { \
  858. CPU_SIZE_T _i; \
  859. \
  860. for (_i = 0; _i < (val_size); _i++) { \
  861. (*(((CPU_INT08U *)(addr_dest)) + _i)) = (*(((CPU_INT08U *)(addr_src)) + _i)); \
  862. } \
  863. } while (0)
  864. #define MEM_VAL_COPY_GET_INTU(addr_dest, addr_src, val_size) MEM_VAL_COPY_GET_INTU_LITTLE((addr_dest), (addr_src), (val_size))
  865. #else /* See Note #8. */
  866. #error "CPU_CFG_ENDIAN_TYPE illegally #defined in 'cpu.h' "
  867. #error " [See 'cpu.h CONFIGURATION ERRORS']"
  868. #endif
  869. /*
  870. *********************************************************************************************************
  871. * MEM_VAL_COPY_SET_xxx()
  872. *
  873. * Description : Copy & encode data values from any CPU memory address to any CPU memory address.
  874. *
  875. * Argument(s) : addr_dest Lowest CPU memory address to copy/encode source address's data value
  876. * (see Notes #2 & #3).
  877. *
  878. * addr_src Lowest CPU memory address of data value to copy/encode
  879. * (see Notes #2 & #3).
  880. *
  881. * Return(s) : none.
  882. *
  883. * Caller(s) : Application.
  884. *
  885. * Note(s) : (1) Copy/encode data values based on the values' data-word order :
  886. *
  887. * MEM_VAL_COPY_SET_xxx_BIG() Encode big- endian data values -- data words' most
  888. * significant octet @ lowest memory address
  889. * MEM_VAL_COPY_SET_xxx_LITTLE() Encode little-endian data values -- data words' least
  890. * significant octet @ lowest memory address
  891. * MEM_VAL_COPY_SET_xxx() Encode data values using CPU's native or configured
  892. * data-word order
  893. *
  894. * See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
  895. *
  896. * (2) (a) CPU memory addresses/pointers NOT checked for NULL.
  897. *
  898. * (b) CPU memory addresses/buffers NOT checked for overlapping.
  899. *
  900. * (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
  901. * "copying ... between objects that overlap ... is undefined".
  902. *
  903. * (3) MEM_VAL_COPY_SET_xxx() macro's copy/encode data values without regard to CPU word-aligned
  904. * addresses. Thus for processors that require data word alignment, data words can be copied/
  905. * encoded to/from any CPU address, word-aligned or not, without generating data-word-alignment
  906. * exceptions/faults.
  907. *
  908. * (4) MEM_VAL_COPY_SET_xxx() macro's are more efficient than MEM_VAL_SET_xxx() macro's & are
  909. * also independent of CPU data-word-alignment & SHOULD be used whenever possible.
  910. *
  911. * See also 'MEM_VAL_SET_xxx() Note #4'.
  912. *
  913. * (5) Since octet-order copy/conversion are inverse operations, MEM_VAL_COPY_GET_xxx() &
  914. * MEM_VAL_COPY_SET_xxx() macros are inverse, but identical, operations & are provided
  915. * in both forms for semantics & consistency.
  916. *
  917. * See also 'MEM_VAL_COPY_GET_xxx() Note #5'.
  918. *
  919. * (6) MEM_VAL_COPY_SET_xxx() macro's are NOT atomic operations & MUST NOT be used on any
  920. * non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller
  921. * of the macro's providing some form of additional protection (e.g. mutual exclusion).
  922. *********************************************************************************************************
  923. */
  924. /* See Note #5. */
  925. #define MEM_VAL_COPY_SET_INT08U_BIG(addr_dest, addr_src) MEM_VAL_COPY_GET_INT08U_BIG((addr_dest), (addr_src))
  926. #define MEM_VAL_COPY_SET_INT16U_BIG(addr_dest, addr_src) MEM_VAL_COPY_GET_INT16U_BIG((addr_dest), (addr_src))
  927. #define MEM_VAL_COPY_SET_INT24U_BIG(addr_dest, addr_src) MEM_VAL_COPY_GET_INT24U_BIG((addr_dest), (addr_src))
  928. #define MEM_VAL_COPY_SET_INT32U_BIG(addr_dest, addr_src) MEM_VAL_COPY_GET_INT32U_BIG((addr_dest), (addr_src))
  929. #define MEM_VAL_COPY_SET_INT08U_LITTLE(addr_dest, addr_src) MEM_VAL_COPY_GET_INT08U_LITTLE((addr_dest), (addr_src))
  930. #define MEM_VAL_COPY_SET_INT16U_LITTLE(addr_dest, addr_src) MEM_VAL_COPY_GET_INT16U_LITTLE((addr_dest), (addr_src))
  931. #define MEM_VAL_COPY_SET_INT24U_LITTLE(addr_dest, addr_src) MEM_VAL_COPY_GET_INT24U_LITTLE((addr_dest), (addr_src))
  932. #define MEM_VAL_COPY_SET_INT32U_LITTLE(addr_dest, addr_src) MEM_VAL_COPY_GET_INT32U_LITTLE((addr_dest), (addr_src))
  933. #define MEM_VAL_COPY_SET_INT08U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT08U((addr_dest), (addr_src))
  934. #define MEM_VAL_COPY_SET_INT16U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT16U((addr_dest), (addr_src))
  935. #define MEM_VAL_COPY_SET_INT24U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT24U((addr_dest), (addr_src))
  936. #define MEM_VAL_COPY_SET_INT32U(addr_dest, addr_src) MEM_VAL_COPY_GET_INT32U((addr_dest), (addr_src))
  937. /*
  938. *********************************************************************************************************
  939. * MEM_VAL_COPY_SET_INTU_xxx()
  940. *
  941. * Description : Copy & encode data values from any CPU memory address to any CPU memory address for
  942. * any sized data values.
  943. *
  944. * Argument(s) : addr_dest Lowest CPU memory address to copy/encode source address's data value
  945. * (see Notes #2 & #3).
  946. *
  947. * addr_src Lowest CPU memory address of data value to copy/encode
  948. * (see Notes #2 & #3).
  949. *
  950. * val_size Number of data value octets to copy/encode.
  951. *
  952. * Return(s) : none.
  953. *
  954. * Caller(s) : Application.
  955. *
  956. * Note(s) : (1) Copy/encode data values based on the values' data-word order :
  957. *
  958. * MEM_VAL_COPY_SET_INTU_BIG() Encode big- endian data values -- data words' most
  959. * significant octet @ lowest memory address
  960. * MEM_VAL_COPY_SET_INTU_LITTLE() Encode little-endian data values -- data words' least
  961. * significant octet @ lowest memory address
  962. * MEM_VAL_COPY_SET_INTU() Encode data values using CPU's native or configured
  963. * data-word order
  964. *
  965. * See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
  966. *
  967. * (2) (a) CPU memory addresses/pointers NOT checked for NULL.
  968. *
  969. * (b) CPU memory addresses/buffers NOT checked for overlapping.
  970. *
  971. * (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
  972. * "copying ... between objects that overlap ... is undefined".
  973. *
  974. * (3) MEM_VAL_COPY_SET_INTU_xxx() macro's copy/encode data values without regard to CPU word-
  975. * aligned addresses. Thus for processors that require data word alignment, data words
  976. * can be copied/encoded to/from any CPU address, word-aligned or not, without generating
  977. * data-word-alignment exceptions/faults.
  978. *
  979. * (4) MEM_VAL_COPY_SET_xxx() macro's are more efficient than MEM_VAL_COPY_SET_INTU_xxx()
  980. * macro's & SHOULD be used whenever possible.
  981. *
  982. * See also 'MEM_VAL_COPY_SET_xxx() Note #4'.
  983. *
  984. * (5) Since octet-order copy/conversion are inverse operations, MEM_VAL_COPY_GET_INTU_xxx() &
  985. * MEM_VAL_COPY_SET_INTU_xxx() macros are inverse, but identical, operations & are provided
  986. * in both forms for semantics & consistency.
  987. *
  988. * See also 'MEM_VAL_COPY_GET_INTU_xxx() Note #5'.
  989. *
  990. * (6) MEM_VAL_COPY_SET_INTU_xxx() macro's are NOT atomic operations & MUST NOT be used on any
  991. * non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller of
  992. * the macro's providing some form of additional protection (e.g. mutual exclusion).
  993. *********************************************************************************************************
  994. */
  995. /* See Note #5. */
  996. #define MEM_VAL_COPY_SET_INTU_BIG(addr_dest, addr_src, val_size) MEM_VAL_COPY_GET_INTU_BIG((addr_dest), (addr_src), (val_size))
  997. #define MEM_VAL_COPY_SET_INTU_LITTLE(addr_dest, addr_src, val_size) MEM_VAL_COPY_GET_INTU_LITTLE((addr_dest), (addr_src), (val_size))
  998. #define MEM_VAL_COPY_SET_INTU(addr_dest, addr_src, val_size) MEM_VAL_COPY_GET_INTU((addr_dest), (addr_src), (val_size))
  999. /*
  1000. *********************************************************************************************************
  1001. * MEM_VAL_COPY_xxx()
  1002. *
  1003. * Description : Copy data values from any CPU memory address to any CPU memory address.
  1004. *
  1005. * Argument(s) : addr_dest Lowest CPU memory address to copy source address's data value
  1006. * (see Notes #2 & #3).
  1007. *
  1008. * addr_src Lowest CPU memory address of data value to copy
  1009. * (see Notes #2 & #3).
  1010. *
  1011. * val_size Number of data value octets to copy.
  1012. *
  1013. * Return(s) : none.
  1014. *
  1015. * Caller(s) : Application.
  1016. *
  1017. * Note(s) : (1) MEM_VAL_COPY_xxx() macro's copy data values based on CPU's native data-word order.
  1018. *
  1019. * See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
  1020. *
  1021. * (2) (a) CPU memory addresses/pointers NOT checked for NULL.
  1022. *
  1023. * (b) CPU memory addresses/buffers NOT checked for overlapping.
  1024. *
  1025. * (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
  1026. * "copying ... between objects that overlap ... is undefined".
  1027. *
  1028. * (3) MEM_VAL_COPY_xxx() macro's copy data values without regard to CPU word-aligned addresses.
  1029. * Thus for processors that require data word alignment, data words can be copied to/from any
  1030. * CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
  1031. *
  1032. * (4) MEM_VAL_COPY_xxx() macro's are more efficient than MEM_VAL_COPY() macro & SHOULD be
  1033. * used whenever possible.
  1034. *
  1035. * (5) MEM_VAL_COPY_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-static
  1036. * (i.e. volatile) variables, registers, hardware, etc.; without the caller of the macro's
  1037. * providing some form of additional protection (e.g. mutual exclusion).
  1038. *
  1039. * (6) MISRA-C 2004 Rule 5.2 states that "identifiers in an inner scope shall not use the same
  1040. * name as an indentifier in an outer scope, and therefore hide that identifier".
  1041. *
  1042. * Therefore, to avoid possible redeclaration of commonly-used loop counter identifier name,
  1043. * 'i', MEM_VAL_COPY() loop counter identifier name is prefixed with a single underscore.
  1044. *********************************************************************************************************
  1045. */
  1046. #define MEM_VAL_COPY_08(addr_dest, addr_src) do { \
  1047. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  1048. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  1049. (*(destptr + 0)) = (*(srcptr + 0)); } while (0)
  1050. #define MEM_VAL_COPY_16(addr_dest, addr_src) do { \
  1051. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  1052. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  1053. (*(destptr + 0)) = (*(srcptr + 0)); \
  1054. (*(destptr + 1)) = (*(srcptr + 1)); } while (0)
  1055. #define MEM_VAL_COPY_24(addr_dest, addr_src) do { \
  1056. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  1057. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  1058. (*(destptr + 0)) = (*(srcptr + 0)); \
  1059. (*(destptr + 1)) = (*(srcptr + 1)); \
  1060. (*(destptr + 2)) = (*(srcptr + 2)); } while (0)
  1061. #define MEM_VAL_COPY_32(addr_dest, addr_src) do { \
  1062. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  1063. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  1064. (*(destptr + 0)) = (*(srcptr + 0)); \
  1065. (*(destptr + 1)) = (*(srcptr + 1)); \
  1066. (*(destptr + 2)) = (*(srcptr + 2)); \
  1067. (*(destptr + 3)) = (*(srcptr + 3));} while (0)
  1068. #define MEM_VAL_COPY(addr_dest, addr_src, val_size) do { \
  1069. CPU_SIZE_T _i; \
  1070. CPU_INT08U *destptr = (CPU_INT08U *)(addr_dest); \
  1071. CPU_INT08U *srcptr = (CPU_INT08U *)(addr_src); \
  1072. for (_i = 0; _i < (val_size); _i++) { \
  1073. (*(destptr +_i)) = (*(srcptr +_i)); \
  1074. } \
  1075. } while (0)
  1076. /*
  1077. *********************************************************************************************************
  1078. * FUNCTION PROTOTYPES
  1079. *********************************************************************************************************
  1080. */
  1081. void Mem_Init ( void);
  1082. /* ------------------ MEM API FNCTS ------------------ */
  1083. void Mem_Clr ( void *pmem,
  1084. CPU_SIZE_T size);
  1085. void Mem_Set ( void *pmem,
  1086. CPU_INT08U data_val,
  1087. CPU_SIZE_T size);
  1088. void Mem_Copy ( void *pdest,
  1089. const void *psrc,
  1090. CPU_SIZE_T size);
  1091. void Mem_Move ( void *pdest,
  1092. const void *psrc,
  1093. CPU_SIZE_T size);
  1094. CPU_BOOLEAN Mem_Cmp (const void *p1_mem,
  1095. const void *p2_mem,
  1096. CPU_SIZE_T size);
  1097. /* ----------- MEM HEAP FNCTS (DEPRECATED) ------------ */
  1098. #if (LIB_MEM_CFG_HEAP_SIZE > 0u)
  1099. void *Mem_HeapAlloc ( CPU_SIZE_T size,
  1100. CPU_SIZE_T align,
  1101. CPU_SIZE_T *p_bytes_reqd,
  1102. LIB_ERR *p_err);
  1103. CPU_SIZE_T Mem_HeapGetSizeRem ( CPU_SIZE_T align,
  1104. LIB_ERR *p_err);
  1105. #endif
  1106. /* ------------------ MEM SEG FNCTS ------------------- */
  1107. void Mem_SegCreate (const CPU_CHAR *p_name,
  1108. MEM_SEG *p_seg,
  1109. CPU_ADDR seg_base_addr,
  1110. CPU_SIZE_T size,
  1111. CPU_SIZE_T padding_align,
  1112. LIB_ERR *p_err);
  1113. void Mem_SegClr ( MEM_SEG *p_seg,
  1114. LIB_ERR *p_err);
  1115. void *Mem_SegAlloc (const CPU_CHAR *p_name,
  1116. MEM_SEG *p_seg,
  1117. CPU_SIZE_T size,
  1118. LIB_ERR *p_err);
  1119. void *Mem_SegAllocExt (const CPU_CHAR *p_name,
  1120. MEM_SEG *p_seg,
  1121. CPU_SIZE_T size,
  1122. CPU_SIZE_T align,
  1123. CPU_SIZE_T *p_bytes_reqd,
  1124. LIB_ERR *p_err);
  1125. void *Mem_SegAllocHW (const CPU_CHAR *p_name,
  1126. MEM_SEG *p_seg,
  1127. CPU_SIZE_T size,
  1128. CPU_SIZE_T align,
  1129. CPU_SIZE_T *p_bytes_reqd,
  1130. LIB_ERR *p_err);
  1131. CPU_SIZE_T Mem_SegRemSizeGet ( MEM_SEG *p_seg,
  1132. CPU_SIZE_T align,
  1133. MEM_SEG_INFO *p_seg_info,
  1134. LIB_ERR *p_err);
  1135. #if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
  1136. void Mem_OutputUsage ( void (*out_fnct) (CPU_CHAR *),
  1137. LIB_ERR *p_err);
  1138. #endif
  1139. /* -------- STATIC MEM POOL FNCTS (DEPRECATED) -------- */
  1140. void Mem_PoolCreate ( MEM_POOL *p_pool,
  1141. void *p_mem_base,
  1142. CPU_SIZE_T mem_size,
  1143. MEM_POOL_BLK_QTY blk_nbr,
  1144. CPU_SIZE_T blk_size,
  1145. CPU_SIZE_T blk_align,
  1146. CPU_SIZE_T *p_bytes_reqd,
  1147. LIB_ERR *p_err);
  1148. void Mem_PoolClr ( MEM_POOL *p_pool,
  1149. LIB_ERR *p_err);
  1150. void *Mem_PoolBlkGet ( MEM_POOL *p_pool,
  1151. CPU_SIZE_T size,
  1152. LIB_ERR *p_err);
  1153. void Mem_PoolBlkFree ( MEM_POOL *p_pool,
  1154. void *p_blk,
  1155. LIB_ERR *p_err);
  1156. MEM_POOL_BLK_QTY Mem_PoolBlkGetNbrAvail ( MEM_POOL *p_pool,
  1157. LIB_ERR *p_err);
  1158. /* -------------- DYNAMIC MEM POOL FNCTS -------------- */
  1159. void Mem_DynPoolCreate (const CPU_CHAR *p_name,
  1160. MEM_DYN_POOL *p_pool,
  1161. MEM_SEG *p_seg,
  1162. CPU_SIZE_T blk_size,
  1163. CPU_SIZE_T blk_align,
  1164. CPU_SIZE_T blk_qty_init,
  1165. CPU_SIZE_T blk_qty_max,
  1166. LIB_ERR *p_err);
  1167. void Mem_DynPoolCreateHW (const CPU_CHAR *p_name,
  1168. MEM_DYN_POOL *p_pool,
  1169. MEM_SEG *p_seg,
  1170. CPU_SIZE_T blk_size,
  1171. CPU_SIZE_T blk_align,
  1172. CPU_SIZE_T blk_qty_init,
  1173. CPU_SIZE_T blk_qty_max,
  1174. LIB_ERR *p_err);
  1175. void *Mem_DynPoolBlkGet ( MEM_DYN_POOL *p_pool,
  1176. LIB_ERR *p_err);
  1177. void Mem_DynPoolBlkFree ( MEM_DYN_POOL *p_pool,
  1178. void *p_blk,
  1179. LIB_ERR *p_err);
  1180. CPU_SIZE_T Mem_DynPoolBlkNbrAvailGet( MEM_DYN_POOL *p_pool,
  1181. LIB_ERR *p_err);
  1182. /*
  1183. *********************************************************************************************************
  1184. * CONFIGURATION ERRORS
  1185. *********************************************************************************************************
  1186. */
  1187. #ifndef LIB_MEM_CFG_ARG_CHK_EXT_EN
  1188. #error "LIB_MEM_CFG_ARG_CHK_EXT_EN not #define'd in 'lib_cfg.h'"
  1189. #error " [MUST be DEF_DISABLED] "
  1190. #error " [ || DEF_ENABLED ] "
  1191. #elif ((LIB_MEM_CFG_ARG_CHK_EXT_EN != DEF_DISABLED) && \
  1192. (LIB_MEM_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ))
  1193. #error "LIB_MEM_CFG_ARG_CHK_EXT_EN illegally #define'd in 'lib_cfg.h'"
  1194. #error " [MUST be DEF_DISABLED] "
  1195. #error " [ || DEF_ENABLED ] "
  1196. #endif
  1197. #ifndef LIB_MEM_CFG_OPTIMIZE_ASM_EN
  1198. #error "LIB_MEM_CFG_OPTIMIZE_ASM_EN not #define'd in 'lib_cfg.h'"
  1199. #error " [MUST be DEF_DISABLED] "
  1200. #error " [ || DEF_ENABLED ] "
  1201. #elif ((LIB_MEM_CFG_OPTIMIZE_ASM_EN != DEF_DISABLED) && \
  1202. (LIB_MEM_CFG_OPTIMIZE_ASM_EN != DEF_ENABLED ))
  1203. #error "LIB_MEM_CFG_OPTIMIZE_ASM_EN illegally #define'd in 'lib_cfg.h'"
  1204. #error " [MUST be DEF_DISABLED] "
  1205. #error " [ || DEF_ENABLED ] "
  1206. #endif
  1207. #ifndef LIB_MEM_CFG_HEAP_SIZE
  1208. #error "LIB_MEM_CFG_HEAP_SIZE not #define'd in 'lib_cfg.h'"
  1209. #error " [MUST be >= 0] "
  1210. #endif
  1211. #ifdef LIB_MEM_CFG_HEAP_BASE_ADDR
  1212. #if (LIB_MEM_CFG_HEAP_BASE_ADDR == 0x0)
  1213. #error "LIB_MEM_CFG_HEAP_BASE_ADDR illegally #define'd in 'lib_cfg.h'"
  1214. #error " [MUST be > 0x0] "
  1215. #endif
  1216. #endif
  1217. #if ((LIB_MEM_CFG_DBG_INFO_EN != DEF_DISABLED) && \
  1218. (LIB_MEM_CFG_DBG_INFO_EN != DEF_ENABLED ))
  1219. #error "LIB_MEM_CFG_DBG_INFO_EN illegally defined in 'lib_cfg.h'"
  1220. #error " [MUST be DEF_DISABLED] "
  1221. #error " [ || DEF_ENABLED ] "
  1222. #elif ((LIB_MEM_CFG_HEAP_SIZE == 0u) && \
  1223. (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED))
  1224. #error "LIB_MEM_CFG_HEAP_SIZE illegally defined in 'lib_cfg.h' "
  1225. #error " [MUST be > 0 when LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED]"
  1226. #endif
  1227. /*
  1228. *********************************************************************************************************
  1229. * LIBRARY CONFIGURATION ERRORS
  1230. *********************************************************************************************************
  1231. */
  1232. /* See 'lib_mem.h Note #2a'. */
  1233. #if (CPU_CORE_VERSION < 127u)
  1234. #error "CPU_CORE_VERSION [SHOULD be >= V1.27]"
  1235. #endif
  1236. /*
  1237. *********************************************************************************************************
  1238. * MODULE END
  1239. *
  1240. * Note(s) : (1) See 'lib_mem.h MODULE'.
  1241. *********************************************************************************************************
  1242. */
  1243. #endif /* End of lib mem module include. */