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Modbus/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_fmpi2c.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32f4xx_hal_fmpi2c.h

  4.   * @author  MCD Application Team

  5.   * @brief   Header file of FMPI2C HAL module.

  6.   ******************************************************************************

  7.   * @attention

  8.   *

  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.

  10.   * All rights reserved.</center></h2>

  11.   *

  12.   * This software component is licensed by ST under BSD 3-Clause license,

  13.   * the "License"; You may not use this file except in compliance with the

  14.   * License. You may obtain a copy of the License at:

  15.   *                        opensource.org/licenses/BSD-3-Clause

  16.   *

  17.   ******************************************************************************

  18.   */

  19. 

  20. /* Define to prevent recursive inclusion -------------------------------------*/

  21. #ifndef STM32F4xx_HAL_FMPI2C_H

  22. #define STM32F4xx_HAL_FMPI2C_H

  23. 

  24. #ifdef __cplusplus

  25. extern "C" {

  26. #endif

  27. 

  28. #if defined(FMPI2C_CR1_PE)

  29. /* Includes ------------------------------------------------------------------*/

  30. #include "stm32f4xx_hal_def.h"

  31. 

  32. /** @addtogroup STM32F4xx_HAL_Driver

  33.   * @{

  34.   */

  35. 

  36. /** @addtogroup FMPI2C

  37.   * @{

  38.   */

  39. 

  40. /* Exported types ------------------------------------------------------------*/

  41. /** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types

  42.   * @{

  43.   */

  44. 

  45. /** @defgroup FMPI2C_Configuration_Structure_definition FMPI2C Configuration Structure definition

  46.   * @brief  FMPI2C Configuration Structure definition

  47.   * @{

  48.   */

  49. typedef struct

  50. {

  51.   uint32_t Timing;              /*!< Specifies the FMPI2C_TIMINGR_register value.

  52.                                      This parameter calculated by referring to FMPI2C initialization section

  53.                                      in Reference manual */

  54. 

  55.   uint32_t OwnAddress1;         /*!< Specifies the first device own address.

  56.                                      This parameter can be a 7-bit or 10-bit address. */

  57. 

  58.   uint32_t AddressingMode;      /*!< Specifies if 7-bit or 10-bit addressing mode is selected.

  59.                                      This parameter can be a value of @ref FMPI2C_ADDRESSING_MODE */

  60. 

  61.   uint32_t DualAddressMode;     /*!< Specifies if dual addressing mode is selected.

  62.                                      This parameter can be a value of @ref FMPI2C_DUAL_ADDRESSING_MODE */

  63. 

  64.   uint32_t OwnAddress2;         /*!< Specifies the second device own address if dual addressing mode is selected

  65.                                      This parameter can be a 7-bit address. */

  66. 

  67.   uint32_t OwnAddress2Masks;    /*!< Specifies the acknowledge mask address second device own address if dual addressing

  68.                                      mode is selected.

  69.                                      This parameter can be a value of @ref FMPI2C_OWN_ADDRESS2_MASKS */

  70. 

  71.   uint32_t GeneralCallMode;     /*!< Specifies if general call mode is selected.

  72.                                      This parameter can be a value of @ref FMPI2C_GENERAL_CALL_ADDRESSING_MODE */

  73. 

  74.   uint32_t NoStretchMode;       /*!< Specifies if nostretch mode is selected.

  75.                                      This parameter can be a value of @ref FMPI2C_NOSTRETCH_MODE */

  76. 

  77. } FMPI2C_InitTypeDef;

  78. 

  79. /**

  80.   * @}

  81.   */

  82. 

  83. /** @defgroup HAL_state_structure_definition HAL state structure definition

  84.   * @brief  HAL State structure definition

  85.   * @note  HAL FMPI2C State value coding follow below described bitmap :\n

  86.   *          b7-b6  Error information\n

  87.   *             00 : No Error\n

  88.   *             01 : Abort (Abort user request on going)\n

  89.   *             10 : Timeout\n

  90.   *             11 : Error\n

  91.   *          b5     Peripheral initialization status\n

  92.   *             0  : Reset (peripheral not initialized)\n

  93.   *             1  : Init done (peripheral initialized and ready to use. HAL FMPI2C Init function called)\n

  94.   *          b4     (not used)\n

  95.   *             x  : Should be set to 0\n

  96.   *          b3\n

  97.   *             0  : Ready or Busy (No Listen mode ongoing)\n

  98.   *             1  : Listen (peripheral in Address Listen Mode)\n

  99.   *          b2     Intrinsic process state\n

  100.   *             0  : Ready\n

  101.   *             1  : Busy (peripheral busy with some configuration or internal operations)\n

  102.   *          b1     Rx state\n

  103.   *             0  : Ready (no Rx operation ongoing)\n

  104.   *             1  : Busy (Rx operation ongoing)\n

  105.   *          b0     Tx state\n

  106.   *             0  : Ready (no Tx operation ongoing)\n

  107.   *             1  : Busy (Tx operation ongoing)

  108.   * @{

  109.   */

  110. typedef enum

  111. {

  112.   HAL_FMPI2C_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */

  113.   HAL_FMPI2C_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */

  114.   HAL_FMPI2C_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */

  115.   HAL_FMPI2C_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */

  116.   HAL_FMPI2C_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */

  117.   HAL_FMPI2C_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */

  118.   HAL_FMPI2C_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission

  119.                                                  process is ongoing                         */

  120.   HAL_FMPI2C_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception

  121.                                                  process is ongoing                         */

  122.   HAL_FMPI2C_STATE_ABORT             = 0x60U,   /*!< Abort user request ongoing                */

  123.   HAL_FMPI2C_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state                             */

  124.   HAL_FMPI2C_STATE_ERROR             = 0xE0U    /*!< Error                                     */

  125. 

  126. } HAL_FMPI2C_StateTypeDef;

  127. 

  128. /**

  129.   * @}

  130.   */

  131. 

  132. /** @defgroup HAL_mode_structure_definition HAL mode structure definition

  133.   * @brief  HAL Mode structure definition

  134.   * @note  HAL FMPI2C Mode value coding follow below described bitmap :\n

  135.   *          b7     (not used)\n

  136.   *             x  : Should be set to 0\n

  137.   *          b6\n

  138.   *             0  : None\n

  139.   *             1  : Memory (HAL FMPI2C communication is in Memory Mode)\n

  140.   *          b5\n

  141.   *             0  : None\n

  142.   *             1  : Slave (HAL FMPI2C communication is in Slave Mode)\n

  143.   *          b4\n

  144.   *             0  : None\n

  145.   *             1  : Master (HAL FMPI2C communication is in Master Mode)\n

  146.   *          b3-b2-b1-b0  (not used)\n

  147.   *             xxxx : Should be set to 0000

  148.   * @{

  149.   */

  150. typedef enum

  151. {

  152.   HAL_FMPI2C_MODE_NONE               = 0x00U,   /*!< No FMPI2C communication on going             */

  153.   HAL_FMPI2C_MODE_MASTER             = 0x10U,   /*!< FMPI2C communication is in Master Mode       */

  154.   HAL_FMPI2C_MODE_SLAVE              = 0x20U,   /*!< FMPI2C communication is in Slave Mode        */

  155.   HAL_FMPI2C_MODE_MEM                = 0x40U    /*!< FMPI2C communication is in Memory Mode       */

  156. 

  157. } HAL_FMPI2C_ModeTypeDef;

  158. 

  159. /**

  160.   * @}

  161.   */

  162. 

  163. /** @defgroup FMPI2C_Error_Code_definition FMPI2C Error Code definition

  164.   * @brief  FMPI2C Error Code definition

  165.   * @{

  166.   */

  167. #define HAL_FMPI2C_ERROR_NONE      (0x00000000U)    /*!< No error              */

  168. #define HAL_FMPI2C_ERROR_BERR      (0x00000001U)    /*!< BERR error            */

  169. #define HAL_FMPI2C_ERROR_ARLO      (0x00000002U)    /*!< ARLO error            */

  170. #define HAL_FMPI2C_ERROR_AF        (0x00000004U)    /*!< ACKF error            */

  171. #define HAL_FMPI2C_ERROR_OVR       (0x00000008U)    /*!< OVR error             */

  172. #define HAL_FMPI2C_ERROR_DMA       (0x00000010U)    /*!< DMA transfer error    */

  173. #define HAL_FMPI2C_ERROR_TIMEOUT   (0x00000020U)    /*!< Timeout error         */

  174. #define HAL_FMPI2C_ERROR_SIZE      (0x00000040U)    /*!< Size Management error */

  175. #define HAL_FMPI2C_ERROR_DMA_PARAM (0x00000080U)    /*!< DMA Parameter Error   */

  176. #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)

  177. #define HAL_FMPI2C_ERROR_INVALID_CALLBACK  (0x00000100U)    /*!< Invalid Callback error */

  178. #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */

  179. #define HAL_FMPI2C_ERROR_INVALID_PARAM     (0x00000200U)    /*!< Invalid Parameters error  */

  180. /**

  181.   * @}

  182.   */

  183. 

  184. /** @defgroup FMPI2C_handle_Structure_definition FMPI2C handle Structure definition

  185.   * @brief  FMPI2C handle Structure definition

  186.   * @{

  187.   */

  188. typedef struct __FMPI2C_HandleTypeDef

  189. {

  190.   FMPI2C_TypeDef                *Instance;      /*!< FMPI2C registers base address                */

  191. 

  192.   FMPI2C_InitTypeDef            Init;           /*!< FMPI2C communication parameters              */

  193. 

  194.   uint8_t                    *pBuffPtr;      /*!< Pointer to FMPI2C transfer buffer            */

  195. 

  196.   uint16_t                   XferSize;       /*!< FMPI2C transfer size                         */

  197. 

  198.   __IO uint16_t              XferCount;      /*!< FMPI2C transfer counter                      */

  199. 

  200.   __IO uint32_t              XferOptions;    /*!< FMPI2C sequantial transfer options, this parameter can

  201.                                                   be a value of @ref FMPI2C_XFEROPTIONS */

  202. 

  203.   __IO uint32_t              PreviousState;  /*!< FMPI2C communication Previous state          */

  204. 

  205.   HAL_StatusTypeDef(*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources);

  206.   /*!< FMPI2C transfer IRQ handler function pointer */

  207. 

  208.   DMA_HandleTypeDef          *hdmatx;        /*!< FMPI2C Tx DMA handle parameters              */

  209. 

  210.   DMA_HandleTypeDef          *hdmarx;        /*!< FMPI2C Rx DMA handle parameters              */

  211. 

  212.   HAL_LockTypeDef            Lock;           /*!< FMPI2C locking object                        */

  213. 

  214.   __IO HAL_FMPI2C_StateTypeDef  State;          /*!< FMPI2C communication state                   */

  215. 

  216.   __IO HAL_FMPI2C_ModeTypeDef   Mode;           /*!< FMPI2C communication mode                    */

  217. 

  218.   __IO uint32_t              ErrorCode;      /*!< FMPI2C Error code                            */

  219. 

  220.   __IO uint32_t              AddrEventCount; /*!< FMPI2C Address Event counter                 */

  221. 

  222. #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)

  223.   void (* MasterTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  224.   /*!< FMPI2C Master Tx Transfer completed callback */

  225.   void (* MasterRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  226.   /*!< FMPI2C Master Rx Transfer completed callback */

  227.   void (* SlaveTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  228.   /*!< FMPI2C Slave Tx Transfer completed callback  */

  229.   void (* SlaveRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  230.   /*!< FMPI2C Slave Rx Transfer completed callback  */

  231.   void (* ListenCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  232.   /*!< FMPI2C Listen Complete callback              */

  233.   void (* MemTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  234.   /*!< FMPI2C Memory Tx Transfer completed callback */

  235.   void (* MemRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  236.   /*!< FMPI2C Memory Rx Transfer completed callback */

  237.   void (* ErrorCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  238.   /*!< FMPI2C Error callback                        */

  239.   void (* AbortCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  240.   /*!< FMPI2C Abort callback                        */

  241. 

  242.   void (* AddrCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);

  243.   /*!< FMPI2C Slave Address Match callback */

  244. 

  245.   void (* MspInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  246.   /*!< FMPI2C Msp Init callback                     */

  247.   void (* MspDeInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);

  248.   /*!< FMPI2C Msp DeInit callback                   */

  249. 

  250. #endif  /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */

  251. } FMPI2C_HandleTypeDef;

  252. 

  253. #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)

  254. /**

  255.   * @brief  HAL FMPI2C Callback ID enumeration definition

  256.   */

  257. typedef enum

  258. {

  259.   HAL_FMPI2C_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    /*!< FMPI2C Master Tx Transfer completed callback ID  */

  260.   HAL_FMPI2C_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    /*!< FMPI2C Master Rx Transfer completed callback ID  */

  261.   HAL_FMPI2C_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    /*!< FMPI2C Slave Tx Transfer completed callback ID   */

  262.   HAL_FMPI2C_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    /*!< FMPI2C Slave Rx Transfer completed callback ID   */

  263.   HAL_FMPI2C_LISTEN_COMPLETE_CB_ID         = 0x04U,    /*!< FMPI2C Listen Complete callback ID               */

  264.   HAL_FMPI2C_MEM_TX_COMPLETE_CB_ID         = 0x05U,    /*!< FMPI2C Memory Tx Transfer callback ID            */

  265.   HAL_FMPI2C_MEM_RX_COMPLETE_CB_ID         = 0x06U,    /*!< FMPI2C Memory Rx Transfer completed callback ID  */

  266.   HAL_FMPI2C_ERROR_CB_ID                   = 0x07U,    /*!< FMPI2C Error callback ID                         */

  267.   HAL_FMPI2C_ABORT_CB_ID                   = 0x08U,    /*!< FMPI2C Abort callback ID                         */

  268. 

  269.   HAL_FMPI2C_MSPINIT_CB_ID                 = 0x09U,    /*!< FMPI2C Msp Init callback ID                      */

  270.   HAL_FMPI2C_MSPDEINIT_CB_ID               = 0x0AU     /*!< FMPI2C Msp DeInit callback ID                    */

  271. 

  272. } HAL_FMPI2C_CallbackIDTypeDef;

  273. 

  274. /**

  275.   * @brief  HAL FMPI2C Callback pointer definition

  276.   */

  277. typedef  void (*pFMPI2C_CallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c);

  278. /*!< pointer to an FMPI2C callback function */

  279. typedef  void (*pFMPI2C_AddrCallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection,

  280.                                              uint16_t AddrMatchCode);

  281. /*!< pointer to an FMPI2C Address Match callback function */

  282. 

  283. #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */

  284. /**

  285.   * @}

  286.   */

  287. 

  288. /**

  289.   * @}

  290.   */

  291. /* Exported constants --------------------------------------------------------*/

  292. 

  293. /** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants

  294.   * @{

  295.   */

  296. 

  297. /** @defgroup FMPI2C_XFEROPTIONS  FMPI2C Sequential Transfer Options

  298.   * @{

  299.   */

  300. #define FMPI2C_FIRST_FRAME                 ((uint32_t)FMPI2C_SOFTEND_MODE)

  301. #define FMPI2C_FIRST_AND_NEXT_FRAME        ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))

  302. #define FMPI2C_NEXT_FRAME                  ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))

  303. #define FMPI2C_FIRST_AND_LAST_FRAME        ((uint32_t)FMPI2C_AUTOEND_MODE)

  304. #define FMPI2C_LAST_FRAME                  ((uint32_t)FMPI2C_AUTOEND_MODE)

  305. #define FMPI2C_LAST_FRAME_NO_STOP          ((uint32_t)FMPI2C_SOFTEND_MODE)

  306. 

  307. /* List of XferOptions in usage of :

  308.  * 1- Restart condition in all use cases (direction change or not)

  309.  */

  310. #define  FMPI2C_OTHER_FRAME                (0x000000AAU)

  311. #define  FMPI2C_OTHER_AND_LAST_FRAME       (0x0000AA00U)

  312. /**

  313.   * @}

  314.   */

  315. 

  316. /** @defgroup FMPI2C_ADDRESSING_MODE FMPI2C Addressing Mode

  317.   * @{

  318.   */

  319. #define FMPI2C_ADDRESSINGMODE_7BIT         (0x00000001U)

  320. #define FMPI2C_ADDRESSINGMODE_10BIT        (0x00000002U)

  321. /**

  322.   * @}

  323.   */

  324. 

  325. /** @defgroup FMPI2C_DUAL_ADDRESSING_MODE FMPI2C Dual Addressing Mode

  326.   * @{

  327.   */

  328. #define FMPI2C_DUALADDRESS_DISABLE         (0x00000000U)

  329. #define FMPI2C_DUALADDRESS_ENABLE          FMPI2C_OAR2_OA2EN

  330. /**

  331.   * @}

  332.   */

  333. 

  334. /** @defgroup FMPI2C_OWN_ADDRESS2_MASKS FMPI2C Own Address2 Masks

  335.   * @{

  336.   */

  337. #define FMPI2C_OA2_NOMASK                  ((uint8_t)0x00U)

  338. #define FMPI2C_OA2_MASK01                  ((uint8_t)0x01U)

  339. #define FMPI2C_OA2_MASK02                  ((uint8_t)0x02U)

  340. #define FMPI2C_OA2_MASK03                  ((uint8_t)0x03U)

  341. #define FMPI2C_OA2_MASK04                  ((uint8_t)0x04U)

  342. #define FMPI2C_OA2_MASK05                  ((uint8_t)0x05U)

  343. #define FMPI2C_OA2_MASK06                  ((uint8_t)0x06U)

  344. #define FMPI2C_OA2_MASK07                  ((uint8_t)0x07U)

  345. /**

  346.   * @}

  347.   */

  348. 

  349. /** @defgroup FMPI2C_GENERAL_CALL_ADDRESSING_MODE FMPI2C General Call Addressing Mode

  350.   * @{

  351.   */

  352. #define FMPI2C_GENERALCALL_DISABLE         (0x00000000U)

  353. #define FMPI2C_GENERALCALL_ENABLE          FMPI2C_CR1_GCEN

  354. /**

  355.   * @}

  356.   */

  357. 

  358. /** @defgroup FMPI2C_NOSTRETCH_MODE FMPI2C No-Stretch Mode

  359.   * @{

  360.   */

  361. #define FMPI2C_NOSTRETCH_DISABLE           (0x00000000U)

  362. #define FMPI2C_NOSTRETCH_ENABLE            FMPI2C_CR1_NOSTRETCH

  363. /**

  364.   * @}

  365.   */

  366. 

  367. /** @defgroup FMPI2C_MEMORY_ADDRESS_SIZE FMPI2C Memory Address Size

  368.   * @{

  369.   */

  370. #define FMPI2C_MEMADD_SIZE_8BIT            (0x00000001U)

  371. #define FMPI2C_MEMADD_SIZE_16BIT           (0x00000002U)

  372. /**

  373.   * @}

  374.   */

  375. 

  376. /** @defgroup FMPI2C_XFERDIRECTION FMPI2C Transfer Direction Master Point of View

  377.   * @{

  378.   */

  379. #define FMPI2C_DIRECTION_TRANSMIT          (0x00000000U)

  380. #define FMPI2C_DIRECTION_RECEIVE           (0x00000001U)

  381. /**

  382.   * @}

  383.   */

  384. 

  385. /** @defgroup FMPI2C_RELOAD_END_MODE FMPI2C Reload End Mode

  386.   * @{

  387.   */

  388. #define  FMPI2C_RELOAD_MODE                FMPI2C_CR2_RELOAD

  389. #define  FMPI2C_AUTOEND_MODE               FMPI2C_CR2_AUTOEND

  390. #define  FMPI2C_SOFTEND_MODE               (0x00000000U)

  391. /**

  392.   * @}

  393.   */

  394. 

  395. /** @defgroup FMPI2C_START_STOP_MODE FMPI2C Start or Stop Mode

  396.   * @{

  397.   */

  398. #define  FMPI2C_NO_STARTSTOP               (0x00000000U)

  399. #define  FMPI2C_GENERATE_STOP              (uint32_t)(0x80000000U | FMPI2C_CR2_STOP)

  400. #define  FMPI2C_GENERATE_START_READ        (uint32_t)(0x80000000U | FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)

  401. #define  FMPI2C_GENERATE_START_WRITE       (uint32_t)(0x80000000U | FMPI2C_CR2_START)

  402. /**

  403.   * @}

  404.   */

  405. 

  406. /** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition

  407.   * @brief FMPI2C Interrupt definition

  408.   *        Elements values convention: 0xXXXXXXXX

  409.   *           - XXXXXXXX  : Interrupt control mask

  410.   * @{

  411.   */

  412. #define FMPI2C_IT_ERRI                     FMPI2C_CR1_ERRIE

  413. #define FMPI2C_IT_TCI                      FMPI2C_CR1_TCIE

  414. #define FMPI2C_IT_STOPI                    FMPI2C_CR1_STOPIE

  415. #define FMPI2C_IT_NACKI                    FMPI2C_CR1_NACKIE

  416. #define FMPI2C_IT_ADDRI                    FMPI2C_CR1_ADDRIE

  417. #define FMPI2C_IT_RXI                      FMPI2C_CR1_RXIE

  418. #define FMPI2C_IT_TXI                      FMPI2C_CR1_TXIE

  419. /**

  420.   * @}

  421.   */

  422. 

  423. /** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition

  424.   * @{

  425.   */

  426. #define FMPI2C_FLAG_TXE                    FMPI2C_ISR_TXE

  427. #define FMPI2C_FLAG_TXIS                   FMPI2C_ISR_TXIS

  428. #define FMPI2C_FLAG_RXNE                   FMPI2C_ISR_RXNE

  429. #define FMPI2C_FLAG_ADDR                   FMPI2C_ISR_ADDR

  430. #define FMPI2C_FLAG_AF                     FMPI2C_ISR_NACKF

  431. #define FMPI2C_FLAG_STOPF                  FMPI2C_ISR_STOPF

  432. #define FMPI2C_FLAG_TC                     FMPI2C_ISR_TC

  433. #define FMPI2C_FLAG_TCR                    FMPI2C_ISR_TCR

  434. #define FMPI2C_FLAG_BERR                   FMPI2C_ISR_BERR

  435. #define FMPI2C_FLAG_ARLO                   FMPI2C_ISR_ARLO

  436. #define FMPI2C_FLAG_OVR                    FMPI2C_ISR_OVR

  437. #define FMPI2C_FLAG_PECERR                 FMPI2C_ISR_PECERR

  438. #define FMPI2C_FLAG_TIMEOUT                FMPI2C_ISR_TIMEOUT

  439. #define FMPI2C_FLAG_ALERT                  FMPI2C_ISR_ALERT

  440. #define FMPI2C_FLAG_BUSY                   FMPI2C_ISR_BUSY

  441. #define FMPI2C_FLAG_DIR                    FMPI2C_ISR_DIR

  442. /**

  443.   * @}

  444.   */

  445. 

  446. /**

  447.   * @}

  448.   */

  449. 

  450. /* Exported macros -----------------------------------------------------------*/

  451. 

  452. /** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros

  453.   * @{

  454.   */

  455. 

  456. /** @brief Reset FMPI2C handle state.

  457.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  458.   * @retval None

  459.   */

  460. #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)

  461. #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__)                do{                                             \

  462.                                                                     (__HANDLE__)->State = HAL_FMPI2C_STATE_RESET;  \

  463.                                                                     (__HANDLE__)->MspInitCallback = NULL;       \

  464.                                                                     (__HANDLE__)->MspDeInitCallback = NULL;     \

  465.                                                                   } while(0)

  466. #else

  467. #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET)

  468. #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */

  469. 

  470. /** @brief  Enable the specified FMPI2C interrupt.

  471.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  472.   * @param  __INTERRUPT__ specifies the interrupt source to enable.

  473.   *        This parameter can be one of the following values:

  474.   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable

  475.   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable

  476.   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable

  477.   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable

  478.   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable

  479.   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable

  480.   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable

  481.   *

  482.   * @retval None

  483.   */

  484. #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)          ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))

  485. 

  486. /** @brief  Disable the specified FMPI2C interrupt.

  487.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  488.   * @param  __INTERRUPT__ specifies the interrupt source to disable.

  489.   *        This parameter can be one of the following values:

  490.   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable

  491.   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable

  492.   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable

  493.   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable

  494.   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable

  495.   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable

  496.   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable

  497.   *

  498.   * @retval None

  499.   */

  500. #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)         ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))

  501. 

  502. /** @brief  Check whether the specified FMPI2C interrupt source is enabled or not.

  503.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  504.   * @param  __INTERRUPT__ specifies the FMPI2C interrupt source to check.

  505.   *          This parameter can be one of the following values:

  506.   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable

  507.   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable

  508.   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable

  509.   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable

  510.   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable

  511.   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable

  512.   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable

  513.   *

  514.   * @retval The new state of __INTERRUPT__ (SET or RESET).

  515.   */

  516. #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->CR1 & \

  517.                                                                    (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)

  518. 

  519. /** @brief  Check whether the specified FMPI2C flag is set or not.

  520.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  521.   * @param  __FLAG__ specifies the flag to check.

  522.   *        This parameter can be one of the following values:

  523.   *            @arg @ref FMPI2C_FLAG_TXE     Transmit data register empty

  524.   *            @arg @ref FMPI2C_FLAG_TXIS    Transmit interrupt status

  525.   *            @arg @ref FMPI2C_FLAG_RXNE    Receive data register not empty

  526.   *            @arg @ref FMPI2C_FLAG_ADDR    Address matched (slave mode)

  527.   *            @arg @ref FMPI2C_FLAG_AF      Acknowledge failure received flag

  528.   *            @arg @ref FMPI2C_FLAG_STOPF   STOP detection flag

  529.   *            @arg @ref FMPI2C_FLAG_TC      Transfer complete (master mode)

  530.   *            @arg @ref FMPI2C_FLAG_TCR     Transfer complete reload

  531.   *            @arg @ref FMPI2C_FLAG_BERR    Bus error

  532.   *            @arg @ref FMPI2C_FLAG_ARLO    Arbitration lost

  533.   *            @arg @ref FMPI2C_FLAG_OVR     Overrun/Underrun

  534.   *            @arg @ref FMPI2C_FLAG_PECERR  PEC error in reception

  535.   *            @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag

  536.   *            @arg @ref FMPI2C_FLAG_ALERT   SMBus alert

  537.   *            @arg @ref FMPI2C_FLAG_BUSY    Bus busy

  538.   *            @arg @ref FMPI2C_FLAG_DIR     Transfer direction (slave mode)

  539.   *

  540.   * @retval The new state of __FLAG__ (SET or RESET).

  541.   */

  542. #define FMPI2C_FLAG_MASK  (0x0001FFFFU)

  543. #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \

  544.                                                     (__FLAG__)) == (__FLAG__)) ? SET : RESET)

  545. 

  546. /** @brief  Clear the FMPI2C pending flags which are cleared by writing 1 in a specific bit.

  547.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  548.   * @param  __FLAG__ specifies the flag to clear.

  549.   *          This parameter can be any combination of the following values:

  550.   *            @arg @ref FMPI2C_FLAG_TXE     Transmit data register empty

  551.   *            @arg @ref FMPI2C_FLAG_ADDR    Address matched (slave mode)

  552.   *            @arg @ref FMPI2C_FLAG_AF      Acknowledge failure received flag

  553.   *            @arg @ref FMPI2C_FLAG_STOPF   STOP detection flag

  554.   *            @arg @ref FMPI2C_FLAG_BERR    Bus error

  555.   *            @arg @ref FMPI2C_FLAG_ARLO    Arbitration lost

  556.   *            @arg @ref FMPI2C_FLAG_OVR     Overrun/Underrun

  557.   *            @arg @ref FMPI2C_FLAG_PECERR  PEC error in reception

  558.   *            @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag

  559.   *            @arg @ref FMPI2C_FLAG_ALERT   SMBus alert

  560.   *

  561.   * @retval None

  562.   */

  563. #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? \

  564.                                                     ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \

  565.                                                     ((__HANDLE__)->Instance->ICR = (__FLAG__)))

  566. 

  567. /** @brief  Enable the specified FMPI2C peripheral.

  568.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  569.   * @retval None

  570.   */

  571. #define __HAL_FMPI2C_ENABLE(__HANDLE__)                         (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))

  572. 

  573. /** @brief  Disable the specified FMPI2C peripheral.

  574.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  575.   * @retval None

  576.   */

  577. #define __HAL_FMPI2C_DISABLE(__HANDLE__)                        (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))

  578. 

  579. /** @brief  Generate a Non-Acknowledge FMPI2C peripheral in Slave mode.

  580.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  581.   * @retval None

  582.   */

  583. #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__)                  (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK))

  584. /**

  585.   * @}

  586.   */

  587. 

  588. /* Include FMPI2C HAL Extended module */

  589. #include "stm32f4xx_hal_fmpi2c_ex.h"

  590. 

  591. /* Exported functions --------------------------------------------------------*/

  592. /** @addtogroup FMPI2C_Exported_Functions

  593.   * @{

  594.   */

  595. 

  596. /** @addtogroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions

  597.   * @{

  598.   */

  599. /* Initialization and de-initialization functions******************************/

  600. HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c);

  601. HAL_StatusTypeDef HAL_FMPI2C_DeInit(FMPI2C_HandleTypeDef *hfmpi2c);

  602. void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c);

  603. void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c);

  604. 

  605. /* Callbacks Register/UnRegister functions  ***********************************/

  606. #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)

  607. HAL_StatusTypeDef HAL_FMPI2C_RegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID,

  608.                                            pFMPI2C_CallbackTypeDef pCallback);

  609. HAL_StatusTypeDef HAL_FMPI2C_UnRegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID);

  610. 

  611. HAL_StatusTypeDef HAL_FMPI2C_RegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, pFMPI2C_AddrCallbackTypeDef pCallback);

  612. HAL_StatusTypeDef HAL_FMPI2C_UnRegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  613. #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */

  614. /**

  615.   * @}

  616.   */

  617. 

  618. /** @addtogroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions

  619.   * @{

  620.   */

  621. /* IO operation functions  ****************************************************/

  622. /******* Blocking mode: Polling */

  623. HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  624.                                              uint16_t Size, uint32_t Timeout);

  625. HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  626.                                             uint16_t Size, uint32_t Timeout);

  627. HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,

  628.                                             uint32_t Timeout);

  629. HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,

  630.                                            uint32_t Timeout);

  631. HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,

  632.                                     uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);

  633. HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,

  634.                                    uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);

  635. HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials,

  636.                                         uint32_t Timeout);

  637. 

  638. /******* Non-Blocking mode: Interrupt */

  639. HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  640.                                              uint16_t Size);

  641. HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  642.                                             uint16_t Size);

  643. HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);

  644. HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);

  645. HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,

  646.                                        uint16_t MemAddSize, uint8_t *pData, uint16_t Size);

  647. HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,

  648.                                       uint16_t MemAddSize, uint8_t *pData, uint16_t Size);

  649. 

  650. HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  651.                                                  uint16_t Size, uint32_t XferOptions);

  652. HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  653.                                                 uint16_t Size, uint32_t XferOptions);

  654. HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,

  655.                                                 uint32_t XferOptions);

  656. HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,

  657.                                                uint32_t XferOptions);

  658. HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);

  659. HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);

  660. HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress);

  661. 

  662. /******* Non-Blocking mode: DMA */

  663. HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  664.                                               uint16_t Size);

  665. HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  666.                                              uint16_t Size);

  667. HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);

  668. HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);

  669. HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,

  670.                                         uint16_t MemAddSize, uint8_t *pData, uint16_t Size);

  671. HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,

  672.                                        uint16_t MemAddSize, uint8_t *pData, uint16_t Size);

  673. 

  674. HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  675.                                                   uint16_t Size, uint32_t XferOptions);

  676. HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,

  677.                                                  uint16_t Size, uint32_t XferOptions);

  678. HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,

  679.                                                  uint32_t XferOptions);

  680. HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,

  681.                                                 uint32_t XferOptions);

  682. /**

  683.   * @}

  684.   */

  685. 

  686. /** @addtogroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks

  687.   * @{

  688.   */

  689. /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */

  690. void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);

  691. void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);

  692. void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  693. void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  694. void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  695. void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  696. void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);

  697. void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  698. void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  699. void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  700. void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  701. void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  702. /**

  703.   * @}

  704.   */

  705. 

  706. /** @addtogroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions

  707.   * @{

  708.   */

  709. /* Peripheral State, Mode and Error functions  *********************************/

  710. HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c);

  711. HAL_FMPI2C_ModeTypeDef  HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c);

  712. uint32_t             HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c);

  713. 

  714. /**

  715.   * @}

  716.   */

  717. 

  718. /**

  719.   * @}

  720.   */

  721. 

  722. /* Private constants ---------------------------------------------------------*/

  723. /** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants

  724.   * @{

  725.   */

  726. 

  727. /**

  728.   * @}

  729.   */

  730. 

  731. /* Private macros ------------------------------------------------------------*/

  732. /** @defgroup FMPI2C_Private_Macro FMPI2C Private Macros

  733.   * @{

  734.   */

  735. 

  736. #define IS_FMPI2C_ADDRESSING_MODE(MODE)    (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \

  737.                                          ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT))

  738. 

  739. #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS)    (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \

  740.                                          ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE))

  741. 

  742. #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK)  (((MASK) == FMPI2C_OA2_NOMASK)  || \

  743.                                          ((MASK) == FMPI2C_OA2_MASK01) || \

  744.                                          ((MASK) == FMPI2C_OA2_MASK02) || \

  745.                                          ((MASK) == FMPI2C_OA2_MASK03) || \

  746.                                          ((MASK) == FMPI2C_OA2_MASK04) || \

  747.                                          ((MASK) == FMPI2C_OA2_MASK05) || \

  748.                                          ((MASK) == FMPI2C_OA2_MASK06) || \

  749.                                          ((MASK) == FMPI2C_OA2_MASK07))

  750. 

  751. #define IS_FMPI2C_GENERAL_CALL(CALL)       (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \

  752.                                          ((CALL) == FMPI2C_GENERALCALL_ENABLE))

  753. 

  754. #define IS_FMPI2C_NO_STRETCH(STRETCH)      (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \

  755.                                          ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE))

  756. 

  757. #define IS_FMPI2C_MEMADD_SIZE(SIZE)        (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \

  758.                                          ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT))

  759. 

  760. #define IS_TRANSFER_MODE(MODE)          (((MODE) == FMPI2C_RELOAD_MODE)   || \

  761.                                          ((MODE) == FMPI2C_AUTOEND_MODE) || \

  762.                                          ((MODE) == FMPI2C_SOFTEND_MODE))

  763. 

  764. #define IS_TRANSFER_REQUEST(REQUEST)    (((REQUEST) == FMPI2C_GENERATE_STOP)        || \

  765.                                          ((REQUEST) == FMPI2C_GENERATE_START_READ)  || \

  766.                                          ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \

  767.                                          ((REQUEST) == FMPI2C_NO_STARTSTOP))

  768. 

  769. #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST)  (((REQUEST) == FMPI2C_FIRST_FRAME)          || \

  770.                                                    ((REQUEST) == FMPI2C_FIRST_AND_NEXT_FRAME) || \

  771.                                                    ((REQUEST) == FMPI2C_NEXT_FRAME)           || \

  772.                                                    ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \

  773.                                                    ((REQUEST) == FMPI2C_LAST_FRAME)           || \

  774.                                                    ((REQUEST) == FMPI2C_LAST_FRAME_NO_STOP)   || \

  775.                                                    IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))

  776. 

  777. #define IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_OTHER_FRAME)     || \

  778.                                                         ((REQUEST) == FMPI2C_OTHER_AND_LAST_FRAME))

  779. 

  780. #define FMPI2C_RESET_CR2(__HANDLE__)                 ((__HANDLE__)->Instance->CR2 &= \

  781.                                                    (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD   | FMPI2C_CR2_HEAD10R | \

  782.                                                                           FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD  | \

  783.                                                                           FMPI2C_CR2_RD_WRN)))

  784. 

  785. #define FMPI2C_GET_ADDR_MATCH(__HANDLE__)            ((uint16_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) \

  786.                                                                   >> 16U))

  787. #define FMPI2C_GET_DIR(__HANDLE__)                   ((uint8_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) \

  788.                                                                   >> 16U))

  789. #define FMPI2C_GET_STOP_MODE(__HANDLE__)             ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND)

  790. #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__)          ((uint16_t)((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1))

  791. #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__)          ((uint16_t)((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2))

  792. 

  793. #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1)             ((ADDRESS1) <= 0x000003FFU)

  794. #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2)             ((ADDRESS2) <= (uint16_t)0x00FFU)

  795. 

  796. #define FMPI2C_MEM_ADD_MSB(__ADDRESS__)              ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \

  797.                                                                          (uint16_t)(0xFF00U))) >> 8U)))

  798. #define FMPI2C_MEM_ADD_LSB(__ADDRESS__)              ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))

  799. 

  800. #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? \

  801.                                                      (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \

  802.                                                                  (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & \

  803.                                                                 (~FMPI2C_CR2_RD_WRN)) : \

  804.                                                      (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \

  805.                                                                  (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & \

  806.                                                                 (~FMPI2C_CR2_RD_WRN)))

  807. 

  808. #define FMPI2C_CHECK_FLAG(__ISR__, __FLAG__)         ((((__ISR__) & ((__FLAG__) & FMPI2C_FLAG_MASK)) == \

  809.                                                     ((__FLAG__) & FMPI2C_FLAG_MASK)) ? SET : RESET)

  810. #define FMPI2C_CHECK_IT_SOURCE(__CR1__, __IT__)      ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)

  811. /**

  812.   * @}

  813.   */

  814. 

  815. /* Private Functions ---------------------------------------------------------*/

  816. /** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions

  817.   * @{

  818.   */

  819. /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */

  820. /**

  821.   * @}

  822.   */

  823. 

  824. /**

  825.   * @}

  826.   */

  827. 

  828. /**

  829.   * @}

  830.   */

  831. 

  832. #endif /* FMPI2C_CR1_PE */

  833. #ifdef __cplusplus

  834. }

  835. #endif

  836. 

  837. 

  838. #endif /* STM32F4xx_HAL_FMPI2C_H */

  839. 

  840. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/