#ifndef APP_RUNTIME_TEST_MAIN_H #define APP_RUNTIME_TEST_MAIN_H #include #include "modbus.h" #define CPU_CFG_KA_IPL_BOUNDARY (4U) #define APP_TASK_MODBUS_PRIO (4U) #define APP_TASK_START_PRIO (5U) #define APP_TASK_T35_PRIO (6U) #define APP_TASK_START_STK_SIZE (128U) #define APP_TASK_MODBUS_STK_SIZE (384U) #define APP_TASK_T35_STK_SIZE (128U) #define APP_MODBUS_BAUD_RATE (115200U) #define APP_MODBUS_BITS_PER_CHARACTER (10U) #define APP_MODBUS_RTU_CHARACTER_TIME_US (87U) #define APP_MODBUS_RTU_T15_US (750U) #define APP_MODBUS_RTU_T35_US (1750U) #define APP_MODBUS_RTU_T15_RX_TIMEOUT_US (837U) #define APP_MODBUS_RTU_T35_AFTER_T15_US (913U) #define APP_MODBUS_RTU_TIMER_CLOCK_HZ (84000000U) #define APP_MODBUS_RTU_TIMER_TICK_HZ (1000000U) #define APP_MODBUS_STATUS_CHECK_TICKS (1U) #define APP_MODBUS_STATUS_UPDATE_TICKS (100U) #define APP_MODBUS_LINK_TIMEOUT_TICKS (3000U) #define APP_MODBUS_TX_TIMEOUT_TICKS (100U) #define APP_MODBUS_DEBUG_REGISTER_COUNT (16U) #define APP_MODBUS_DEBUG_COIL_COUNT (16U) #define APP_MODBUS_DEBUG_FRAME_SIZE (256U) #define APP_MODBUS_OUTPUT_COIL_COUNT (8U) #define APP_MODBUS_FIRST_USER_OUTPUT_COIL (1U) #define APP_MODBUS_USER_OUTPUT_COIL_COUNT (7U) #define APP_MODBUS_LINK_STATE_COIL (100U) #define APP_MODBUS_LINK_DISCONNECTED (0U) #define APP_MODBUS_LINK_CONNECTED (1U) typedef uint8_t INT8U; typedef uint16_t INT16U; typedef uint32_t INT32U; typedef uint32_t OS_STK; typedef uint32_t OS_CPU_SR; typedef struct { uint8_t value; } OS_EVENT; typedef int32_t IRQn_Type; typedef struct { uint32_t CR1; uint32_t CNT; uint32_t ARR; uint32_t SR; uint32_t PSC; uint32_t EGR; uint32_t DIER; } TIM_TypeDef; typedef struct { uint32_t value; } GPIO_TypeDef; typedef struct { uint32_t value; uint32_t SR; uint32_t DR; } USART_TypeDef; typedef struct { uint32_t PLLState; uint32_t PLLSource; uint32_t PLLM; uint32_t PLLN; uint32_t PLLP; uint32_t PLLQ; } RCC_PLLInitTypeDef; typedef struct { uint32_t OscillatorType; uint32_t HSEState; RCC_PLLInitTypeDef PLL; } RCC_OscInitTypeDef; typedef struct { uint32_t ClockType; uint32_t SYSCLKSource; uint32_t AHBCLKDivider; uint32_t APB1CLKDivider; uint32_t APB2CLKDivider; } RCC_ClkInitTypeDef; typedef struct { uint32_t Pin; uint32_t Mode; uint32_t Pull; uint32_t Speed; uint32_t Alternate; } GPIO_InitTypeDef; typedef struct { uint32_t BaudRate; uint32_t WordLength; uint32_t StopBits; uint32_t Parity; uint32_t Mode; uint32_t HwFlowCtl; uint32_t OverSampling; } UART_InitTypeDef; typedef struct { void *Instance; UART_InitTypeDef Init; uint32_t ErrorCode; uint32_t RxState; } UART_HandleTypeDef; typedef enum { HAL_OK = 0, HAL_ERROR = 1, HAL_BUSY = 2, HAL_TIMEOUT = 3 } HAL_StatusTypeDef; typedef enum { GPIO_PIN_RESET = 0, GPIO_PIN_SET = 1 } GPIO_PinState; extern TIM_TypeDef TestTim5; extern GPIO_TypeDef TestGpioE; extern GPIO_TypeDef TestGpioF; extern GPIO_TypeDef TestGpioI; extern USART_TypeDef TestUsart1; extern OS_EVENT TestFrameSem; extern IRQn_Type TestNvicIrq; extern uint32_t TestNvicPreemptPriority; extern uint32_t TestNvicSubPriority; extern uint32_t TestHalTickCallCount; extern uint32_t TestOsCpuSysTickCallCount; extern HAL_StatusTypeDef TestReceiveResults[4U]; extern uint32_t TestReceiveResultCount; extern uint32_t TestReceiveCallCount; extern uint32_t TestReceiveErrorInjectionCall; extern uint32_t TestAbortReceiveCallCount; extern uint32_t TestUartFlagClearCallCount; extern uint8_t TestRecoveryCallOrder[4U]; extern uint32_t TestRecoveryCallOrderLength; extern uint32_t TestSemPostCallCount; extern uint8_t OSRunning; #define TIM5 (&TestTim5) #define GPIOE (&TestGpioE) #define GPIOF (&TestGpioF) #define GPIOI (&TestGpioI) #define USART1 (&TestUsart1) #define SysTick_IRQn ((IRQn_Type)-1) #define TIM5_IRQn ((IRQn_Type)50) #define USART1_IRQn ((IRQn_Type)37) #define OS_TRUE (1U) #define OS_ERR_NONE (0U) #define OS_PRIO_SELF (0U) #define OS_TASK_OPT_STK_CHK (0U) #define OS_TASK_OPT_STK_CLR (0U) #define TIM_CR1_CEN (0x0001U) #define TIM_SR_UIF (0x0001U) #define TIM_EGR_UG (0x0001U) #define TIM_DIER_UIE (0x0001U) #define GPIO_MODE_OUTPUT_PP (0U) #define GPIO_PULLUP (0U) #define GPIO_SPEED_FREQ_LOW (0U) #define GPIO_PIN_4 (0x0010U) #define GPIO_PIN_5 (0x0020U) #define GPIO_PIN_6 (0x0040U) #define GPIO_PIN_7 (0x0080U) #define GPIO_PIN_8 (0x0100U) #define GPIO_PIN_9 (0x0200U) #define PLC_Q0_PORT (GPIOF) #define PLC_Q0_PIN (GPIO_PIN_6) #define PLC_Q1_PORT (GPIOF) #define PLC_Q1_PIN (GPIO_PIN_8) #define PLC_Q2_PORT (GPIOF) #define PLC_Q2_PIN (GPIO_PIN_7) #define PLC_Q3_PORT (GPIOF) #define PLC_Q3_PIN (GPIO_PIN_9) #define PLC_Q4_PORT (GPIOI) #define PLC_Q4_PIN (GPIO_PIN_8) #define PLC_Q5_PORT (GPIOE) #define PLC_Q5_PIN (GPIO_PIN_6) #define PLC_Q6_PORT (GPIOE) #define PLC_Q6_PIN (GPIO_PIN_5) #define PLC_Q7_PORT (GPIOE) #define PLC_Q7_PIN (GPIO_PIN_4) #define PLC_LINK_LED_PORT (PLC_Q0_PORT) #define PLC_LINK_LED_PIN (PLC_Q0_PIN) #define RCC_OSCILLATORTYPE_HSE (0U) #define RCC_HSE_ON (0U) #define RCC_PLL_ON (0U) #define RCC_PLLSOURCE_HSE (0U) #define RCC_PLLP_DIV2 (0U) #define RCC_CLOCKTYPE_HCLK (0U) #define RCC_CLOCKTYPE_SYSCLK (0U) #define RCC_CLOCKTYPE_PCLK1 (0U) #define RCC_CLOCKTYPE_PCLK2 (0U) #define RCC_SYSCLKSOURCE_PLLCLK (0U) #define RCC_SYSCLK_DIV1 (0U) #define RCC_HCLK_DIV4 (0U) #define RCC_HCLK_DIV2 (0U) #define FLASH_LATENCY_5 (0U) #define PWR_REGULATOR_VOLTAGE_SCALE1 (0U) #define UART_WORDLENGTH_8B (0U) #define UART_STOPBITS_1 (0U) #define UART_PARITY_NONE (0U) #define UART_MODE_TX_RX (0U) #define UART_HWCONTROL_NONE (0U) #define UART_OVERSAMPLING_16 (0U) #define HAL_UART_ERROR_NONE (0U) #define HAL_UART_ERROR_ORE (0x00000008U) #define HAL_UART_STATE_READY (0U) #define HAL_UART_STATE_BUSY_RX (0x22U) #define __HAL_UART_CLEAR_PEFLAG(handle) \ do { (void)(handle); TestUartFlagClearCallCount++; } while (0) #define __HAL_UART_CLEAR_FEFLAG(handle) \ __HAL_UART_CLEAR_PEFLAG(handle) #define __HAL_UART_CLEAR_NEFLAG(handle) \ __HAL_UART_CLEAR_PEFLAG(handle) #define __HAL_UART_CLEAR_OREFLAG(handle) \ __HAL_UART_CLEAR_PEFLAG(handle) #define __HAL_UART_CLEAR_IDLEFLAG(handle) \ __HAL_UART_CLEAR_PEFLAG(handle) #define __HAL_RCC_PWR_CLK_ENABLE() do { } while (0) #define __HAL_PWR_VOLTAGESCALING_CONFIG(v) do { (void)(v); } while (0) #define __HAL_RCC_GPIOE_CLK_ENABLE() do { } while (0) #define __HAL_RCC_GPIOF_CLK_ENABLE() do { } while (0) #define __HAL_RCC_GPIOI_CLK_ENABLE() do { } while (0) #define __HAL_RCC_TIM5_CLK_ENABLE() do { } while (0) #define OS_ENTER_CRITICAL() do { (void)cpu_sr; } while (0) #define OS_EXIT_CRITICAL() do { } while (0) #define __disable_irq() do { } while (0) void HAL_Init(void); HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *config); HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *config, uint32_t latency); void HAL_GPIO_Init(GPIO_TypeDef *port, const GPIO_InitTypeDef *config); void HAL_GPIO_WritePin(GPIO_TypeDef *port, uint16_t pin, GPIO_PinState state); HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *uartHandle); HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *uartHandle, uint8_t *data, uint16_t size); HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *uartHandle); HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *uartHandle, uint8_t *data, uint16_t size); HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *uartHandle); void HAL_UART_IRQHandler(UART_HandleTypeDef *uartHandle); void HAL_NVIC_SetPriority(IRQn_Type irqn, uint32_t preemptPriority, uint32_t subPriority); void HAL_NVIC_EnableIRQ(IRQn_Type irqn); void HAL_IncTick(void); void Error_Handler(void); void OSInit(void); void OSStart(void); INT8U OSTaskCreateExt(void (*task)(void *), void *argument, OS_STK *stackTop, INT8U priority, INT16U taskId, OS_STK *stackBottom, INT32U stackSize, void *extension, INT16U options); OS_EVENT *OSSemCreate(INT16U count); void OSSemPend(OS_EVENT *event, uint32_t timeout, INT8U *error); INT8U OSSemPost(OS_EVENT *event); void OSTaskSuspend(INT8U priority); void OSTimeDly(uint32_t ticks); uint32_t OSTimeGet(void); void OSIntEnter(void); void OSIntExit(void); void OSTimeTick(void); void OS_CPU_SysTickHandler(void); MODBUS_STATUS ModbusBackupRestore(MODBUS_SLAVE *slave); MODBUS_STATUS ModbusBackupSave(const MODBUS_SLAVE *slave); #endif