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Modbus-rtu/tests/plsr_host/test_plsr_host.c

1965 行
66 KiB
原始文件 Blame 文件历史 

  1. #include "plsr.h"

  2. 

  3. #include <stdint.h>

  4. #include <stdio.h>

  5. 

  6. #define PLSR_WAIT_TIME            (0U)

  7. #define PLSR_WAIT_SIGNAL          (1U)

  8. #define PLSR_ACT_TIME             (2U)

  9. #define PLSR_EXT_SIGNAL           (3U)

  10. #define PLSR_EXT_OR_COMPLETE      (4U)

  11. 

  12. #define PLSR_SEND_COMPLETE        (0U)

  13. #define PLSR_SEND_SUBSEQUENT      (1U)

  14. #define PLSR_POSITION_RELATIVE    (0U)

  15. #define PLSR_POSITION_ABSOLUTE    (1U)

  16. 

  17. #define PLSR_COMMAND_START        (0x0001U)

  18. #define PLSR_COMMAND_STOP         (0x0002U)

  19. #define PLSR_COMMAND_CLEAR        (0x0004U)

  20. #define PLSR_ERROR_COUNT          (5U)

  21. 

  22. static const char *CurrentTest;

  23. static unsigned int AssertionCount;

  24. static unsigned int FailureCount;

  25. 

  26. static void ExpectUnsigned(unsigned long expected,

  27.                            unsigned long actual,

  28.                            const char *expression,

  29.                            int line)

  30. {

  31.     AssertionCount++;

  32.     if (expected != actual)

  33.     {

  34.         FailureCount++;

  35.         (void)printf("FAIL %s:%d: %s expected %lu, got %lu\n",

  36.                      CurrentTest, line, expression, expected, actual);

  37.     }

  38. }

  39. 

  40. static void ExpectSigned(long expected,

  41.                          long actual,

  42.                          const char *expression,

  43.                          int line)

  44. {

  45.     AssertionCount++;

  46.     if (expected != actual)

  47.     {

  48.         FailureCount++;

  49.         (void)printf("FAIL %s:%d: %s expected %ld, got %ld\n",

  50.                      CurrentTest, line, expression, expected, actual);

  51.     }

  52. }

  53. 

  54. static void ExpectTrue(int condition, const char *expression, int line)

  55. {

  56.     AssertionCount++;

  57.     if (!condition)

  58.     {

  59.         FailureCount++;

  60.         (void)printf("FAIL %s:%d: expected true: %s\n",

  61.                      CurrentTest, line, expression);

  62.     }

  63. }

  64. 

  65. #define EXPECT_U(expected, actual) \

  66.     ExpectUnsigned((unsigned long)(expected), \

  67.                    (unsigned long)(actual), #actual, __LINE__)

  68. #define EXPECT_I(expected, actual) \

  69.     ExpectSigned((long)(expected), (long)(actual), #actual, __LINE__)

  70. #define EXPECT_TRUE(expression) ExpectTrue((expression), #expression, __LINE__)

  71. 

  72. static uint16_t LowWord(uint32_t value)

  73. {

  74.     return (uint16_t)(value & 0xFFFFUL);

  75. }

  76. 

  77. static uint16_t HighWord(uint32_t value)

  78. {

  79.     return (uint16_t)(value >> 16U);

  80. }

  81. 

  82. static void TestU64ByU32Division(void)

  83. {

  84.     static const uint64_t dividends[] =

  85.     {

  86.         0ULL, 1ULL, 0xFFFFFFFFULL, 0x100000000ULL,

  87.         0x100000001ULL, 0xFFFFFFFFFFFFFFFFULL,

  88.         0x8000000000000000ULL, 0x7FFFFFFFFFFFFFFFULL

  89.     };

  90.     static const uint32_t divisors[] =

  91.     {

  92.         1UL, 2UL, 3UL, 0xFFFFUL, 0x10000UL, 100000UL,

  93.         0x7FFFFFFFUL, 0x80000000UL, 0xFFFFFFFFUL

  94.     };

  95.     uint32_t state = 0xA5C39E17UL;

  96.     uint64_t dividend;

  97.     uint64_t quotient;

  98.     uint32_t divisor;

  99.     uint32_t remainder;

  100.     uint32_t dividendIndex;

  101.     uint32_t divisorIndex;

  102.     uint32_t iteration;

  103. 

  104.     for (dividendIndex = 0U;

  105.          dividendIndex < (uint32_t)(sizeof(dividends) / sizeof(dividends[0]));

  106.          dividendIndex++)

  107.     {

  108.         for (divisorIndex = 0U;

  109.              divisorIndex < (uint32_t)(sizeof(divisors) / sizeof(divisors[0]));

  110.              divisorIndex++)

  111.         {

  112.             dividend = dividends[dividendIndex];

  113.             divisor = divisors[divisorIndex];

  114.             quotient = PlsrTestDivideU64ByU32(dividend, divisor, &remainder);

  115.             EXPECT_TRUE(quotient == dividend / divisor);

  116.             EXPECT_U((uint32_t)(dividend % divisor), remainder);

  117.         }

  118.     }

  119. 

  120.     for (iteration = 0U; iteration < 250000UL; iteration++)

  121.     {

  122.         state = state * 1664525UL + 1013904223UL;

  123.         dividend = (uint64_t)state << 32U;

  124.         state = state * 1664525UL + 1013904223UL;

  125.         dividend |= state;

  126.         state = state * 1664525UL + 1013904223UL;

  127.         divisor = state | 1UL;

  128. 

  129.         quotient = PlsrTestDivideU64ByU32(dividend, divisor, &remainder);

  130.         EXPECT_TRUE(quotient == dividend / divisor);

  131.         EXPECT_U((uint32_t)(dividend % divisor), remainder);

  132.     }

  133. }

  134. 

  135. static uint64_t PulsePeriodNs(uint32_t frequencyHz)

  136. {

  137.     return (1000000000ULL + frequencyHz / 2UL) / frequencyHz;

  138. }

  139. 

  140. static uint64_t UnsignedDifference64(uint64_t first, uint64_t second)

  141. {

  142.     return (first > second) ? (first - second) : (second - first);

  143. }

  144. 

  145. static uint32_t IntegerSquareRoot64(uint64_t value)

  146. {

  147.     uint64_t bit = (uint64_t)1U << 62U;

  148.     uint64_t root = 0ULL;

  149. 

  150.     while (bit > value)

  151.     {

  152.         bit >>= 2U;

  153.     }

  154.     while (bit != 0ULL)

  155.     {

  156.         if (value >= root + bit)

  157.         {

  158.             value -= root + bit;

  159.             root = (root >> 1U) + bit;

  160.         }

  161.         else

  162.         {

  163.             root >>= 1U;

  164.         }

  165.         bit >>= 2U;

  166.     }

  167.     return (uint32_t)root;

  168. }

  169. 

  170. static PLSR_MB_RESULT WriteWord(uint16_t address, uint16_t value)

  171. {

  172.     return PlsrModbusWriteHolding(address, 1U, &value);

  173. }

  174. 

  175. static PLSR_MB_RESULT WriteU32(uint16_t address, uint32_t value)

  176. {

  177.     uint16_t words[2];

  178. 

  179.     words[0] = LowWord(value);

  180.     words[1] = HighWord(value);

  181.     return PlsrModbusWriteHolding(address, 2U, words);

  182. }

  183. 

  184. static PLSR_MB_RESULT WriteI32(uint16_t address, int32_t value)

  185. {

  186.     return WriteU32(address, (uint32_t)value);

  187. }

  188. 

  189. static uint16_t ReadWord(uint16_t address)

  190. {

  191.     uint16_t value = 0xDEADU;

  192.     PLSR_MB_RESULT result = PlsrModbusReadHolding(address, 1U, &value);

  193. 

  194.     EXPECT_U(PLSR_MB_OK, result);

  195.     return value;

  196. }

  197. 

  198. static uint32_t ReadU32(uint16_t address)

  199. {

  200.     uint16_t words[2] = {0xDEADU, 0xBEEFU};

  201.     PLSR_MB_RESULT result = PlsrModbusReadHolding(address, 2U, words);

  202. 

  203.     EXPECT_U(PLSR_MB_OK, result);

  204.     return (uint32_t)words[0] | ((uint32_t)words[1] << 16U);

  205. }

  206. 

  207. static int32_t ReadPosition(void)

  208. {

  209.     return (int32_t)ReadU32(PLSR_STATUS_FIRST_ADDRESS);

  210. }

  211. 

  212. static uint32_t ReadFrequency(void)

  213. {

  214.     return ReadU32((uint16_t)(PLSR_STATUS_FIRST_ADDRESS + 2U));

  215. }

  216. 

  217. static uint16_t ReadStatus(void)

  218. {

  219.     return ReadWord((uint16_t)(PLSR_STATUS_FIRST_ADDRESS + 4U));

  220. }

  221. 

  222. static uint16_t ReadCurrentSegment(void)

  223. {

  224.     return ReadWord((uint16_t)(PLSR_STATUS_FIRST_ADDRESS + 5U));

  225. }

  226. 

  227. static uint16_t ReadError(void)

  228. {

  229.     return ReadWord((uint16_t)(PLSR_STATUS_FIRST_ADDRESS + 6U));

  230. }

  231. 

  232. static PLSR_MB_RESULT QueueCommand(uint16_t command)

  233. {

  234.     return PlsrModbusWriteHolding(PLSR_CONTROL_ADDRESS, 1U, &command);

  235. }

  236. 

  237. static PLSR_MB_RESULT SendCommand(uint16_t command)

  238. {

  239.     PLSR_MB_RESULT result = QueueCommand(command);

  240. 

  241.     if (result == PLSR_MB_OK)

  242.     {

  243.         PlsrPoll1ms();

  244.     }

  245.     return result;

  246. }

  247. 

  248. static void ResetCore(void)

  249. {

  250.     PlsrTestClearPersistentStorage();

  251.     EXPECT_U(1U, PlsrInit());

  252.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  253. }

  254. 

  255. static void ConfigureCommon(uint16_t curveMode,

  256.                             uint16_t positionMode,

  257.                             uint16_t segmentCount,

  258.                             uint16_t sendMode,

  259.                             uint32_t defaultSpeedHz,

  260.                             uint32_t startSpeedHz,

  261.                             uint32_t stopSpeedHz,

  262.                             uint16_t accelerationTimeMs,

  263.                             uint16_t decelerationTimeMs)

  264. {

  265.     uint16_t words[0x14U];

  266.     PLSR_MB_RESULT result;

  267. 

  268.     result = PlsrModbusReadHolding(0x1000U, 0x14U, words);

  269.     EXPECT_U(PLSR_MB_OK, result);

  270.     words[0x04U] = sendMode;

  271.     words[0x05U] = 0U;

  272.     words[0x07U] = curveMode;

  273.     words[0x08U] = positionMode;

  274.     words[0x09U] = segmentCount;

  275.     words[0x0AU] = 1U;

  276.     words[0x0BU] = LowWord(defaultSpeedHz);

  277.     words[0x0CU] = HighWord(defaultSpeedHz);

  278.     words[0x0DU] = LowWord(startSpeedHz);

  279.     words[0x0EU] = HighWord(startSpeedHz);

  280.     words[0x0FU] = 0U;

  281.     words[0x10U] = LowWord(stopSpeedHz);

  282.     words[0x11U] = HighWord(stopSpeedHz);

  283.     words[0x12U] = accelerationTimeMs;

  284.     words[0x13U] = decelerationTimeMs;

  285.     result = PlsrModbusWriteHolding(0x1000U, 0x14U, words);

  286.     EXPECT_U(PLSR_MB_OK, result);

  287. }

  288. 

  289. static PLSR_MB_RESULT SetSegment(uint8_t segmentNumber,

  290.                                  uint32_t frequencyHz,

  291.                                  int32_t pulses,

  292.                                  uint16_t waitType,

  293.                                  uint16_t waitTimeMs,

  294.                                  uint16_t actTimeMs,

  295.                                  uint16_t jumpSegment)

  296. {

  297.     uint16_t words[8];

  298.     uint16_t address = (uint16_t)(0x1100U

  299.                                   + ((uint16_t)segmentNumber - 1U) * 0x10U);

  300. 

  301.     words[0] = LowWord(frequencyHz);

  302.     words[1] = HighWord(frequencyHz);

  303.     words[2] = LowWord((uint32_t)pulses);

  304.     words[3] = HighWord((uint32_t)pulses);

  305.     words[4] = waitType;

  306.     words[5] = waitTimeMs;

  307.     words[6] = actTimeMs;

  308.     words[7] = jumpSegment;

  309.     return PlsrModbusWriteHolding(address, 8U, words);

  310. }

  311. 

  312. static void StopAndSettle(void)

  313. {

  314.     unsigned int pulse;

  315. 

  316.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_STOP));

  317.     for (pulse = 0U; (pulse < 4U) && (PlsrTestPulseIsActive() != 0U);

  318.          pulse++)

  319.     {

  320.         PlsrTestEmitPulses(1UL);

  321.     }

  322.     PlsrPoll1ms();

  323.     EXPECT_U(0U, PlsrTestPulseIsActive());

  324.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  325.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  326. }

  327. 

  328. static void TestProtocolBoundaries(void)

  329. {

  330.     uint16_t value = 0U;

  331.     uint16_t values[2];

  332.     uint16_t before;

  333. 

  334.     ResetCore();

  335. 

  336.     EXPECT_U(PLSR_MB_NOT_HANDLED,

  337.              PlsrModbusReadHolding(0x0FFEU, 1U, &value));

  338.     EXPECT_U(PLSR_MB_NOT_HANDLED,

  339.              PlsrModbusReadHolding(0x1198U, 1U, &value));

  340.     EXPECT_U(PLSR_MB_ILLEGAL_ADDRESS,

  341.              PlsrModbusReadHolding(0x0FFFU, 2U, values));

  342.     EXPECT_U(PLSR_MB_ILLEGAL_ADDRESS,

  343.              PlsrModbusReadHolding(0x1197U, 2U, values));

  344.     EXPECT_U(PLSR_MB_ILLEGAL_ADDRESS,

  345.              PlsrModbusReadHolding(0x2006U, 2U, values));

  346.     EXPECT_U(PLSR_MB_ILLEGAL_ADDRESS,

  347.              PlsrModbusReadHolding(0xFFFFU, 2U, values));

  348.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE,

  349.              PlsrModbusReadHolding(0x1000U, 0U, &value));

  350.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE,

  351.              PlsrModbusReadHolding(0x1000U, 1U, NULL));

  352. 

  353.     EXPECT_U(0U, ReadWord(0x100FU));

  354.     EXPECT_U(PLSR_MB_OK, WriteWord(0x100FU, 0U));

  355.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE, WriteWord(0x100FU, 1U));

  356.     EXPECT_U(0U, ReadWord(0x1108U));

  357.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1108U, 0U));

  358.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE, WriteWord(0x1108U, 1U));

  359. 

  360.     EXPECT_U(PLSR_MB_ILLEGAL_ADDRESS, WriteWord(0x100BU, 2000U));

  361.     EXPECT_U(PLSR_MB_OK, WriteU32(0x100BU, 2000UL));

  362.     EXPECT_U(2000UL, ReadU32(0x100BU));

  363.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE, WriteU32(0x100BU, 100001UL));

  364.     EXPECT_U(2000UL, ReadU32(0x100BU));

  365. 

  366.     before = ReadWord(0x1013U);

  367.     values[0] = 77U;

  368.     values[1] = 1U;

  369.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE,

  370.              PlsrModbusWriteHolding(0x1013U, 2U, values));

  371.     EXPECT_U(before, ReadWord(0x1013U));

  372. 

  373.     EXPECT_U(PLSR_MB_ILLEGAL_ADDRESS,

  374.              PlsrModbusWriteHolding(0x2000U, 1U, &value));

  375.     EXPECT_U(PLSR_MB_ILLEGAL_ADDRESS,

  376.              PlsrModbusWriteHolding(0x3000U, 2U, values));

  377.     value = 3U;

  378.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE,

  379.              PlsrModbusWriteHolding(0x3000U, 1U, &value));

  380.     value = 0U;

  381.     EXPECT_U(PLSR_MB_OK,

  382.              PlsrModbusWriteHolding(0x3000U, 1U, &value));

  383.     EXPECT_U(0U, ReadWord(0x3000U));

  384. 

  385.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1197U, 0U));

  386.     EXPECT_U(0U, ReadWord(0x1197U));

  387.     EXPECT_U(PLSR_MB_NOT_HANDLED, WriteWord(0x1198U, 0U));

  388. }

  389. 

  390. static void TestWaitZeroUsesOneMillisecond(void)

  391. {

  392.     ResetCore();

  393.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U, PLSR_SEND_COMPLETE,

  394.                     1000UL, 1000UL, 100UL, 0U, 0U);

  395.     EXPECT_U(PLSR_MB_OK,

  396.              SetSegment(1U, 1000UL, 1L, PLSR_WAIT_TIME, 0U, 0U, 0U));

  397.     EXPECT_U(PLSR_MB_OK,

  398.              SetSegment(2U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  399.                         0U, 0U, 0U));

  400.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  401.     PlsrTestEmitPulses(1UL);

  402. 

  403.     PlsrPoll1ms();

  404.     EXPECT_U(PLSR_STATUS_WAITING, ReadStatus());

  405.     EXPECT_U(1U, ReadCurrentSegment());

  406.     EXPECT_U(0U, PlsrTestPulseIsActive());

  407. 

  408.     PlsrPoll1ms();

  409.     EXPECT_U(2U, ReadCurrentSegment());

  410.     EXPECT_U(1U, PlsrTestPulseIsActive());

  411.     PlsrTestEmitPulses(1UL);

  412.     PlsrPoll1ms();

  413.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  414.     EXPECT_I(2L, ReadPosition());

  415. }

  416. 

  417. static void TestActZeroSkipsWithoutPulse(void)

  418. {

  419.     ResetCore();

  420.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U, PLSR_SEND_COMPLETE,

  421.                     1000UL, 1000UL, 100UL, 0U, 0U);

  422.     EXPECT_U(PLSR_MB_OK,

  423.              SetSegment(1U, 1000UL, 100L, PLSR_ACT_TIME, 0U, 0U, 0U));

  424.     EXPECT_U(PLSR_MB_OK,

  425.              SetSegment(2U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  426.                         0U, 0U, 0U));

  427.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  428.     EXPECT_U(0U, PlsrTestPulseIsActive());

  429.     EXPECT_U(1U, ReadCurrentSegment());

  430.     EXPECT_I(0L, ReadPosition());

  431. 

  432.     PlsrPoll1ms();

  433.     EXPECT_U(2U, ReadCurrentSegment());

  434.     EXPECT_U(1U, PlsrTestPulseIsActive());

  435.     EXPECT_I(0L, ReadPosition());

  436.     PlsrTestEmitPulses(1UL);

  437.     PlsrPoll1ms();

  438.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  439.     EXPECT_I(1L, ReadPosition());

  440. }

  441. 

  442. static void TestRelativeAndAbsoluteZeroDisplacement(void)

  443. {

  444.     ResetCore();

  445.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  446.                     1000UL, 1000UL, 100UL, 0U, 0U);

  447.     EXPECT_U(PLSR_MB_OK,

  448.              SetSegment(1U, 1000UL, 0L, PLSR_EXT_OR_COMPLETE,

  449.                         0U, 0U, 0U));

  450.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  451.     EXPECT_U(PLSR_STATUS_RUNNING, ReadStatus());

  452.     EXPECT_U(0U, PlsrTestPulseIsActive());

  453.     PlsrPoll1ms();

  454.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  455.     EXPECT_I(0L, ReadPosition());

  456. 

  457.     EXPECT_U(PLSR_MB_OK,

  458.              SetSegment(1U, 1000UL, 5L, PLSR_EXT_OR_COMPLETE,

  459.                         0U, 0U, 0U));

  460.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  461.     PlsrTestEmitPulses(5UL);

  462.     PlsrPoll1ms();

  463.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  464.     EXPECT_I(5L, ReadPosition());

  465. 

  466.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1008U, PLSR_POSITION_ABSOLUTE));

  467.     EXPECT_U(PLSR_MB_OK,

  468.              SetSegment(1U, 1000UL, 5L, PLSR_EXT_OR_COMPLETE,

  469.                         0U, 0U, 0U));

  470.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  471.     EXPECT_U(0U, PlsrTestPulseIsActive());

  472.     PlsrPoll1ms();

  473.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  474.     EXPECT_I(5L, ReadPosition());

  475. }

  476. 

  477. static void TestSelfJumpCanStop(void)

  478. {

  479.     unsigned int loop;

  480. 

  481.     ResetCore();

  482.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  483.                     1000UL, 1000UL, 100UL, 0U, 0U);

  484.     EXPECT_U(PLSR_MB_OK,

  485.              SetSegment(1U, 1000UL, 2L, PLSR_EXT_OR_COMPLETE,

  486.                         0U, 0U, 1U));

  487.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  488. 

  489.     for (loop = 0U; loop < 3U; loop++)

  490.     {

  491.         PlsrTestEmitPulses(2UL);

  492.         PlsrPoll1ms();

  493.         EXPECT_U(PLSR_STATUS_RUNNING, ReadStatus());

  494.         EXPECT_U(1U, ReadCurrentSegment());

  495.         EXPECT_U(1U, PlsrTestPulseIsActive());

  496.     }

  497. 

  498.     StopAndSettle();

  499. }

  500. 

  501. static void TestStopDeceleratesBeforeCut(void)

  502. {

  503.     unsigned int tick;

  504.     uint32_t middleFrequency;

  505. 

  506.     ResetCore();

  507.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  508.                     1000UL, 1000UL, 100UL, 0U, 1000U);

  509.     EXPECT_U(PLSR_MB_OK,

  510.              SetSegment(1U, 1000UL, 10000L, PLSR_EXT_OR_COMPLETE,

  511.                         0U, 0U, 0U));

  512.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  513.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  514.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_STOP));

  515.     EXPECT_U(PLSR_STATUS_DECELERATING, ReadStatus());

  516.     EXPECT_U(1U, PlsrTestPulseIsActive());

  517. 

  518.     for (tick = 0U; tick < 450U; tick++)

  519.     {

  520.         PlsrPoll1ms();

  521.         PlsrTestEmitPulses(1UL);

  522.     }

  523.     middleFrequency = PlsrTestOutputFrequency();

  524.     EXPECT_TRUE((middleFrequency > 100UL) && (middleFrequency < 1000UL));

  525.     EXPECT_U(1U, PlsrTestPulseIsActive());

  526.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_STOP));

  527. 

  528.     for (tick = 450U; tick < 900U; tick++)

  529.     {

  530.         PlsrPoll1ms();

  531.         PlsrTestEmitPulses(1UL);

  532.     }

  533.     EXPECT_TRUE(PlsrTestOutputFrequency() > 100UL);

  534.     EXPECT_TRUE(PlsrTestOutputFrequency() <= 103UL);

  535.     EXPECT_U(PLSR_STATUS_DECELERATING, ReadStatus());

  536.     EXPECT_U(1U, PlsrTestPulseIsActive());

  537.     PlsrTestEmitPulses(1UL);

  538.     EXPECT_U(100UL, PlsrTestOutputFrequency());

  539.     EXPECT_U(1U, PlsrTestPulseIsActive());

  540.     PlsrTestEmitPulses(1UL);

  541.     EXPECT_U(0U, PlsrTestPulseIsActive());

  542.     PlsrPoll1ms();

  543.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  544.     EXPECT_I(902L, ReadPosition());

  545. }

  546. 

  547. static void TestStopAtPendingBoundary(void)

  548. {

  549.     ResetCore();

  550.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  551.                     1000UL, 1000UL, 100UL, 0U, 0U);

  552.     EXPECT_U(PLSR_MB_OK,

  553.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  554.                         0U, 0U, 0U));

  555.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  556. 

  557.     PlsrTestEmitPulses(1UL);

  558.     EXPECT_U(0U, PlsrTestPulseIsActive());

  559.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_STOP));

  560.     EXPECT_U(PLSR_STATUS_RUNNING, ReadStatus());

  561. 

  562.     PlsrPoll1ms();

  563.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  564.     EXPECT_U(0U, ReadCurrentSegment());

  565.     EXPECT_I(1L, ReadPosition());

  566. 

  567.     PlsrPoll1ms();

  568.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  569.     EXPECT_U(0U, PlsrTestPulseIsActive());

  570. }

  571. 

  572. static void TestOneMillisecondDirectionDelay(void)

  573. {

  574.     ResetCore();

  575.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  576.                     1000UL, 1000UL, 100UL, 0U, 0U);

  577.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1005U, 1U));

  578.     EXPECT_U(PLSR_MB_OK,

  579.              SetSegment(1U, 1000UL, 10L, PLSR_EXT_OR_COMPLETE,

  580.                         0U, 0U, 0U));

  581. 

  582.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  583.     EXPECT_U(0U, PlsrTestPulseIsActive());

  584. 

  585.     PlsrPoll1ms();

  586.     EXPECT_U(1U, PlsrTestPulseIsActive());

  587.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  588.     StopAndSettle();

  589. }

  590. 

  591. static void TestExtEdgeAtNaturalBoundary(void)

  592. {

  593.     ResetCore();

  594.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  595.                     1000UL, 1000UL, 100UL, 0U, 0U);

  596.     PlsrTestSetInput(0U, 0U);

  597.     EXPECT_U(PLSR_MB_OK,

  598.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_SIGNAL,

  599.                         0U, 0U, 0U));

  600.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  601. 

  602.     PlsrTestEmitPulseOnCriticalEntry();

  603.     PlsrTestSetInput(0U, 1U);

  604.     PlsrPoll1ms();

  605.     EXPECT_U(0U, PlsrTestPulseIsActive());

  606. 

  607.     PlsrPoll1ms();

  608.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  609.     EXPECT_U(0U, ReadCurrentSegment());

  610.     EXPECT_I(1L, ReadPosition());

  611. }

  612. 

  613. static void ConfigureExtBoundaryCarryRace(void)

  614. {

  615.     ResetCore();

  616.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  617.                     PLSR_SEND_SUBSEQUENT, 2000UL, 500UL, 1000UL,

  618.                     0U, 1000U);

  619.     PlsrTestSetInput(0U, 0U);

  620.     EXPECT_U(PLSR_MB_OK,

  621.              SetSegment(1U, 2000UL, 1L, PLSR_EXT_SIGNAL,

  622.                         0U, 0U, 0U));

  623.     EXPECT_U(PLSR_MB_OK,

  624.              SetSegment(2U, 1000UL, 70000L, PLSR_EXT_OR_COMPLETE,

  625.                         0U, 0U, 0U));

  626.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  627.     EXPECT_U(2000UL, PlsrTestOutputFrequency());

  628.     PlsrTestSetInput(0U, 1U);

  629. }

  630. 

  631. static void ExpectExtBoundaryCarry(void)

  632. {

  633.     EXPECT_U(0U, PlsrTestPulseIsActive());

  634.     EXPECT_U(1U, ReadCurrentSegment());

  635.     PlsrPoll1ms();

  636.     EXPECT_U(1U, PlsrTestPulseIsActive());

  637.     EXPECT_U(2U, ReadCurrentSegment());

  638.     EXPECT_U(2000UL, PlsrTestOutputFrequency());

  639.     EXPECT_I(1L, ReadPosition());

  640. }

  641. 

  642. static void TestExtCutAndNaturalBoundaryInterleavings(void)

  643. {

  644.     ConfigureExtBoundaryCarryRace();

  645.     PlsrTestEmitPulseAfterCriticalEntries(3U);

  646.     PlsrPoll1ms();

  647.     ExpectExtBoundaryCarry();

  648. 

  649.     ConfigureExtBoundaryCarryRace();

  650.     PlsrPoll1ms();

  651.     EXPECT_U(1U, PlsrTestPulseIsActive());

  652.     PlsrTestEmitPulses(1UL);

  653.     ExpectExtBoundaryCarry();

  654. }

  655. 

  656. static void TestExtEdgeDuringDirectionDelay(void)

  657. {

  658.     ResetCore();

  659.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  660.                     1000UL, 1000UL, 100UL, 0U, 0U);

  661.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1005U, 2U));

  662.     PlsrTestSetInput(0U, 0U);

  663.     EXPECT_U(PLSR_MB_OK,

  664.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_SIGNAL,

  665.                         0U, 0U, 0U));

  666.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  667. 

  668.     PlsrTestSetInput(0U, 1U);

  669.     PlsrPoll1ms();

  670.     EXPECT_U(0U, PlsrTestPulseIsActive());

  671.     PlsrPoll1ms();

  672.     EXPECT_U(1U, PlsrTestPulseIsActive());

  673.     PlsrTestEmitPulses(1UL);

  674. 

  675.     PlsrPoll1ms();

  676.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  677.     EXPECT_I(1L, ReadPosition());

  678. }

  679. 

  680. static void TestStoppedTaskClearsPendingExtEdge(void)

  681. {

  682.     ResetCore();

  683.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  684.                     1000UL, 1000UL, 100UL, 0U, 0U);

  685.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1005U, 2U));

  686.     PlsrTestSetInput(0U, 0U);

  687.     EXPECT_U(PLSR_MB_OK,

  688.              SetSegment(1U, 1000UL, 100L, PLSR_EXT_SIGNAL,

  689.                         0U, 0U, 0U));

  690.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  691.     EXPECT_U(0U, PlsrTestPulseIsActive());

  692. 

  693.     PlsrTestSetInput(0U, 1U);

  694.     PlsrPoll1ms();

  695.     EXPECT_U(0U, PlsrTestPulseIsActive());

  696.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_STOP));

  697.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  698. 

  699.     PlsrTestSetInput(0U, 0U);

  700.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  701.     EXPECT_U(0U, PlsrTestPulseIsActive());

  702.     PlsrPoll1ms();

  703.     EXPECT_U(0U, PlsrTestPulseIsActive());

  704.     PlsrPoll1ms();

  705.     EXPECT_U(1U, PlsrTestPulseIsActive());

  706.     PlsrPoll1ms();

  707.     EXPECT_U(1U, PlsrTestPulseIsActive());

  708.     EXPECT_I(0L, ReadPosition());

  709.     StopAndSettle();

  710. }

  711. 

  712. static void TestExtEdgeDoesNotCutSeamlessNextSegment(void)

  713. {

  714.     ResetCore();

  715.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  716.                     PLSR_SEND_SUBSEQUENT, 1000UL, 1000UL, 100UL, 0U, 0U);

  717.     PlsrTestSetInput(0U, 0U);

  718.     EXPECT_U(PLSR_MB_OK,

  719.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  720.                         0U, 0U, 0U));

  721.     EXPECT_U(PLSR_MB_OK,

  722.              SetSegment(2U, 2000UL, 4L, PLSR_EXT_OR_COMPLETE,

  723.                         0U, 0U, 0U));

  724.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  725. 

  726.     PlsrTestSetInput(0U, 1U);

  727.     PlsrTestEmitPulseAfterCriticalEntries(3U);

  728.     PlsrPoll1ms();

  729.     EXPECT_U(1U, PlsrTestPulseIsActive());

  730.     EXPECT_U(2U, ReadCurrentSegment());

  731.     EXPECT_U(2000UL, PlsrTestOutputFrequency());

  732.     EXPECT_I(1L, ReadPosition());

  733. 

  734.     PlsrTestEmitPulses(4UL);

  735.     PlsrPoll1ms();

  736.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  737.     EXPECT_I(5L, ReadPosition());

  738. }

  739. 

  740. static void TestOldRampDoesNotRetargetSeamlessNextSegment(void)

  741. {

  742.     ResetCore();

  743.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  744.                     PLSR_SEND_SUBSEQUENT, 2000UL, 1000UL, 100UL, 100U, 0U);

  745.     PlsrTestSetInput(0U, 0U);

  746.     EXPECT_U(PLSR_MB_OK,

  747.              SetSegment(1U, 2000UL, 1L, PLSR_EXT_OR_COMPLETE,

  748.                         0U, 0U, 0U));

  749.     EXPECT_U(PLSR_MB_OK,

  750.              SetSegment(2U, 3000UL, 4L, PLSR_EXT_OR_COMPLETE,

  751.                         0U, 0U, 0U));

  752.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  753. 

  754.     PlsrTestEmitPulseAfterCriticalEntries(3U);

  755.     PlsrPoll1ms();

  756.     EXPECT_U(1U, PlsrTestPulseIsActive());

  757.     EXPECT_U(2U, ReadCurrentSegment());

  758.     EXPECT_U(3000UL, PlsrTestOutputFrequency());

  759.     EXPECT_I(1L, ReadPosition());

  760. 

  761.     PlsrTestEmitPulses(4UL);

  762.     PlsrPoll1ms();

  763.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  764.     EXPECT_I(5L, ReadPosition());

  765. }

  766. 

  767. static void TestShortProfileBoundaryMatrix(void)

  768. {

  769.     static const uint16_t pulseCounts[] = {1U, 2U, 10U, 99U, 100U, 101U};

  770.     uint32_t samples[3][101];

  771.     uint64_t previousDurationNs[3] = {0ULL, 0ULL, 0ULL};

  772.     uint64_t durationNs[3];

  773.     unsigned int countIndex;

  774.     uint16_t curveMode;

  775.     unsigned int pulse;

  776.     unsigned int firstPeak;

  777.     unsigned int lastPeak;

  778.     uint32_t peakFrequencyHz;

  779.     uint32_t expectedPeakHz;

  780.     uint64_t expectedDurationNs;

  781.     uint64_t toleranceNs;

  782.     uint8_t linearDiffersFromSmooth;

  783.     uint8_t smoothDiffersFromSine;

  784.     uint8_t anyLinearDiffersFromSmooth = 0U;

  785.     uint8_t anySmoothDiffersFromSine = 0U;

  786. 

  787.     for (countIndex = 0U;

  788.          countIndex < sizeof(pulseCounts) / sizeof(pulseCounts[0]);

  789.          countIndex++)

  790.     {

  791.         for (curveMode = 0U; curveMode <= 2U; curveMode++)

  792.         {

  793.             ResetCore();

  794.             ConfigureCommon(curveMode, PLSR_POSITION_RELATIVE, 1U,

  795.                             PLSR_SEND_COMPLETE, 1000UL, 100UL, 100UL,

  796.                             1000U, 1000U);

  797.             EXPECT_U(PLSR_MB_OK,

  798.                      SetSegment(1U, 1000UL, pulseCounts[countIndex],

  799.                                 PLSR_EXT_OR_COMPLETE, 0U, 0U, 0U));

  800.             EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  801.             EXPECT_U(1U, PlsrTestPulseIsActive());

  802.             durationNs[curveMode] = 0ULL;

  803. 

  804.             for (pulse = 0U; pulse < pulseCounts[countIndex]; pulse++)

  805.             {

  806.                 samples[curveMode][pulse] = PlsrTestOutputFrequency();

  807.                 EXPECT_TRUE(samples[curveMode][pulse] >= 100UL);

  808.                 EXPECT_TRUE(samples[curveMode][pulse] <= 1000UL);

  809.                 durationNs[curveMode] +=

  810.                     PulsePeriodNs(samples[curveMode][pulse]);

  811.                 PlsrTestEmitPulses(1UL);

  812.                 if ((pulse + 1U) < pulseCounts[countIndex])

  813.                 {

  814.                     EXPECT_U(1U, PlsrTestPulseIsActive());

  815.                 }

  816.             }

  817. 

  818.             peakFrequencyHz = samples[curveMode][0];

  819.             firstPeak = 0U;

  820.             lastPeak = 0U;

  821.             for (pulse = 1U; pulse < pulseCounts[countIndex]; pulse++)

  822.             {

  823.                 if (samples[curveMode][pulse] > peakFrequencyHz)

  824.                 {

  825.                     peakFrequencyHz = samples[curveMode][pulse];

  826.                     firstPeak = pulse;

  827.                     lastPeak = pulse;

  828.                 }

  829.                 else if (samples[curveMode][pulse] == peakFrequencyHz)

  830.                 {

  831.                     lastPeak = pulse;

  832.                 }

  833.             }

  834.             for (pulse = 1U; pulse <= firstPeak; pulse++)

  835.             {

  836.                 EXPECT_TRUE(samples[curveMode][pulse]

  837.                             >= samples[curveMode][pulse - 1U]);

  838.             }

  839.             for (pulse = firstPeak + 1U; pulse <= lastPeak; pulse++)

  840.             {

  841.                 EXPECT_U(peakFrequencyHz, samples[curveMode][pulse]);

  842.             }

  843.             for (pulse = lastPeak + 1U;

  844.                  pulse < pulseCounts[countIndex]; pulse++)

  845.             {

  846.                 EXPECT_TRUE(samples[curveMode][pulse]

  847.                             <= samples[curveMode][pulse - 1U]);

  848.             }

  849.             EXPECT_TRUE((samples[curveMode][0]

  850.                          > samples[curveMode][pulseCounts[countIndex] - 1U]

  851.                          ? samples[curveMode][0]

  852.                            - samples[curveMode][pulseCounts[countIndex] - 1U]

  853.                          : samples[curveMode][pulseCounts[countIndex] - 1U]

  854.                            - samples[curveMode][0]) <= 2UL);

  855. 

  856.             EXPECT_U(0U, PlsrTestPulseIsActive());

  857.             PlsrPoll1ms();

  858.             EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  859.             EXPECT_U(PLSR_ERROR_NONE, ReadError());

  860.             EXPECT_I((long)pulseCounts[countIndex], ReadPosition());

  861.             EXPECT_TRUE(durationNs[curveMode]

  862.                         > previousDurationNs[curveMode]);

  863.             previousDurationNs[curveMode] = durationNs[curveMode];

  864. 

  865.             expectedPeakHz = IntegerSquareRoot64(

  866.                 10000ULL + (uint64_t)pulseCounts[countIndex] * 1000ULL);

  867.             expectedDurationNs =

  868.                 (uint64_t)2U * (expectedPeakHz - 100UL) * 1000000ULL;

  869.             toleranceNs = expectedDurationNs / 8ULL + 2000000ULL;

  870.             EXPECT_TRUE(UnsignedDifference64(durationNs[curveMode],

  871.                                              expectedDurationNs)

  872.                         <= toleranceNs);

  873.         }

  874. 

  875.         toleranceNs = durationNs[0] / 50ULL + 1000000ULL;

  876.         EXPECT_TRUE(UnsignedDifference64(durationNs[0], durationNs[1])

  877.                     <= toleranceNs);

  878.         EXPECT_TRUE(UnsignedDifference64(durationNs[1], durationNs[2])

  879.                     <= toleranceNs);

  880. 

  881.         if (pulseCounts[countIndex] >= 10U)

  882.         {

  883.             linearDiffersFromSmooth = 0U;

  884.             smoothDiffersFromSine = 0U;

  885.             for (pulse = 0U; pulse < pulseCounts[countIndex]; pulse++)

  886.             {

  887.                 if (samples[0][pulse] != samples[1][pulse])

  888.                 {

  889.                     linearDiffersFromSmooth = 1U;

  890.                 }

  891.                 if (samples[1][pulse] != samples[2][pulse])

  892.                 {

  893.                     smoothDiffersFromSine = 1U;

  894.                 }

  895.             }

  896.             EXPECT_U(1U, linearDiffersFromSmooth);

  897.             if (linearDiffersFromSmooth != 0U)

  898.             {

  899.                 anyLinearDiffersFromSmooth = 1U;

  900.             }

  901.             if (smoothDiffersFromSine != 0U)

  902.             {

  903.                 anySmoothDiffersFromSine = 1U;

  904.             }

  905.         }

  906.     }

  907.     EXPECT_U(1U, anyLinearDiffersFromSmooth);

  908.     EXPECT_U(1U, anySmoothDiffersFromSine);

  909. }

  910. 

  911. static void TestShortFinalDeceleratesWithoutPoll(void)

  912. {

  913.     uint16_t curveMode;

  914.     unsigned int pulse;

  915.     uint32_t previousFrequencyHz;

  916.     uint32_t currentFrequencyHz;

  917.     uint64_t durationNs;

  918. 

  919.     for (curveMode = 0U; curveMode <= 2U; curveMode++)

  920.     {

  921.         ResetCore();

  922.         ConfigureCommon(curveMode, PLSR_POSITION_RELATIVE, 1U,

  923.                         PLSR_SEND_COMPLETE, 100000UL, 100000UL, 100UL,

  924.                         0U, 1000U);

  925.         EXPECT_U(PLSR_MB_OK,

  926.                  SetSegment(1U, 100000UL, 10L, PLSR_EXT_OR_COMPLETE,

  927.                             0U, 0U, 0U));

  928.         EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  929.         previousFrequencyHz = PlsrTestOutputFrequency();

  930.         EXPECT_TRUE(previousFrequencyHz >= 99990UL);

  931.         EXPECT_TRUE(previousFrequencyHz <= 100000UL);

  932.         durationNs = PulsePeriodNs(previousFrequencyHz);

  933. 

  934.         for (pulse = 1U; pulse < 10U; pulse++)

  935.         {

  936.             PlsrTestEmitPulses(1UL);

  937.             EXPECT_U(1U, PlsrTestPulseIsActive());

  938.             currentFrequencyHz = PlsrTestOutputFrequency();

  939.             EXPECT_TRUE(currentFrequencyHz <= previousFrequencyHz);

  940.             EXPECT_TRUE(currentFrequencyHz >= 99990UL);

  941.             durationNs += PulsePeriodNs(currentFrequencyHz);

  942.             previousFrequencyHz = currentFrequencyHz;

  943.         }

  944.         EXPECT_TRUE(durationNs >= 99990ULL);

  945.         EXPECT_TRUE(durationNs <= 100010ULL);

  946.         PlsrTestEmitPulses(1UL);

  947.         EXPECT_U(0U, PlsrTestPulseIsActive());

  948.         PlsrPoll1ms();

  949.         EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  950.         EXPECT_U(PLSR_ERROR_NONE, ReadError());

  951.         EXPECT_I(10L, ReadPosition());

  952.     }

  953. }

  954. 

  955. static void TestZeroToMaximumRampKeepsConfiguredDuration(void)

  956. {

  957.     uint16_t curveMode;

  958.     uint32_t firstFrequencyHz[3];

  959.     uint32_t previousFrequencyHz;

  960.     uint32_t currentFrequencyHz;

  961.     uint32_t frequencyStepHz;

  962.     uint32_t maximumStepHz;

  963.     uint32_t pulse;

  964.     uint64_t durationNs;

  965.     const uint64_t expectedDurationNs = 20000000ULL;

  966.     const uint64_t toleranceNs = 100000ULL;

  967. 

  968.     for (curveMode = 0U; curveMode <= 2U; curveMode++)

  969.     {

  970.         ResetCore();

  971.         ConfigureCommon(curveMode, PLSR_POSITION_RELATIVE, 1U,

  972.                         PLSR_SEND_COMPLETE, 100000UL, 0UL, 100000UL,

  973.                         20U, 0U);

  974.         EXPECT_U(PLSR_MB_OK,

  975.                  SetSegment(1U, 100000UL, 1000L,

  976.                             PLSR_EXT_OR_COMPLETE, 0U, 0U, 0U));

  977.         EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  978.         EXPECT_U(1U, PlsrTestPulseIsActive());

  979. 

  980.         previousFrequencyHz = PlsrTestOutputFrequency();

  981.         firstFrequencyHz[curveMode] = previousFrequencyHz;

  982.         EXPECT_TRUE(previousFrequencyHz >= 400UL);

  983.         EXPECT_TRUE(previousFrequencyHz <= 2500UL);

  984.         maximumStepHz = 0UL;

  985.         durationNs = PulsePeriodNs(previousFrequencyHz);

  986. 

  987.         for (pulse = 1UL; pulse < 1000UL; pulse++)

  988.         {

  989.             PlsrTestEmitPulses(1UL);

  990.             EXPECT_U(1U, PlsrTestPulseIsActive());

  991.             currentFrequencyHz = PlsrTestOutputFrequency();

  992.             EXPECT_TRUE(currentFrequencyHz >= previousFrequencyHz);

  993.             EXPECT_TRUE(currentFrequencyHz <= 100000UL);

  994.             frequencyStepHz = currentFrequencyHz - previousFrequencyHz;

  995.             if (frequencyStepHz > maximumStepHz)

  996.             {

  997.                 maximumStepHz = frequencyStepHz;

  998.             }

  999.             durationNs += PulsePeriodNs(currentFrequencyHz);

  1000.             previousFrequencyHz = currentFrequencyHz;

  1001.         }

  1002. 

  1003.         EXPECT_TRUE(maximumStepHz <= 10000UL);

  1004.         EXPECT_TRUE(previousFrequencyHz >= 99000UL);

  1005.         EXPECT_TRUE(UnsignedDifference64(durationNs, expectedDurationNs)

  1006.                     <= toleranceNs);

  1007.         PlsrTestEmitPulses(1UL);

  1008.         EXPECT_U(0U, PlsrTestPulseIsActive());

  1009.         PlsrPoll1ms();

  1010.         EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1011.         EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1012.         EXPECT_I(1000L, ReadPosition());

  1013.     }

  1014.     EXPECT_TRUE(firstFrequencyHz[0] > firstFrequencyHz[1]);

  1015.     EXPECT_TRUE(firstFrequencyHz[1] > firstFrequencyHz[2]);

  1016. }

  1017. 

  1018. static void TestMaximumPulseRampKeepsReachableDuration(void)

  1019. {

  1020.     uint16_t curveMode;

  1021.     uint32_t previousFrequencyHz;

  1022.     uint32_t currentFrequencyHz;

  1023.     uint32_t frequencyStepHz;

  1024.     uint32_t maximumStepHz;

  1025.     uint32_t pulse;

  1026.     uint32_t reachablePeakHz = IntegerSquareRoot64(

  1027.         (uint64_t)2U * 65535UL * 100000UL * 1000UL / 1311UL);

  1028.     uint64_t durationNs;

  1029.     uint64_t expectedDurationNs =

  1030.         (uint64_t)2U * 65535UL * 1000000000ULL / reachablePeakHz;

  1031.     uint64_t toleranceNs = expectedDurationNs / 500ULL + 1000000ULL;

  1032. 

  1033.     for (curveMode = 0U; curveMode <= 2U; curveMode++)

  1034.     {

  1035.         ResetCore();

  1036.         ConfigureCommon(curveMode, PLSR_POSITION_RELATIVE, 1U,

  1037.                         PLSR_SEND_COMPLETE, 100000UL, 0UL, 100000UL,

  1038.                         1311U, 0U);

  1039.         EXPECT_U(PLSR_MB_OK,

  1040.                  SetSegment(1U, 100000UL, 65535L,

  1041.                             PLSR_EXT_OR_COMPLETE, 0U, 0U, 0U));

  1042.         EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1043.         EXPECT_U(1U, PlsrTestPulseIsActive());

  1044. 

  1045.         previousFrequencyHz = PlsrTestOutputFrequency();

  1046.         EXPECT_TRUE(previousFrequencyHz > 1UL);

  1047.         EXPECT_TRUE(previousFrequencyHz < reachablePeakHz);

  1048.         maximumStepHz = 0UL;

  1049.         durationNs = PulsePeriodNs(previousFrequencyHz);

  1050. 

  1051.         for (pulse = 1UL; pulse < 65535UL; pulse++)

  1052.         {

  1053.             PlsrTestEmitPulses(1UL);

  1054.             EXPECT_U(1U, PlsrTestPulseIsActive());

  1055.             currentFrequencyHz = PlsrTestOutputFrequency();

  1056.             EXPECT_TRUE(currentFrequencyHz >= previousFrequencyHz);

  1057.             EXPECT_TRUE(currentFrequencyHz <= reachablePeakHz + 5UL);

  1058.             frequencyStepHz = currentFrequencyHz - previousFrequencyHz;

  1059.             if (frequencyStepHz > maximumStepHz)

  1060.             {

  1061.                 maximumStepHz = frequencyStepHz;

  1062.             }

  1063.             durationNs += PulsePeriodNs(currentFrequencyHz);

  1064.             previousFrequencyHz = currentFrequencyHz;

  1065.         }

  1066. 

  1067.         EXPECT_TRUE(maximumStepHz <= 5000UL);

  1068.         EXPECT_TRUE(previousFrequencyHz * 100UL

  1069.                     >= reachablePeakHz * 99UL);

  1070.         EXPECT_TRUE(UnsignedDifference64(durationNs, expectedDurationNs)

  1071.                     <= toleranceNs);

  1072.         PlsrTestEmitPulses(1UL);

  1073.         EXPECT_U(0U, PlsrTestPulseIsActive());

  1074.         PlsrPoll1ms();

  1075.         EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1076.         EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1077.         EXPECT_I(65535L, ReadPosition());

  1078.     }

  1079. }

  1080. 

  1081. static void TestMaximumSingleRampWithoutPoll(void)

  1082. {

  1083.     uint16_t curveMode;

  1084.     uint32_t previousFrequencyHz;

  1085.     uint32_t currentFrequencyHz;

  1086.     uint32_t minimumFrequencyHz;

  1087.     uint32_t maximumFrequencyHz;

  1088.     uint32_t pulse;

  1089. 

  1090.     for (curveMode = 0U; curveMode <= 2U; curveMode++)

  1091.     {

  1092.         ResetCore();

  1093.         ConfigureCommon(curveMode, PLSR_POSITION_RELATIVE, 1U,

  1094.                         PLSR_SEND_COMPLETE, 1000UL, 100000UL, 0UL,

  1095.                         1000U, 1000U);

  1096.         EXPECT_U(PLSR_MB_OK,

  1097.                  SetSegment(1U, 100000UL, 65535L,

  1098.                             PLSR_EXT_OR_COMPLETE, 0U, 0U, 0U));

  1099.         EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1100.         previousFrequencyHz = PlsrTestOutputFrequency();

  1101.         minimumFrequencyHz = previousFrequencyHz;

  1102.         maximumFrequencyHz = previousFrequencyHz;

  1103.         EXPECT_TRUE(previousFrequencyHz >= 99000UL);

  1104.         EXPECT_TRUE(previousFrequencyHz <= 100000UL);

  1105. 

  1106.         for (pulse = 1UL; pulse < 65535UL; pulse++)

  1107.         {

  1108.             PlsrTestEmitPulses(1UL);

  1109.             EXPECT_U(1U, PlsrTestPulseIsActive());

  1110.             currentFrequencyHz = PlsrTestOutputFrequency();

  1111.             EXPECT_TRUE(currentFrequencyHz <= previousFrequencyHz);

  1112.             EXPECT_TRUE(currentFrequencyHz >= 99000UL);

  1113.             if (currentFrequencyHz < minimumFrequencyHz)

  1114.             {

  1115.                 minimumFrequencyHz = currentFrequencyHz;

  1116.             }

  1117.             if (currentFrequencyHz > maximumFrequencyHz)

  1118.             {

  1119.                 maximumFrequencyHz = currentFrequencyHz;

  1120.             }

  1121.             previousFrequencyHz = currentFrequencyHz;

  1122.         }

  1123.         EXPECT_TRUE(minimumFrequencyHz > 1UL);

  1124.         EXPECT_TRUE(maximumFrequencyHz <= 100000UL);

  1125.         EXPECT_TRUE(minimumFrequencyHz < maximumFrequencyHz);

  1126.         PlsrTestEmitPulses(1UL);

  1127.         EXPECT_U(0U, PlsrTestPulseIsActive());

  1128.         PlsrPoll1ms();

  1129.         EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1130.         EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1131.         EXPECT_I(65535L, ReadPosition());

  1132.     }

  1133. }

  1134. 

  1135. static void TestShortProfileTimerFailure(void)

  1136. {

  1137.     ResetCore();

  1138.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1139.                     1000UL, 100UL, 100UL, 1000U, 1000U);

  1140.     EXPECT_U(PLSR_MB_OK,

  1141.              SetSegment(1U, 1000UL, 10L, PLSR_EXT_OR_COMPLETE,

  1142.                         0U, 0U, 0U));

  1143.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1144.     PlsrTestFailNextFrequencyAtUpdate();

  1145.     PlsrTestEmitPulses(1UL);

  1146.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1147.     PlsrPoll1ms();

  1148.     EXPECT_U(PLSR_STATUS_ERROR, ReadStatus());

  1149.     EXPECT_U(PLSR_ERROR_TIMER, ReadError());

  1150.     EXPECT_I(1L, ReadPosition());

  1151. }

  1152. 

  1153. static void TestStopImmediatelyAfterSubsequentHandoff(void)

  1154. {

  1155.     unsigned int tick;

  1156. 

  1157.     ResetCore();

  1158.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  1159.                     PLSR_SEND_SUBSEQUENT, 1000UL, 1000UL, 100UL,

  1160.                     0U, 100U);

  1161.     EXPECT_U(PLSR_MB_OK,

  1162.              SetSegment(1U, 1000UL, 3L, PLSR_EXT_OR_COMPLETE,

  1163.                         0U, 0U, 0U));

  1164.     EXPECT_U(PLSR_MB_OK,

  1165.              SetSegment(2U, 2000UL, 20L, PLSR_EXT_OR_COMPLETE,

  1166.                         0U, 0U, 0U));

  1167.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1168.     PlsrTestEmitPulses(3UL);

  1169.     EXPECT_U(2U, ReadCurrentSegment());

  1170.     EXPECT_TRUE(PlsrTestOutputFrequency() <= 2000UL);

  1171.     EXPECT_TRUE(PlsrTestOutputFrequency() > 100UL);

  1172. 

  1173.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_STOP));

  1174.     PlsrPoll1ms();

  1175.     PlsrTestEmitPulses(1UL);

  1176.     EXPECT_U(PLSR_STATUS_DECELERATING, ReadStatus());

  1177.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1178.     EXPECT_TRUE(PlsrTestOutputFrequency() < 2000UL);

  1179.     EXPECT_TRUE(PlsrTestOutputFrequency() > 100UL);

  1180. 

  1181.     for (tick = 1U; tick < 190U; tick++)

  1182.     {

  1183.         PlsrPoll1ms();

  1184.     }

  1185.     while (PlsrTestPulseIsActive() != 0U)

  1186.     {

  1187.         PlsrTestEmitPulses(1UL);

  1188.     }

  1189.     PlsrPoll1ms();

  1190.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  1191.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1192.     EXPECT_I(7L, ReadPosition());

  1193. }

  1194. 

  1195. static void TestShortProfileZeroSpeedEdges(void)

  1196. {

  1197.     unsigned int tick;

  1198. 

  1199.     ResetCore();

  1200.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1201.                     1000UL, 0UL, 0UL, 1000U, 1000U);

  1202.     EXPECT_U(PLSR_MB_OK,

  1203.              SetSegment(1U, 1000UL, 2L, PLSR_EXT_OR_COMPLETE,

  1204.                         0U, 0U, 0U));

  1205.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1206.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1207.     EXPECT_TRUE(PlsrTestOutputFrequency() > 0UL);

  1208.     PlsrTestEmitPulses(1UL);

  1209.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1210.     EXPECT_TRUE(PlsrTestOutputFrequency() > 0UL);

  1211.     PlsrTestEmitPulses(1UL);

  1212.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1213.     PlsrPoll1ms();

  1214.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1215.     EXPECT_I(2L, ReadPosition());

  1216. 

  1217.     ResetCore();

  1218.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1219.                     1000UL, 0UL, 0UL, 1000U, 1000U);

  1220.     EXPECT_U(PLSR_MB_OK,

  1221.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  1222.                         0U, 0U, 0U));

  1223.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1224.     for (tick = 0U; (tick < 10U) && (PlsrTestPulseIsActive() == 0U);

  1225.          tick++)

  1226.     {

  1227.         PlsrPoll1ms();

  1228.     }

  1229.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1230.     PlsrTestEmitPulses(1UL);

  1231.     PlsrPoll1ms();

  1232.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1233.     EXPECT_I(1L, ReadPosition());

  1234. }

  1235. 

  1236. static void TestShortProfileDynamicRetarget(void)

  1237. {

  1238.     unsigned int tick;

  1239.     uint32_t frequencyAfterRetarget;

  1240.     int32_t positionBeforeStop;

  1241.     int32_t positionAfterStop;

  1242. 

  1243.     ResetCore();

  1244.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1245.                     1000UL, 100UL, 100UL, 1000U, 1000U);

  1246.     EXPECT_U(PLSR_MB_OK,

  1247.              SetSegment(1U, 1000UL, 50L, PLSR_EXT_OR_COMPLETE,

  1248.                         0U, 0U, 0U));

  1249.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1250.     PlsrTestEmitPulses(3UL);

  1251.     EXPECT_U(PLSR_MB_OK, WriteU32(0x1100U, 2000UL));

  1252.     PlsrPoll1ms();

  1253.     PlsrTestEmitPulses(1UL);

  1254.     frequencyAfterRetarget = PlsrTestOutputFrequency();

  1255.     PlsrTestEmitPulses(1UL);

  1256.     EXPECT_TRUE(PlsrTestOutputFrequency() > 0UL);

  1257.     for (tick = 0U; tick < 10U; tick++)

  1258.     {

  1259.         PlsrPoll1ms();

  1260.         PlsrTestEmitPulses(1UL);

  1261.     }

  1262.     EXPECT_TRUE(PlsrTestOutputFrequency() > frequencyAfterRetarget);

  1263. 

  1264.     positionBeforeStop = ReadPosition();

  1265.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_STOP));

  1266.     for (tick = 0U; tick < 2000U; tick++)

  1267.     {

  1268.         PlsrPoll1ms();

  1269.     }

  1270.     while (PlsrTestPulseIsActive() != 0U)

  1271.     {

  1272.         PlsrTestEmitPulses(1UL);

  1273.     }

  1274.     PlsrPoll1ms();

  1275.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  1276.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1277.     positionAfterStop = ReadPosition();

  1278.     EXPECT_TRUE(positionAfterStop > positionBeforeStop);

  1279.     EXPECT_TRUE(positionAfterStop <= positionBeforeStop + 3L);

  1280. }

  1281. 

  1282. static void TestShortProfileExtCut(void)

  1283. {

  1284.     uint32_t frequencyBeforeCut;

  1285. 

  1286.     ResetCore();

  1287.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1288.                     1000UL, 100UL, 100UL, 1000U, 1000U);

  1289.     EXPECT_U(PLSR_MB_OK,

  1290.              SetSegment(1U, 1000UL, 50L, PLSR_EXT_SIGNAL,

  1291.                         0U, 0U, 0U));

  1292.     PlsrTestSetInput(0U, 0U);

  1293.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1294.     PlsrTestEmitPulses(3UL);

  1295.     frequencyBeforeCut = PlsrTestOutputFrequency();

  1296.     PlsrTestSetInput(0U, 1U);

  1297.     PlsrPoll1ms();

  1298.     PlsrTestEmitPulses(1UL);

  1299.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1300.     EXPECT_U(0UL, PlsrTestOutputFrequency());

  1301.     PlsrPoll1ms();

  1302.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1303.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1304.     EXPECT_I(4L, ReadPosition());

  1305.     EXPECT_TRUE(frequencyBeforeCut > 100UL);

  1306. }

  1307. 

  1308. static void TestCurrentFrequencyIsDynamic(void)

  1309. {

  1310.     ResetCore();

  1311.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1312.                     1000UL, 1000UL, 100UL, 0U, 0U);

  1313.     EXPECT_U(PLSR_MB_OK,

  1314.              SetSegment(1U, 1000UL, 100L, PLSR_EXT_OR_COMPLETE,

  1315.                         0U, 0U, 0U));

  1316.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1317.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  1318.     EXPECT_U(PLSR_MB_OK, WriteU32(0x1100U, 2000UL));

  1319.     PlsrPoll1ms();

  1320.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  1321.     PlsrTestEmitPulses(1UL);

  1322.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  1323.     EXPECT_U(1000UL, ReadFrequency());

  1324.     PlsrTestEmitPulses(1UL);

  1325.     EXPECT_U(2000UL, PlsrTestOutputFrequency());

  1326.     EXPECT_U(2000UL, ReadFrequency());

  1327. 

  1328.     EXPECT_U(PLSR_MB_OK, WriteI32(0x1102U, 1L));

  1329.     PlsrTestEmitPulses(2UL);

  1330.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1331.     StopAndSettle();

  1332. }

  1333. 

  1334. static void TestPollMailboxDefersPlatformFailure(void)

  1335. {

  1336.     ResetCore();

  1337.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1338.                     1000UL, 1000UL, 100UL, 0U, 0U);

  1339.     EXPECT_U(PLSR_MB_OK,

  1340.              SetSegment(1U, 1000UL, 100L, PLSR_EXT_OR_COMPLETE,

  1341.                         0U, 0U, 0U));

  1342.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1343.     PlsrTestFailNextFrequencyAtUpdate();

  1344.     EXPECT_U(PLSR_MB_OK, WriteU32(0x1100U, 2000UL));

  1345.     PlsrPoll1ms();

  1346.     EXPECT_U(PLSR_STATUS_RUNNING, ReadStatus());

  1347.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1348.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  1349. 

  1350.     PlsrTestEmitPulses(1UL);

  1351.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1352.     PlsrPoll1ms();

  1353.     EXPECT_U(PLSR_STATUS_ERROR, ReadStatus());

  1354.     EXPECT_U(PLSR_ERROR_TIMER, ReadError());

  1355.     EXPECT_I(1L, ReadPosition());

  1356. }

  1357. 

  1358. static void TestFutureSegmentFrequencyAppliesOnArrival(void)

  1359. {

  1360.     ResetCore();

  1361.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U, PLSR_SEND_COMPLETE,

  1362.                     1000UL, 1000UL, 100UL, 0U, 0U);

  1363.     EXPECT_U(PLSR_MB_OK,

  1364.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  1365.                         0U, 0U, 0U));

  1366.     EXPECT_U(PLSR_MB_OK,

  1367.              SetSegment(2U, 3000UL, 10L, PLSR_EXT_OR_COMPLETE,

  1368.                         0U, 0U, 0U));

  1369.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1370.     EXPECT_U(PLSR_MB_OK, WriteU32(0x1110U, 5000UL));

  1371.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  1372. 

  1373.     PlsrTestEmitPulses(1UL);

  1374.     PlsrPoll1ms();

  1375.     EXPECT_U(2U, ReadCurrentSegment());

  1376.     EXPECT_U(5000UL, PlsrTestOutputFrequency());

  1377.     EXPECT_U(5000UL, ReadFrequency());

  1378.     StopAndSettle();

  1379. }

  1380. 

  1381. static void TestSubsequentFutureFrequencyRebuildsHandoff(void)

  1382. {

  1383.     ResetCore();

  1384.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  1385.                     PLSR_SEND_SUBSEQUENT, 1000UL, 1000UL, 100UL, 0U, 0U);

  1386.     EXPECT_U(PLSR_MB_OK,

  1387.              SetSegment(1U, 1000UL, 3L, PLSR_EXT_OR_COMPLETE,

  1388.                         0U, 0U, 0U));

  1389.     EXPECT_U(PLSR_MB_OK,

  1390.              SetSegment(2U, 2000UL, 4L, PLSR_EXT_OR_COMPLETE,

  1391.                         0U, 0U, 0U));

  1392.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1393.     EXPECT_U(PLSR_MB_OK, WriteU32(0x1110U, 5000UL));

  1394.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  1395. 

  1396.     PlsrTestEmitPulses(3UL);

  1397.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1398.     EXPECT_U(2U, ReadCurrentSegment());

  1399.     EXPECT_U(5000UL, PlsrTestOutputFrequency());

  1400.     EXPECT_U(5000UL, ReadFrequency());

  1401. 

  1402.     PlsrTestEmitPulses(4UL);

  1403.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1404.     PlsrPoll1ms();

  1405.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1406.     EXPECT_I(7L, ReadPosition());

  1407. }

  1408. 

  1409. static void TestFutureFrequencyRaceAtLastPulse(void)

  1410. {

  1411.     ResetCore();

  1412.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  1413.                     PLSR_SEND_SUBSEQUENT, 1000UL, 1000UL, 100UL, 0U, 0U);

  1414.     EXPECT_U(PLSR_MB_OK,

  1415.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  1416.                         0U, 0U, 0U));

  1417.     EXPECT_U(PLSR_MB_OK,

  1418.              SetSegment(2U, 2000UL, 4L, PLSR_EXT_OR_COMPLETE,

  1419.                         0U, 0U, 0U));

  1420.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1421. 

  1422.     PlsrTestEmitPulseOnCriticalExit();

  1423.     EXPECT_U(PLSR_MB_OK, WriteU32(0x1110U, 5000UL));

  1424.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1425.     EXPECT_U(2U, ReadCurrentSegment());

  1426.     EXPECT_U(5000UL, PlsrTestOutputFrequency());

  1427.     EXPECT_I(1L, ReadPosition());

  1428. 

  1429.     PlsrTestEmitPulses(4UL);

  1430.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1431.     PlsrPoll1ms();

  1432.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1433.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1434.     EXPECT_I(5L, ReadPosition());

  1435. }

  1436. 

  1437. static void TestLatchedUpdateDrainsBeforeFutureFrequencyCommit(void)

  1438. {

  1439.     ResetCore();

  1440.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  1441.                     PLSR_SEND_SUBSEQUENT, 1000UL, 1000UL, 100UL, 0U, 0U);

  1442.     EXPECT_U(PLSR_MB_OK,

  1443.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  1444.                         0U, 0U, 0U));

  1445.     EXPECT_U(PLSR_MB_OK,

  1446.              SetSegment(2U, 2000UL, 4L, PLSR_EXT_OR_COMPLETE,

  1447.                         0U, 0U, 0U));

  1448.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1449.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  1450.     EXPECT_U(2000UL, PlsrTestQueuedFrequency());

  1451. 

  1452.     /* The physical edge latches 2000 Hz while interrupts are masked by the

  1453.        configuration commit.  The ISR must consume that old handoff before

  1454.        the new 5000 Hz preload replaces it. */

  1455.     PlsrTestLatchPulseOnCriticalEntry();

  1456.     EXPECT_U(PLSR_MB_OK, WriteU32(0x1110U, 5000UL));

  1457.     EXPECT_U(2U, ReadCurrentSegment());

  1458.     EXPECT_I(1L, ReadPosition());

  1459.     EXPECT_U(2000UL, ReadFrequency());

  1460.     EXPECT_U(2000UL, PlsrTestOutputFrequency());

  1461. 

  1462.     PlsrPoll1ms();

  1463.     EXPECT_U(5000UL, PlsrTestQueuedFrequency());

  1464. 

  1465.     PlsrTestEmitPulses(1UL);

  1466.     EXPECT_U(2U, ReadCurrentSegment());

  1467.     EXPECT_I(2L, ReadPosition());

  1468.     EXPECT_U(5000UL, ReadFrequency());

  1469.     EXPECT_U(5000UL, PlsrTestOutputFrequency());

  1470. 

  1471.     PlsrTestEmitPulses(3UL);

  1472.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1473.     PlsrPoll1ms();

  1474.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1475.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1476.     EXPECT_I(5L, ReadPosition());

  1477. }

  1478. 

  1479. static void TestSubsequentHandoffHasNoPollGap(void)

  1480. {

  1481.     ResetCore();

  1482.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  1483.                     PLSR_SEND_SUBSEQUENT, 1000UL, 1000UL, 100UL, 0U, 0U);

  1484.     EXPECT_U(PLSR_MB_OK,

  1485.              SetSegment(1U, 1000UL, 3L, PLSR_EXT_OR_COMPLETE,

  1486.                         0U, 0U, 0U));

  1487.     EXPECT_U(PLSR_MB_OK,

  1488.              SetSegment(2U, 2000UL, 4L, PLSR_EXT_OR_COMPLETE,

  1489.                         0U, 0U, 0U));

  1490.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1491. 

  1492.     PlsrTestEmitPulses(3UL);

  1493.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1494.     EXPECT_U(2U, ReadCurrentSegment());

  1495.     EXPECT_U(2000UL, PlsrTestOutputFrequency());

  1496.     EXPECT_I(3L, ReadPosition());

  1497. 

  1498.     PlsrTestEmitPulses(4UL);

  1499.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1500.     PlsrPoll1ms();

  1501.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1502.     EXPECT_I(7L, ReadPosition());

  1503. }

  1504. 

  1505. static void TestThreeSinglePulseSubsequentWithoutPoll(void)

  1506. {

  1507.     ResetCore();

  1508.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 3U,

  1509.                     PLSR_SEND_SUBSEQUENT, 3000UL, 1000UL, 3000UL,

  1510.                     0U, 0U);

  1511.     EXPECT_U(PLSR_MB_OK,

  1512.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  1513.                         0U, 0U, 0U));

  1514.     EXPECT_U(PLSR_MB_OK,

  1515.              SetSegment(2U, 2000UL, 1L, PLSR_EXT_OR_COMPLETE,

  1516.                         0U, 0U, 0U));

  1517.     EXPECT_U(PLSR_MB_OK,

  1518.              SetSegment(3U, 3000UL, 1L, PLSR_EXT_OR_COMPLETE,

  1519.                         0U, 0U, 0U));

  1520.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1521.     EXPECT_U(1000UL, PlsrTestOutputFrequency());

  1522. 

  1523.     PlsrTestEmitPulses(1UL);

  1524.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1525.     EXPECT_U(2U, ReadCurrentSegment());

  1526.     EXPECT_U(2000UL, PlsrTestOutputFrequency());

  1527.     EXPECT_I(1L, ReadPosition());

  1528. 

  1529.     PlsrTestEmitPulses(1UL);

  1530.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1531.     EXPECT_U(3U, ReadCurrentSegment());

  1532.     EXPECT_U(3000UL, PlsrTestOutputFrequency());

  1533.     EXPECT_I(2L, ReadPosition());

  1534. 

  1535.     PlsrTestEmitPulses(1UL);

  1536.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1537.     EXPECT_I(3L, ReadPosition());

  1538.     PlsrPoll1ms();

  1539.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1540.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1541. }

  1542. 

  1543. static void ConfigureHandoffFailureCase(void)

  1544. {

  1545.     ResetCore();

  1546.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 2U,

  1547.                     PLSR_SEND_SUBSEQUENT, 2000UL, 1000UL, 2000UL,

  1548.                     0U, 0U);

  1549.     EXPECT_U(PLSR_MB_OK,

  1550.              SetSegment(1U, 1000UL, 3L, PLSR_EXT_OR_COMPLETE,

  1551.                         0U, 0U, 0U));

  1552.     EXPECT_U(PLSR_MB_OK,

  1553.              SetSegment(2U, 2000UL, 2L, PLSR_EXT_OR_COMPLETE,

  1554.                         0U, 0U, 0U));

  1555.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1556. }

  1557. 

  1558. static void ExpectHandoffTimerError(void)

  1559. {

  1560.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1561.     PlsrPoll1ms();

  1562.     EXPECT_U(PLSR_STATUS_ERROR, ReadStatus());

  1563.     EXPECT_U(PLSR_ERROR_TIMER, ReadError());

  1564.     EXPECT_U(0U, ReadCurrentSegment());

  1565.     EXPECT_I(3L, ReadPosition());

  1566. }

  1567. 

  1568. static void TestHandoffQueueFailuresBecomeTimerError(void)

  1569. {

  1570.     ConfigureHandoffFailureCase();

  1571.     PlsrTestEmitPulses(1UL);

  1572.     PlsrTestFailNextFrequencyAtUpdate();

  1573.     PlsrTestEmitPulses(1UL);

  1574.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1575.     PlsrTestEmitPulses(1UL);

  1576.     ExpectHandoffTimerError();

  1577. 

  1578.     ConfigureHandoffFailureCase();

  1579.     PlsrTestEmitPulses(2UL);

  1580.     PlsrTestFailNextFrequencyAtUpdate();

  1581.     PlsrTestEmitPulses(1UL);

  1582.     ExpectHandoffTimerError();

  1583. }

  1584. 

  1585. static void TestCommandStateRestrictions(void)

  1586. {

  1587.     ResetCore();

  1588.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1589.                     1000UL, 1000UL, 100UL, 0U, 0U);

  1590.     EXPECT_U(PLSR_MB_OK,

  1591.              SetSegment(1U, 1000UL, 100L, PLSR_EXT_OR_COMPLETE,

  1592.                         0U, 0U, 0U));

  1593. 

  1594.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_STOP));

  1595.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_CLEAR));

  1596.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1597.     EXPECT_U(PLSR_MB_DEVICE_BUSY, SendCommand(PLSR_COMMAND_START));

  1598.     EXPECT_U(PLSR_MB_DEVICE_BUSY, SendCommand(PLSR_COMMAND_CLEAR));

  1599.     EXPECT_U(PLSR_MB_DEVICE_BUSY, WriteWord(0x1000U, 1U));

  1600.     EXPECT_U(PLSR_MB_DEVICE_BUSY, WriteWord(0x1001U, 1U));

  1601.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1002U, 1U));

  1602.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE, SendCommand(3U));

  1603.     StopAndSettle();

  1604. }

  1605. 

  1606. static void TestCommandMailboxStartSnapshotAndConflicts(void)

  1607. {

  1608.     ResetCore();

  1609.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1610.                     1000UL, 1000UL, 1000UL, 0U, 0U);

  1611.     EXPECT_U(PLSR_MB_OK,

  1612.              SetSegment(1U, 1000UL, 20L, PLSR_EXT_OR_COMPLETE,

  1613.                         0U, 0U, 0U));

  1614. 

  1615.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_START));

  1616.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1617.     EXPECT_U(0U, ReadCurrentSegment());

  1618.     EXPECT_U(0UL, ReadFrequency());

  1619.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1620.     EXPECT_I(0L, ReadPosition());

  1621. 

  1622.     EXPECT_U(PLSR_MB_OK, WriteI32(0x1102U, 1L));

  1623.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_START));

  1624.     EXPECT_U(PLSR_MB_DEVICE_BUSY, QueueCommand(PLSR_COMMAND_STOP));

  1625.     EXPECT_U(PLSR_MB_DEVICE_BUSY, QueueCommand(PLSR_COMMAND_CLEAR));

  1626.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE, QueueCommand(3U));

  1627.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1628.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1629. 

  1630.     PlsrPoll1ms();

  1631.     EXPECT_U(PLSR_STATUS_RUNNING, ReadStatus());

  1632.     EXPECT_U(1U, ReadCurrentSegment());

  1633.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1634.     PlsrTestEmitPulses(1UL);

  1635.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1636.     EXPECT_I(1L, ReadPosition());

  1637.     StopAndSettle();

  1638. }

  1639. 

  1640. static void TestCommandMailboxStopAndClearAreDeferred(void)

  1641. {

  1642.     ResetCore();

  1643.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1644.                     1000UL, 1000UL, 1000UL, 0U, 0U);

  1645.     EXPECT_U(PLSR_MB_OK,

  1646.              SetSegment(1U, 1000UL, 100L, PLSR_EXT_OR_COMPLETE,

  1647.                         0U, 0U, 0U));

  1648.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1649.     PlsrTestEmitPulses(2UL);

  1650. 

  1651.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_STOP));

  1652.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_STOP));

  1653.     EXPECT_U(PLSR_MB_DEVICE_BUSY, QueueCommand(PLSR_COMMAND_CLEAR));

  1654.     EXPECT_U(PLSR_MB_DEVICE_BUSY, QueueCommand(PLSR_COMMAND_START));

  1655.     EXPECT_U(PLSR_STATUS_RUNNING, ReadStatus());

  1656.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1657.     EXPECT_I(2L, ReadPosition());

  1658. 

  1659.     PlsrPoll1ms();

  1660.     EXPECT_U(PLSR_STATUS_DECELERATING, ReadStatus());

  1661.     EXPECT_U(1U, PlsrTestPulseIsActive());

  1662.     PlsrTestEmitPulses(1UL);

  1663.     PlsrPoll1ms();

  1664.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  1665.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1666. 

  1667.     PlsrTestSetPosition(17L, 1U);

  1668.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_CLEAR));

  1669.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_CLEAR));

  1670.     EXPECT_U(PLSR_MB_DEVICE_BUSY, QueueCommand(PLSR_COMMAND_START));

  1671.     EXPECT_U(PLSR_STATUS_STOPPED, ReadStatus());

  1672.     EXPECT_I(17L, ReadPosition());

  1673. 

  1674.     PlsrPoll1ms();

  1675.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1676.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1677.     EXPECT_I(0L, ReadPosition());

  1678. }

  1679. 

  1680. static void TestCommandMailboxValidatesBeforeQueue(void)

  1681. {

  1682.     ResetCore();

  1683.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1684.                     1000UL, 1000UL, 1000UL, 0U, 0U);

  1685.     EXPECT_U(PLSR_MB_OK,

  1686.              SetSegment(1U, 1000UL, 10L, PLSR_EXT_OR_COMPLETE,

  1687.                         0U, 0U, 0U));

  1688. 

  1689.     EXPECT_U(PLSR_MB_OK, WriteWord(0x100AU, 2U));

  1690.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE, QueueCommand(PLSR_COMMAND_START));

  1691.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1692.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1693.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_STOP));

  1694.     PlsrPoll1ms();

  1695.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1696. 

  1697.     EXPECT_U(PLSR_MB_OK, WriteWord(0x100AU, 1U));

  1698.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1008U, PLSR_POSITION_ABSOLUTE));

  1699.     PlsrTestSetPosition(3L, 0U);

  1700.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE, QueueCommand(PLSR_COMMAND_START));

  1701.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1702.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1703. }

  1704. 

  1705. static void TestCommandMailboxStartFailureBecomesError(void)

  1706. {

  1707.     ResetCore();

  1708.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1709.                     1000UL, 1000UL, 1000UL, 0U, 0U);

  1710.     EXPECT_U(PLSR_MB_OK,

  1711.              SetSegment(1U, 1000UL, 10L, PLSR_EXT_OR_COMPLETE,

  1712.                         0U, 0U, 0U));

  1713.     PlsrTestFailNextStart();

  1714. 

  1715.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_START));

  1716.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1717.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1718.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1719.     PlsrPoll1ms();

  1720.     EXPECT_U(PLSR_STATUS_ERROR, ReadStatus());

  1721.     EXPECT_U(PLSR_ERROR_INVALID_RESOURCE, ReadError());

  1722.     EXPECT_U(0U, ReadCurrentSegment());

  1723.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1724. 

  1725.     EXPECT_U(PLSR_MB_DEVICE_BUSY, QueueCommand(PLSR_COMMAND_START));

  1726.     EXPECT_U(PLSR_MB_OK, QueueCommand(PLSR_COMMAND_CLEAR));

  1727.     PlsrPoll1ms();

  1728.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1729.     EXPECT_U(PLSR_ERROR_NONE, ReadError());

  1730. }

  1731. 

  1732. static void TestWaitSignalPositivePath(void)

  1733. {

  1734.     ResetCore();

  1735.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1736.                     1000UL, 1000UL, 100UL, 0U, 0U);

  1737.     EXPECT_U(PLSR_MB_OK,

  1738.              SetSegment(1U, 1000UL, 2L, PLSR_WAIT_SIGNAL,

  1739.                         0U, 0U, 0U));

  1740.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1741.     PlsrTestEmitPulses(2UL);

  1742.     PlsrPoll1ms();

  1743.     EXPECT_U(PLSR_STATUS_WAITING, ReadStatus());

  1744.     PlsrTestSetInput(0U, 1U);

  1745.     PlsrPoll1ms();

  1746.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1747. }

  1748. 

  1749. static void TestPersistenceAcrossReinit(void)

  1750. {

  1751.     ResetCore();

  1752.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1753.                     2345UL, 2345UL, 100UL, 0U, 0U);

  1754.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1000U, 2U));

  1755.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1001U, 3U));

  1756.     EXPECT_U(PLSR_MB_OK,

  1757.              SetSegment(1U, 2345UL, 4L, PLSR_EXT_OR_COMPLETE,

  1758.                         0U, 0U, 0U));

  1759.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1760.     PlsrTestEmitPulses(4UL);

  1761.     PlsrPoll1ms();

  1762.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1763.     EXPECT_I(4L, ReadPosition());

  1764. 

  1765.     EXPECT_U(1U, PlsrInit());

  1766.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1767.     EXPECT_U(2U, ReadWord(0x1000U));

  1768.     EXPECT_U(3U, ReadWord(0x1001U));

  1769.     EXPECT_U(2345UL, ReadU32(0x1100U));

  1770.     EXPECT_I(4L, ReadPosition());

  1771. 

  1772.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_CLEAR));

  1773.     PlsrPoll1ms();

  1774.     EXPECT_U(1U, PlsrInit());

  1775.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1776.     EXPECT_I(0L, ReadPosition());

  1777. }

  1778. 

  1779. static void TestPositionSchedulesFlashSave(void)

  1780. {

  1781.     unsigned int tick;

  1782. 

  1783.     ResetCore();

  1784.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1785.                     1000UL, 1000UL, 100UL, 0U, 0U);

  1786.     EXPECT_U(PLSR_MB_OK,

  1787.              SetSegment(1U, 1000UL, 1L, PLSR_EXT_OR_COMPLETE,

  1788.                         0U, 0U, 0U));

  1789.     for (tick = 0U; tick < 1001U; tick++)

  1790.     {

  1791.         PlsrPoll1ms();

  1792.     }

  1793.     PlsrTestResetSaveCount();

  1794. 

  1795.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1796.     PlsrTestEmitPulses(1UL);

  1797.     PlsrPoll1ms();

  1798.     EXPECT_U(0UL, PlsrTestSaveCount());

  1799.     for (tick = 0U; tick < 1001U; tick++)

  1800.     {

  1801.         PlsrPoll1ms();

  1802.     }

  1803.     EXPECT_U(1UL, PlsrTestSaveCount());

  1804. 

  1805.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_CLEAR));

  1806.     for (tick = 0U; tick < 1001U; tick++)

  1807.     {

  1808.         PlsrPoll1ms();

  1809.     }

  1810.     EXPECT_U(2UL, PlsrTestSaveCount());

  1811. }

  1812. 

  1813. static void TestBusyResetInvalidatesAbsolutePosition(void)

  1814. {

  1815.     unsigned int tick;

  1816. 

  1817.     ResetCore();

  1818.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1819.                     1000UL, 1000UL, 100UL, 0U, 0U);

  1820.     EXPECT_U(PLSR_MB_OK,

  1821.              SetSegment(1U, 1000UL, 100L, PLSR_EXT_OR_COMPLETE,

  1822.                         0U, 0U, 0U));

  1823.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1824.     PlsrTestEmitPulses(5UL);

  1825.     for (tick = 0U; tick < 10U; tick++)

  1826.     {

  1827.         PlsrPoll1ms();

  1828.     }

  1829.     EXPECT_I(5L, ReadPosition());

  1830. 

  1831.     EXPECT_U(1U, PlsrInit());

  1832.     EXPECT_U(PLSR_STATUS_IDLE, ReadStatus());

  1833.     EXPECT_I(5L, ReadPosition());

  1834.     EXPECT_U(PLSR_MB_OK, WriteWord(0x1008U, PLSR_POSITION_ABSOLUTE));

  1835.     EXPECT_U(PLSR_MB_OK,

  1836.              SetSegment(1U, 1000UL, 5L, PLSR_EXT_OR_COMPLETE,

  1837.                         0U, 0U, 0U));

  1838.     EXPECT_U(PLSR_MB_ILLEGAL_VALUE, SendCommand(PLSR_COMMAND_START));

  1839. 

  1840.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_CLEAR));

  1841.     EXPECT_I(0L, ReadPosition());

  1842.     EXPECT_U(PLSR_MB_OK,

  1843.              SetSegment(1U, 1000UL, 0L, PLSR_EXT_OR_COMPLETE,

  1844.                         0U, 0U, 0U));

  1845.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1846.     PlsrPoll1ms();

  1847.     EXPECT_U(PLSR_STATUS_COMPLETED, ReadStatus());

  1848. }

  1849. 

  1850. static void TestPositionOverflowStopsWithError(void)

  1851. {

  1852.     ResetCore();

  1853.     ConfigureCommon(0U, PLSR_POSITION_RELATIVE, 1U, PLSR_SEND_COMPLETE,

  1854.                     1000UL, 1000UL, 100UL, 0U, 0U);

  1855.     EXPECT_U(PLSR_MB_OK,

  1856.              SetSegment(1U, 1000UL, 2L, PLSR_EXT_OR_COMPLETE,

  1857.                         0U, 0U, 0U));

  1858.     PlsrTestSetPosition(INT32_MAX, 1U);

  1859.     EXPECT_I(INT32_MAX, ReadPosition());

  1860.     EXPECT_U(PLSR_MB_OK, SendCommand(PLSR_COMMAND_START));

  1861.     PlsrTestEmitPulses(1UL);

  1862.     EXPECT_U(0U, PlsrTestPulseIsActive());

  1863.     PlsrPoll1ms();

  1864.     EXPECT_U(PLSR_STATUS_ERROR, ReadStatus());

  1865.     EXPECT_U(PLSR_ERROR_COUNT, ReadError());

  1866.     EXPECT_I(INT32_MIN, ReadPosition());

  1867. }

  1868. 

  1869. typedef void (*TEST_FUNCTION)(void);

  1870. 

  1871. typedef struct

  1872. {

  1873.     const char *name;

  1874.     TEST_FUNCTION function;

  1875. } TEST_CASE;

  1876. 

  1877. static const TEST_CASE TestCases[] =

  1878. {

  1879.     {"u64_by_u32_division", TestU64ByU32Division},

  1880.     {"protocol_boundaries", TestProtocolBoundaries},

  1881.     {"wait_zero_one_ms", TestWaitZeroUsesOneMillisecond},

  1882.     {"act_zero_no_pulse", TestActZeroSkipsWithoutPulse},

  1883.     {"relative_absolute_zero", TestRelativeAndAbsoluteZeroDisplacement},

  1884.     {"self_jump_stop", TestSelfJumpCanStop},

  1885.     {"stop_deceleration", TestStopDeceleratesBeforeCut},

  1886.     {"stop_pending_boundary", TestStopAtPendingBoundary},

  1887.     {"direction_delay_one_ms", TestOneMillisecondDirectionDelay},

  1888.     {"ext_edge_at_natural_boundary", TestExtEdgeAtNaturalBoundary},

  1889.     {"ext_cut_natural_boundary_interleavings",

  1890.      TestExtCutAndNaturalBoundaryInterleavings},

  1891.     {"ext_edge_during_direction_delay", TestExtEdgeDuringDirectionDelay},

  1892.     {"stopped_clears_pending_ext", TestStoppedTaskClearsPendingExtEdge},

  1893.     {"ext_edge_seamless_epoch", TestExtEdgeDoesNotCutSeamlessNextSegment},

  1894.     {"ramp_seamless_epoch", TestOldRampDoesNotRetargetSeamlessNextSegment},

  1895.     {"short_profile_boundary_matrix", TestShortProfileBoundaryMatrix},

  1896.     {"short_final_no_poll", TestShortFinalDeceleratesWithoutPoll},

  1897.     {"zero_to_maximum_ramp_duration",

  1898.      TestZeroToMaximumRampKeepsConfiguredDuration},

  1899.     {"maximum_pulse_ramp_duration",

  1900.      TestMaximumPulseRampKeepsReachableDuration},

  1901.     {"maximum_single_ramp_no_poll", TestMaximumSingleRampWithoutPoll},

  1902.     {"short_timer_failure", TestShortProfileTimerFailure},

  1903.     {"stop_after_subsequent_handoff",

  1904.      TestStopImmediatelyAfterSubsequentHandoff},

  1905.     {"short_zero_speed_edges", TestShortProfileZeroSpeedEdges},

  1906.     {"short_dynamic_retarget", TestShortProfileDynamicRetarget},

  1907.     {"short_ext_cut", TestShortProfileExtCut},

  1908.     {"current_frequency_dynamic", TestCurrentFrequencyIsDynamic},

  1909.     {"poll_mailbox_failure", TestPollMailboxDefersPlatformFailure},

  1910.     {"future_frequency_on_arrival",

  1911.      TestFutureSegmentFrequencyAppliesOnArrival},

  1912.     {"subsequent_future_frequency_handoff",

  1913.      TestSubsequentFutureFrequencyRebuildsHandoff},

  1914.     {"future_frequency_last_pulse_race",

  1915.      TestFutureFrequencyRaceAtLastPulse},

  1916.     {"latched_update_before_future_frequency_commit",

  1917.      TestLatchedUpdateDrainsBeforeFutureFrequencyCommit},

  1918.     {"subsequent_no_poll_gap", TestSubsequentHandoffHasNoPollGap},

  1919.     {"three_single_pulse_no_poll", TestThreeSinglePulseSubsequentWithoutPoll},

  1920.     {"handoff_queue_failures", TestHandoffQueueFailuresBecomeTimerError},

  1921.     {"command_state_restrictions", TestCommandStateRestrictions},

  1922.     {"command_mailbox_start_snapshot",

  1923.      TestCommandMailboxStartSnapshotAndConflicts},

  1924.     {"command_mailbox_stop_clear_deferred",

  1925.      TestCommandMailboxStopAndClearAreDeferred},

  1926.     {"command_mailbox_validation", TestCommandMailboxValidatesBeforeQueue},

  1927.     {"command_mailbox_start_failure",

  1928.      TestCommandMailboxStartFailureBecomesError},

  1929.     {"wait_signal_positive", TestWaitSignalPositivePath},

  1930.     {"persistence_reinit", TestPersistenceAcrossReinit},

  1931.     {"position_flash_save", TestPositionSchedulesFlashSave},

  1932.     {"busy_reset_absolute_gate", TestBusyResetInvalidatesAbsolutePosition},

  1933.     {"position_overflow", TestPositionOverflowStopsWithError}

  1934. };

  1935. 

  1936. int main(void)

  1937. {

  1938.     unsigned int index;

  1939. 

  1940.     for (index = 0U;

  1941.          index < (unsigned int)(sizeof(TestCases) / sizeof(TestCases[0]));

  1942.          index++)

  1943.     {

  1944.         unsigned int failuresBefore = FailureCount;

  1945. 

  1946.         CurrentTest = TestCases[index].name;

  1947.         (void)printf("RUN  %s\n", CurrentTest);

  1948.         TestCases[index].function();

  1949.         if (FailureCount == failuresBefore)

  1950.         {

  1951.             (void)printf("PASS %s\n", CurrentTest);

  1952.         }

  1953.         else

  1954.         {

  1955.             (void)printf("FAIL %s (%u new failure(s))\n",

  1956.                          CurrentTest, FailureCount - failuresBefore);

  1957.         }

  1958.     }

  1959. 

  1960.     (void)printf("SUMMARY tests=%u assertions=%u failures=%u\n",

  1961.                  (unsigned int)(sizeof(TestCases) / sizeof(TestCases[0])),

  1962.                  AssertionCount, FailureCount);

  1963.     return (FailureCount == 0U) ? 0 : 1;

  1964. }