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Modbus-rtu/PLSR/Test/test_plsr_hal.c

1069 řádky
35 KiB
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  1. #include "plc_device.h"

  2. #include "plsr_core.h"

  3. #include "plsr_hal_f407.h"

  4. #include "plsr_job.h"

  5. #include "plsr_persistence.h"

  6. #include "plsr_self_test.h"

  7. #include <stdio.h>

  8. #include <string.h>

  9. 

  10. #define TEST_WORD_CAPACITY  (3000U)

  11. #define TEST_S0_BASE        (100U)

  12. #define TEST_S1_BASE        (200U)

  13. 

  14. typedef struct

  15. {

  16.     uint16_t words[3][TEST_WORD_CAPACITY];

  17. } TEST_MEMORY;

  18. 

  19. static int TestFailures;

  20. static int TestChecks;

  21. 

  22. #define CHECK(condition)                                                     \

  23.     do                                                                       \

  24.     {                                                                        \

  25.         TestChecks++;                                                        \

  26.         if (!(condition))                                                    \

  27.         {                                                                    \

  28.             TestFailures++;                                                  \

  29.             (void)printf("FAIL line %d: %s\n", __LINE__, #condition);       \

  30.         }                                                                    \

  31.     } while (0)

  32. 

  33. static uint8_t TestValidateWords(void *context,

  34.                                  PLSR_DEVICE_TYPE device,

  35.                                  uint32_t firstAddress,

  36.                                  uint32_t wordCount)

  37. {

  38.     (void)context;

  39.     (void)device;

  40.     return (((uint64_t)firstAddress + wordCount) <= TEST_WORD_CAPACITY)

  41.                ? 1U

  42.                : 0U;

  43. }

  44. 

  45. static uint8_t TestReadWord(void *context,

  46.                             PLSR_DEVICE_TYPE device,

  47.                             uint32_t address,

  48.                             uint16_t *value)

  49. {

  50.     TEST_MEMORY *memory = (TEST_MEMORY *)context;

  51. 

  52.     if ((memory == NULL) || (value == NULL) || (device > PLSR_DEVICE_FD)

  53.         || (address >= TEST_WORD_CAPACITY))

  54.     {

  55.         return 0U;

  56.     }

  57.     *value = memory->words[device][address];

  58.     return 1U;

  59. }

  60. 

  61. static uint8_t TestReadBit(void *context,

  62.                            PLSR_DEVICE_TYPE device,

  63.                            uint32_t address,

  64.                            uint8_t *value)

  65. {

  66.     (void)context;

  67.     (void)device;

  68.     (void)address;

  69.     *value = 0U;

  70.     return 1U;

  71. }

  72. 

  73. static void TestWriteDword(TEST_MEMORY *memory,

  74.                            PLSR_DEVICE_TYPE device,

  75.                            uint32_t address,

  76.                            int32_t value)

  77. {

  78.     uint32_t raw = (uint32_t)value;

  79. 

  80.     memory->words[device][address] = (uint16_t)(raw & 0xFFFFUL);

  81.     memory->words[device][address + 1UL] = (uint16_t)(raw >> 16U);

  82. }

  83. 

  84. static void TestWriteSfdDword(uint16_t address, uint32_t value)

  85. {

  86.     CHECK(PlcDeviceWriteSfd(address, (uint16_t)(value & 0xFFFFUL))

  87.           == PLC_DEVICE_OK);

  88.     CHECK(PlcDeviceWriteSfd((uint16_t)(address + 1U),

  89.                             (uint16_t)(value >> 16U)) == PLC_DEVICE_OK);

  90. }

  91. 

  92. static void TestSetSegment(TEST_MEMORY *memory,

  93.                            uint16_t number,

  94.                            uint32_t frequency,

  95.                            int32_t pulses)

  96. {

  97.     uint32_t base = TEST_S0_BASE + (uint32_t)number * 10UL;

  98. 

  99.     TestWriteDword(memory, PLSR_DEVICE_D, base, (int32_t)frequency);

  100.     TestWriteDword(memory, PLSR_DEVICE_D, base + 2UL, pulses);

  101.     memory->words[PLSR_DEVICE_D][base + 4UL] = 0U;

  102.     TestWriteDword(memory, PLSR_DEVICE_D, base + 5UL, 0);

  103.     memory->words[PLSR_DEVICE_D][base + 7UL] = 0U;

  104.     TestWriteDword(memory, PLSR_DEVICE_D, base + 8UL, 0);

  105. }

  106. 

  107. static void TestResetEnvironment(void)

  108. {

  109.     PlsrPersistenceTestResetStorage();

  110.     CHECK(PlcDeviceInit() == PLC_DEVICE_OK);

  111.     CHECK(PlcDeviceWriteSfd(906U, 4) == PLC_DEVICE_OK);

  112.     CHECK(PlsrInit() == PLSR_RESULT_OK);

  113. }

  114. 

  115. static void TestCompleteFirstAbPrime(uint8_t axis)

  116. {

  117.     int quarter;

  118. 

  119.     CHECK(PlsrHwIsAbStartupPriming(axis) != 0U);

  120.     for (quarter = 0; quarter < 4; quarter++)

  121.     {

  122.         PlsrHwTestAdvanceAbQuarter(axis);

  123.     }

  124.     CHECK(PlsrHwIsAbStartupPriming(axis) == 0U);

  125.     CHECK(PlsrHwGetEmittedPulses(axis) == 0);

  126.     CHECK(PlsrHwTestGetAbQuarter(axis) == 0U);

  127. }

  128. 

  129. static PLSR_CALL TestMakeCall(TEST_MEMORY *memory)

  130. {

  131.     PLSR_CALL call;

  132. 

  133.     (void)memset(&call, 0, sizeof(call));

  134.     call.sequence = 10UL;

  135.     call.source.context = memory;

  136.     call.source.validateWords = TestValidateWords;

  137.     call.source.readWord = TestReadWord;

  138.     call.source.readBit = TestReadBit;

  139.     call.s0.device = PLSR_DEVICE_D;

  140.     call.s0.address = TEST_S0_BASE;

  141.     call.s1.device = PLSR_DEVICE_D;

  142.     call.s1.address = TEST_S1_BASE;

  143.     call.s2.type = PLSR_OPERAND_CONSTANT;

  144.     call.s2.constant = 1;

  145.     call.dAxis = 0U;

  146.     call.outputModeOverride = PLSR_OUTPUT_MODE_FROM_SFD;

  147.     return call;

  148. }

  149. 

  150. static PLSR_STATUS TestGetStatus(void)

  151. {

  152.     PLSR_STATUS status;

  153. 

  154.     (void)memset(&status, 0, sizeof(status));

  155.     CHECK(PlsrGetStatus(0U, &status) == PLSR_RESULT_OK);

  156.     return status;

  157. }

  158. 

  159. static int32_t TestReadSdDword(uint16_t lowAddress)

  160. {

  161.     int32_t lowWord = 0;

  162.     int32_t highWord = 0;

  163.     uint32_t rawValue;

  164. 

  165.     CHECK(PlcDeviceReadSd(lowAddress, &lowWord) == PLC_DEVICE_OK);

  166.     CHECK(PlcDeviceReadSd((uint16_t)(lowAddress + 1U), &highWord)

  167.           == PLC_DEVICE_OK);

  168.     rawValue = ((uint32_t)lowWord & 0xFFFFUL)

  169.                | (((uint32_t)highWord & 0xFFFFUL) << 16U);

  170.     return (int32_t)rawValue;

  171. }

  172. 

  173. /* ---- HAL 单测 ---- */

  174. 

  175. static void TestMapping(void)

  176. {

  177.     (void)PlsrHwInit();

  178.     CHECK(PlsrHwGetTimerClockHz(0U) == 168000000UL);

  179.     CHECK(PlsrHwGetTimerClockHz(1U) == 84000000UL);

  180.     CHECK(PlsrHwGetTimerClockHz(2U) == 168000000UL);

  181.     CHECK(PlsrHwGetTimerClockHz(3U) == 84000000UL);

  182.     CHECK(PlsrHwGetTimerClockHz(4U) == 0UL);

  183.     CHECK(PlsrHwResolveDirectionPoint(4U) != 0U);

  184.     CHECK(PlsrHwResolveDirectionPoint(8U) == 0U);

  185.     CHECK(PlsrHwResolveDirectionPoint(20U) != 0U);

  186.     CHECK(PlsrHwResolveDirectionPoint(21U) == 0U);

  187. }

  188. 

  189. static void TestDirDelaySequence(void)

  190. {

  191.     (void)PlsrHwInit();

  192.     PLSR_HW_START_PARAMS params;

  193.     uint16_t psc;

  194.     uint16_t arr;

  195.     int ticks;

  196. 

  197.     (void)memset(&params, 0, sizeof(params));

  198.     params.frequencyHz = 1000UL;

  199.     params.targetPulses = 100;

  200.     params.directionPoint = 4U;

  201.     params.directionPositive = 1U;

  202.     params.directionDelayMs = 10U;

  203. 

  204.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  205.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DIR_SETTLING);

  206.     CHECK(PlsrHwTestGetDirLevel(0U) == 1U);

  207.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 0U);

  208.     CHECK(PlsrHwIsPulseActive(0U) == 0U);

  209. 

  210.     for (ticks = 0; ticks < 9; ticks++)

  211.     {

  212.         PlsrHwTick(0U);

  213.     }

  214.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DIR_SETTLING);

  215. 

  216.     PlsrHwTick(0U);

  217.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_PWM_PENDING);

  218. 

  219.     /* 首个非零频率启动 PWM，ARR/CCR 与分频计算一致。 */

  220.     CHECK(PlsrHwSetFrequency(0U, 1000UL) == PLSR_RESULT_OK);

  221.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  222.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 1U);

  223.     CHECK(PlsrHwIsPulseActive(0U) == 1U);

  224.     CHECK(PlsrCalculateTimerDivider(168000000UL, 1000UL, &psc, &arr)

  225.           == PLSR_RESULT_OK);

  226.     CHECK(PlsrHwTestGetArr(0U) == arr);

  227.     CHECK(PlsrHwTestGetPsc(0U) == psc);

  228.     CHECK(PlsrHwTestGetCcr(0U) == arr / 2UL);

  229.     /* PWM 模式 1（OC1M=110）：复位后 CCMR1=0 冻结，无此配置输出恒定电平。 */

  230.     CHECK((PlsrHwTestGetCcmr1(0U) & 0x70UL) == 0x60UL);

  231.     /* ARR/CCR 预装载（ARPE=CR1 bit7，OC1PE=CCMR1 bit3）：

  232.      * 运行中调频不产生提前回绕，否则加速段多出 ~ln(f1/f0) 个假脉冲。 */

  233.     CHECK((PlsrHwTestGetCr1(0U) & 0x80UL) == 0x80UL);

  234.     CHECK((PlsrHwTestGetCcmr1(0U) & 0x08UL) == 0x08UL);

  235. 

  236.     /* 段间同向衔接：方向不变时跳过方向延时，直接进入 PWM 待启动。 */

  237.     CHECK(PlsrHwStopPulse(0U) == PLSR_RESULT_OK);

  238.     params.targetPulses = 50;

  239.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  240.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_PWM_PENDING);

  241.     CHECK(PlsrHwTestGetDirLevel(0U) == 1U);

  242. 

  243.     /* 反向时方向延时仍生效。 */

  244.     params.directionPositive = 0U;

  245.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  246.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DIR_SETTLING);

  247.     CHECK(PlsrHwTestGetDirLevel(0U) == 0U);

  248. }

  249. 

  250. static void TestZeroFrequencyWaits(void)

  251. {

  252.     (void)PlsrHwInit();

  253.     PLSR_HW_START_PARAMS params;

  254. 

  255.     (void)memset(&params, 0, sizeof(params));

  256.     params.frequencyHz = 0UL;

  257.     params.targetPulses = 50;

  258.     params.directionPoint = PLSR_HW_DIR_POINT_NONE;

  259.     params.directionPositive = 1U;

  260.     params.directionDelayMs = 0U;

  261. 

  262.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  263.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_PWM_PENDING);

  264.     PlsrHwTick(0U);

  265.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_PWM_PENDING);

  266.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 0U);

  267. 

  268.     /* 起始速度为 0：profile 升频后首个非零频率才启动 PWM。 */

  269.     CHECK(PlsrHwSetFrequency(0U, 10UL) == PLSR_RESULT_OK);

  270.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  271.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 1U);

  272. }

  273. 

  274. static void TestPulseCounting(void)

  275. {

  276.     (void)PlsrHwInit();

  277.     PLSR_HW_START_PARAMS params;

  278.     int pulse;

  279. 

  280.     (void)memset(&params, 0, sizeof(params));

  281.     params.frequencyHz = 1000UL;

  282.     params.targetPulses = 5;

  283.     params.directionPoint = PLSR_HW_DIR_POINT_NONE;

  284.     params.directionPositive = 1U;

  285.     params.directionDelayMs = 0U;

  286. 

  287.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  288.     CHECK(PlsrHwSetFrequency(0U, 1000UL) == PLSR_RESULT_OK);

  289.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  290.     CHECK(PlsrHwGetEmittedPulses(0U) == 0);

  291. 

  292.     /* EGR.UG 只加载预装载寄存器，不能被当作物理脉冲。

  293.      * 共享 IRQ 入口在对应定时器没有 UIF 时也必须无动作。 */

  294.     PlsrHwOnTimerUpdate(0U);

  295.     CHECK(PlsrHwGetEmittedPulses(0U) == 0);

  296. 

  297.     for (pulse = 0; pulse < 4; pulse++)

  298.     {

  299.         PlsrHwTestTriggerUpdate(0U);

  300.         CHECK(PlsrHwGetEmittedPulses(0U) == pulse + 1);

  301.         CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  302.     }

  303.     /* 第 5 个脉冲：到目标，停止 + 段完成事件。 */

  304.     PlsrHwTestTriggerUpdate(0U);

  305.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DONE);

  306.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 0U);

  307.     CHECK(PlsrHwIsPulseActive(0U) == 0U);

  308. 

  309.     /* 停止后再触发更新中断无动作。 */

  310.     PlsrHwTestTriggerUpdate(0U);

  311.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DONE);

  312. }

  313. 

  314. static void TestAbPhaseAndCounting(void)

  315. {

  316.     PLSR_HW_START_PARAMS params;

  317.     static const uint8_t positiveA[4] = {1U, 1U, 0U, 0U};

  318.     static const uint8_t positiveB[4] = {0U, 1U, 1U, 0U};

  319.     static const uint8_t negativeA[4] = {0U, 1U, 1U, 0U};

  320.     static const uint8_t negativeB[4] = {1U, 1U, 0U, 0U};

  321.     uint32_t oldArr;

  322.     uint32_t oldBasePsc;

  323.     uint32_t oldPairPsc;

  324.     uint32_t newPeriod;

  325.     int quarter;

  326. 

  327.     (void)PlsrHwInit();

  328.     (void)memset(&params, 0, sizeof(params));

  329.     params.frequencyHz = 1000UL;

  330.     params.targetPulses = 4;

  331.     params.outputMode = PLSR_OUTPUT_AB;

  332.     params.directionPoint = 4U;       /* AB 模式必须忽略独立 DIR 点。 */

  333.     params.directionPositive = 1U;

  334.     params.directionDelayMs = 10U;    /* AB 模式不得执行方向延时。 */

  335. 

  336.     CHECK(PlsrHwStartPulse(1U, &params) == PLSR_RESULT_INVALID_AXIS);

  337.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  338.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_PWM_PENDING);

  339.     CHECK(PlsrHwTestGetAbPhaseA(0U) == 0U);

  340.     CHECK(PlsrHwTestGetAbPhaseB(0U) == 0U);

  341.     CHECK(PlsrHwSetFrequency(0U, 1000UL) == PLSR_RESULT_OK);

  342.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  343.     CHECK(PlsrHwTestGetPwmEnabled(0U) != 0U);

  344.     CHECK(PlsrHwTestGetPwmEnabled(1U) != 0U);

  345.     CHECK((PlsrHwTestGetPsc(0U) + 1UL)

  346.           == 2UL * (PlsrHwTestGetPsc(1U) + 1UL));

  347.     CHECK(PlsrHwTestGetArr(0U) == PlsrHwTestGetArr(1U));

  348.     CHECK(PlsrHwTestGetCcr(0U) == PlsrHwTestGetCcr(1U));

  349.     CHECK(PlsrHwTestGetCcr(0U)

  350.           == (PlsrHwTestGetArr(0U) + 1UL) / 2UL);

  351.     /* 两相从精确 00 边界起步；CC1IF 会在开中断前再次清除。 */

  352.     CHECK(PlsrHwTestGetCnt(0U)

  353.           == ((PlsrHwTestGetArr(0U) + 1UL) * 3UL) / 4UL);

  354.     CHECK(PlsrHwTestGetCnt(1U) == PlsrHwTestGetCcr(1U));

  355.     TestCompleteFirstAbPrime(0U);

  356. 

  357.     /* 任一物理 timer update 不能直接计作完整 AB 周期。 */

  358.     PlsrHwTestTriggerUpdate(0U);

  359.     CHECK(PlsrHwGetEmittedPulses(0U) == 0);

  360. 

  361.     /* 正向：00→10→11→01→00；四次相位跳变只计一个脉冲。 */

  362.     for (quarter = 0; quarter < 4; quarter++)

  363.     {

  364.         PlsrHwTestAdvanceAbQuarter(0U);

  365.         CHECK(PlsrHwTestGetAbPhaseA(0U) == positiveA[quarter]);

  366.         CHECK(PlsrHwTestGetAbPhaseB(0U) == positiveB[quarter]);

  367.     }

  368.     CHECK(PlsrHwGetEmittedPulses(0U) == 1);

  369.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  370. 

  371.     /* 运行中调频先排队，不能让相差 1/4 周期的两路各自加载 ARR。 */

  372.     oldArr = PlsrHwTestGetArr(0U);

  373.     oldBasePsc = PlsrHwTestGetPsc(0U);

  374.     oldPairPsc = PlsrHwTestGetPsc(1U);

  375.     CHECK(PlsrHwSetFrequency(0U, 2000UL) == PLSR_RESULT_OK);

  376.     CHECK(PlsrHwSetFrequency(0U, 1000UL) == PLSR_RESULT_OK);

  377.     for (quarter = 0; quarter < 4; quarter++)

  378.     {

  379.         PlsrHwTestAdvanceAbQuarter(0U);

  380.     }

  381.     CHECK(PlsrHwGetEmittedPulses(0U) == 2);

  382.     CHECK(PlsrHwTestGetArr(0U) == oldArr);

  383.     CHECK(PlsrHwTestGetPsc(0U) == oldBasePsc);

  384.     CHECK(PlsrHwTestGetPsc(1U) == oldPairPsc);

  385. 

  386.     CHECK(PlsrHwSetFrequency(0U, 2000UL) == PLSR_RESULT_OK);

  387.     CHECK(PlsrHwTestGetAbQuarter(0U) == 0U);

  388.     CHECK(PlsrHwTestGetArr(0U) == oldArr);

  389.     CHECK(PlsrHwTestGetArr(1U) == oldArr);

  390.     CHECK(PlsrHwTestGetPsc(0U) == oldBasePsc);

  391.     CHECK(PlsrHwTestGetPsc(1U) == oldPairPsc);

  392. 

  393.     for (quarter = 0; quarter < 3; quarter++)

  394.     {

  395.         PlsrHwTestAdvanceAbQuarter(0U);

  396.         CHECK(PlsrHwTestGetArr(0U) == oldArr);

  397.         CHECK(PlsrHwTestGetArr(1U) == oldArr);

  398.         CHECK(PlsrHwTestGetPsc(0U) == oldBasePsc);

  399.         CHECK(PlsrHwTestGetPsc(1U) == oldPairPsc);

  400.     }

  401.     /* 回到 00 后，两路同时装载新频率并从精确 90° 位置重启。 */

  402.     PlsrHwTestAdvanceAbQuarter(0U);

  403.     CHECK(PlsrHwGetEmittedPulses(0U) == 3);

  404.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  405.     CHECK((PlsrHwTestGetArr(0U) != oldArr)

  406.           || (PlsrHwTestGetPsc(0U) != oldBasePsc));

  407.     CHECK((PlsrHwTestGetPsc(0U) + 1UL)

  408.           == 2UL * (PlsrHwTestGetPsc(1U) + 1UL));

  409.     CHECK(PlsrHwTestGetArr(0U) == PlsrHwTestGetArr(1U));

  410.     newPeriod = PlsrHwTestGetArr(0U) + 1UL;

  411.     CHECK(PlsrHwTestGetCnt(0U) == (newPeriod * 3UL) / 4UL);

  412.     CHECK(PlsrHwTestGetCnt(1U) == newPeriod / 2UL);

  413. 

  414.     for (quarter = 0; quarter < 4; quarter++)

  415.     {

  416.         PlsrHwTestAdvanceAbQuarter(0U);

  417.     }

  418.     CHECK(PlsrHwGetEmittedPulses(0U) == 4);

  419.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DONE);

  420.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 0U);

  421.     CHECK(PlsrHwTestGetPwmEnabled(1U) == 0U);

  422.     CHECK(PlsrHwTestGetAbPhaseA(0U) == 0U);

  423.     CHECK(PlsrHwTestGetAbPhaseB(0U) == 0U);

  424. 

  425.     /* 反向：00→01→11→10→00。 */

  426.     params.targetPulses = 1;

  427.     params.directionPositive = 0U;

  428.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  429.     CHECK(PlsrHwSetFrequency(0U, 1000UL) == PLSR_RESULT_OK);

  430.     for (quarter = 0; quarter < 4; quarter++)

  431.     {

  432.         PlsrHwTestAdvanceAbQuarter(0U);

  433.         CHECK(PlsrHwTestGetAbPhaseA(0U) == negativeA[quarter]);

  434.         CHECK(PlsrHwTestGetAbPhaseB(0U) == negativeB[quarter]);

  435.     }

  436.     CHECK(PlsrHwGetEmittedPulses(0U) == 1);

  437.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DONE);

  438. 

  439.     /* 紧急停止即使发生在周期中间，也必须回到安全 00。 */

  440.     params.targetPulses = 10;

  441.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  442.     CHECK(PlsrHwSetFrequency(0U, 1000UL) == PLSR_RESULT_OK);

  443.     PlsrHwTestAdvanceAbQuarter(0U);

  444.     CHECK(PlsrHwTestGetAbQuarter(0U) == 1U);

  445.     CHECK(PlsrHwStopPulse(0U) == PLSR_RESULT_OK);

  446.     CHECK(PlsrHwTestGetAbQuarter(0U) == 0U);

  447.     CHECK(PlsrHwTestGetAbPhaseA(0U) == 0U);

  448.     CHECK(PlsrHwTestGetAbPhaseB(0U) == 0U);

  449. }

  450. 

  451. static void TestTwoAbAxesIndependent(void)

  452. {

  453.     PLSR_HW_START_PARAMS params;

  454.     int quarter;

  455. 

  456.     (void)PlsrHwInit();

  457.     (void)memset(&params, 0, sizeof(params));

  458.     params.frequencyHz = 1000UL;

  459.     params.targetPulses = 1;

  460.     params.outputMode = PLSR_OUTPUT_AB;

  461.     params.directionPoint = PLSR_HW_DIR_POINT_NONE;

  462.     params.directionPositive = 1U;

  463. 

  464.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  465.     CHECK(PlsrHwStartPulse(2U, &params) == PLSR_RESULT_OK);

  466.     CHECK(PlsrHwSetFrequency(0U, 1000UL) == PLSR_RESULT_OK);

  467.     CHECK(PlsrHwSetFrequency(2U, 2000UL) == PLSR_RESULT_OK);

  468.     CHECK(PlsrHwTestGetPwmEnabled(0U) != 0U);

  469.     CHECK(PlsrHwTestGetPwmEnabled(1U) != 0U);

  470.     CHECK(PlsrHwTestGetPwmEnabled(2U) != 0U);

  471.     CHECK(PlsrHwTestGetPwmEnabled(3U) != 0U);

  472. 

  473.     TestCompleteFirstAbPrime(0U);

  474.     TestCompleteFirstAbPrime(2U);

  475. 

  476.     for (quarter = 0; quarter < 4; quarter++)

  477.     {

  478.         PlsrHwTestAdvanceAbQuarter(0U);

  479.     }

  480.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DONE);

  481.     CHECK(PlsrHwGetState(2U) == PLSR_HW_STATE_RUNNING);

  482.     CHECK(PlsrHwGetEmittedPulses(2U) == 0);

  483.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 0U);

  484.     CHECK(PlsrHwTestGetPwmEnabled(1U) == 0U);

  485.     CHECK(PlsrHwTestGetPwmEnabled(2U) != 0U);

  486.     CHECK(PlsrHwTestGetPwmEnabled(3U) != 0U);

  487. 

  488.     for (quarter = 0; quarter < 4; quarter++)

  489.     {

  490.         PlsrHwTestAdvanceAbQuarter(2U);

  491.     }

  492.     CHECK(PlsrHwGetState(2U) == PLSR_HW_STATE_DONE);

  493.     CHECK(PlsrHwGetEmittedPulses(2U) == 1);

  494. }

  495. 

  496. static void TestAbFrequencyLimits(void)

  497. {

  498.     PLSR_HW_START_PARAMS params;

  499.     int quarter;

  500. 

  501.     (void)PlsrHwInit();

  502.     (void)memset(&params, 0, sizeof(params));

  503.     params.frequencyHz = 1UL;

  504.     params.targetPulses = 100;

  505.     params.outputMode = PLSR_OUTPUT_AB;

  506.     params.directionPoint = PLSR_HW_DIR_POINT_NONE;

  507.     params.directionPositive = 1U;

  508. 

  509.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  510.     CHECK(PlsrHwSetFrequency(0U, 1UL) == PLSR_RESULT_OK);

  511.     CHECK(PlsrHwTestGetArr(0U) == PlsrHwTestGetArr(1U));

  512.     CHECK((PlsrHwTestGetPsc(0U) + 1UL)

  513.           == 2UL * (PlsrHwTestGetPsc(1U) + 1UL));

  514.     CHECK(PlsrHwTestGetArr(0U) <= 65535UL);

  515. 

  516.     TestCompleteFirstAbPrime(0U);

  517. 

  518.     CHECK(PlsrHwSetFrequency(0U, 100000UL) == PLSR_RESULT_OK);

  519.     for (quarter = 0; quarter < 4; quarter++)

  520.     {

  521.         PlsrHwTestAdvanceAbQuarter(0U);

  522.     }

  523.     CHECK(PlsrHwTestGetArr(0U) == PlsrHwTestGetArr(1U));

  524.     CHECK((PlsrHwTestGetPsc(0U) + 1UL)

  525.           == 2UL * (PlsrHwTestGetPsc(1U) + 1UL));

  526.     CHECK(PlsrHwTestGetArr(0U) >= 3UL);

  527.     CHECK(PlsrHwStopPulse(0U) == PLSR_RESULT_OK);

  528. }

  529. 

  530. static void TestStopAndInvalidArgs(void)

  531. {

  532.     (void)PlsrHwInit();

  533.     PLSR_HW_START_PARAMS params;

  534. 

  535.     (void)memset(&params, 0, sizeof(params));

  536.     params.frequencyHz = 1000UL;

  537.     params.targetPulses = 100;

  538.     params.directionPoint = PLSR_HW_DIR_POINT_NONE;

  539.     params.directionPositive = 1U;

  540.     params.directionDelayMs = 0U;

  541. 

  542.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_OK);

  543.     CHECK(PlsrHwSetFrequency(0U, 1000UL) == PLSR_RESULT_OK);

  544.     CHECK(PlsrHwIsPulseActive(0U) == 1U);

  545.     CHECK(PlsrHwStopPulse(0U) == PLSR_RESULT_OK);

  546.     CHECK(PlsrHwIsPulseActive(0U) == 0U);

  547.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_IDLE);

  548.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 0U);

  549. 

  550.     CHECK(PlsrHwStartPulse(4U, &params) == PLSR_RESULT_INVALID_ARGUMENT);

  551.     CHECK(PlsrHwStartPulse(0U, NULL) == PLSR_RESULT_INVALID_ARGUMENT);

  552.     params.targetPulses = 0;

  553.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_INVALID_ARGUMENT);

  554.     params.targetPulses = 1;

  555.     params.outputMode = PLSR_OUTPUT_CW_CCW;

  556.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_NOT_SUPPORTED);

  557.     params.outputMode = (PLSR_OUTPUT_MODE)99;

  558.     CHECK(PlsrHwStartPulse(0U, &params) == PLSR_RESULT_INVALID_ARGUMENT);

  559.     CHECK(PlsrHwSetFrequency(4U, 1000UL) == PLSR_RESULT_INVALID_ARGUMENT);

  560.     CHECK(PlsrHwStopPulse(4U) == PLSR_RESULT_INVALID_ARGUMENT);

  561. }

  562. 

  563. /* ---- 端到端集成：START → 硬件 → 计数 → 事件 → 段间 → 完成 ---- */

  564. 

  565. static void TestEndToEndTwoSegments(void)

  566. {

  567.     TEST_MEMORY memory;

  568.     PLSR_CALL call;

  569.     PLSR_STATUS status;

  570.     uint16_t initialPsc;

  571.     uint16_t initialArr;

  572.     int ticks;

  573.     int pulse;

  574. 

  575.     TestResetEnvironment();

  576.     (void)memset(&memory, 0, sizeof(memory));

  577.     TestWriteDword(&memory, PLSR_DEVICE_D, TEST_S0_BASE, 2);

  578.     TestSetSegment(&memory, 1U, 1000U, 100);

  579.     TestSetSegment(&memory, 2U, 2000U, 200);

  580. 

  581.     call = TestMakeCall(&memory);

  582.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  583.     PlsrProcess();

  584.     status = TestGetStatus();

  585.     CHECK(status.state == PLSR_STATE_ACCEL);

  586.     CHECK(status.currentSegment == 1U);

  587.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DIR_SETTLING);

  588. 

  589.     /* DIR 延时 10ms → PWM 启动（段1 起始速度 0，profile 升频后启动）。 */

  590.     for (ticks = 0; ticks < 9; ticks++)

  591.     {

  592.         PlsrProcess();

  593.     }

  594.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  595.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 1U);

  596.     CHECK(PlsrCalculateTimerDivider(168000000UL, 75UL,

  597.                                     &initialPsc, &initialArr)

  598.           == PLSR_RESULT_OK);

  599.     CHECK(PlsrHwTestGetPsc(0U) == initialPsc);

  600.     CHECK(PlsrHwTestGetArr(0U) == initialArr);

  601. 

  602.     /* 加速完成 → 状态机进入 RUN。 */

  603.     for (ticks = 0; ticks < 500; ticks++)

  604.     {

  605.         PlsrProcess();

  606.         if (TestGetStatus().state == PLSR_STATE_RUN)

  607.         {

  608.             break;

  609.         }

  610.     }

  611.     status = TestGetStatus();

  612.     CHECK(status.state == PLSR_STATE_RUN);

  613.     CHECK(status.currentSegment == 1U);

  614. 

  615.     /* 段1 脉冲完成：100 次更新中断 → SEGMENT_COMPLETE → 段2 启动。 */

  616.     for (pulse = 0; pulse < 100; pulse++)

  617.     {

  618.         PlsrHwTestTriggerUpdate(0U);

  619.     }

  620.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DONE);

  621.     PlsrProcess();

  622.     status = TestGetStatus();

  623.     CHECK(status.state == PLSR_STATE_ACCEL);

  624.     CHECK(status.currentSegment == 2U);

  625.     CHECK(status.logicalPosition == 100);

  626.     CHECK(status.taskPulses == 100);

  627.     CHECK(status.totalPulses == 100);

  628.     CHECK(TestReadSdDword(1000U) == 2);

  629.     CHECK(TestReadSdDword(1002U) == 0);

  630. 

  631.     /* 段2：DIR 延时 → PWM → 加速 → RUN。 */

  632.     for (ticks = 0; ticks < 600; ticks++)

  633.     {

  634.         PlsrProcess();

  635.         if (TestGetStatus().state == PLSR_STATE_RUN)

  636.         {

  637.             break;

  638.         }

  639.     }

  640.     status = TestGetStatus();

  641.     CHECK(status.state == PLSR_STATE_RUN);

  642.     CHECK(status.currentSegment == 2U);

  643. 

  644.     /* 段2 脉冲完成 → 任务结束。 */

  645.     for (pulse = 0; pulse < 200; pulse++)

  646.     {

  647.         PlsrHwTestTriggerUpdate(0U);

  648.     }

  649.     PlsrProcess();

  650.     status = TestGetStatus();

  651.     CHECK(status.state == PLSR_STATE_COMPLETED);

  652.     CHECK(status.done != 0U);

  653.     CHECK(status.logicalPosition == 300);

  654.     CHECK(status.taskPulses == 300);

  655.     CHECK(status.totalPulses == 300);

  656.     CHECK(TestReadSdDword(1000U) == 2);

  657.     CHECK(TestReadSdDword(1002U) == 200);

  658.     CHECK(TestReadSdDword(1004U) == 200);

  659.     CHECK(TestReadSdDword(1006U) == 0);

  660.     {

  661.         int32_t hsdPulses;

  662.         int32_t hsdEquivalent;

  663. 

  664.         CHECK(PlcDeviceReadHsdDword(0U, &hsdPulses) == PLC_DEVICE_OK);

  665.         CHECK(hsdPulses == 300);

  666.         CHECK(PlcDeviceReadHsdDword(2U, &hsdEquivalent)

  667.               == PLC_DEVICE_OK);

  668.         CHECK(hsdEquivalent == 300);

  669.     }

  670.     /* 终态转换后 HAL 回 IDLE（允许重新启动），脉冲已停止。 */

  671.     CHECK(PlsrHwIsPulseActive(0U) == 0U);

  672.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 0U);

  673. }

  674. 

  675. static void TestEndToEndAbSegment(void)

  676. {

  677.     TEST_MEMORY memory;

  678.     PLSR_CALL call;

  679.     PLSR_STATUS status;

  680.     int quarter;

  681. 

  682.     TestResetEnvironment();

  683.     (void)memset(&memory, 0, sizeof(memory));

  684.     TestWriteDword(&memory, PLSR_DEVICE_D, TEST_S0_BASE, 1);

  685.     TestSetSegment(&memory, 1U, 1000U, -2);

  686. 

  687.     call = TestMakeCall(&memory);

  688.     call.sequence = 15UL;

  689.     call.outputModeOverride = PLSR_OUTPUT_AB;

  690.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  691.     PlsrProcess();

  692.     status = TestGetStatus();

  693.     CHECK(status.state == PLSR_STATE_ACCEL);

  694.     CHECK(status.outputMode == PLSR_OUTPUT_AB);

  695.     CHECK(status.directionPoint == PLSR_DIRECTION_POINT_NONE);

  696.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  697.     CHECK(PlsrHwTestGetPwmEnabled(0U) != 0U);

  698.     CHECK(PlsrHwTestGetPwmEnabled(1U) != 0U);

  699. 

  700.     TestCompleteFirstAbPrime(0U);

  701. 

  702.     /* 负脉冲选择反向相序，完整两个周期后由同一事件链结束任务。 */

  703.     PlsrHwTestAdvanceAbQuarter(0U);

  704.     CHECK(PlsrHwTestGetAbPhaseA(0U) == 0U);

  705.     CHECK(PlsrHwTestGetAbPhaseB(0U) == 1U);

  706.     for (quarter = 1; quarter < 8; quarter++)

  707.     {

  708.         PlsrHwTestAdvanceAbQuarter(0U);

  709.     }

  710.     CHECK(PlsrHwGetEmittedPulses(0U) == 2);

  711.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_DONE);

  712.     PlsrProcess();

  713.     status = TestGetStatus();

  714.     CHECK(status.state == PLSR_STATE_COMPLETED);

  715.     CHECK(status.done != 0U);

  716.     CHECK(status.directionPositive == 0U);

  717.     CHECK(status.logicalPosition == -2);

  718.     CHECK(status.taskPulses == -2);

  719.     CHECK(status.totalPulses == 2);

  720.     CHECK(TestReadSdDword(1002U) == -2);

  721.     CHECK(TestReadSdDword(1004U) == -2);

  722.     CHECK(status.highResourceMask == 0U);

  723.     CHECK(PlsrHwTestGetPwmEnabled(0U) == 0U);

  724.     CHECK(PlsrHwTestGetPwmEnabled(1U) == 0U);

  725. }

  726. 

  727. static void TestPositionOnImmediateStop(void)

  728. {

  729.     TEST_MEMORY memory;

  730.     PLSR_CALL call;

  731.     PLSR_COMMAND command;

  732.     PLSR_STATUS status;

  733.     int pulse;

  734.     int tick;

  735. 

  736.     TestResetEnvironment();

  737.     (void)memset(&memory, 0, sizeof(memory));

  738.     TestWriteDword(&memory, PLSR_DEVICE_D, TEST_S0_BASE, 1);

  739.     TestSetSegment(&memory, 1U, 1000U, 100);

  740.     call = TestMakeCall(&memory);

  741.     call.sequence = 30UL;

  742.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  743.     PlsrProcess();

  744.     for (tick = 0; tick < 10; tick++)

  745.     {

  746.         PlsrProcess();

  747.     }

  748.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  749. 

  750.     for (pulse = 0; pulse < 37; pulse++)

  751.     {

  752.         PlsrHwTestTriggerUpdate(0U);

  753.     }

  754.     PlsrProcess();

  755.     status = TestGetStatus();

  756.     CHECK(status.logicalPosition == 37);

  757.     CHECK(status.taskPulses == 37);

  758.     CHECK(status.totalPulses == 37);

  759. 

  760.     command.sequence = 31UL;

  761.     command.axis = 0U;

  762.     command.opcode = PLSR_CMD_STOP_IMMEDIATE;

  763.     command.argument = 0;

  764.     CHECK(PlsrPostCommand(&command) == PLSR_RESULT_QUEUED);

  765.     PlsrProcess();

  766.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_IDLE);

  767.     CHECK(PlsrPostEvent(0U, PLSR_EVENT_STOP_IMMEDIATE_DONE)

  768.           == PLSR_RESULT_OK);

  769.     PlsrProcess();

  770.     status = TestGetStatus();

  771.     CHECK(status.state == PLSR_STATE_STOPPED);

  772.     CHECK(status.logicalPosition == 37);

  773.     CHECK(status.taskPulses == 37);

  774.     CHECK(status.totalPulses == 37);

  775.     CHECK(TestReadSdDword(1002U) == 37);

  776. 

  777.     command.sequence = 32UL;

  778.     command.opcode = PLSR_CMD_CLEAR_TOTAL;

  779.     CHECK(PlsrPostCommand(&command) == PLSR_RESULT_QUEUED);

  780.     PlsrProcess();

  781.     status = TestGetStatus();

  782.     CHECK(status.logicalPosition == 37);

  783.     CHECK(status.totalPulses == 0);

  784. }

  785. 

  786. static void TestAbsolutePositionAccounting(void)

  787. {

  788.     TEST_MEMORY memory;

  789.     PLSR_CALL call;

  790.     PLSR_COMMAND command;

  791.     PLSR_STATUS status;

  792.     int32_t hsdPosition;

  793.     int pulse;

  794.     int tick;

  795. 

  796.     TestResetEnvironment();

  797.     command.sequence = 40UL;

  798.     command.axis = 0U;

  799.     command.opcode = PLSR_CMD_SET_POSITION;

  800.     command.argument = 100;

  801.     CHECK(PlsrPostCommand(&command) == PLSR_RESULT_QUEUED);

  802.     PlsrProcess();

  803. 

  804.     (void)memset(&memory, 0, sizeof(memory));

  805.     TestWriteDword(&memory, PLSR_DEVICE_D, TEST_S0_BASE, 1);

  806.     TestSetSegment(&memory, 1U, 1000U, 130);

  807.     TestWriteDword(&memory, PLSR_DEVICE_D, TEST_S1_BASE, 1);

  808.     call = TestMakeCall(&memory);

  809.     call.sequence = 41UL;

  810.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  811.     PlsrProcess();

  812.     for (tick = 0; tick < 10; tick++)

  813.     {

  814.         PlsrProcess();

  815.     }

  816.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  817.     for (pulse = 0; pulse < 30; pulse++)

  818.     {

  819.         PlsrHwTestTriggerUpdate(0U);

  820.     }

  821.     PlsrProcess();

  822.     status = TestGetStatus();

  823.     CHECK(status.state == PLSR_STATE_COMPLETED);

  824.     CHECK(status.logicalPosition == 130);

  825.     CHECK(status.taskPulses == 30);

  826.     CHECK(status.totalPulses == 30);

  827.     CHECK(status.positionValid != 0U);

  828.     CHECK(PlcDeviceReadHsdDword(0U, &hsdPosition) == PLC_DEVICE_OK);

  829.     CHECK(hsdPosition == 130);

  830. }

  831. 

  832. static void TestEquivalentRemainderAccounting(void)

  833. {

  834.     TEST_MEMORY memory;

  835.     PLSR_CALL call;

  836.     PLSR_STATUS status;

  837.     int32_t hsdPulses;

  838.     int32_t hsdEquivalent;

  839. 

  840.     TestResetEnvironment();

  841.     CHECK(PlcDeviceWriteSfd(900U, (1U << 8U)) == PLC_DEVICE_OK);

  842.     TestWriteSfdDword(902U, 3UL);

  843.     TestWriteSfdDword(904U, 2UL);

  844.     TestWriteSfdDword(956U, 60000UL);

  845.     CHECK(PlcDeviceWriteSfd(907U, 0U) == PLC_DEVICE_OK);

  846. 

  847.     (void)memset(&memory, 0, sizeof(memory));

  848.     TestWriteDword(&memory, PLSR_DEVICE_D, TEST_S0_BASE, 1);

  849.     TestSetSegment(&memory, 1U, 1000U, 1);

  850.     call = TestMakeCall(&memory);

  851.     call.sequence = 30UL;

  852.     call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  853. 

  854.     /* 3脉冲/2单位：第一次1单位只输出1脉冲并保存1/2余数。 */

  855.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  856.     PlsrProcess();

  857.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  858.     PlsrHwTestTriggerUpdate(0U);

  859.     PlsrProcess();

  860.     status = TestGetStatus();

  861.     CHECK(status.state == PLSR_STATE_COMPLETED);

  862.     CHECK(status.logicalPosition == 1);

  863.     CHECK(status.taskPulses == 1);

  864.     CHECK(status.totalPulses == 1);

  865.     CHECK(PlcDeviceReadHsdDword(0U, &hsdPulses) == PLC_DEVICE_OK);

  866.     CHECK(PlcDeviceReadHsdDword(2U, &hsdEquivalent) == PLC_DEVICE_OK);

  867.     CHECK(hsdPulses == 1);

  868.     CHECK(hsdEquivalent == 0);

  869. 

  870.     /* 第二次1单位合并余数后输出2脉冲；两次合计精确为3脉冲/2单位。 */

  871.     call.sequence = 31UL;

  872.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  873.     PlsrProcess();

  874.     PlsrHwTestTriggerUpdate(0U);

  875.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  876.     PlsrHwTestTriggerUpdate(0U);

  877.     PlsrProcess();

  878.     status = TestGetStatus();

  879.     CHECK(status.state == PLSR_STATE_COMPLETED);

  880.     CHECK(status.logicalPosition == 3);

  881.     CHECK(status.taskPulses == 2);

  882.     CHECK(status.totalPulses == 3);

  883.     CHECK(PlcDeviceReadHsdDword(0U, &hsdPulses) == PLC_DEVICE_OK);

  884.     CHECK(PlcDeviceReadHsdDword(2U, &hsdEquivalent) == PLC_DEVICE_OK);

  885.     CHECK(hsdPulses == 3);

  886.     CHECK(hsdEquivalent == 2);

  887.     CHECK(TestReadSdDword(1002U) == 2);

  888.     CHECK(TestReadSdDword(1004U) == 1);

  889. }

  890. 

  891. static void TestEquivalentCompatibleError(void)

  892. {

  893.     TEST_MEMORY memory;

  894.     PLSR_CALL call;

  895.     PLSR_STATUS status;

  896.     int32_t errorCode = -1;

  897.     int32_t errorBlock = -1;

  898. 

  899.     TestResetEnvironment();

  900.     CHECK(PlcDeviceWriteSfd(900U, (1U << 8U)) == PLC_DEVICE_OK);

  901.     TestWriteSfdDword(902U, 0UL);

  902.     TestWriteSfdDword(904U, 2UL);

  903.     TestWriteSfdDword(956U, 60000UL);

  904. 

  905.     (void)memset(&memory, 0, sizeof(memory));

  906.     TestWriteDword(&memory, PLSR_DEVICE_D, TEST_S0_BASE, 1);

  907.     TestSetSegment(&memory, 1U, 1000U, 1);

  908.     call = TestMakeCall(&memory);

  909.     call.sequence = 32UL;

  910.     call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  911. 

  912.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  913.     PlsrProcess();

  914.     status = TestGetStatus();

  915.     CHECK(status.lastCommandResult == PLSR_RESULT_INVALID_S2);

  916.     CHECK(status.state == PLSR_STATE_IDLE);

  917.     CHECK(PlcDeviceReadSd(1010U, &errorCode) == PLC_DEVICE_OK);

  918.     CHECK(PlcDeviceReadSd(1011U, &errorBlock) == PLC_DEVICE_OK);

  919.     CHECK(errorCode == 2);

  920.     CHECK(errorBlock == 0);

  921. 

  922.     /* A valid retry clears the compatible parameter error. */

  923.     TestWriteSfdDword(902U, 3UL);

  924.     call.sequence = 33UL;

  925.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  926.     PlsrProcess();

  927.     CHECK(PlcDeviceReadSd(1010U, &errorCode) == PLC_DEVICE_OK);

  928.     CHECK(errorCode == 0);

  929.     CHECK(PlsrHwStopPulse(0U) == PLSR_RESULT_OK);

  930. }

  931. 

  932. static void TestProductionSelfTestStartsAb(void)

  933. {

  934.     PLSR_STATUS status;

  935. 

  936.     TestResetEnvironment();

  937.     CHECK(PlsrSelfTestQueue() == PLSR_RESULT_QUEUED);

  938.     PlsrProcess();

  939.     status = TestGetStatus();

  940.     CHECK(status.lastCommandResult == PLSR_RESULT_OK);

  941.     CHECK(status.outputMode == PLSR_OUTPUT_AB);

  942.     CHECK(status.currentSegment == 1U);

  943.     CHECK(status.state == PLSR_STATE_ACCEL);

  944.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  945.     CHECK(PlsrHwTestGetPwmEnabled(0U) != 0U);

  946.     CHECK(PlsrHwTestGetPwmEnabled(1U) != 0U);

  947.     CHECK(PlsrHwStopPulse(0U) == PLSR_RESULT_OK);

  948. }

  949. 

  950. static void TestEquivalentSelfTest(void)

  951. {

  952.     PLSR_STATUS status;

  953.     int32_t hsdPulses;

  954.     int32_t hsdEquivalent;

  955.     int ticks;

  956. 

  957.     TestResetEnvironment();

  958.     CHECK(PlsrEquivalentSelfTestQueue() == PLSR_RESULT_QUEUED);

  959.     PlsrProcess();

  960. 

  961.     /* SFD907=10ms. Advance the simulated hardware delay before segment 1. */

  962.     for (ticks = 0; ticks < 10; ticks++)

  963.     {

  964.         PlsrProcess();

  965.     }

  966.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  967. 

  968.     /* 3 pulses / 2 units: 1001 units emit 1501 pulses and keep 1/2 remainder. */

  969.     for (ticks = 0; ticks < 1501; ticks++)

  970.     {

  971.         PlsrHwTestTriggerUpdate(0U);

  972.     }

  973.     PlsrProcess();

  974.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_RUNNING);

  975. 

  976.     /* Segment 2 consumes the remainder and therefore emits 1502 pulses. */

  977.     for (ticks = 0; ticks < 1502; ticks++)

  978.     {

  979.         PlsrHwTestTriggerUpdate(0U);

  980.     }

  981.     PlsrProcess();

  982. 

  983.     status = TestGetStatus();

  984.     CHECK(status.lastCommandResult == PLSR_RESULT_OK);

  985.     CHECK(status.outputMode == PLSR_OUTPUT_PULSE_DIR);

  986.     CHECK(status.state == PLSR_STATE_COMPLETED);

  987.     CHECK(status.currentSegment == 2U);

  988.     CHECK(status.logicalPosition == 3003);

  989.     CHECK(status.taskPulses == 3003);

  990.     CHECK(status.totalPulses == 3003);

  991.     CHECK(PlcDeviceReadHsdDword(0U, &hsdPulses) == PLC_DEVICE_OK);

  992.     CHECK(PlcDeviceReadHsdDword(2U, &hsdEquivalent) == PLC_DEVICE_OK);

  993.     CHECK(hsdPulses == 3003);

  994.     CHECK(hsdEquivalent == 2002);

  995.     CHECK(TestReadSdDword(1002U) == 1502);

  996.     CHECK(TestReadSdDword(1004U) == 1001);

  997. }

  998. 

  999. static void TestStopStopsHardware(void)

  1000. {

  1001.     TEST_MEMORY memory;

  1002.     PLSR_CALL call;

  1003.     PLSR_COMMAND command;

  1004.     PLSR_STATUS status;

  1005.     int ticks;

  1006. 

  1007.     TestResetEnvironment();

  1008.     (void)memset(&memory, 0, sizeof(memory));

  1009.     TestWriteDword(&memory, PLSR_DEVICE_D, TEST_S0_BASE, 1);

  1010.     TestSetSegment(&memory, 1U, 1000U, 10000);

  1011. 

  1012.     call = TestMakeCall(&memory);

  1013.     call.sequence = 20UL;

  1014.     CHECK(PlsrPostCall(&call) == PLSR_RESULT_QUEUED);

  1015.     PlsrProcess();

  1016.     for (ticks = 0; ticks < 10; ticks++)

  1017.     {

  1018.         PlsrProcess();

  1019.     }

  1020.     CHECK(PlsrHwIsPulseActive(0U) == 1U);

  1021. 

  1022.     /* STOP_IMMEDIATE：硬件立即停止。 */

  1023.     command.sequence = 21UL;

  1024.     command.axis = 0U;

  1025.     command.opcode = PLSR_CMD_STOP_IMMEDIATE;

  1026.     command.argument = 0;

  1027.     CHECK(PlsrPostCommand(&command) == PLSR_RESULT_QUEUED);

  1028.     PlsrProcess();

  1029.     CHECK(PlsrHwIsPulseActive(0U) == 0U);

  1030.     CHECK(PlsrHwGetState(0U) == PLSR_HW_STATE_IDLE);

  1031. 

  1032.     CHECK(PlsrPostEvent(0U, PLSR_EVENT_STOP_IMMEDIATE_DONE)

  1033.           == PLSR_RESULT_OK);

  1034.     PlsrProcess();

  1035.     status = TestGetStatus();

  1036.     CHECK(status.state == PLSR_STATE_STOPPED);

  1037. }

  1038. 

  1039. int main(void)

  1040. {

  1041.     TestMapping();

  1042.     TestDirDelaySequence();

  1043.     TestZeroFrequencyWaits();

  1044.     TestPulseCounting();

  1045.     TestAbPhaseAndCounting();

  1046.     TestTwoAbAxesIndependent();

  1047.     TestAbFrequencyLimits();

  1048.     TestStopAndInvalidArgs();

  1049.     TestEndToEndTwoSegments();

  1050.     TestEndToEndAbSegment();

  1051.     TestPositionOnImmediateStop();

  1052.     TestAbsolutePositionAccounting();

  1053.     TestEquivalentRemainderAccounting();

  1054.     TestEquivalentCompatibleError();

  1055.     TestProductionSelfTestStartsAb();

  1056.     TestEquivalentSelfTest();

  1057.     TestStopStopsHardware();

  1058. 

  1059.     if (TestFailures != 0)

  1060.     {

  1061.         (void)printf("FAIL: %d of %d PLSR HAL checks failed\n",

  1062.                      TestFailures,

  1063.                      TestChecks);

  1064.         return 1;

  1065.     }

  1066.     (void)printf("PASS: %d PLSR HAL checks\n", TestChecks);

  1067.     return 0;

  1068. }