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Modbus-rtu/PLSR/Src/plsr_self_test.c

1256 rindas
49 KiB
Neapstrādāts Vainot Vēsture 

  1. #include "plsr_self_test.h"

  2. #include "plsr_build_config.h"

  3. #include "plc_device.h"

  4. #include "modbus_data_store.h"

  5. #include "plsr_core.h"

  6. #include "plsr_hal_f407.h"

  7. #include "plsr_job.h"

  8. #include "plsr_modbus_data.h"

  9. #include <string.h>

  10. 

  11. #if PLSR_ENABLE_BOARD_SELF_TEST != 0U

  12. 

  13. /* 上电自测（验证后可删除）：

  14.  * - AB 模式使用 Q0(A)/Q1(B)，其余用出厂默认参数（K1）

  15.  * - 任务：3 段完整 AB 周期（H00 完成，顺序衔接）：

  16.  *   段1：2000Hz / +1000 周期（A 超前 B）

  17.  *   段2：5000Hz / +6000 周期（A 超前 B）

  18.  *   段3：1000Hz / -500 周期（B 超前 A，验证反向）

  19.  * 数据源为静态数组，仅自测使用（正式 D 设备适配器见 Modbus 阶段）。 */

  20. 

  21. #define SELF_TEST_WORD_CAPACITY     (192U)

  22. #define SELF_TEST_S0_BASE           (10U)

  23. #define SELF_TEST_S1_BASE           (60U)

  24. #define SELF_TEST_DIR_POINT         (4U)

  25. #define SELF_TEST_SFD_AXIS_STRIDE   (130U)

  26. #define SELF_TEST_SFD_SET_OFFSET    (50U)

  27. #define SELF_TEST_MODBUS_S0_BASE    (1000UL)

  28. #define SELF_TEST_MODBUS_S1_BASE    (1100UL)

  29. #define SELF_TEST_INPUT_CONTROL_BASE (1540UL)

  30. #define SELF_TEST_INPUT_LEASE_TICKS  (1000U)

  31. #define SELF_TEST_INPUT_SIGNATURE    (0x5019U)

  32. 

  33. static uint16_t SelfTestWords[3][SELF_TEST_WORD_CAPACITY];

  34. volatile int32_t PlsrSelfTestLiveFrequencyHz;

  35. volatile uint32_t PlsrSelfTestDynamicTick100us;

  36. volatile uint8_t PlsrSelfTestDynamicPhase;

  37. static volatile uint8_t PlsrSelfTestDynamicEnabled;

  38. static uint16_t PlsrPhysicalInputLastLease;

  39. static uint16_t PlsrPhysicalInputLeaseAge;

  40. static uint16_t PlsrPhysicalInputAppliedMask;

  41. static uint16_t PlsrPhysicalInputPublished[5];

  42. 

  43. void PlsrSelfTestControlTick100us(void)

  44. {

  45.     if (PlsrSelfTestDynamicEnabled == 0U)

  46.     {

  47.         return;

  48.     }

  49.     if (PlsrSelfTestDynamicTick100us != UINT32_MAX)

  50.     {

  51.         PlsrSelfTestDynamicTick100us++;

  52.     }

  53.     switch (PlsrSelfTestDynamicTick100us)

  54.     {

  55.         case 10000UL: /* 1.0s: 1000 -> 4000Hz. */

  56.             PlsrSelfTestLiveFrequencyHz = 4000;

  57.             PlsrSelfTestDynamicPhase = 1U;

  58.             break;

  59. 

  60.         case 15000UL: /* 1.5s: 4000 -> 500Hz. */

  61.             PlsrSelfTestLiveFrequencyHz = 500;

  62.             PlsrSelfTestDynamicPhase = 2U;

  63.             break;

  64. 

  65.         case 20000UL: /* 2.0s: zero selects the 1000Hz S2 default. */

  66.             PlsrSelfTestLiveFrequencyHz = 0;

  67.             PlsrSelfTestDynamicPhase = 3U;

  68.             break;

  69. 

  70.         case 22000UL: /* 2.2s: 8000 is clamped to the 5000Hz maximum. */

  71.             PlsrSelfTestLiveFrequencyHz = 8000;

  72.             PlsrSelfTestDynamicPhase = 4U;

  73.             break;

  74. 

  75.         case 27000UL: /* 2.7s: invalid value must retain the safe target. */

  76.             PlsrSelfTestLiveFrequencyHz = -1;

  77.             PlsrSelfTestDynamicPhase = 5U;

  78.             break;

  79. 

  80.         case 29000UL: /* 2.9s: recover and hold 2000Hz. */

  81.             PlsrSelfTestLiveFrequencyHz = 2000;

  82.             PlsrSelfTestDynamicPhase = 6U;

  83.             PlsrSelfTestDynamicEnabled = 0U;

  84.             break;

  85. 

  86.         default:

  87.             break;

  88.     }

  89. }

  90. 

  91. static uint8_t SelfTestValidateWords(void *context,

  92.                                      PLSR_DEVICE_TYPE device,

  93.                                      uint32_t firstAddress,

  94.                                      uint32_t wordCount)

  95. {

  96.     (void)context;

  97.     if ((device > PLSR_DEVICE_FD) || (wordCount == 0UL))

  98.     {

  99.         return 0U;

  100.     }

  101.     return (((uint64_t)firstAddress + wordCount)

  102.             <= SELF_TEST_WORD_CAPACITY)

  103.                ? 1U

  104.                : 0U;

  105. }

  106. 

  107. static uint8_t SelfTestReadWord(void *context,

  108.                                 PLSR_DEVICE_TYPE device,

  109.                                 uint32_t address,

  110.                                 uint16_t *value)

  111. {

  112.     (void)context;

  113.     if ((device > PLSR_DEVICE_FD) || (value == NULL)

  114.         || (address >= SELF_TEST_WORD_CAPACITY))

  115.     {

  116.         return 0U;

  117.     }

  118.     *value = SelfTestWords[device][address];

  119.     return 1U;

  120. }

  121. 

  122. static uint8_t SelfTestReadDwordLive(void *context,

  123.                                      PLSR_DEVICE_TYPE device,

  124.                                      uint32_t address,

  125.                                      int32_t *value)

  126. {

  127.     uint16_t lowWord;

  128.     uint16_t highWord;

  129. 

  130.     if (value == NULL)

  131.     {

  132.         return 0U;

  133.     }

  134.     if ((device == PLSR_DEVICE_D)

  135.         && (address == SELF_TEST_S0_BASE + 10UL))

  136.     {

  137.         /* Aligned Cortex-M4 dword load: atomic source for the TIM6 ISR. */

  138.         *value = PlsrSelfTestLiveFrequencyHz;

  139.         return 1U;

  140.     }

  141.     if ((SelfTestReadWord(context, device, address, &lowWord) == 0U)

  142.         || (SelfTestReadWord(context,

  143.                              device,

  144.                              address + 1UL,

  145.                              &highWord) == 0U))

  146.     {

  147.         return 0U;

  148.     }

  149.     *value = (int32_t)(((uint32_t)highWord << 16U) | lowWord);

  150.     return 1U;

  151. }

  152. 

  153. static uint8_t SelfTestReadBit(void *context,

  154.                                PLSR_DEVICE_TYPE device,

  155.                                uint32_t address,

  156.                                uint8_t *value)

  157. {

  158.     (void)context;

  159.     (void)device;

  160.     (void)address;

  161.     *value = 0U;

  162.     return 1U;

  163. }

  164. 

  165. static void SelfTestWriteDword(PLSR_DEVICE_TYPE device,

  166.                                uint32_t address,

  167.                                uint32_t value)

  168. {

  169.     SelfTestWords[device][address] = (uint16_t)(value & 0xFFFFUL);

  170.     SelfTestWords[device][address + 1UL] = (uint16_t)(value >> 16U);

  171. }

  172. 

  173. static void SelfTestWriteSfdDword(uint16_t address, uint32_t value)

  174. {

  175.     (void)PlcDeviceWriteSfd(address, (uint16_t)(value & 0xFFFFUL));

  176.     (void)PlcDeviceWriteSfd((uint16_t)(address + 1U),

  177.                             (uint16_t)(value >> 16U));

  178. }

  179. 

  180. PLSR_RESULT PlsrSelfTestQueue(void)

  181. {

  182.     PLSR_CALL call;

  183. 

  184.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  185. 

  186.     /* 方向端子 Y4（PULSE/DIR 模式必需，接线参数）。 */

  187.     (void)PlcDeviceWriteSfd(906U, SELF_TEST_DIR_POINT);

  188.     (void)PlcDeviceWriteSfd(912U, 0U);

  189.     (void)PlcDeviceWriteSfd(915U, 0xFFFFU);

  190. 

  191.     /* S0：3 段，H00 完成，顺序跳转。 */

  192.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE, 3U);

  193.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 10U, 2000UL);

  194.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 12U, 1000UL);

  195.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 20U, 5000UL);

  196.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 22U, 6000UL);

  197.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 30U, 1000UL);

  198.     SelfTestWriteDword(PLSR_DEVICE_D,

  199.                        SELF_TEST_S0_BASE + 32U,

  200.                        (uint32_t)(int32_t)-500);

  201. 

  202.     /* S1：相对模式，起始段 0（=段1）。 */

  203.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S1_BASE, 0U);

  204. 

  205.     (void)memset(&call, 0, sizeof(call));

  206.     call.sequence = 0xA5A5UL;

  207.     call.source.context = NULL;

  208.     call.source.validateWords = SelfTestValidateWords;

  209.     call.source.readWord = SelfTestReadWord;

  210.     call.source.readBit = SelfTestReadBit;

  211.     call.s0.device = PLSR_DEVICE_D;

  212.     call.s0.address = SELF_TEST_S0_BASE;

  213.     call.s1.device = PLSR_DEVICE_D;

  214.     call.s1.address = SELF_TEST_S1_BASE;

  215.     call.s2.type = PLSR_OPERAND_CONSTANT;

  216.     call.s2.constant = 1;

  217.     call.dAxis = 0U;

  218.     call.outputModeOverride = PLSR_OUTPUT_AB;

  219.     return PlsrPostCall(&call);

  220. }

  221. 

  222. PLSR_RESULT PlsrEquivalentSelfTestQueue(void)

  223. {

  224.     PLSR_CALL call;

  225. 

  226.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  227. 

  228.     /* SFD900 Bit10~8=001（1um当量）；3脉冲/2单位。 */

  229.     (void)PlcDeviceWriteSfd(900U, (1U << 8U));

  230.     SelfTestWriteSfdDword(902U, 3UL);

  231.     SelfTestWriteSfdDword(904U, 2UL);

  232.     (void)PlcDeviceWriteSfd(906U, SELF_TEST_DIR_POINT);

  233.     (void)PlcDeviceWriteSfd(907U, 10U);

  234.     (void)PlcDeviceWriteSfd(912U, 0U);

  235.     (void)PlcDeviceWriteSfd(915U, 0xFFFFU);

  236.     /* 当量换算后物理最高速度=90000Hz，不超过硬件100kHz。 */

  237.     SelfTestWriteSfdDword(956U, 60000UL);

  238. 

  239.     /* 板端可观察版本：两段各1001工程单位。

  240.      * 3脉冲/2单位带余数换算后分别输出1501、1502脉冲，累计3003脉冲；

  241.      * 1500Hz附近持续约2s，避免原3脉冲自检在逻辑分析仪启动前已经结束。 */

  242.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE, 2U);

  243.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 10U, 1000UL);

  244.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 12U, 1001UL);

  245.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 20U, 1000UL);

  246.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE + 22U, 1001UL);

  247.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S1_BASE, 0U);

  248. 

  249.     (void)memset(&call, 0, sizeof(call));

  250.     call.sequence = 0xA5A6UL;

  251.     call.source.context = NULL;

  252.     call.source.validateWords = SelfTestValidateWords;

  253.     call.source.readWord = SelfTestReadWord;

  254.     call.source.readBit = SelfTestReadBit;

  255.     call.s0.device = PLSR_DEVICE_D;

  256.     call.s0.address = SELF_TEST_S0_BASE;

  257.     call.s1.device = PLSR_DEVICE_D;

  258.     call.s1.address = SELF_TEST_S1_BASE;

  259.     call.s2.type = PLSR_OPERAND_CONSTANT;

  260.     call.s2.constant = 1;

  261.     call.dAxis = 0U;

  262.     call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  263.     return PlsrPostCall(&call);

  264. }

  265. 

  266. PLSR_RESULT PlsrProtectionSelfTestQueue(void)

  267. {

  268.     PLSR_CALL call;

  269.     PLSR_COMMAND command;

  270.     PLSR_RESULT result;

  271. 

  272.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  273. 

  274.     /* Pulse unit, soft limits enabled, 1 pulse per position unit. */

  275.     (void)PlcDeviceWriteSfd(900U, (1U << 2U));

  276.     SelfTestWriteSfdDword(902U, 1UL);

  277.     SelfTestWriteSfdDword(904U, 1UL);

  278.     (void)PlcDeviceWriteSfd(906U, SELF_TEST_DIR_POINT);

  279.     (void)PlcDeviceWriteSfd(907U, 10U);

  280.     (void)PlcDeviceWriteSfd(912U, 0U);

  281.     (void)PlcDeviceWriteSfd(915U, 0xFFFFU);

  282.     SelfTestWriteSfdDword(930U, 500UL);

  283.     SelfTestWriteSfdDword(932U, (uint32_t)(int32_t)-500);

  284. 

  285.     /* K1: 1000Hz, 100ms acceleration/deceleration, 1ms refresh. */

  286.     SelfTestWriteSfdDword(950U, 1000UL);

  287.     (void)PlcDeviceWriteSfd(952U, 100U);

  288.     (void)PlcDeviceWriteSfd(953U, 100U);

  289.     (void)PlcDeviceWriteSfd(954U, 0U);

  290.     (void)PlcDeviceWriteSfd(955U, 0U);

  291.     SelfTestWriteSfdDword(956U, 100000UL);

  292.     SelfTestWriteSfdDword(958U, 1000UL);

  293.     SelfTestWriteSfdDword(960U, 0UL);

  294.     (void)PlcDeviceWriteSfd(962U, 50U);

  295.     (void)PlcDeviceWriteSfd(963U, 0U);

  296.     (void)PlcDeviceWriteSfd(964U, 0U);

  297.     SelfTestWriteSfdDword(966U, 2000UL);

  298.     SelfTestWriteSfdDword(968U, 200UL);

  299. 

  300.     /* One relative segment requests +10000 pulses; +500 must stop it. */

  301.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE, 1U);

  302.     SelfTestWriteDword(PLSR_DEVICE_D,

  303.                        SELF_TEST_S0_BASE + 10U,

  304.                        1000UL);

  305.     SelfTestWriteDword(PLSR_DEVICE_D,

  306.                        SELF_TEST_S0_BASE + 12U,

  307.                        10000UL);

  308.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S1_BASE, 0U);

  309. 

  310.     (void)memset(&command, 0, sizeof(command));

  311.     command.sequence = 0xA5A7UL;

  312.     command.axis = 0U;

  313.     command.opcode = PLSR_CMD_SET_POSITION;

  314.     command.argument = 0;

  315.     result = PlsrPostCommand(&command);

  316.     if (result != PLSR_RESULT_QUEUED)

  317.     {

  318.         return result;

  319.     }

  320. 

  321.     (void)memset(&call, 0, sizeof(call));

  322.     call.sequence = 0xA5A8UL;

  323.     call.source.context = NULL;

  324.     call.source.validateWords = SelfTestValidateWords;

  325.     call.source.readWord = SelfTestReadWord;

  326.     call.source.readBit = SelfTestReadBit;

  327.     call.s0.device = PLSR_DEVICE_D;

  328.     call.s0.address = SELF_TEST_S0_BASE;

  329.     call.s1.device = PLSR_DEVICE_D;

  330.     call.s1.address = SELF_TEST_S1_BASE;

  331.     call.s2.type = PLSR_OPERAND_CONSTANT;

  332.     call.s2.constant = 1;

  333.     call.dAxis = 0U;

  334.     call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  335.     return PlsrPostCall(&call);

  336. }

  337. 

  338. PLSR_RESULT PlsrFourAxisSelfTestQueue(void)

  339. {

  340.     static const uint16_t s0Base[PLSR_AXIS_COUNT] =

  341.     {

  342.         10U, 40U, 70U, 100U

  343.     };

  344.     static const uint16_t s1Base[PLSR_AXIS_COUNT] =

  345.     {

  346.         160U, 164U, 168U, 172U

  347.     };

  348.     static const uint32_t frequencyHz[PLSR_AXIS_COUNT] =

  349.     {

  350.         1000UL, 2000UL, 3000UL, 4000UL

  351.     };

  352.     static const int32_t pulseCount[PLSR_AXIS_COUNT] =

  353.     {

  354.         1000, 2000, 3000, 4000

  355.     };

  356.     PLSR_CALL call;

  357.     PLSR_COMMAND command;

  358.     PLSR_RESULT result;

  359.     uint16_t commonBase;

  360.     uint16_t setBase;

  361.     uint8_t axis;

  362. 

  363.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  364. 

  365.     for (axis = 0U; axis < PLSR_AXIS_COUNT; axis++)

  366.     {

  367.         commonBase = (uint16_t)(900U

  368.                                 + (uint16_t)axis

  369.                                       * SELF_TEST_SFD_AXIS_STRIDE);

  370.         setBase = (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  371. 

  372.         /* Pulse unit, PULSE/DIR, no limit input, Q4..Q7 as DIR. */

  373.         (void)PlcDeviceWriteSfd(commonBase, 0U);

  374.         SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  375.         SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  376.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U),

  377.                                 (uint16_t)(SELF_TEST_DIR_POINT + axis));

  378.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 10U);

  379.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  380.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  381. 

  382.         /* K1 has no ramp so all four channels keep an exact fixed rate. */

  383.         SelfTestWriteSfdDword(setBase, frequencyHz[axis]);

  384.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 0U);

  385.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 0U);

  386.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  387.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  388.         SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 100000UL);

  389.         SelfTestWriteSfdDword((uint16_t)(setBase + 8U),

  390.                               frequencyHz[axis]);

  391.         SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 0UL);

  392.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  393.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  394.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U), 0U);

  395.         SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  396.         SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  397. 

  398.         SelfTestWriteDword(PLSR_DEVICE_D, s0Base[axis], 1U);

  399.         SelfTestWriteDword(PLSR_DEVICE_D,

  400.                            (uint32_t)s0Base[axis] + 10UL,

  401.                            frequencyHz[axis]);

  402.         SelfTestWriteDword(PLSR_DEVICE_D,

  403.                            (uint32_t)s0Base[axis] + 12UL,

  404.                            (uint32_t)pulseCount[axis]);

  405.         SelfTestWriteDword(PLSR_DEVICE_D, s1Base[axis], 0U);

  406. 

  407.         /* Make the board-test result independent of a previously restored

  408.          * Backup SRAM position. */

  409.         (void)memset(&command, 0, sizeof(command));

  410.         command.sequence = 0xA500UL + axis;

  411.         command.axis = axis;

  412.         command.opcode = PLSR_CMD_SET_POSITION;

  413.         command.argument = 0;

  414.         result = PlsrPostCommand(&command);

  415.         if (result != PLSR_RESULT_QUEUED)

  416.         {

  417.             return result;

  418.         }

  419. 

  420.         (void)memset(&call, 0, sizeof(call));

  421.         call.sequence = 0xA600UL + axis;

  422.         call.source.context = NULL;

  423.         call.source.validateWords = SelfTestValidateWords;

  424.         call.source.readWord = SelfTestReadWord;

  425.         call.source.readBit = SelfTestReadBit;

  426.         call.s0.device = PLSR_DEVICE_D;

  427.         call.s0.address = s0Base[axis];

  428.         call.s1.device = PLSR_DEVICE_D;

  429.         call.s1.address = s1Base[axis];

  430.         call.s2.type = PLSR_OPERAND_CONSTANT;

  431.         call.s2.constant = 1;

  432.         call.dAxis = axis;

  433.         call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  434.         result = PlsrPostCall(&call);

  435.         if (result != PLSR_RESULT_QUEUED)

  436.         {

  437.             return result;

  438.         }

  439.     }

  440.     return PLSR_RESULT_QUEUED;

  441. }

  442. 

  443. PLSR_RESULT PlsrBacklashSelfTestQueue(void)

  444. {

  445.     PLSR_CALL call;

  446.     PLSR_COMMAND command;

  447.     PLSR_RESULT result;

  448. 

  449.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  450. 

  451.     /* Pulse unit, Q4 direction, +10/-20 pulse backlash. */

  452.     (void)PlcDeviceWriteSfd(900U, 0U);

  453.     SelfTestWriteSfdDword(902U, 1UL);

  454.     SelfTestWriteSfdDword(904U, 1UL);

  455.     (void)PlcDeviceWriteSfd(906U, SELF_TEST_DIR_POINT);

  456.     (void)PlcDeviceWriteSfd(907U, 10U);

  457.     (void)PlcDeviceWriteSfd(908U, 10U);

  458.     (void)PlcDeviceWriteSfd(909U, 20U);

  459.     (void)PlcDeviceWriteSfd(912U, 0U);

  460.     (void)PlcDeviceWriteSfd(915U, 0xFFFFU);

  461. 

  462.     /* K1 user segments are fixed 1kHz.  Backlash blocks use a 20ms

  463.      * acceleration/deceleration parameter. */

  464.     SelfTestWriteSfdDword(950U, 1000UL);

  465.     (void)PlcDeviceWriteSfd(952U, 0U);

  466.     (void)PlcDeviceWriteSfd(953U, 0U);

  467.     (void)PlcDeviceWriteSfd(954U, 20U);

  468.     (void)PlcDeviceWriteSfd(955U, 0U);

  469.     SelfTestWriteSfdDword(956U, 100000UL);

  470.     SelfTestWriteSfdDword(958U, 1000UL);

  471.     SelfTestWriteSfdDword(960U, 0UL);

  472.     (void)PlcDeviceWriteSfd(962U, 50U);

  473.     (void)PlcDeviceWriteSfd(963U, 0U);

  474.     (void)PlcDeviceWriteSfd(964U, 0U);

  475.     SelfTestWriteSfdDword(966U, 2000UL);

  476.     SelfTestWriteSfdDword(968U, 200UL);

  477. 

  478.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE, 3U);

  479.     SelfTestWriteDword(PLSR_DEVICE_D,

  480.                        SELF_TEST_S0_BASE + 10U,

  481.                        1000UL);

  482.     SelfTestWriteDword(PLSR_DEVICE_D,

  483.                        SELF_TEST_S0_BASE + 12U,

  484.                        200UL);

  485.     SelfTestWriteDword(PLSR_DEVICE_D,

  486.                        SELF_TEST_S0_BASE + 20U,

  487.                        1000UL);

  488.     SelfTestWriteDword(PLSR_DEVICE_D,

  489.                        SELF_TEST_S0_BASE + 22U,

  490.                        (uint32_t)(int32_t)-200);

  491.     SelfTestWriteDword(PLSR_DEVICE_D,

  492.                        SELF_TEST_S0_BASE + 30U,

  493.                        1000UL);

  494.     SelfTestWriteDword(PLSR_DEVICE_D,

  495.                        SELF_TEST_S0_BASE + 32U,

  496.                        100UL);

  497.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S1_BASE, 0U);

  498. 

  499.     (void)memset(&command, 0, sizeof(command));

  500.     command.sequence = 0xA700UL;

  501.     command.axis = 0U;

  502.     command.opcode = PLSR_CMD_SET_POSITION;

  503.     command.argument = 0;

  504.     result = PlsrPostCommand(&command);

  505.     if (result != PLSR_RESULT_QUEUED)

  506.     {

  507.         return result;

  508.     }

  509. 

  510.     (void)memset(&call, 0, sizeof(call));

  511.     call.sequence = 0xA701UL;

  512.     call.source.context = NULL;

  513.     call.source.validateWords = SelfTestValidateWords;

  514.     call.source.readWord = SelfTestReadWord;

  515.     call.source.readBit = SelfTestReadBit;

  516.     call.s0.device = PLSR_DEVICE_D;

  517.     call.s0.address = SELF_TEST_S0_BASE;

  518.     call.s1.device = PLSR_DEVICE_D;

  519.     call.s1.address = SELF_TEST_S1_BASE;

  520.     call.s2.type = PLSR_OPERAND_CONSTANT;

  521.     call.s2.constant = 1;

  522.     call.dAxis = 0U;

  523.     call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  524.     return PlsrPostCall(&call);

  525. }

  526. 

  527. PLSR_RESULT PlsrDirectionLogicSelfTestQueue(void)

  528. {

  529.     static const uint16_t s0Base[2] = {10U, 40U};

  530.     static const uint16_t s1Base[2] = {160U, 164U};

  531.     static const uint8_t directionPoint[2] = {4U, 3U};

  532.     PLSR_CALL call;

  533.     PLSR_COMMAND command;

  534.     PLSR_RESULT result;

  535.     uint16_t commonBase;

  536.     uint16_t setBase;

  537.     uint8_t axis;

  538. 

  539.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  540. 

  541.     for (axis = 0U; axis < 2U; axis++)

  542.     {

  543.         commonBase = (uint16_t)(900U

  544.                                 + (uint16_t)axis

  545.                                       * SELF_TEST_SFD_AXIS_STRIDE);

  546.         setBase = (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  547. 

  548.         /* Axis 0 uses positive logic; axis 1 uses negative logic. */

  549.         (void)PlcDeviceWriteSfd(commonBase,

  550.                                 (axis == 0U) ? 0U : (1U << 1U));

  551.         SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  552.         SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  553.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U),

  554.                                 directionPoint[axis]);

  555.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 10U);

  556.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  557.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  558.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  559.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  560. 

  561.         SelfTestWriteSfdDword(setBase, 1000UL);

  562.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 0U);

  563.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 0U);

  564.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  565.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  566.         SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 100000UL);

  567.         SelfTestWriteSfdDword((uint16_t)(setBase + 8U), 1000UL);

  568.         SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 0UL);

  569.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  570.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  571.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U), 0U);

  572.         SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  573.         SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  574. 

  575.         SelfTestWriteDword(PLSR_DEVICE_D, s0Base[axis], 2U);

  576.         SelfTestWriteDword(PLSR_DEVICE_D,

  577.                            (uint32_t)s0Base[axis] + 10UL,

  578.                            1000UL);

  579.         SelfTestWriteDword(PLSR_DEVICE_D,

  580.                            (uint32_t)s0Base[axis] + 12UL,

  581.                            200UL);

  582.         SelfTestWriteDword(PLSR_DEVICE_D,

  583.                            (uint32_t)s0Base[axis] + 20UL,

  584.                            1000UL);

  585.         SelfTestWriteDword(PLSR_DEVICE_D,

  586.                            (uint32_t)s0Base[axis] + 22UL,

  587.                            (uint32_t)(int32_t)-200);

  588.         SelfTestWriteDword(PLSR_DEVICE_D, s1Base[axis], 0U);

  589. 

  590.         (void)memset(&command, 0, sizeof(command));

  591.         command.sequence = 0xA800UL + axis;

  592.         command.axis = axis;

  593.         command.opcode = PLSR_CMD_SET_POSITION;

  594.         command.argument = 0;

  595.         result = PlsrPostCommand(&command);

  596.         if (result != PLSR_RESULT_QUEUED)

  597.         {

  598.             return result;

  599.         }

  600. 

  601.         (void)memset(&call, 0, sizeof(call));

  602.         call.sequence = 0xA810UL + axis;

  603.         call.source.context = NULL;

  604.         call.source.validateWords = SelfTestValidateWords;

  605.         call.source.readWord = SelfTestReadWord;

  606.         call.source.readBit = SelfTestReadBit;

  607.         call.s0.device = PLSR_DEVICE_D;

  608.         call.s0.address = s0Base[axis];

  609.         call.s1.device = PLSR_DEVICE_D;

  610.         call.s1.address = s1Base[axis];

  611.         call.s2.type = PLSR_OPERAND_CONSTANT;

  612.         call.s2.constant = 1;

  613.         call.dAxis = axis;

  614.         call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  615.         result = PlsrPostCall(&call);

  616.         if (result != PLSR_RESULT_QUEUED)

  617.         {

  618.             return result;

  619.         }

  620.     }

  621.     return PLSR_RESULT_QUEUED;

  622. }

  623. 

  624. PLSR_RESULT PlsrCwCcwSelfTestQueue(void)

  625. {

  626.     const uint16_t commonBase = 900U;

  627.     const uint16_t setBase =

  628.         (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  629.     PLSR_CALL call;

  630.     PLSR_COMMAND command;

  631.     PLSR_RESULT result;

  632. 

  633.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  634.     (void)PlcDeviceWriteSfd(commonBase, 0U);

  635.     SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  636.     SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  637.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U),

  638.                             SELF_TEST_DIR_POINT);

  639.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 10U);

  640.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  641.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  642.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  643.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  644. 

  645.     SelfTestWriteSfdDword(setBase, 2000UL);

  646.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 0U);

  647.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 0U);

  648.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  649.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  650.     SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 100000UL);

  651.     SelfTestWriteSfdDword((uint16_t)(setBase + 8U), 1000UL);

  652.     SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 0UL);

  653.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  654.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  655.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U), 0U);

  656.     SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  657.     SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  658. 

  659.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE, 2U);

  660.     SelfTestWriteDword(PLSR_DEVICE_D,

  661.                        SELF_TEST_S0_BASE + 10UL,

  662.                        2000UL);

  663.     SelfTestWriteDword(PLSR_DEVICE_D,

  664.                        SELF_TEST_S0_BASE + 12UL,

  665.                        300UL);

  666.     SelfTestWriteDword(PLSR_DEVICE_D,

  667.                        SELF_TEST_S0_BASE + 20UL,

  668.                        1000UL);

  669.     SelfTestWriteDword(PLSR_DEVICE_D,

  670.                        SELF_TEST_S0_BASE + 22UL,

  671.                        (uint32_t)(int32_t)-200);

  672.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S1_BASE, 0U);

  673. 

  674.     (void)memset(&command, 0, sizeof(command));

  675.     command.sequence = 0xA900UL;

  676.     command.axis = 0U;

  677.     command.opcode = PLSR_CMD_SET_POSITION;

  678.     result = PlsrPostCommand(&command);

  679.     if (result != PLSR_RESULT_QUEUED)

  680.     {

  681.         return result;

  682.     }

  683. 

  684.     (void)memset(&call, 0, sizeof(call));

  685.     call.sequence = 0xA901UL;

  686.     call.source.context = NULL;

  687.     call.source.validateWords = SelfTestValidateWords;

  688.     call.source.readWord = SelfTestReadWord;

  689.     call.source.readBit = SelfTestReadBit;

  690.     call.s0.device = PLSR_DEVICE_D;

  691.     call.s0.address = SELF_TEST_S0_BASE;

  692.     call.s1.device = PLSR_DEVICE_D;

  693.     call.s1.address = SELF_TEST_S1_BASE;

  694.     call.s2.type = PLSR_OPERAND_CONSTANT;

  695.     call.s2.constant = 1;

  696.     call.dAxis = 0U;

  697.     call.outputModeOverride = PLSR_OUTPUT_CW_CCW;

  698.     return PlsrPostCall(&call);

  699. }

  700. 

  701. PLSR_RESULT PlsrFastRefreshSelfTestQueue(void)

  702. {

  703.     static const uint16_t s0Base[2] = {10U, 40U};

  704.     static const uint16_t s1Base[2] = {160U, 164U};

  705.     static const uint8_t directionPoint[2] = {4U, 3U};

  706.     PLSR_CALL call;

  707.     PLSR_COMMAND command;

  708.     PLSR_RESULT result;

  709.     uint16_t commonBase;

  710.     uint16_t setBase;

  711.     uint8_t axis;

  712. 

  713.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  714.     for (axis = 0U; axis < 2U; axis++)

  715.     {

  716.         commonBase = (uint16_t)(900U

  717.                                 + (uint16_t)axis

  718.                                       * SELF_TEST_SFD_AXIS_STRIDE);

  719.         setBase = (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  720.         (void)PlcDeviceWriteSfd(commonBase, 0U);

  721.         SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  722.         SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  723.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U),

  724.                                 directionPoint[axis]);

  725.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 10U);

  726.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  727.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  728.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  729.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  730. 

  731.         SelfTestWriteSfdDword(setBase, 5000UL);

  732.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 100U);

  733.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 100U);

  734.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  735.         /* Linear curve keeps the 1ms/0.1ms update granularity visible. */

  736.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  737.         SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 100000UL);

  738.         SelfTestWriteSfdDword((uint16_t)(setBase + 8U), 100UL);

  739.         SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 100UL);

  740.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  741.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  742.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U),

  743.                                 (axis == 0U) ? 0U : 2U);

  744.         SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  745.         SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  746. 

  747.         SelfTestWriteDword(PLSR_DEVICE_D, s0Base[axis], 1U);

  748.         SelfTestWriteDword(PLSR_DEVICE_D,

  749.                            (uint32_t)s0Base[axis] + 10UL,

  750.                            5000UL);

  751.         SelfTestWriteDword(PLSR_DEVICE_D,

  752.                            (uint32_t)s0Base[axis] + 12UL,

  753.                            2000UL);

  754.         SelfTestWriteDword(PLSR_DEVICE_D, s1Base[axis], 0U);

  755. 

  756.         (void)memset(&command, 0, sizeof(command));

  757.         command.sequence = 0xAA00UL + axis;

  758.         command.axis = axis;

  759.         command.opcode = PLSR_CMD_SET_POSITION;

  760.         result = PlsrPostCommand(&command);

  761.         if (result != PLSR_RESULT_QUEUED)

  762.         {

  763.             return result;

  764.         }

  765. 

  766.         (void)memset(&call, 0, sizeof(call));

  767.         call.sequence = 0xAA10UL + axis;

  768.         call.source.context = NULL;

  769.         call.source.validateWords = SelfTestValidateWords;

  770.         call.source.readWord = SelfTestReadWord;

  771.         call.source.readBit = SelfTestReadBit;

  772.         call.s0.device = PLSR_DEVICE_D;

  773.         call.s0.address = s0Base[axis];

  774.         call.s1.device = PLSR_DEVICE_D;

  775.         call.s1.address = s1Base[axis];

  776.         call.s2.type = PLSR_OPERAND_CONSTANT;

  777.         call.s2.constant = 1;

  778.         call.dAxis = axis;

  779.         call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  780.         result = PlsrPostCall(&call);

  781.         if (result != PLSR_RESULT_QUEUED)

  782.         {

  783.             return result;

  784.         }

  785.     }

  786.     return PLSR_RESULT_QUEUED;

  787. }

  788. 

  789. PLSR_RESULT PlsrDynamicFrequencySelfTestQueue(void)

  790. {

  791.     const uint16_t commonBase = 900U;

  792.     const uint16_t setBase =

  793.         (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  794.     PLSR_CALL call;

  795.     PLSR_COMMAND command;

  796.     PLSR_RESULT result;

  797. 

  798.     (void)memset(SelfTestWords, 0, sizeof(SelfTestWords));

  799.     PlsrSelfTestLiveFrequencyHz = 1000;

  800.     PlsrSelfTestDynamicTick100us = 0UL;

  801.     PlsrSelfTestDynamicPhase = 0U;

  802.     PlsrSelfTestDynamicEnabled = 1U;

  803.     PlsrSetControlTickHook(PlsrSelfTestControlTick100us);

  804.     (void)PlcDeviceWriteSfd(commonBase, 0U);

  805.     SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  806.     SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  807.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U), 4U);

  808.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 10U);

  809.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  810.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  811.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  812.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  813. 

  814.     /* 1000Hz default, 5000Hz maximum, 10Hz/ms slope, 0.1ms refresh. */

  815.     SelfTestWriteSfdDword(setBase, 1000UL);

  816.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 100U);

  817.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 100U);

  818.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  819.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  820.     SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 5000UL);

  821.     SelfTestWriteSfdDword((uint16_t)(setBase + 8U), 1000UL);

  822.     SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 0UL);

  823.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  824.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  825.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U), 2U);

  826.     SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  827.     SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  828. 

  829.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S0_BASE, 1U);

  830.     SelfTestWriteDword(PLSR_DEVICE_D,

  831.                        SELF_TEST_S0_BASE + 10UL,

  832.                        1000UL);

  833.     SelfTestWriteDword(PLSR_DEVICE_D,

  834.                        SELF_TEST_S0_BASE + 12UL,

  835.                        100000UL);

  836.     SelfTestWriteDword(PLSR_DEVICE_D, SELF_TEST_S1_BASE, 0U);

  837. 

  838.     (void)memset(&command, 0, sizeof(command));

  839.     command.sequence = 0xAB00UL;

  840.     command.axis = 0U;

  841.     command.opcode = PLSR_CMD_SET_POSITION;

  842.     result = PlsrPostCommand(&command);

  843.     if (result != PLSR_RESULT_QUEUED)

  844.     {

  845.         return result;

  846.     }

  847. 

  848.     (void)memset(&call, 0, sizeof(call));

  849.     call.sequence = 0xAB01UL;

  850.     call.source.context = NULL;

  851.     call.source.validateWords = SelfTestValidateWords;

  852.     call.source.readWord = SelfTestReadWord;

  853.     call.source.readDword = SelfTestReadDwordLive;

  854.     call.source.readBit = SelfTestReadBit;

  855.     call.s0.device = PLSR_DEVICE_D;

  856.     call.s0.address = SELF_TEST_S0_BASE;

  857.     call.s1.device = PLSR_DEVICE_D;

  858.     call.s1.address = SELF_TEST_S1_BASE;

  859.     call.s2.type = PLSR_OPERAND_CONSTANT;

  860.     call.s2.constant = 1;

  861.     call.dAxis = 0U;

  862.     call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  863.     return PlsrPostCall(&call);

  864. }

  865. 

  866. PLSR_RESULT PlsrModbusDataSelfTestQueue(void)

  867. {

  868.     const uint16_t commonBase = 900U;

  869.     const uint16_t setBase =

  870.         (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  871.     uint16_t s0Words[20] = {0U};

  872.     uint16_t s1Words[4] = {0U};

  873.     PLSR_CALL call;

  874.     PLSR_COMMAND command;

  875.     PLSR_RESULT result;

  876. 

  877.     /* P12 uses D1000 as S0 and D1100 as S1.  D1010/D1011 is the live

  878.      * current-segment frequency written atomically by Modbus function 0x10. */

  879.     s0Words[0] = 1U;

  880.     s0Words[10] = 1000U;

  881.     s0Words[11] = 0U;

  882.     s0Words[12] = (uint16_t)(100000UL & 0xFFFFUL);

  883.     s0Words[13] = (uint16_t)(100000UL >> 16U);

  884.     if ((ModbusDataWriteWords(MODBUS_DATA_DEVICE_D,

  885.                               SELF_TEST_MODBUS_S0_BASE,

  886.                               s0Words,

  887.                               20UL) == 0U)

  888.         || (ModbusDataWriteWords(MODBUS_DATA_DEVICE_D,

  889.                                  SELF_TEST_MODBUS_S1_BASE,

  890.                                  s1Words,

  891.                                  4UL) == 0U))

  892.     {

  893.         return PLSR_RESULT_DATA_ACCESS;

  894.     }

  895. 

  896.     (void)PlcDeviceWriteSfd(commonBase, 0U);

  897.     SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  898.     SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  899.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U), 4U);

  900.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 10U);

  901.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  902.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  903.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  904.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  905. 

  906.     /* Same limits as P11: 1000Hz default, 5000Hz maximum, 10Hz/ms ramp,

  907.      * and a 0.1ms live-frequency refresh. */

  908.     SelfTestWriteSfdDword(setBase, 1000UL);

  909.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 100U);

  910.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 100U);

  911.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  912.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  913.     SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 5000UL);

  914.     SelfTestWriteSfdDword((uint16_t)(setBase + 8U), 1000UL);

  915.     SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 0UL);

  916.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  917.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  918.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U), 2U);

  919.     SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  920.     SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  921. 

  922.     (void)memset(&command, 0, sizeof(command));

  923.     command.sequence = 0xAC00UL;

  924.     command.axis = 0U;

  925.     command.opcode = PLSR_CMD_SET_POSITION;

  926.     result = PlsrPostCommand(&command);

  927.     if (result != PLSR_RESULT_QUEUED)

  928.     {

  929.         return result;

  930.     }

  931. 

  932.     (void)memset(&call, 0, sizeof(call));

  933.     call.sequence = 0xAC01UL;

  934.     PlsrModbusDataSourceInit(&call.source);

  935.     call.s0.device = PLSR_DEVICE_D;

  936.     call.s0.address = SELF_TEST_MODBUS_S0_BASE;

  937.     call.s1.device = PLSR_DEVICE_D;

  938.     call.s1.address = SELF_TEST_MODBUS_S1_BASE;

  939.     call.s2.type = PLSR_OPERAND_CONSTANT;

  940.     call.s2.constant = 1;

  941.     call.dAxis = 0U;

  942.     call.outputModeOverride = PLSR_OUTPUT_PULSE_DIR;

  943.     return PlsrPostCall(&call);

  944. }

  945. 

  946. PLSR_RESULT PlsrModbusControlSelfTestPrepare(void)

  947. {

  948.     const uint16_t commonBase = 900U;

  949.     const uint16_t setBase =

  950.         (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  951. 

  952.     (void)PlcDeviceWriteSfd(commonBase, 0U);

  953.     SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  954.     SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  955.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U), 4U);

  956.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 10U);

  957.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  958.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  959.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  960.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  961. 

  962.     /* K1: 1000Hz default/start, 5000Hz maximum, 100ms ramps, 1ms refresh. */

  963.     SelfTestWriteSfdDword(setBase, 1000UL);

  964.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 100U);

  965.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 100U);

  966.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  967.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  968.     SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 5000UL);

  969.     SelfTestWriteSfdDword((uint16_t)(setBase + 8U), 1000UL);

  970.     SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 0UL);

  971.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  972.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  973.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U), 0U);

  974.     SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  975.     SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  976.     return PLSR_RESULT_OK;

  977. }

  978. 

  979. PLSR_RESULT PlsrHardwareCounterSelfTestPrepare(void)

  980. {

  981.     uint16_t commonBase;

  982.     uint16_t setBase;

  983.     uint16_t limitSetBase;

  984.     uint16_t abSetBase;

  985.     uint32_t limitFrequencyHz;

  986.     uint8_t axis;

  987. 

  988.     for (axis = 0U; axis < PLSR_AXIS_COUNT; axis++)

  989.     {

  990.         commonBase = (uint16_t)(900U

  991.                                 + (uint16_t)axis

  992.                                       * SELF_TEST_SFD_AXIS_STRIDE);

  993.         setBase = (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  994.         limitSetBase = (uint16_t)(setBase + 20U);

  995.         abSetBase = (uint16_t)(setBase + 40U);

  996. 

  997.         /* PULSE/DIR, pulse-unit soft limits, one direction point per axis. */

  998.         (void)PlcDeviceWriteSfd(commonBase, (1U << 2U));

  999.         SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  1000.         SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  1001.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U),

  1002.                                 (uint16_t)(SELF_TEST_DIR_POINT + axis));

  1003.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 0U);

  1004.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  1005.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  1006.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  1007.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  1008.         SelfTestWriteSfdDword((uint16_t)(commonBase + 30U), 1000000UL);

  1009.         SelfTestWriteSfdDword((uint16_t)(commonBase + 32U),

  1010.                               (uint32_t)(int32_t)-1000000);

  1011. 

  1012.         /* Exact 100kHz plateau.  200000-pulse S0 jobs cross the 16-bit

  1013.          * counter boundary three times while avoiding profile ramp effects. */

  1014.         SelfTestWriteSfdDword(setBase, 100000UL);

  1015.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 0U);

  1016.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 0U);

  1017.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  1018.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  1019.         SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 100000UL);

  1020.         SelfTestWriteSfdDword((uint16_t)(setBase + 8U), 100000UL);

  1021.         SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 0UL);

  1022.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  1023.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  1024.         (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U), 0U);

  1025.         SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  1026.         SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  1027. 

  1028.         /* K2: P15 limit matrix.  Even axes use 500Hz, odd axes 2000Hz;

  1029.          * start at target speed and decelerate for 100ms at a soft limit. */

  1030.         limitFrequencyHz = ((axis & 1U) == 0U) ? 500UL : 2000UL;

  1031.         SelfTestWriteSfdDword(limitSetBase, limitFrequencyHz);

  1032.         (void)PlcDeviceWriteSfd((uint16_t)(limitSetBase + 2U), 0U);

  1033.         (void)PlcDeviceWriteSfd((uint16_t)(limitSetBase + 3U), 100U);

  1034.         (void)PlcDeviceWriteSfd((uint16_t)(limitSetBase + 4U), 0U);

  1035.         (void)PlcDeviceWriteSfd((uint16_t)(limitSetBase + 5U), 0U);

  1036.         SelfTestWriteSfdDword((uint16_t)(limitSetBase + 6U),

  1037.                               limitFrequencyHz);

  1038.         SelfTestWriteSfdDword((uint16_t)(limitSetBase + 8U),

  1039.                               limitFrequencyHz);

  1040.         SelfTestWriteSfdDword((uint16_t)(limitSetBase + 10U), 0UL);

  1041.         (void)PlcDeviceWriteSfd((uint16_t)(limitSetBase + 12U), 50U);

  1042.         (void)PlcDeviceWriteSfd((uint16_t)(limitSetBase + 13U), 0U);

  1043.         (void)PlcDeviceWriteSfd((uint16_t)(limitSetBase + 14U), 0U);

  1044.         SelfTestWriteSfdDword((uint16_t)(limitSetBase + 16U), 2000UL);

  1045.         SelfTestWriteSfdDword((uint16_t)(limitSetBase + 18U), 200UL);

  1046. 

  1047.         /* K3: dual-AB 100kHz plateau.  TIM9/TIM12 count complete-cycle

  1048.          * source events so the output timers only interrupt for rephase and

  1049.          * the guarded final 00 boundary. */

  1050.         SelfTestWriteSfdDword(abSetBase, 100000UL);

  1051.         (void)PlcDeviceWriteSfd((uint16_t)(abSetBase + 2U), 0U);

  1052.         (void)PlcDeviceWriteSfd((uint16_t)(abSetBase + 3U), 0U);

  1053.         (void)PlcDeviceWriteSfd((uint16_t)(abSetBase + 4U), 0U);

  1054.         (void)PlcDeviceWriteSfd((uint16_t)(abSetBase + 5U), 0U);

  1055.         SelfTestWriteSfdDword((uint16_t)(abSetBase + 6U), 100000UL);

  1056.         SelfTestWriteSfdDword((uint16_t)(abSetBase + 8U), 100000UL);

  1057.         SelfTestWriteSfdDword((uint16_t)(abSetBase + 10U), 0UL);

  1058.         (void)PlcDeviceWriteSfd((uint16_t)(abSetBase + 12U), 50U);

  1059.         (void)PlcDeviceWriteSfd((uint16_t)(abSetBase + 13U), 0U);

  1060.         (void)PlcDeviceWriteSfd((uint16_t)(abSetBase + 14U), 0U);

  1061.         SelfTestWriteSfdDword((uint16_t)(abSetBase + 16U), 2000UL);

  1062.         SelfTestWriteSfdDword((uint16_t)(abSetBase + 18U), 200UL);

  1063.     }

  1064.     return PLSR_RESULT_OK;

  1065. }

  1066. 

  1067. PLSR_RESULT PlsrLongStressSelfTestPrepare(void)

  1068. {

  1069.     uint16_t commonBase;

  1070.     uint16_t longSetBase;

  1071.     uint8_t axis;

  1072. 

  1073.     for (axis = 0U; axis < PLSR_AXIS_COUNT; axis++)

  1074.     {

  1075.         commonBase = (uint16_t)(900U

  1076.                                 + (uint16_t)axis

  1077.                                       * SELF_TEST_SFD_AXIS_STRIDE);

  1078.         longSetBase = (uint16_t)(commonBase

  1079.                                  + SELF_TEST_SFD_SET_OFFSET

  1080.                                  + 60U); /* K4 occupies the final 20 words. */

  1081. 

  1082.         /* P18 is a bench-only PULSE/DIR endurance fixture.  Keep the proven

  1083.          * Q4..Q7 direction mapping and disable both hard-input assignments and

  1084.          * soft limits so the deliberately long positive jobs cannot stop at

  1085.          * the P14/P15 +/-1000000-pulse validation boundary. */

  1086.         (void)PlcDeviceWriteSfd(commonBase, 0U);

  1087.         SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  1088.         SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  1089.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U),

  1090.                                 (uint16_t)(SELF_TEST_DIR_POINT + axis));

  1091.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 0U);

  1092.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  1093.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  1094.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  1095.         (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0xFFFFU);

  1096.         SelfTestWriteSfdDword((uint16_t)(commonBase + 30U), 0UL);

  1097.         SelfTestWriteSfdDword((uint16_t)(commonBase + 32U), 0UL);

  1098. 

  1099.         /* K4: exact 100kHz plateau, no acceleration/deceleration ramp. */

  1100.         SelfTestWriteSfdDword(longSetBase, 100000UL);

  1101.         (void)PlcDeviceWriteSfd((uint16_t)(longSetBase + 2U), 0U);

  1102.         (void)PlcDeviceWriteSfd((uint16_t)(longSetBase + 3U), 0U);

  1103.         (void)PlcDeviceWriteSfd((uint16_t)(longSetBase + 4U), 0U);

  1104.         (void)PlcDeviceWriteSfd((uint16_t)(longSetBase + 5U), 0U);

  1105.         SelfTestWriteSfdDword((uint16_t)(longSetBase + 6U), 100000UL);

  1106.         SelfTestWriteSfdDword((uint16_t)(longSetBase + 8U), 100000UL);

  1107.         SelfTestWriteSfdDword((uint16_t)(longSetBase + 10U), 0UL);

  1108.         (void)PlcDeviceWriteSfd((uint16_t)(longSetBase + 12U), 50U);

  1109.         (void)PlcDeviceWriteSfd((uint16_t)(longSetBase + 13U), 0U);

  1110.         (void)PlcDeviceWriteSfd((uint16_t)(longSetBase + 14U), 0U);

  1111.         SelfTestWriteSfdDword((uint16_t)(longSetBase + 16U), 2000UL);

  1112.         SelfTestWriteSfdDword((uint16_t)(longSetBase + 18U), 200UL);

  1113.     }

  1114.     return PLSR_RESULT_OK;

  1115. }

  1116. 

  1117. PLSR_RESULT PlsrPhysicalInputSelfTestPrepare(void)

  1118. {

  1119.     const uint16_t commonBase = 900U;

  1120.     const uint16_t setBase =

  1121.         (uint16_t)(commonBase + SELF_TEST_SFD_SET_OFFSET);

  1122.     uint32_t mappedMask;

  1123.     uint8_t index;

  1124. 

  1125.     /* Axis 0 uses Y10 as DIR so validation outputs Y1..Y4 remain independent.

  1126.      * X0 is the positive hard limit and X1 is the negative hard limit. */

  1127.     (void)PlcDeviceWriteSfd(commonBase, 0U);

  1128.     SelfTestWriteSfdDword((uint16_t)(commonBase + 2U), 1UL);

  1129.     SelfTestWriteSfdDword((uint16_t)(commonBase + 4U), 1UL);

  1130.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 6U), 10U);

  1131.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 7U), 0U);

  1132.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 8U), 0U);

  1133.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 9U), 0U);

  1134.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 12U), 0U);

  1135.     (void)PlcDeviceWriteSfd((uint16_t)(commonBase + 15U), 0x0100U);

  1136.     SelfTestWriteSfdDword((uint16_t)(commonBase + 30U), 0UL);

  1137.     SelfTestWriteSfdDword((uint16_t)(commonBase + 32U), 0UL);

  1138. 

  1139.     /* K1: 2kHz plateau and a 50ms controlled limit stop. */

  1140.     SelfTestWriteSfdDword(setBase, 2000UL);

  1141.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 2U), 0U);

  1142.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 3U), 50U);

  1143.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 4U), 0U);

  1144.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 5U), 0U);

  1145.     SelfTestWriteSfdDword((uint16_t)(setBase + 6U), 2000UL);

  1146.     SelfTestWriteSfdDword((uint16_t)(setBase + 8U), 2000UL);

  1147.     SelfTestWriteSfdDword((uint16_t)(setBase + 10U), 0UL);

  1148.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 12U), 50U);

  1149.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 13U), 0U);

  1150.     (void)PlcDeviceWriteSfd((uint16_t)(setBase + 14U), 0U);

  1151.     SelfTestWriteSfdDword((uint16_t)(setBase + 16U), 2000UL);

  1152.     SelfTestWriteSfdDword((uint16_t)(setBase + 18U), 200UL);

  1153. 

  1154.     PlsrHwValidationOutputsOff();

  1155.     PlsrPhysicalInputLastLease = UINT16_MAX;

  1156.     PlsrPhysicalInputLeaseAge = (uint16_t)(SELF_TEST_INPUT_LEASE_TICKS + 1U);

  1157.     PlsrPhysicalInputAppliedMask = 0U;

  1158.     for (index = 0U; index < 5U; index++)

  1159.     {

  1160.         PlsrPhysicalInputPublished[index] = UINT16_MAX;

  1161.     }

  1162.     (void)ModbusDataWriteWord(MODBUS_DATA_DEVICE_D,

  1163.                               SELF_TEST_INPUT_CONTROL_BASE,

  1164.                               0U);

  1165.     (void)ModbusDataWriteWord(MODBUS_DATA_DEVICE_D,

  1166.                               SELF_TEST_INPUT_CONTROL_BASE + 1UL,

  1167.                               0U);

  1168.     mappedMask = PlsrModbusInputGetMappedMask();

  1169.     if ((mappedMask & 0x0FUL) != 0x0FUL)

  1170.     {

  1171.         return PLSR_RESULT_INVALID_RESOURCE;

  1172.     }

  1173.     return PLSR_RESULT_OK;

  1174. }

  1175. 

  1176. void PlsrPhysicalInputSelfTestPoll(void)

  1177. {

  1178.     uint16_t requestedMask = 0U;

  1179.     uint16_t leaseSequence = 0U;

  1180.     uint16_t values[5];

  1181.     uint16_t appliedMask;

  1182.     uint16_t flags = 1U;

  1183.     uint8_t point;

  1184.     uint8_t outputError = 0U;

  1185. 

  1186.     if ((ModbusDataReadWord(MODBUS_DATA_DEVICE_D,

  1187.                             SELF_TEST_INPUT_CONTROL_BASE,

  1188.                             &requestedMask) == 0U)

  1189.         || (ModbusDataReadWord(MODBUS_DATA_DEVICE_D,

  1190.                                SELF_TEST_INPUT_CONTROL_BASE + 1UL,

  1191.                                &leaseSequence) == 0U))

  1192.     {

  1193.         PlsrHwValidationOutputsOff();

  1194.         return;

  1195.     }

  1196.     if (leaseSequence != PlsrPhysicalInputLastLease)

  1197.     {

  1198.         PlsrPhysicalInputLastLease = leaseSequence;

  1199.         PlsrPhysicalInputLeaseAge = 0U;

  1200.     }

  1201.     else if (PlsrPhysicalInputLeaseAge <= SELF_TEST_INPUT_LEASE_TICKS)

  1202.     {

  1203.         PlsrPhysicalInputLeaseAge++;

  1204.     }

  1205. 

  1206.     if (PlsrPhysicalInputLeaseAge <= SELF_TEST_INPUT_LEASE_TICKS)

  1207.     {

  1208.         appliedMask = (uint16_t)(requestedMask & 0x000FU);

  1209.         flags |= (1U << 1U);

  1210.     }

  1211.     else

  1212.     {

  1213.         appliedMask = 0U;

  1214.         flags |= (1U << 2U);

  1215.     }

  1216.     for (point = 0U; point < 4U; point++)

  1217.     {

  1218.         if (PlsrHwSetValidationOutput(

  1219.                 (uint8_t)(point + 1U),

  1220.                 (uint8_t)((appliedMask >> point) & 1U))

  1221.             != PLSR_RESULT_OK)

  1222.         {

  1223.             outputError = 1U;

  1224.         }

  1225.     }

  1226.     if (outputError != 0U)

  1227.     {

  1228.         appliedMask = 0U;

  1229.         flags |= (1U << 3U);

  1230.         PlsrHwValidationOutputsOff();

  1231.     }

  1232.     if ((PlsrModbusInputGetMappedMask() & 0x0FUL) == 0x0FUL)

  1233.     {

  1234.         flags |= (1U << 4U);

  1235.     }

  1236.     PlsrPhysicalInputAppliedMask = appliedMask;

  1237.     values[0] = PlsrPhysicalInputAppliedMask;

  1238.     values[1] = (uint16_t)PlsrModbusInputGetRawMask();

  1239.     values[2] = (uint16_t)PlsrModbusInputGetLogicalMask();

  1240.     values[3] = SELF_TEST_INPUT_SIGNATURE;

  1241.     values[4] = flags;

  1242.     for (point = 0U; point < 5U; point++)

  1243.     {

  1244.         if (values[point] != PlsrPhysicalInputPublished[point])

  1245.         {

  1246.             (void)ModbusDataWriteWord(MODBUS_DATA_DEVICE_D,

  1247.                                       SELF_TEST_INPUT_CONTROL_BASE + 2UL

  1248.                                           + point,

  1249.                                       values[point]);

  1250.             PlsrPhysicalInputPublished[point] = values[point];

  1251.         }

  1252.     }

  1253. }

  1254. 

  1255. #endif