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修复了变频后计数不准的问题

codex/plsr-2026-minimal
ywh 1 月之前
父節點
f4a2216504
當前提交
d2ab7d6c0a
共有 4 個文件被更改，包括 579 次插入 和 28 次删除
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  1. +505
    -21
      EWARM/Modbus.ewp
  2. +55
    -5
      PLSR/Src/plsr.c
  3. +1
    -0
      PLSR/Src/plsr_platform.h
  4. +18
    -2
      PLSR/Src/plsr_platform_f407.c

+ 505
- 21
EWARM/Modbus.ewp 查看文件

@@ -1263,22 +1263,16 @@
</group> </group>
</group> </group>
<group> <group>
<name>PLSR</name>
<file>
<name>$PROJ_DIR$\..\PLSR\Inc\plsr.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_internal.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_platform.h</name>
</file>
<name>Modbus</name>
<file> <file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_planner.h</name>
<name>$PROJ_DIR$\..\Modbus\Src\modbus_rtu_slave.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_planner.c</name>
<name>$PROJ_DIR$\..\Modbus\Inc\modbus_rtu_slave.h</name>
</file> </file>
</group>
<group>
<name>PLSR</name>
<file> <file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr.c</name> <name>$PROJ_DIR$\..\PLSR\Src\plsr.c</name>
<configuration> <configuration>
@@ -1289,6 +1283,248 @@
<version>35</version> <version>35</version>
<wantNonLocal>0</wantNonLocal> <wantNonLocal>0</wantNonLocal>
<debug>1</debug> <debug>1</debug>
<option>
<name>CCOptimizationNoSizeConstraints</name>
<state>0</state>
</option>
<option>
<name>CCDefines</name>
<state>USE_HAL_DRIVER</state>
<state>STM32F407xx</state>
<state>PLSR_DEBUG_TIMING=1</state>
</option>
<option>
<name>CCPreprocFile</name>
<state>0</state>
</option>
<option>
<name>CCPreprocComments</name>
<state>0</state>
</option>
<option>
<name>CCPreprocLine</name>
<state>0</state>
</option>
<option>
<name>CCListCFile</name>
<state>0</state>
</option>
<option>
<name>CCListCMnemonics</name>
<state>0</state>
</option>
<option>
<name>CCListCMessages</name>
<state>0</state>
</option>
<option>
<name>CCListAssFile</name>
<state>0</state>
</option>
<option>
<name>CCListAssSource</name>
<state>0</state>
</option>
<option>
<name>CCEnableRemarks</name>
<state>0</state>
</option>
<option>
<name>CCDiagSuppress</name>
<state></state>
</option>
<option>
<name>CCDiagRemark</name>
<state></state>
</option>
<option>
<name>CCDiagWarning</name>
<state></state>
</option>
<option>
<name>CCDiagError</name>
<state></state>
</option>
<option>
<name>CCObjPrefix</name>
<state>1</state>
</option>
<option>
<name>CCAllowList</name>
<version>1</version>
<state>11111110</state>
</option>
<option>
<name>CCDebugInfo</name>
<state>1</state>
</option>
<option>
<name>IEndianMode</name>
<state>1</state>
</option>
<option>
<name>IProcessor</name>
<state>1</state>
</option>
<option>
<name>IExtraOptionsCheck</name>
<state>0</state>
</option>
<option>
<name>IExtraOptions</name>
<state></state>
</option>
<option>
<name>CCLangConformance</name>
<state>0</state>
</option>
<option>
<name>CCSignedPlainChar</name>
<state>1</state>
</option>
<option>
<name>CCRequirePrototypes</name>
<state>0</state>
</option>
<option>
<name>CCDiagWarnAreErr</name>
<state>0</state>
</option>
<option>
<name>CCCompilerRuntimeInfo</name>
<state>0</state>
</option>
<option>
<name>IFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>OutputFile</name>
<state>$FILE_BNAME$.o</state>
</option>
<option>
<name>CCLibConfigHeader</name>
<state>1</state>
</option>
<option>
<name>PreInclude</name>
<state></state>
</option>
<option>
<name>CompilerMisraOverride</name>
<state>0</state>
</option>
<option>
<name>CCIncludePath2</name>
<state>$PROJ_DIR$/../USB_DEVICE/App</state>
<state>$PROJ_DIR$/../USB_DEVICE/Target</state>
<state>$PROJ_DIR$/../Core/Inc</state>
<state>$PROJ_DIR$/../Drivers/STM32F4xx_HAL_Driver/Inc</state>
<state>$PROJ_DIR$/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy</state>
<state>$PROJ_DIR$/../Middlewares/ST/STM32_USB_Device_Library/Core/Inc</state>
<state>$PROJ_DIR$/../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc</state>
<state>$PROJ_DIR$/../Drivers/CMSIS/Device/ST/STM32F4xx/Include</state>
<state>$PROJ_DIR$/../Drivers/CMSIS/Include</state>
<state>$PROJ_DIR$\..\Modbus\Inc</state>
<state>$PROJ_DIR$\..\PLSR\Inc</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\Config</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uCOS-II\Source</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uCOS-II\Ports\ARM-Cortex-M4\IAR</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uC-CPU</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uC-CPU\ARM-Cortex-M4\IAR</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uC-LIB</state>
<state>$PROJ_DIR$\..\Modbus\Inc</state>
</option>
<option>
<name>CCStdIncCheck</name>
<state>0</state>
</option>
<option>
<name>CCCodeSection</name>
<state>.text</state>
</option>
<option>
<name>IProcessorMode2</name>
<state>1</state>
</option>
<option>
<name>CompilerMisraRules98</name>
<version>0</version>
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
</option>
<option>
<name>CompilerMisraRules04</name>
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>CCPosIndRopi</name>
<state>0</state>
</option>
<option>
<name>CCPosIndRwpi</name>
<state>0</state>
</option>
<option>
<name>CCPosIndNoDynInit</name>
<state>0</state>
</option>
<option>
<name>IccLang</name>
<state>0</state>
</option>
<option>
<name>IccCDialect</name>
<state>1</state>
</option>
<option>
<name>IccAllowVLA</name>
<state>0</state>
</option>
<option>
<name>IccStaticDestr</name>
<state>1</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
<option>
<name>CCNoLiteralPool</name>
<state>0</state>
</option>
<option>
<name>CCEncSource</name>
<state>0</state>
</option>
<option>
<name>CCEncOutput</name>
<state>0</state>
</option>
<option>
<name>CCEncOutputBom</name>
<state>1</state>
</option>
<option>
<name>CCEncInput</name>
<state>0</state>
</option>
<option>
<name>IccExceptions2</name>
<state>0</state>
</option>
<option>
<name>IccRTTI2</name>
<state>0</state>
</option>
<option> <option>
<name>CCOptLevel</name> <name>CCOptLevel</name>
<state>3</state> <state>3</state>
@@ -1311,6 +1547,21 @@
</settings> </settings>
</configuration> </configuration>
</file> </file>
<file>
<name>$PROJ_DIR$\..\PLSR\Inc\plsr.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_internal.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_planner.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_planner.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_platform.h</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\PLSR\Src\plsr_platform_f407.c</name> <name>$PROJ_DIR$\..\PLSR\Src\plsr_platform_f407.c</name>
<configuration> <configuration>
@@ -1321,6 +1572,248 @@
<version>35</version> <version>35</version>
<wantNonLocal>0</wantNonLocal> <wantNonLocal>0</wantNonLocal>
<debug>1</debug> <debug>1</debug>
<option>
<name>CCOptimizationNoSizeConstraints</name>
<state>0</state>
</option>
<option>
<name>CCDefines</name>
<state>USE_HAL_DRIVER</state>
<state>STM32F407xx</state>
<state>PLSR_DEBUG_TIMING=1</state>
</option>
<option>
<name>CCPreprocFile</name>
<state>0</state>
</option>
<option>
<name>CCPreprocComments</name>
<state>0</state>
</option>
<option>
<name>CCPreprocLine</name>
<state>0</state>
</option>
<option>
<name>CCListCFile</name>
<state>0</state>
</option>
<option>
<name>CCListCMnemonics</name>
<state>0</state>
</option>
<option>
<name>CCListCMessages</name>
<state>0</state>
</option>
<option>
<name>CCListAssFile</name>
<state>0</state>
</option>
<option>
<name>CCListAssSource</name>
<state>0</state>
</option>
<option>
<name>CCEnableRemarks</name>
<state>0</state>
</option>
<option>
<name>CCDiagSuppress</name>
<state></state>
</option>
<option>
<name>CCDiagRemark</name>
<state></state>
</option>
<option>
<name>CCDiagWarning</name>
<state></state>
</option>
<option>
<name>CCDiagError</name>
<state></state>
</option>
<option>
<name>CCObjPrefix</name>
<state>1</state>
</option>
<option>
<name>CCAllowList</name>
<version>1</version>
<state>11111110</state>
</option>
<option>
<name>CCDebugInfo</name>
<state>1</state>
</option>
<option>
<name>IEndianMode</name>
<state>1</state>
</option>
<option>
<name>IProcessor</name>
<state>1</state>
</option>
<option>
<name>IExtraOptionsCheck</name>
<state>0</state>
</option>
<option>
<name>IExtraOptions</name>
<state></state>
</option>
<option>
<name>CCLangConformance</name>
<state>0</state>
</option>
<option>
<name>CCSignedPlainChar</name>
<state>1</state>
</option>
<option>
<name>CCRequirePrototypes</name>
<state>0</state>
</option>
<option>
<name>CCDiagWarnAreErr</name>
<state>0</state>
</option>
<option>
<name>CCCompilerRuntimeInfo</name>
<state>0</state>
</option>
<option>
<name>IFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>OutputFile</name>
<state>$FILE_BNAME$.o</state>
</option>
<option>
<name>CCLibConfigHeader</name>
<state>1</state>
</option>
<option>
<name>PreInclude</name>
<state></state>
</option>
<option>
<name>CompilerMisraOverride</name>
<state>0</state>
</option>
<option>
<name>CCIncludePath2</name>
<state>$PROJ_DIR$/../USB_DEVICE/App</state>
<state>$PROJ_DIR$/../USB_DEVICE/Target</state>
<state>$PROJ_DIR$/../Core/Inc</state>
<state>$PROJ_DIR$/../Drivers/STM32F4xx_HAL_Driver/Inc</state>
<state>$PROJ_DIR$/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy</state>
<state>$PROJ_DIR$/../Middlewares/ST/STM32_USB_Device_Library/Core/Inc</state>
<state>$PROJ_DIR$/../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc</state>
<state>$PROJ_DIR$/../Drivers/CMSIS/Device/ST/STM32F4xx/Include</state>
<state>$PROJ_DIR$/../Drivers/CMSIS/Include</state>
<state>$PROJ_DIR$\..\Modbus\Inc</state>
<state>$PROJ_DIR$\..\PLSR\Inc</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\Config</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uCOS-II\Source</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uCOS-II\Ports\ARM-Cortex-M4\IAR</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uC-CPU</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uC-CPU\ARM-Cortex-M4\IAR</state>
<state>$PROJ_DIR$\..\Middlewares\Third_Party\Micrium\uC-LIB</state>
<state>$PROJ_DIR$\..\Modbus\Inc</state>
</option>
<option>
<name>CCStdIncCheck</name>
<state>0</state>
</option>
<option>
<name>CCCodeSection</name>
<state>.text</state>
</option>
<option>
<name>IProcessorMode2</name>
<state>1</state>
</option>
<option>
<name>CompilerMisraRules98</name>
<version>0</version>
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
</option>
<option>
<name>CompilerMisraRules04</name>
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>CCPosIndRopi</name>
<state>0</state>
</option>
<option>
<name>CCPosIndRwpi</name>
<state>0</state>
</option>
<option>
<name>CCPosIndNoDynInit</name>
<state>0</state>
</option>
<option>
<name>IccLang</name>
<state>0</state>
</option>
<option>
<name>IccCDialect</name>
<state>1</state>
</option>
<option>
<name>IccAllowVLA</name>
<state>0</state>
</option>
<option>
<name>IccStaticDestr</name>
<state>1</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
<option>
<name>CCNoLiteralPool</name>
<state>0</state>
</option>
<option>
<name>CCEncSource</name>
<state>0</state>
</option>
<option>
<name>CCEncOutput</name>
<state>0</state>
</option>
<option>
<name>CCEncOutputBom</name>
<state>1</state>
</option>
<option>
<name>CCEncInput</name>
<state>0</state>
</option>
<option>
<name>IccExceptions2</name>
<state>0</state>
</option>
<option>
<name>IccRTTI2</name>
<state>0</state>
</option>
<option> <option>
<name>CCOptLevel</name> <name>CCOptLevel</name>
<state>3</state> <state>3</state>
@@ -1344,13 +1837,4 @@
</configuration> </configuration>
</file> </file>
</group> </group>
<group>
<name>Modbus</name>
<file>
<name>$PROJ_DIR$\..\Modbus\Src\modbus_rtu_slave.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Modbus\Inc\modbus_rtu_slave.h</name>
</file>
</group>
</project> </project>

+ 55
- 5
PLSR/Src/plsr.c 查看文件

@@ -443,6 +443,9 @@ static uint8_t PlsrLimitProfileToActTimeUs(
uint8_t *timedCutPlanned); uint8_t *timedCutPlanned);
static void PlsrProfileRecordPlannerStatus( static void PlsrProfileRecordPlannerStatus(
const PLSR_SHORT_PROFILE *profile); const PLSR_SHORT_PROFILE *profile);
static uint8_t PlsrApplyCountedProgressSnapshot(
uint64_t observed,
uint64_t *appliedPulses);
static PLSR_PLATFORM_SERVICE_RESULT PlsrReplanPulseDir( static PLSR_PLATFORM_SERVICE_RESULT PlsrReplanPulseDir(
uint32_t targetHz, uint32_t targetHz,
uint32_t totalPulses, uint32_t totalPulses,
@@ -2115,6 +2118,9 @@ static PLSR_PLATFORM_SERVICE_RESULT PlsrReplanPulseDir(
PLSR_SHORT_PROFILE replacement; PLSR_SHORT_PROFILE replacement;
PLSR_SHORT_PROFILE candidate; PLSR_SHORT_PROFILE candidate;
PLSR_PROFILE_ENTRY entry; PLSR_PROFILE_ENTRY entry;
uint64_t observedPulses;
uint64_t observedDelta = 0ULL;
uint64_t appliedPulses = 0ULL;
uint64_t committedTimeUs; uint64_t committedTimeUs;
uint64_t prefixTimeUs = 0ULL; uint64_t prefixTimeUs = 0ULL;
uint64_t prefixTimeLimitUs = PLSR_REPLAN_PREFIX_TIME_US; uint64_t prefixTimeLimitUs = PLSR_REPLAN_PREFIX_TIME_US;
@@ -2187,7 +2193,8 @@ static PLSR_PLATFORM_SERVICE_RESULT PlsrReplanPulseDir(
} }
if (PlsrPlatformFinitePipelineSnapshot( if (PlsrPlatformFinitePipelineSnapshot(
(uint8_t)PlsrActiveConfig.pulseOutput, (uint8_t)PlsrActiveConfig.pulseOutput,
&committedPulses, &committedTimeUs, &tailFrequencyHz,
&observedPulses, &committedPulses, &committedTimeUs,
&tailFrequencyHz,
&pipelineStartsNextSegment) == 0U) &pipelineStartsNextSegment) == 0U)
{ {
PlsrPlatformExitCritical(criticalState); PlsrPlatformExitCritical(criticalState);
@@ -2198,6 +2205,34 @@ static PLSR_PLATFORM_SERVICE_RESULT PlsrReplanPulseDir(
PlsrPlatformExitCritical(criticalState); PlsrPlatformExitCritical(criticalState);
return PLSR_PLATFORM_SERVICE_DEFERRED; return PLSR_PLATFORM_SERVICE_DEFERRED;
} }
if (forceTerminalExit == 0U)
{
/* Reconcile the logical budget to the exact counter sample used to
calculate the committed hardware tail. A later independent count
read would reopen the same several-pulse replan race. */
if (observedPulses < PlsrCountedObservedPublished)
{
PlsrPlatformExitCritical(criticalState);
return PLSR_PLATFORM_SERVICE_FAILED;
}
observedDelta = observedPulses - PlsrCountedObservedPublished;
if ((observedDelta > totalPulses)
|| (observedDelta > PlsrRemainingPulses)
|| (observedDelta > PlsrCommandRemainingPulses))
{
PlsrPlatformExitCritical(criticalState);
return PLSR_PLATFORM_SERVICE_FAILED;
}
totalPulses -= (uint32_t)observedDelta;
if ((totalPulses < committedPulses)
|| (PlsrApplyCountedProgressSnapshot(
observedPulses, &appliedPulses) == 0U)
|| (appliedPulses != observedDelta))
{
PlsrPlatformExitCritical(criticalState);
return PLSR_PLATFORM_SERVICE_FAILED;
}
}
/* The replacement stream owns the inactive bank from this point. */ /* The replacement stream owns the inactive bank from this point. */
PlsrInvalidateTimedStartLocked(); PlsrInvalidateTimedStartLocked();
PlsrPlatformExitCritical(criticalState); PlsrPlatformExitCritical(criticalState);
@@ -4504,15 +4539,14 @@ static uint8_t PlsrStageCountedHandoff(void)
return 1U; return 1U;
} }


static uint8_t PlsrSyncCountedProgress(void)
static uint8_t PlsrApplyCountedProgressSnapshot(
uint64_t observed,
uint64_t *appliedPulses)
{ {
uint64_t observed;
uint64_t delta; uint64_t delta;
uint64_t remaining; uint64_t remaining;
int64_t nextPosition; int64_t nextPosition;


observed = PlsrPlatformObservedPulses(
(uint8_t)PlsrActiveConfig.pulseOutput);
if (observed < PlsrCountedObservedPublished) if (observed < PlsrCountedObservedPublished)
{ {
return 0U; return 0U;
@@ -4520,6 +4554,10 @@ static uint8_t PlsrSyncCountedProgress(void)
delta = observed - PlsrCountedObservedPublished; delta = observed - PlsrCountedObservedPublished;
if (delta == 0ULL) if (delta == 0ULL)
{ {
if (appliedPulses != NULL)
{
*appliedPulses = 0ULL;
}
return 1U; return 1U;
} }
remaining = PlsrRemainingPulses; remaining = PlsrRemainingPulses;
@@ -4561,9 +4599,21 @@ static uint8_t PlsrSyncCountedProgress(void)
} }
PlsrCountedObservedPublished = observed; PlsrCountedObservedPublished = observed;
PlsrPositionCheckpointDirty = 1U; PlsrPositionCheckpointDirty = 1U;
if (appliedPulses != NULL)
{
*appliedPulses = delta;
}
return 1U; return 1U;
} }


static uint8_t PlsrSyncCountedProgress(void)
{
uint64_t observed = PlsrPlatformObservedPulses(
(uint8_t)PlsrActiveConfig.pulseOutput);

return PlsrApplyCountedProgressSnapshot(observed, NULL);
}

uint8_t PlsrExecTakeCountedRunIrq( uint8_t PlsrExecTakeCountedRunIrq(
uint8_t pulseOutput, uint8_t pulseOutput,
PLSR_PLATFORM_TIMER_SETTING *setting, PLSR_PLATFORM_TIMER_SETTING *setting,


+ 1
- 0
PLSR/Src/plsr_platform.h 查看文件

@@ -93,6 +93,7 @@ uint8_t PlsrPlatformRequestFiniteCut(uint8_t pulseOutput);
uint8_t PlsrPlatformFiniteRetargetReady(uint8_t pulseOutput, uint8_t PlsrPlatformFiniteRetargetReady(uint8_t pulseOutput,
uint32_t *activeFrequencyHz); uint32_t *activeFrequencyHz);
uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput, uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput,
uint64_t *observedPulses,
uint32_t *committedPulses, uint32_t *committedPulses,
uint64_t *committedTimeUs, uint64_t *committedTimeUs,
uint32_t *tailFrequencyHz, uint32_t *tailFrequencyHz,


+ 18
- 2
PLSR/Src/plsr_platform_f407.c 查看文件

@@ -551,6 +551,7 @@ uint8_t PlsrPlatformFiniteRetargetReady(uint8_t pulseOutput,
} }


uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput, uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput,
uint64_t *observedPulses,
uint32_t *committedPulses, uint32_t *committedPulses,
uint64_t *committedTimeUs, uint64_t *committedTimeUs,
uint32_t *tailFrequencyHz, uint32_t *tailFrequencyHz,
@@ -559,7 +560,8 @@ uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput,
uint32_t remaining; uint32_t remaining;
uint32_t frequencyHz; uint32_t frequencyHz;


if ((pulseOutput > 3U) || (committedPulses == NULL)
if ((pulseOutput > 3U) || (observedPulses == NULL)
|| (committedPulses == NULL)
|| (committedTimeUs == NULL) || (tailFrequencyHz == NULL) || (committedTimeUs == NULL) || (tailFrequencyHz == NULL)
|| (startsNextSegment == NULL) || (startsNextSegment == NULL)
|| (PlsrHostFiniteActive[pulseOutput] == 0U)) || (PlsrHostFiniteActive[pulseOutput] == 0U))
@@ -573,6 +575,7 @@ uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput,
{ {
return 0U; return 0U;
} }
*observedPulses = PlsrHostObservedPulses[pulseOutput];
*committedPulses = remaining; *committedPulses = remaining;
*committedTimeUs = ((uint64_t)remaining * 1000000ULL *committedTimeUs = ((uint64_t)remaining * 1000000ULL
+ frequencyHz - 1UL) / frequencyHz; + frequencyHz - 1UL) / frequencyHz;
@@ -3613,6 +3616,7 @@ uint8_t PlsrPlatformFiniteRetargetReady(uint8_t pulseOutput,
} }


uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput, uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput,
uint64_t *observedPulses,
uint32_t *committedPulses, uint32_t *committedPulses,
uint64_t *committedTimeUs, uint64_t *committedTimeUs,
uint32_t *tailFrequencyHz, uint32_t *tailFrequencyHz,
@@ -3623,8 +3627,10 @@ uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput,
uint32_t frequencyHz; uint32_t frequencyHz;
uint32_t remaining; uint32_t remaining;
uint64_t timeUs; uint64_t timeUs;
uint64_t observed;


if ((pulseOutput > 3U) || (committedPulses == NULL)
if ((pulseOutput > 3U) || (observedPulses == NULL)
|| (committedPulses == NULL)
|| (committedTimeUs == NULL) || (tailFrequencyHz == NULL) || (committedTimeUs == NULL) || (tailFrequencyHz == NULL)
|| (startsNextSegment == NULL)) || (startsNextSegment == NULL))
{ {
@@ -3644,6 +3650,15 @@ uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput,
{ {
completed = remaining; completed = remaining;
} }
observed = PlsrObservedPulseBase[pulseOutput] + completed;
if (observed < PlsrObservedPulsePublished[pulseOutput])
{
observed = PlsrObservedPulsePublished[pulseOutput];
}
else
{
PlsrObservedPulsePublished[pulseOutput] = observed;
}
remaining -= completed; remaining -= completed;
frequencyHz = PlsrTimerActiveFrequencyHz[pulseOutput]; frequencyHz = PlsrTimerActiveFrequencyHz[pulseOutput];
if (frequencyHz == 0UL) if (frequencyHz == 0UL)
@@ -3674,6 +3689,7 @@ uint8_t PlsrPlatformFinitePipelineSnapshot(uint8_t pulseOutput,
*startsNextSegment = *startsNextSegment =
PlsrFiniteStreamNextStartsSegment[pulseOutput]; PlsrFiniteStreamNextStartsSegment[pulseOutput];
} }
*observedPulses = observed;
*committedPulses = remaining; *committedPulses = remaining;
*committedTimeUs = timeUs; *committedTimeUs = timeUs;
PlsrPlatformExitCritical(criticalState); PlsrPlatformExitCritical(criticalState);


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