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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_flash_ex.c
  4. * @author MCD Application Team
  5. * @brief Extended FLASH HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the FLASH extension peripheral:
  8. * + Extended programming operations functions
  9. *
  10. @verbatim
  11. ==============================================================================
  12. ##### Flash Extension features #####
  13. ==============================================================================
  14. [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
  15. STM32F429xx/439xx devices contains the following additional features
  16. (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
  17. capability (RWW)
  18. (+) Dual bank memory organization
  19. (+) PCROP protection for all banks
  20. ##### How to use this driver #####
  21. ==============================================================================
  22. [..] This driver provides functions to configure and program the FLASH memory
  23. of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
  24. devices. It includes
  25. (#) FLASH Memory Erase functions:
  26. (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
  27. HAL_FLASH_Lock() functions
  28. (++) Erase function: Erase sector, erase all sectors
  29. (++) There are two modes of erase :
  30. (+++) Polling Mode using HAL_FLASHEx_Erase()
  31. (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
  32. (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
  33. (++) Set/Reset the write protection
  34. (++) Set the Read protection Level
  35. (++) Set the BOR level
  36. (++) Program the user Option Bytes
  37. (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
  38. (++) Extended space (bank 2) erase function
  39. (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
  40. (++) Dual Boot activation
  41. (++) Write protection configuration for bank 2
  42. (++) PCROP protection configuration and control for both banks
  43. @endverbatim
  44. ******************************************************************************
  45. * @attention
  46. *
  47. * Copyright (c) 2017 STMicroelectronics.
  48. * All rights reserved.
  49. *
  50. * This software is licensed under terms that can be found in the LICENSE file in
  51. * the root directory of this software component.
  52. * If no LICENSE file comes with this software, it is provided AS-IS.
  53. ******************************************************************************
  54. */
  55. /* Includes ------------------------------------------------------------------*/
  56. #include "stm32f4xx_hal.h"
  57. /** @addtogroup STM32F4xx_HAL_Driver
  58. * @{
  59. */
  60. /** @defgroup FLASHEx FLASHEx
  61. * @brief FLASH HAL Extension module driver
  62. * @{
  63. */
  64. #ifdef HAL_FLASH_MODULE_ENABLED
  65. /* Private typedef -----------------------------------------------------------*/
  66. /* Private define ------------------------------------------------------------*/
  67. /** @addtogroup FLASHEx_Private_Constants
  68. * @{
  69. */
  70. #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
  71. /**
  72. * @}
  73. */
  74. /* Private macro -------------------------------------------------------------*/
  75. /* Private variables ---------------------------------------------------------*/
  76. /** @addtogroup FLASHEx_Private_Variables
  77. * @{
  78. */
  79. extern FLASH_ProcessTypeDef pFlash;
  80. /**
  81. * @}
  82. */
  83. /* Private function prototypes -----------------------------------------------*/
  84. /** @addtogroup FLASHEx_Private_Functions
  85. * @{
  86. */
  87. /* Option bytes control */
  88. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
  89. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
  90. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
  91. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
  92. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
  93. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
  94. static uint8_t FLASH_OB_GetUser(void);
  95. static uint16_t FLASH_OB_GetWRP(void);
  96. static uint8_t FLASH_OB_GetRDP(void);
  97. static uint8_t FLASH_OB_GetBOR(void);
  98. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
  99. defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
  100. defined(STM32F423xx)
  101. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
  102. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
  103. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  104. STM32F413xx || STM32F423xx */
  105. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  106. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  107. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  108. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
  109. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  110. extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
  111. /**
  112. * @}
  113. */
  114. /* Exported functions --------------------------------------------------------*/
  115. /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
  116. * @{
  117. */
  118. /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
  119. * @brief Extended IO operation functions
  120. *
  121. @verbatim
  122. ===============================================================================
  123. ##### Extended programming operation functions #####
  124. ===============================================================================
  125. [..]
  126. This subsection provides a set of functions allowing to manage the Extension FLASH
  127. programming operations.
  128. @endverbatim
  129. * @{
  130. */
  131. /**
  132. * @brief Perform a mass erase or erase the specified FLASH memory sectors
  133. * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
  134. * contains the configuration information for the erasing.
  135. *
  136. * @param[out] SectorError pointer to variable that
  137. * contains the configuration information on faulty sector in case of error
  138. * (0xFFFFFFFFU means that all the sectors have been correctly erased)
  139. *
  140. * @retval HAL Status
  141. */
  142. HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
  143. {
  144. HAL_StatusTypeDef status;
  145. uint32_t index = 0U;
  146. /* Process Locked */
  147. __HAL_LOCK(&pFlash);
  148. /* Check the parameters */
  149. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  150. /* Wait for last operation to be completed */
  151. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  152. if (status == HAL_OK)
  153. {
  154. /*Initialization of SectorError variable*/
  155. *SectorError = 0xFFFFFFFFU;
  156. if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  157. {
  158. /*Mass erase to be done*/
  159. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  160. /* Wait for last operation to be completed */
  161. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  162. /* if the erase operation is completed, disable the MER Bit */
  163. FLASH->CR &= (~FLASH_MER_BIT);
  164. }
  165. else
  166. {
  167. /* Check the parameters */
  168. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  169. /* Erase by sector by sector to be done*/
  170. for (index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
  171. {
  172. FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
  173. /* Wait for last operation to be completed */
  174. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  175. /* If the erase operation is completed, disable the SER and SNB Bits */
  176. CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
  177. if (status != HAL_OK)
  178. {
  179. /* In case of error, stop erase procedure and return the faulty sector*/
  180. *SectorError = index;
  181. break;
  182. }
  183. }
  184. }
  185. /* Flush the caches to be sure of the data consistency */
  186. FLASH_FlushCaches();
  187. }
  188. /* Process Unlocked */
  189. __HAL_UNLOCK(&pFlash);
  190. return status;
  191. }
  192. /**
  193. * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
  194. * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
  195. * contains the configuration information for the erasing.
  196. *
  197. * @retval HAL Status
  198. */
  199. HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
  200. {
  201. HAL_StatusTypeDef status = HAL_OK;
  202. /* Check the parameters */
  203. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  204. /* Enable End of FLASH Operation interrupt */
  205. __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
  206. /* Enable Error source interrupt */
  207. __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
  208. /* Clear pending flags (if any) */
  209. __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | \
  210. FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
  211. if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  212. {
  213. /*Mass erase to be done*/
  214. pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
  215. pFlash.Bank = pEraseInit->Banks;
  216. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  217. }
  218. else
  219. {
  220. /* Erase by sector to be done*/
  221. /* Check the parameters */
  222. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  223. pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
  224. pFlash.NbSectorsToErase = pEraseInit->NbSectors;
  225. pFlash.Sector = pEraseInit->Sector;
  226. pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
  227. /*Erase 1st sector and wait for IT*/
  228. FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
  229. }
  230. return status;
  231. }
  232. /**
  233. * @brief Program option bytes
  234. * @param pOBInit pointer to an FLASH_OBInitStruct structure that
  235. * contains the configuration information for the programming.
  236. *
  237. * @retval HAL Status
  238. */
  239. HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
  240. {
  241. HAL_StatusTypeDef status = HAL_ERROR;
  242. /* Process Locked */
  243. __HAL_LOCK(&pFlash);
  244. /* Check the parameters */
  245. assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
  246. /*Write protection configuration*/
  247. if ((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
  248. {
  249. assert_param(IS_WRPSTATE(pOBInit->WRPState));
  250. if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
  251. {
  252. /*Enable of Write protection on the selected Sector*/
  253. status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
  254. }
  255. else
  256. {
  257. /*Disable of Write protection on the selected Sector*/
  258. status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
  259. }
  260. }
  261. /*Read protection configuration*/
  262. if ((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
  263. {
  264. status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
  265. }
  266. /*USER configuration*/
  267. if ((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
  268. {
  269. status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_IWDG_SW,
  270. pOBInit->USERConfig & OB_STOP_NO_RST,
  271. pOBInit->USERConfig & OB_STDBY_NO_RST);
  272. }
  273. /*BOR Level configuration*/
  274. if ((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
  275. {
  276. status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
  277. }
  278. /* Process Unlocked */
  279. __HAL_UNLOCK(&pFlash);
  280. return status;
  281. }
  282. /**
  283. * @brief Get the Option byte configuration
  284. * @param pOBInit pointer to an FLASH_OBInitStruct structure that
  285. * contains the configuration information for the programming.
  286. *
  287. * @retval None
  288. */
  289. void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
  290. {
  291. pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
  292. /*Get WRP*/
  293. pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
  294. /*Get RDP Level*/
  295. pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
  296. /*Get USER*/
  297. pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
  298. /*Get BOR Level*/
  299. pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
  300. }
  301. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  302. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
  303. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
  304. defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  305. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  306. /**
  307. * @brief Program option bytes
  308. * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  309. * contains the configuration information for the programming.
  310. *
  311. * @retval HAL Status
  312. */
  313. HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  314. {
  315. HAL_StatusTypeDef status = HAL_ERROR;
  316. /* Check the parameters */
  317. assert_param(IS_OBEX(pAdvOBInit->OptionType));
  318. /*Program PCROP option byte*/
  319. if (((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
  320. {
  321. /* Check the parameters */
  322. assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
  323. if ((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
  324. {
  325. /*Enable of Write protection on the selected Sector*/
  326. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  327. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  328. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  329. status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
  330. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  331. status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  332. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  333. STM32F413xx || STM32F423xx */
  334. }
  335. else
  336. {
  337. /*Disable of Write protection on the selected Sector*/
  338. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  339. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  340. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  341. status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
  342. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  343. status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  344. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  345. STM32F413xx || STM32F423xx */
  346. }
  347. }
  348. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  349. /*Program BOOT config option byte*/
  350. if (((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
  351. {
  352. status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
  353. }
  354. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  355. return status;
  356. }
  357. /**
  358. * @brief Get the OBEX byte configuration
  359. * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  360. * contains the configuration information for the programming.
  361. *
  362. * @retval None
  363. */
  364. void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  365. {
  366. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  367. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  368. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  369. /*Get Sector*/
  370. pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  371. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  372. /*Get Sector for Bank1*/
  373. pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  374. /*Get Sector for Bank2*/
  375. pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  376. /*Get Boot config OB*/
  377. pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
  378. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  379. STM32F413xx || STM32F423xx */
  380. }
  381. /**
  382. * @brief Select the Protection Mode
  383. *
  384. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  385. * Global Read Out Protection modification (from level1 to level0)
  386. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  387. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  388. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
  389. * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
  390. *
  391. * @retval HAL Status
  392. */
  393. HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
  394. {
  395. uint8_t optiontmp;
  396. /* Mask SPRMOD bit */
  397. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
  398. /* Update Option Byte */
  399. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
  400. return HAL_OK;
  401. }
  402. /**
  403. * @brief Deselect the Protection Mode
  404. *
  405. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  406. * Global Read Out Protection modification (from level1 to level0)
  407. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  408. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  409. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
  410. * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
  411. *
  412. * @retval HAL Status
  413. */
  414. HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
  415. {
  416. uint8_t optiontmp;
  417. /* Mask SPRMOD bit */
  418. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
  419. /* Update Option Byte */
  420. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
  421. return HAL_OK;
  422. }
  423. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
  424. STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  425. STM32F413xx || STM32F423xx */
  426. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  427. /**
  428. * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
  429. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
  430. * @retval The FLASH Write Protection Option Bytes value
  431. */
  432. uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
  433. {
  434. /* Return the FLASH write protection Register value */
  435. return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  436. }
  437. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  438. /**
  439. * @}
  440. */
  441. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  442. /**
  443. * @brief Full erase of FLASH memory sectors
  444. * @param VoltageRange The device voltage range which defines the erase parallelism.
  445. * This parameter can be one of the following values:
  446. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  447. * the operation will be done by byte (8-bit)
  448. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  449. * the operation will be done by half word (16-bit)
  450. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  451. * the operation will be done by word (32-bit)
  452. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  453. * the operation will be done by double word (64-bit)
  454. *
  455. * @param Banks Banks to be erased
  456. * This parameter can be one of the following values:
  457. * @arg FLASH_BANK_1: Bank1 to be erased
  458. * @arg FLASH_BANK_2: Bank2 to be erased
  459. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  460. *
  461. * @retval HAL Status
  462. */
  463. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  464. {
  465. /* Check the parameters */
  466. assert_param(IS_VOLTAGERANGE(VoltageRange));
  467. assert_param(IS_FLASH_BANK(Banks));
  468. /* if the previous operation is completed, proceed to erase all sectors */
  469. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  470. if (Banks == FLASH_BANK_BOTH)
  471. {
  472. /* bank1 & bank2 will be erased*/
  473. FLASH->CR |= FLASH_MER_BIT;
  474. }
  475. else if (Banks == FLASH_BANK_1)
  476. {
  477. /*Only bank1 will be erased*/
  478. FLASH->CR |= FLASH_CR_MER1;
  479. }
  480. else
  481. {
  482. /*Only bank2 will be erased*/
  483. FLASH->CR |= FLASH_CR_MER2;
  484. }
  485. FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange << 8U);
  486. }
  487. /**
  488. * @brief Erase the specified FLASH memory sector
  489. * @param Sector FLASH sector to erase
  490. * The value of this parameter depend on device used within the same series
  491. * @param VoltageRange The device voltage range which defines the erase parallelism.
  492. * This parameter can be one of the following values:
  493. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  494. * the operation will be done by byte (8-bit)
  495. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  496. * the operation will be done by half word (16-bit)
  497. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  498. * the operation will be done by word (32-bit)
  499. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  500. * the operation will be done by double word (64-bit)
  501. *
  502. * @retval None
  503. */
  504. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  505. {
  506. uint32_t tmp_psize = 0U;
  507. /* Check the parameters */
  508. assert_param(IS_FLASH_SECTOR(Sector));
  509. assert_param(IS_VOLTAGERANGE(VoltageRange));
  510. if (VoltageRange == FLASH_VOLTAGE_RANGE_1)
  511. {
  512. tmp_psize = FLASH_PSIZE_BYTE;
  513. }
  514. else if (VoltageRange == FLASH_VOLTAGE_RANGE_2)
  515. {
  516. tmp_psize = FLASH_PSIZE_HALF_WORD;
  517. }
  518. else if (VoltageRange == FLASH_VOLTAGE_RANGE_3)
  519. {
  520. tmp_psize = FLASH_PSIZE_WORD;
  521. }
  522. else
  523. {
  524. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  525. }
  526. /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
  527. if (Sector > FLASH_SECTOR_11)
  528. {
  529. Sector += 4U;
  530. }
  531. /* If the previous operation is completed, proceed to erase the sector */
  532. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  533. FLASH->CR |= tmp_psize;
  534. CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  535. FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
  536. FLASH->CR |= FLASH_CR_STRT;
  537. }
  538. /**
  539. * @brief Enable the write protection of the desired bank1 or bank 2 sectors
  540. *
  541. * @note When the memory read protection level is selected (RDP level = 1),
  542. * it is not possible to program or erase the flash sector i if CortexM4
  543. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  544. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  545. *
  546. * @param WRPSector specifies the sector(s) to be write protected.
  547. * This parameter can be one of the following values:
  548. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  549. * @arg OB_WRP_SECTOR_All
  550. * @note BANK2 starts from OB_WRP_SECTOR_12
  551. *
  552. * @param Banks Enable write protection on all the sectors for the specific bank
  553. * This parameter can be one of the following values:
  554. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  555. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  556. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  557. *
  558. * @retval HAL FLASH State
  559. */
  560. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  561. {
  562. HAL_StatusTypeDef status = HAL_OK;
  563. /* Check the parameters */
  564. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  565. assert_param(IS_FLASH_BANK(Banks));
  566. /* Wait for last operation to be completed */
  567. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  568. if (status == HAL_OK)
  569. {
  570. if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  571. (WRPSector < OB_WRP_SECTOR_12))
  572. {
  573. if (WRPSector == OB_WRP_SECTOR_All)
  574. {
  575. /*Write protection on all sector of BANK1*/
  576. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~(WRPSector >> 12));
  577. }
  578. else
  579. {
  580. /*Write protection done on sectors of BANK1*/
  581. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  582. }
  583. }
  584. else
  585. {
  586. /*Write protection done on sectors of BANK2*/
  587. *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector >> 12));
  588. }
  589. /*Write protection on all sector of BANK2*/
  590. if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  591. {
  592. /* Wait for last operation to be completed */
  593. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  594. if (status == HAL_OK)
  595. {
  596. *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector >> 12));
  597. }
  598. }
  599. }
  600. return status;
  601. }
  602. /**
  603. * @brief Disable the write protection of the desired bank1 or bank 2 sectors
  604. *
  605. * @note When the memory read protection level is selected (RDP level = 1),
  606. * it is not possible to program or erase the flash sector i if CortexM4
  607. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  608. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  609. *
  610. * @param WRPSector specifies the sector(s) to be write protected.
  611. * This parameter can be one of the following values:
  612. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  613. * @arg OB_WRP_Sector_All
  614. * @note BANK2 starts from OB_WRP_SECTOR_12
  615. *
  616. * @param Banks Disable write protection on all the sectors for the specific bank
  617. * This parameter can be one of the following values:
  618. * @arg FLASH_BANK_1: Bank1 to be erased
  619. * @arg FLASH_BANK_2: Bank2 to be erased
  620. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  621. *
  622. * @retval HAL Status
  623. */
  624. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  625. {
  626. HAL_StatusTypeDef status = HAL_OK;
  627. /* Check the parameters */
  628. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  629. assert_param(IS_FLASH_BANK(Banks));
  630. /* Wait for last operation to be completed */
  631. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  632. if (status == HAL_OK)
  633. {
  634. if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  635. (WRPSector < OB_WRP_SECTOR_12))
  636. {
  637. if (WRPSector == OB_WRP_SECTOR_All)
  638. {
  639. /*Write protection on all sector of BANK1*/
  640. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
  641. }
  642. else
  643. {
  644. /*Write protection done on sectors of BANK1*/
  645. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  646. }
  647. }
  648. else
  649. {
  650. /*Write protection done on sectors of BANK2*/
  651. *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
  652. }
  653. /*Write protection on all sector of BANK2*/
  654. if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  655. {
  656. /* Wait for last operation to be completed */
  657. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  658. if (status == HAL_OK)
  659. {
  660. *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
  661. }
  662. }
  663. }
  664. return status;
  665. }
  666. /**
  667. * @brief Configure the Dual Bank Boot.
  668. *
  669. * @note This function can be used only for STM32F42xxx/43xxx devices.
  670. *
  671. * @param BootConfig specifies the Dual Bank Boot Option byte.
  672. * This parameter can be one of the following values:
  673. * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
  674. * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
  675. * @retval None
  676. */
  677. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
  678. {
  679. HAL_StatusTypeDef status = HAL_OK;
  680. /* Check the parameters */
  681. assert_param(IS_OB_BOOT(BootConfig));
  682. /* Wait for last operation to be completed */
  683. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  684. if (status == HAL_OK)
  685. {
  686. /* Set Dual Bank Boot */
  687. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
  688. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
  689. }
  690. return status;
  691. }
  692. /**
  693. * @brief Enable the read/write protection (PCROP) of the desired
  694. * sectors of Bank 1 and/or Bank 2.
  695. * @note This function can be used only for STM32F42xxx/43xxx devices.
  696. * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
  697. * This parameter can be one of the following values:
  698. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  699. * @arg OB_PCROP_SECTOR__All
  700. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  701. * This parameter can be one of the following values:
  702. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  703. * @arg OB_PCROP_SECTOR__All
  704. * @param Banks Enable PCROP protection on all the sectors for the specific bank
  705. * This parameter can be one of the following values:
  706. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  707. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  708. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  709. *
  710. * @retval HAL Status
  711. */
  712. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  713. {
  714. HAL_StatusTypeDef status = HAL_OK;
  715. assert_param(IS_FLASH_BANK(Banks));
  716. /* Wait for last operation to be completed */
  717. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  718. if (status == HAL_OK)
  719. {
  720. if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  721. {
  722. assert_param(IS_OB_PCROP(SectorBank1));
  723. /*Write protection done on sectors of BANK1*/
  724. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
  725. }
  726. else
  727. {
  728. assert_param(IS_OB_PCROP(SectorBank2));
  729. /*Write protection done on sectors of BANK2*/
  730. *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  731. }
  732. /*Write protection on all sector of BANK2*/
  733. if (Banks == FLASH_BANK_BOTH)
  734. {
  735. assert_param(IS_OB_PCROP(SectorBank2));
  736. /* Wait for last operation to be completed */
  737. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  738. if (status == HAL_OK)
  739. {
  740. /*Write protection done on sectors of BANK2*/
  741. *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  742. }
  743. }
  744. }
  745. return status;
  746. }
  747. /**
  748. * @brief Disable the read/write protection (PCROP) of the desired
  749. * sectors of Bank 1 and/or Bank 2.
  750. * @note This function can be used only for STM32F42xxx/43xxx devices.
  751. * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
  752. * This parameter can be one of the following values:
  753. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  754. * @arg OB_PCROP_SECTOR__All
  755. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  756. * This parameter can be one of the following values:
  757. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  758. * @arg OB_PCROP_SECTOR__All
  759. * @param Banks Disable PCROP protection on all the sectors for the specific bank
  760. * This parameter can be one of the following values:
  761. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  762. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  763. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  764. *
  765. * @retval HAL Status
  766. */
  767. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  768. {
  769. HAL_StatusTypeDef status = HAL_OK;
  770. /* Check the parameters */
  771. assert_param(IS_FLASH_BANK(Banks));
  772. /* Wait for last operation to be completed */
  773. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  774. if (status == HAL_OK)
  775. {
  776. if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  777. {
  778. assert_param(IS_OB_PCROP(SectorBank1));
  779. /*Write protection done on sectors of BANK1*/
  780. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
  781. }
  782. else
  783. {
  784. /*Write protection done on sectors of BANK2*/
  785. assert_param(IS_OB_PCROP(SectorBank2));
  786. *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  787. }
  788. /*Write protection on all sector of BANK2*/
  789. if (Banks == FLASH_BANK_BOTH)
  790. {
  791. assert_param(IS_OB_PCROP(SectorBank2));
  792. /* Wait for last operation to be completed */
  793. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  794. if (status == HAL_OK)
  795. {
  796. /*Write protection done on sectors of BANK2*/
  797. *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  798. }
  799. }
  800. }
  801. return status;
  802. }
  803. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  804. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
  805. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
  806. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
  807. defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
  808. defined(STM32F423xx)
  809. /**
  810. * @brief Mass erase of FLASH memory
  811. * @param VoltageRange The device voltage range which defines the erase parallelism.
  812. * This parameter can be one of the following values:
  813. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  814. * the operation will be done by byte (8-bit)
  815. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  816. * the operation will be done by half word (16-bit)
  817. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  818. * the operation will be done by word (32-bit)
  819. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  820. * the operation will be done by double word (64-bit)
  821. *
  822. * @param Banks Banks to be erased
  823. * This parameter can be one of the following values:
  824. * @arg FLASH_BANK_1: Bank1 to be erased
  825. *
  826. * @retval None
  827. */
  828. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  829. {
  830. /* Check the parameters */
  831. assert_param(IS_VOLTAGERANGE(VoltageRange));
  832. assert_param(IS_FLASH_BANK(Banks));
  833. /* If the previous operation is completed, proceed to erase all sectors */
  834. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  835. FLASH->CR |= FLASH_CR_MER;
  836. FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange << 8U);
  837. }
  838. /**
  839. * @brief Erase the specified FLASH memory sector
  840. * @param Sector FLASH sector to erase
  841. * The value of this parameter depend on device used within the same series
  842. * @param VoltageRange The device voltage range which defines the erase parallelism.
  843. * This parameter can be one of the following values:
  844. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  845. * the operation will be done by byte (8-bit)
  846. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  847. * the operation will be done by half word (16-bit)
  848. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  849. * the operation will be done by word (32-bit)
  850. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  851. * the operation will be done by double word (64-bit)
  852. *
  853. * @retval None
  854. */
  855. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  856. {
  857. uint32_t tmp_psize = 0U;
  858. /* Check the parameters */
  859. assert_param(IS_FLASH_SECTOR(Sector));
  860. assert_param(IS_VOLTAGERANGE(VoltageRange));
  861. if (VoltageRange == FLASH_VOLTAGE_RANGE_1)
  862. {
  863. tmp_psize = FLASH_PSIZE_BYTE;
  864. }
  865. else if (VoltageRange == FLASH_VOLTAGE_RANGE_2)
  866. {
  867. tmp_psize = FLASH_PSIZE_HALF_WORD;
  868. }
  869. else if (VoltageRange == FLASH_VOLTAGE_RANGE_3)
  870. {
  871. tmp_psize = FLASH_PSIZE_WORD;
  872. }
  873. else
  874. {
  875. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  876. }
  877. /* If the previous operation is completed, proceed to erase the sector */
  878. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  879. FLASH->CR |= tmp_psize;
  880. CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  881. FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
  882. FLASH->CR |= FLASH_CR_STRT;
  883. }
  884. /**
  885. * @brief Enable the write protection of the desired bank 1 sectors
  886. *
  887. * @note When the memory read protection level is selected (RDP level = 1),
  888. * it is not possible to program or erase the flash sector i if CortexM4
  889. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  890. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  891. *
  892. * @param WRPSector specifies the sector(s) to be write protected.
  893. * The value of this parameter depend on device used within the same series
  894. *
  895. * @param Banks Enable write protection on all the sectors for the specific bank
  896. * This parameter can be one of the following values:
  897. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  898. *
  899. * @retval HAL Status
  900. */
  901. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  902. {
  903. HAL_StatusTypeDef status = HAL_OK;
  904. /* Check the parameters */
  905. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  906. assert_param(IS_FLASH_BANK(Banks));
  907. /* Wait for last operation to be completed */
  908. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  909. if (status == HAL_OK)
  910. {
  911. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  912. }
  913. return status;
  914. }
  915. /**
  916. * @brief Disable the write protection of the desired bank 1 sectors
  917. *
  918. * @note When the memory read protection level is selected (RDP level = 1),
  919. * it is not possible to program or erase the flash sector i if CortexM4
  920. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  921. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  922. *
  923. * @param WRPSector specifies the sector(s) to be write protected.
  924. * The value of this parameter depend on device used within the same series
  925. *
  926. * @param Banks Enable write protection on all the sectors for the specific bank
  927. * This parameter can be one of the following values:
  928. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  929. *
  930. * @retval HAL Status
  931. */
  932. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  933. {
  934. HAL_StatusTypeDef status = HAL_OK;
  935. /* Check the parameters */
  936. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  937. assert_param(IS_FLASH_BANK(Banks));
  938. /* Wait for last operation to be completed */
  939. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  940. if (status == HAL_OK)
  941. {
  942. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  943. }
  944. return status;
  945. }
  946. #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  947. STM32F413xx || STM32F423xx */
  948. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  949. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  950. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  951. /**
  952. * @brief Enable the read/write protection (PCROP) of the desired sectors.
  953. * @note This function can be used only for STM32F401xx devices.
  954. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  955. * This parameter can be one of the following values:
  956. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  957. * @arg OB_PCROP_Sector_All
  958. * @retval HAL Status
  959. */
  960. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
  961. {
  962. HAL_StatusTypeDef status = HAL_OK;
  963. /* Check the parameters */
  964. assert_param(IS_OB_PCROP(Sector));
  965. /* Wait for last operation to be completed */
  966. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  967. if (status == HAL_OK)
  968. {
  969. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
  970. }
  971. return status;
  972. }
  973. /**
  974. * @brief Disable the read/write protection (PCROP) of the desired sectors.
  975. * @note This function can be used only for STM32F401xx devices.
  976. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  977. * This parameter can be one of the following values:
  978. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  979. * @arg OB_PCROP_Sector_All
  980. * @retval HAL Status
  981. */
  982. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
  983. {
  984. HAL_StatusTypeDef status = HAL_OK;
  985. /* Check the parameters */
  986. assert_param(IS_OB_PCROP(Sector));
  987. /* Wait for last operation to be completed */
  988. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  989. if (status == HAL_OK)
  990. {
  991. *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~Sector);
  992. }
  993. return status;
  994. }
  995. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  996. STM32F413xx || STM32F423xx */
  997. /**
  998. * @brief Set the read protection level.
  999. * @param Level specifies the read protection level.
  1000. * This parameter can be one of the following values:
  1001. * @arg OB_RDP_LEVEL_0: No protection
  1002. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1003. * @arg OB_RDP_LEVEL_2: Full chip protection
  1004. *
  1005. * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
  1006. *
  1007. * @retval HAL Status
  1008. */
  1009. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
  1010. {
  1011. HAL_StatusTypeDef status = HAL_OK;
  1012. /* Check the parameters */
  1013. assert_param(IS_OB_RDP_LEVEL(Level));
  1014. /* Wait for last operation to be completed */
  1015. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1016. if (status == HAL_OK)
  1017. {
  1018. *(__IO uint8_t *)OPTCR_BYTE1_ADDRESS = Level;
  1019. }
  1020. return status;
  1021. }
  1022. /**
  1023. * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
  1024. * @param Iwdg Selects the IWDG mode
  1025. * This parameter can be one of the following values:
  1026. * @arg OB_IWDG_SW: Software IWDG selected
  1027. * @arg OB_IWDG_HW: Hardware IWDG selected
  1028. * @param Stop Reset event when entering STOP mode.
  1029. * This parameter can be one of the following values:
  1030. * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
  1031. * @arg OB_STOP_RST: Reset generated when entering in STOP
  1032. * @param Stdby Reset event when entering Standby mode.
  1033. * This parameter can be one of the following values:
  1034. * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
  1035. * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
  1036. * @retval HAL Status
  1037. */
  1038. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
  1039. {
  1040. uint8_t optiontmp;
  1041. HAL_StatusTypeDef status = HAL_OK;
  1042. /* Check the parameters */
  1043. assert_param(IS_OB_IWDG_SOURCE(Iwdg));
  1044. assert_param(IS_OB_STOP_SOURCE(Stop));
  1045. assert_param(IS_OB_STDBY_SOURCE(Stdby));
  1046. /* Wait for last operation to be completed */
  1047. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1048. if (status == HAL_OK)
  1049. {
  1050. /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
  1051. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
  1052. /* Update User Option Byte */
  1053. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
  1054. }
  1055. return status;
  1056. }
  1057. /**
  1058. * @brief Set the BOR Level.
  1059. * @param Level specifies the Option Bytes BOR Reset Level.
  1060. * This parameter can be one of the following values:
  1061. * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1062. * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1063. * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1064. * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
  1065. * @retval HAL Status
  1066. */
  1067. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
  1068. {
  1069. /* Check the parameters */
  1070. assert_param(IS_OB_BOR_LEVEL(Level));
  1071. /* Set the BOR Level */
  1072. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
  1073. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
  1074. return HAL_OK;
  1075. }
  1076. /**
  1077. * @brief Return the FLASH User Option Byte value.
  1078. * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
  1079. * and RST_STDBY(Bit2).
  1080. */
  1081. static uint8_t FLASH_OB_GetUser(void)
  1082. {
  1083. /* Return the User Option Byte */
  1084. return ((uint8_t)(FLASH->OPTCR & 0xE0));
  1085. }
  1086. /**
  1087. * @brief Return the FLASH Write Protection Option Bytes value.
  1088. * @retval uint16_t FLASH Write Protection Option Bytes value
  1089. */
  1090. static uint16_t FLASH_OB_GetWRP(void)
  1091. {
  1092. /* Return the FLASH write protection Register value */
  1093. return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  1094. }
  1095. /**
  1096. * @brief Returns the FLASH Read Protection level.
  1097. * @retval FLASH ReadOut Protection Status:
  1098. * This parameter can be one of the following values:
  1099. * @arg OB_RDP_LEVEL_0: No protection
  1100. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1101. * @arg OB_RDP_LEVEL_2: Full chip protection
  1102. */
  1103. static uint8_t FLASH_OB_GetRDP(void)
  1104. {
  1105. uint8_t readstatus = OB_RDP_LEVEL_0;
  1106. if (*(__IO uint8_t *)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
  1107. {
  1108. readstatus = OB_RDP_LEVEL_2;
  1109. }
  1110. else if (*(__IO uint8_t *)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_0)
  1111. {
  1112. readstatus = OB_RDP_LEVEL_0;
  1113. }
  1114. else
  1115. {
  1116. readstatus = OB_RDP_LEVEL_1;
  1117. }
  1118. return readstatus;
  1119. }
  1120. /**
  1121. * @brief Returns the FLASH BOR level.
  1122. * @retval uint8_t The FLASH BOR level:
  1123. * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1124. * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1125. * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1126. * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
  1127. */
  1128. static uint8_t FLASH_OB_GetBOR(void)
  1129. {
  1130. /* Return the FLASH BOR level */
  1131. return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
  1132. }
  1133. /**
  1134. * @brief Flush the instruction and data caches
  1135. * @retval None
  1136. */
  1137. void FLASH_FlushCaches(void)
  1138. {
  1139. /* Flush instruction cache */
  1140. if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET)
  1141. {
  1142. /* Disable instruction cache */
  1143. __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
  1144. /* Reset instruction cache */
  1145. __HAL_FLASH_INSTRUCTION_CACHE_RESET();
  1146. /* Enable instruction cache */
  1147. __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
  1148. }
  1149. /* Flush data cache */
  1150. if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
  1151. {
  1152. /* Disable data cache */
  1153. __HAL_FLASH_DATA_CACHE_DISABLE();
  1154. /* Reset data cache */
  1155. __HAL_FLASH_DATA_CACHE_RESET();
  1156. /* Enable data cache */
  1157. __HAL_FLASH_DATA_CACHE_ENABLE();
  1158. }
  1159. }
  1160. /**
  1161. * @}
  1162. */
  1163. #endif /* HAL_FLASH_MODULE_ENABLED */
  1164. /**
  1165. * @}
  1166. */
  1167. /**
  1168. * @}
  1169. */