You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 
 
 

1901 lines
74 KiB

  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32F4xx_LL_DMA2D_H
  20. #define STM32F4xx_LL_DMA2D_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f4xx.h"
  26. /** @addtogroup STM32F4xx_LL_Driver
  27. * @{
  28. */
  29. #if defined (DMA2D)
  30. /** @defgroup DMA2D_LL DMA2D
  31. * @{
  32. */
  33. /* Private types -------------------------------------------------------------*/
  34. /* Private variables ---------------------------------------------------------*/
  35. /* Private constants ---------------------------------------------------------*/
  36. /* Private macros ------------------------------------------------------------*/
  37. #if defined(USE_FULL_LL_DRIVER)
  38. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  39. * @{
  40. */
  41. /**
  42. * @}
  43. */
  44. #endif /*USE_FULL_LL_DRIVER*/
  45. /* Exported types ------------------------------------------------------------*/
  46. #if defined(USE_FULL_LL_DRIVER)
  47. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  48. * @{
  49. */
  50. /**
  51. * @brief LL DMA2D Init Structure Definition
  52. */
  53. typedef struct
  54. {
  55. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  56. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  57. This parameter can be modified afterwards,
  58. using unitary function @ref LL_DMA2D_SetMode(). */
  59. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  60. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  61. This parameter can be modified afterwards using,
  62. unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  63. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  64. - This parameter must be a number between:
  65. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  66. - This parameter must be a number between:
  67. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  68. - This parameter must be a number between:
  69. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  70. - This parameter must be a number between:
  71. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  72. - This parameter must be a number between:
  73. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  74. This parameter can be modified afterwards,
  75. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  76. function @ref LL_DMA2D_ConfigOutputColor(). */
  77. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  78. - This parameter must be a number between:
  79. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between:
  81. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  82. - This parameter must be a number between:
  83. Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  84. - This parameter must be a number between:
  85. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  86. - This parameter must be a number between:
  87. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  88. This parameter can be modified afterwards
  89. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  90. function @ref LL_DMA2D_ConfigOutputColor(). */
  91. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  92. - This parameter must be a number between:
  93. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  94. - This parameter must be a number between:
  95. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  96. - This parameter must be a number between:
  97. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  98. - This parameter must be a number between:
  99. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  100. - This parameter must be a number between:
  101. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  102. This parameter can be modified afterwards
  103. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  104. function @ref LL_DMA2D_ConfigOutputColor(). */
  105. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  106. - This parameter must be a number between:
  107. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  108. - This parameter must be a number between:
  109. Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  110. - This parameter must be a number between:
  111. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  112. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  113. This parameter can be modified afterwards using,
  114. unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  115. function @ref LL_DMA2D_ConfigOutputColor(). */
  116. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  117. - This parameter must be a number between:
  118. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  119. This parameter can be modified afterwards,
  120. using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  121. uint32_t LineOffset; /*!< Specifies the output line offset value.
  122. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  123. This parameter can be modified afterwards,
  124. using unitary function @ref LL_DMA2D_SetLineOffset(). */
  125. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  126. - This parameter must be a number between:
  127. Min_Data = 0x0000 and Max_Data = 0xFFFF.
  128. This parameter can be modified afterwards,
  129. using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  130. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transferred.
  131. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  132. This parameter can be modified afterwards using,
  133. unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  134. } LL_DMA2D_InitTypeDef;
  135. /**
  136. * @brief LL DMA2D Layer Configuration Structure Definition
  137. */
  138. typedef struct
  139. {
  140. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  141. - This parameter must be a number between:
  142. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  143. This parameter can be modified afterwards using unitary functions
  144. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  145. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  146. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  147. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  148. This parameter can be modified afterwards using unitary functions
  149. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  150. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  151. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  152. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  153. This parameter can be modified afterwards using unitary functions
  154. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  155. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  156. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  157. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  158. This parameter can be modified afterwards using unitary functions
  159. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  160. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  161. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  162. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  163. This parameter can be modified afterwards using unitary functions
  164. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  165. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  166. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  167. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  168. This parameter can be modified afterwards using unitary functions
  169. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  170. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  171. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  172. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  173. This parameter can be modified afterwards using unitary functions
  174. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  175. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  176. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  177. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  178. This parameter can be modified afterwards using unitary functions
  179. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  180. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  181. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  182. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  183. This parameter can be modified afterwards using unitary functions
  184. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  185. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  186. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  187. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  188. This parameter can be modified afterwards using unitary functions
  189. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  190. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  191. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  192. - This parameter must be a number between:
  193. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  194. This parameter can be modified afterwards using unitary functions
  195. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  196. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  197. } LL_DMA2D_LayerCfgTypeDef;
  198. /**
  199. * @brief LL DMA2D Output Color Structure Definition
  200. */
  201. typedef struct
  202. {
  203. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  204. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  205. This parameter can be modified afterwards using
  206. unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  207. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  208. - This parameter must be a number between:
  209. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  210. - This parameter must be a number between:
  211. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  212. - This parameter must be a number between:
  213. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  214. - This parameter must be a number between:
  215. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  216. - This parameter must be a number between:
  217. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  218. This parameter can be modified afterwards using,
  219. unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  220. function @ref LL_DMA2D_ConfigOutputColor(). */
  221. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  222. - This parameter must be a number between:
  223. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  224. - This parameter must be a number between
  225. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  226. - This parameter must be a number between:
  227. Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  228. - This parameter must be a number between:
  229. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  230. - This parameter must be a number between:
  231. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  232. This parameter can be modified afterwards,
  233. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  234. function @ref LL_DMA2D_ConfigOutputColor(). */
  235. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  236. - This parameter must be a number between:
  237. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  238. - This parameter must be a number between:
  239. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  240. - This parameter must be a number between:
  241. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  242. - This parameter must be a number between:
  243. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  244. - This parameter must be a number between:
  245. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  246. This parameter can be modified afterwards,
  247. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  248. function @ref LL_DMA2D_ConfigOutputColor(). */
  249. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  250. - This parameter must be a number between:
  251. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  252. - This parameter must be a number between:
  253. Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  254. - This parameter must be a number between:
  255. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  256. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  257. This parameter can be modified afterwards,
  258. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  259. function @ref LL_DMA2D_ConfigOutputColor(). */
  260. } LL_DMA2D_ColorTypeDef;
  261. /**
  262. * @}
  263. */
  264. #endif /* USE_FULL_LL_DRIVER */
  265. /* Exported constants --------------------------------------------------------*/
  266. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  267. * @{
  268. */
  269. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  270. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  271. * @{
  272. */
  273. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  274. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  275. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  276. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  277. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  278. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  279. /**
  280. * @}
  281. */
  282. /** @defgroup DMA2D_LL_EC_IT IT Defines
  283. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  284. * @{
  285. */
  286. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  287. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  288. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  289. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  290. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  291. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  292. /**
  293. * @}
  294. */
  295. /** @defgroup DMA2D_LL_EC_MODE Mode
  296. * @{
  297. */
  298. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  299. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  300. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  301. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  302. /**
  303. * @}
  304. */
  305. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  306. * @{
  307. */
  308. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  309. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  310. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  311. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  312. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  313. /**
  314. * @}
  315. */
  316. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  317. * @{
  318. */
  319. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  320. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  321. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  322. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  323. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  324. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  325. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  326. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  327. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  328. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  329. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  330. /**
  331. * @}
  332. */
  333. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  334. * @{
  335. */
  336. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  337. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by
  338. programmed alpha value */
  339. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by
  340. programmed alpha value with,
  341. original alpha channel value */
  342. /**
  343. * @}
  344. */
  345. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  346. * @{
  347. */
  348. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  349. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  350. /**
  351. * @}
  352. */
  353. /**
  354. * @}
  355. */
  356. /* Exported macro ------------------------------------------------------------*/
  357. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  358. * @{
  359. */
  360. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  361. * @{
  362. */
  363. /**
  364. * @brief Write a value in DMA2D register.
  365. * @param __INSTANCE__ DMA2D Instance
  366. * @param __REG__ Register to be written
  367. * @param __VALUE__ Value to be written in the register
  368. * @retval None
  369. */
  370. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
  371. /**
  372. * @brief Read a value in DMA2D register.
  373. * @param __INSTANCE__ DMA2D Instance
  374. * @param __REG__ Register to be read
  375. * @retval Register value
  376. */
  377. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
  378. /**
  379. * @}
  380. */
  381. /**
  382. * @}
  383. */
  384. /* Exported functions --------------------------------------------------------*/
  385. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  386. * @{
  387. */
  388. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  389. * @{
  390. */
  391. /**
  392. * @brief Start a DMA2D transfer.
  393. * @rmtoll CR START LL_DMA2D_Start
  394. * @param DMA2Dx DMA2D Instance
  395. * @retval None
  396. */
  397. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  398. {
  399. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  400. }
  401. /**
  402. * @brief Indicate if a DMA2D transfer is ongoing.
  403. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  404. * @param DMA2Dx DMA2D Instance
  405. * @retval State of bit (1 or 0).
  406. */
  407. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(const DMA2D_TypeDef *DMA2Dx)
  408. {
  409. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
  410. }
  411. /**
  412. * @brief Suspend DMA2D transfer.
  413. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  414. * @rmtoll CR SUSP LL_DMA2D_Suspend
  415. * @param DMA2Dx DMA2D Instance
  416. * @retval None
  417. */
  418. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  419. {
  420. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  421. }
  422. /**
  423. * @brief Resume DMA2D transfer.
  424. * @note This API can be used to resume automatic foreground or background CLUT loading.
  425. * @rmtoll CR SUSP LL_DMA2D_Resume
  426. * @param DMA2Dx DMA2D Instance
  427. * @retval None
  428. */
  429. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  430. {
  431. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  432. }
  433. /**
  434. * @brief Indicate if DMA2D transfer is suspended.
  435. * @note This API can be used to indicate whether or not automatic foreground or
  436. * background CLUT loading is suspended.
  437. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  438. * @param DMA2Dx DMA2D Instance
  439. * @retval State of bit (1 or 0).
  440. */
  441. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(const DMA2D_TypeDef *DMA2Dx)
  442. {
  443. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
  444. }
  445. /**
  446. * @brief Abort DMA2D transfer.
  447. * @note This API can be used to abort automatic foreground or background CLUT loading.
  448. * @rmtoll CR ABORT LL_DMA2D_Abort
  449. * @param DMA2Dx DMA2D Instance
  450. * @retval None
  451. */
  452. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  453. {
  454. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  455. }
  456. /**
  457. * @brief Indicate if DMA2D transfer is aborted.
  458. * @note This API can be used to indicate whether or not automatic foreground or
  459. * background CLUT loading is aborted.
  460. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  461. * @param DMA2Dx DMA2D Instance
  462. * @retval State of bit (1 or 0).
  463. */
  464. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(const DMA2D_TypeDef *DMA2Dx)
  465. {
  466. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
  467. }
  468. /**
  469. * @brief Set DMA2D mode.
  470. * @rmtoll CR MODE LL_DMA2D_SetMode
  471. * @param DMA2Dx DMA2D Instance
  472. * @param Mode This parameter can be one of the following values:
  473. * @arg @ref LL_DMA2D_MODE_M2M
  474. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  475. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  476. * @arg @ref LL_DMA2D_MODE_R2M
  477. * @retval None
  478. */
  479. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  480. {
  481. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  482. }
  483. /**
  484. * @brief Return DMA2D mode
  485. * @rmtoll CR MODE LL_DMA2D_GetMode
  486. * @param DMA2Dx DMA2D Instance
  487. * @retval Returned value can be one of the following values:
  488. * @arg @ref LL_DMA2D_MODE_M2M
  489. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  490. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  491. * @arg @ref LL_DMA2D_MODE_R2M
  492. */
  493. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(const DMA2D_TypeDef *DMA2Dx)
  494. {
  495. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  496. }
  497. /**
  498. * @brief Set DMA2D output color mode.
  499. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  500. * @param DMA2Dx DMA2D Instance
  501. * @param ColorMode This parameter can be one of the following values:
  502. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  503. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  504. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  505. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  506. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  507. * @retval None
  508. */
  509. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  510. {
  511. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  512. }
  513. /**
  514. * @brief Return DMA2D output color mode.
  515. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  516. * @param DMA2Dx DMA2D Instance
  517. * @retval Returned value can be one of the following values:
  518. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  519. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  520. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  521. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  522. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  523. */
  524. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(const DMA2D_TypeDef *DMA2Dx)
  525. {
  526. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  527. }
  528. /**
  529. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  530. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  531. * @param DMA2Dx DMA2D Instance
  532. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  533. * @retval None
  534. */
  535. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  536. {
  537. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  538. }
  539. /**
  540. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  541. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  542. * @param DMA2Dx DMA2D Instance
  543. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  544. */
  545. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(const DMA2D_TypeDef *DMA2Dx)
  546. {
  547. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  548. }
  549. /**
  550. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  551. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  552. * @param DMA2Dx DMA2D Instance
  553. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  554. * @retval None
  555. */
  556. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  557. {
  558. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  559. }
  560. /**
  561. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  562. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  563. * @param DMA2Dx DMA2D Instance
  564. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  565. */
  566. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(const DMA2D_TypeDef *DMA2Dx)
  567. {
  568. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  569. }
  570. /**
  571. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  572. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  573. * @param DMA2Dx DMA2D Instance
  574. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  575. * @retval None
  576. */
  577. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  578. {
  579. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  580. }
  581. /**
  582. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  583. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  584. * @param DMA2Dx DMA2D Instance
  585. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  586. */
  587. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(const DMA2D_TypeDef *DMA2Dx)
  588. {
  589. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  590. }
  591. /**
  592. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  593. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  594. * @param DMA2Dx DMA2D Instance
  595. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  596. * @retval None
  597. */
  598. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  599. {
  600. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  601. }
  602. /**
  603. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  604. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  605. * @param DMA2Dx DMA2D Instance
  606. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  607. */
  608. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(const DMA2D_TypeDef *DMA2Dx)
  609. {
  610. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  611. }
  612. /**
  613. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  614. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  615. * RGB565, ARGB1555 or ARGB4444.
  616. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  617. * with respect to color mode is not done by the user code.
  618. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  619. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  620. * OCOLR RED LL_DMA2D_SetOutputColor\n
  621. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  622. * @param DMA2Dx DMA2D Instance
  623. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  624. * @retval None
  625. */
  626. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  627. {
  628. WRITE_REG(DMA2Dx->OCOLR, OutputColor);
  629. }
  630. /**
  631. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  632. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  633. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  634. * as set by @ref LL_DMA2D_SetOutputColorMode.
  635. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  636. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  637. * OCOLR RED LL_DMA2D_GetOutputColor\n
  638. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  639. * @param DMA2Dx DMA2D Instance
  640. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  641. */
  642. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(const DMA2D_TypeDef *DMA2Dx)
  643. {
  644. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  645. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  646. }
  647. /**
  648. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  649. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  650. * @param DMA2Dx DMA2D Instance
  651. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  652. * @retval None
  653. */
  654. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  655. {
  656. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  657. }
  658. /**
  659. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  660. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  661. * @param DMA2Dx DMA2D Instance
  662. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  663. */
  664. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(const DMA2D_TypeDef *DMA2Dx)
  665. {
  666. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  667. }
  668. /**
  669. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  670. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  671. * @param DMA2Dx DMA2D Instance
  672. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  673. * @retval None
  674. */
  675. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  676. {
  677. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  678. }
  679. /**
  680. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  681. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  682. * @param DMA2Dx DMA2D Instance
  683. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  684. */
  685. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(const DMA2D_TypeDef *DMA2Dx)
  686. {
  687. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  688. }
  689. /**
  690. * @brief Enable DMA2D dead time functionality.
  691. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  692. * @param DMA2Dx DMA2D Instance
  693. * @retval None
  694. */
  695. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  696. {
  697. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  698. }
  699. /**
  700. * @brief Disable DMA2D dead time functionality.
  701. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  702. * @param DMA2Dx DMA2D Instance
  703. * @retval None
  704. */
  705. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  706. {
  707. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  708. }
  709. /**
  710. * @brief Indicate if DMA2D dead time functionality is enabled.
  711. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  712. * @param DMA2Dx DMA2D Instance
  713. * @retval State of bit (1 or 0).
  714. */
  715. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(const DMA2D_TypeDef *DMA2Dx)
  716. {
  717. return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
  718. }
  719. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  720. * @{
  721. */
  722. /**
  723. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  724. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  725. * @param DMA2Dx DMA2D Instance
  726. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  727. * @retval None
  728. */
  729. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  730. {
  731. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  732. }
  733. /**
  734. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  735. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  736. * @param DMA2Dx DMA2D Instance
  737. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  738. */
  739. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(const DMA2D_TypeDef *DMA2Dx)
  740. {
  741. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  742. }
  743. /**
  744. * @brief Enable DMA2D foreground CLUT loading.
  745. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  746. * @param DMA2Dx DMA2D Instance
  747. * @retval None
  748. */
  749. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  750. {
  751. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  752. }
  753. /**
  754. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  755. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  756. * @param DMA2Dx DMA2D Instance
  757. * @retval State of bit (1 or 0).
  758. */
  759. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(const DMA2D_TypeDef *DMA2Dx)
  760. {
  761. return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
  762. }
  763. /**
  764. * @brief Set DMA2D foreground color mode.
  765. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  766. * @param DMA2Dx DMA2D Instance
  767. * @param ColorMode This parameter can be one of the following values:
  768. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  769. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  770. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  771. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  772. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  773. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  774. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  775. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  776. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  777. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  778. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  779. * @retval None
  780. */
  781. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  782. {
  783. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  784. }
  785. /**
  786. * @brief Return DMA2D foreground color mode.
  787. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  788. * @param DMA2Dx DMA2D Instance
  789. * @retval Returned value can be one of the following values:
  790. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  791. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  792. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  793. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  794. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  795. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  796. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  797. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  798. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  799. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  800. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  801. */
  802. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(const DMA2D_TypeDef *DMA2Dx)
  803. {
  804. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  805. }
  806. /**
  807. * @brief Set DMA2D foreground alpha mode.
  808. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  809. * @param DMA2Dx DMA2D Instance
  810. * @param AphaMode This parameter can be one of the following values:
  811. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  812. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  813. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  814. * @retval None
  815. */
  816. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  817. {
  818. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  819. }
  820. /**
  821. * @brief Return DMA2D foreground alpha mode.
  822. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  823. * @param DMA2Dx DMA2D Instance
  824. * @retval Returned value can be one of the following values:
  825. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  826. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  827. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  828. */
  829. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(const DMA2D_TypeDef *DMA2Dx)
  830. {
  831. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  832. }
  833. /**
  834. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  835. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  836. * @param DMA2Dx DMA2D Instance
  837. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  838. * @retval None
  839. */
  840. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  841. {
  842. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  843. }
  844. /**
  845. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  846. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  847. * @param DMA2Dx DMA2D Instance
  848. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  849. */
  850. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(const DMA2D_TypeDef *DMA2Dx)
  851. {
  852. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  853. }
  854. /**
  855. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  856. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  857. * @param DMA2Dx DMA2D Instance
  858. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  859. * @retval None
  860. */
  861. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  862. {
  863. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  864. }
  865. /**
  866. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  867. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  868. * @param DMA2Dx DMA2D Instance
  869. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  870. */
  871. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(const DMA2D_TypeDef *DMA2Dx)
  872. {
  873. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  874. }
  875. /**
  876. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  877. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  878. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  879. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  880. * @param DMA2Dx DMA2D Instance
  881. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  882. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  883. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  884. * @retval None
  885. */
  886. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  887. {
  888. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  889. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  890. }
  891. /**
  892. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  893. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  894. * @param DMA2Dx DMA2D Instance
  895. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  896. * @retval None
  897. */
  898. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  899. {
  900. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  901. }
  902. /**
  903. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  904. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  905. * @param DMA2Dx DMA2D Instance
  906. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  907. */
  908. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(const DMA2D_TypeDef *DMA2Dx)
  909. {
  910. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  911. }
  912. /**
  913. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  914. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  915. * @param DMA2Dx DMA2D Instance
  916. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  917. * @retval None
  918. */
  919. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  920. {
  921. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  922. }
  923. /**
  924. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  925. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  926. * @param DMA2Dx DMA2D Instance
  927. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  928. */
  929. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(const DMA2D_TypeDef *DMA2Dx)
  930. {
  931. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  932. }
  933. /**
  934. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  935. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  936. * @param DMA2Dx DMA2D Instance
  937. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  938. * @retval None
  939. */
  940. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  941. {
  942. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  943. }
  944. /**
  945. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  946. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  947. * @param DMA2Dx DMA2D Instance
  948. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  949. */
  950. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(const DMA2D_TypeDef *DMA2Dx)
  951. {
  952. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  953. }
  954. /**
  955. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  956. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  957. * @param DMA2Dx DMA2D Instance
  958. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  959. * @retval None
  960. */
  961. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  962. {
  963. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  964. }
  965. /**
  966. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  967. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  968. * @param DMA2Dx DMA2D Instance
  969. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  970. */
  971. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(const DMA2D_TypeDef *DMA2Dx)
  972. {
  973. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  974. }
  975. /**
  976. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  977. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  978. * @param DMA2Dx DMA2D Instance
  979. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  980. * @retval None
  981. */
  982. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  983. {
  984. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  985. }
  986. /**
  987. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  988. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  989. * @param DMA2Dx DMA2D Instance
  990. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  991. */
  992. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(const DMA2D_TypeDef *DMA2Dx)
  993. {
  994. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  995. }
  996. /**
  997. * @brief Set DMA2D foreground CLUT color mode.
  998. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  999. * @param DMA2Dx DMA2D Instance
  1000. * @param CLUTColorMode This parameter can be one of the following values:
  1001. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1002. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1003. * @retval None
  1004. */
  1005. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1006. {
  1007. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1008. }
  1009. /**
  1010. * @brief Return DMA2D foreground CLUT color mode.
  1011. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1012. * @param DMA2Dx DMA2D Instance
  1013. * @retval Returned value can be one of the following values:
  1014. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1015. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1016. */
  1017. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(const DMA2D_TypeDef *DMA2Dx)
  1018. {
  1019. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1020. }
  1021. /**
  1022. * @}
  1023. */
  1024. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1025. * @{
  1026. */
  1027. /**
  1028. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1029. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1030. * @param DMA2Dx DMA2D Instance
  1031. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1032. * @retval None
  1033. */
  1034. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1035. {
  1036. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1037. }
  1038. /**
  1039. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1040. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1041. * @param DMA2Dx DMA2D Instance
  1042. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1043. */
  1044. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(const DMA2D_TypeDef *DMA2Dx)
  1045. {
  1046. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1047. }
  1048. /**
  1049. * @brief Enable DMA2D background CLUT loading.
  1050. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1051. * @param DMA2Dx DMA2D Instance
  1052. * @retval None
  1053. */
  1054. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1055. {
  1056. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1057. }
  1058. /**
  1059. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1060. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1061. * @param DMA2Dx DMA2D Instance
  1062. * @retval State of bit (1 or 0).
  1063. */
  1064. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(const DMA2D_TypeDef *DMA2Dx)
  1065. {
  1066. return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
  1067. }
  1068. /**
  1069. * @brief Set DMA2D background color mode.
  1070. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1071. * @param DMA2Dx DMA2D Instance
  1072. * @param ColorMode This parameter can be one of the following values:
  1073. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1074. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1075. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1076. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1077. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1078. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1079. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1080. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1081. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1082. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1083. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1084. * @retval None
  1085. */
  1086. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1087. {
  1088. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1089. }
  1090. /**
  1091. * @brief Return DMA2D background color mode.
  1092. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1093. * @param DMA2Dx DMA2D Instance
  1094. * @retval Returned value can be one of the following values:
  1095. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1096. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1097. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1098. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1099. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1100. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1101. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1102. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1103. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1104. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1105. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1106. */
  1107. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(const DMA2D_TypeDef *DMA2Dx)
  1108. {
  1109. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1110. }
  1111. /**
  1112. * @brief Set DMA2D background alpha mode.
  1113. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1114. * @param DMA2Dx DMA2D Instance
  1115. * @param AphaMode This parameter can be one of the following values:
  1116. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1117. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1118. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1119. * @retval None
  1120. */
  1121. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1122. {
  1123. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1124. }
  1125. /**
  1126. * @brief Return DMA2D background alpha mode.
  1127. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1128. * @param DMA2Dx DMA2D Instance
  1129. * @retval Returned value can be one of the following values:
  1130. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1131. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1132. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1133. */
  1134. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(const DMA2D_TypeDef *DMA2Dx)
  1135. {
  1136. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1137. }
  1138. /**
  1139. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1140. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1141. * @param DMA2Dx DMA2D Instance
  1142. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1143. * @retval None
  1144. */
  1145. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1146. {
  1147. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1148. }
  1149. /**
  1150. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1151. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1152. * @param DMA2Dx DMA2D Instance
  1153. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1154. */
  1155. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(const DMA2D_TypeDef *DMA2Dx)
  1156. {
  1157. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1158. }
  1159. /**
  1160. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1161. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1162. * @param DMA2Dx DMA2D Instance
  1163. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1164. * @retval None
  1165. */
  1166. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1167. {
  1168. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1169. }
  1170. /**
  1171. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1172. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1173. * @param DMA2Dx DMA2D Instance
  1174. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1175. */
  1176. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(const DMA2D_TypeDef *DMA2Dx)
  1177. {
  1178. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1179. }
  1180. /**
  1181. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1182. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1183. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1184. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1185. * @param DMA2Dx DMA2D Instance
  1186. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1187. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1188. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1189. * @retval None
  1190. */
  1191. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1192. {
  1193. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1194. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1195. }
  1196. /**
  1197. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1198. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1199. * @param DMA2Dx DMA2D Instance
  1200. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1201. * @retval None
  1202. */
  1203. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1204. {
  1205. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1206. }
  1207. /**
  1208. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1209. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1210. * @param DMA2Dx DMA2D Instance
  1211. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1212. */
  1213. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(const DMA2D_TypeDef *DMA2Dx)
  1214. {
  1215. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1216. }
  1217. /**
  1218. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1219. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1220. * @param DMA2Dx DMA2D Instance
  1221. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1222. * @retval None
  1223. */
  1224. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1225. {
  1226. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1227. }
  1228. /**
  1229. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1230. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1231. * @param DMA2Dx DMA2D Instance
  1232. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1233. */
  1234. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(const DMA2D_TypeDef *DMA2Dx)
  1235. {
  1236. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1237. }
  1238. /**
  1239. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1240. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1241. * @param DMA2Dx DMA2D Instance
  1242. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1243. * @retval None
  1244. */
  1245. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1246. {
  1247. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1248. }
  1249. /**
  1250. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1251. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1252. * @param DMA2Dx DMA2D Instance
  1253. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1254. */
  1255. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(const DMA2D_TypeDef *DMA2Dx)
  1256. {
  1257. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1258. }
  1259. /**
  1260. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1261. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1262. * @param DMA2Dx DMA2D Instance
  1263. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1264. * @retval None
  1265. */
  1266. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1267. {
  1268. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1269. }
  1270. /**
  1271. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1272. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1273. * @param DMA2Dx DMA2D Instance
  1274. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1275. */
  1276. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(const DMA2D_TypeDef *DMA2Dx)
  1277. {
  1278. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1279. }
  1280. /**
  1281. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1282. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1283. * @param DMA2Dx DMA2D Instance
  1284. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1285. * @retval None
  1286. */
  1287. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1288. {
  1289. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1290. }
  1291. /**
  1292. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1293. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1294. * @param DMA2Dx DMA2D Instance
  1295. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1296. */
  1297. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(const DMA2D_TypeDef *DMA2Dx)
  1298. {
  1299. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1300. }
  1301. /**
  1302. * @brief Set DMA2D background CLUT color mode.
  1303. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1304. * @param DMA2Dx DMA2D Instance
  1305. * @param CLUTColorMode This parameter can be one of the following values:
  1306. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1307. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1308. * @retval None
  1309. */
  1310. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1311. {
  1312. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1313. }
  1314. /**
  1315. * @brief Return DMA2D background CLUT color mode.
  1316. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1317. * @param DMA2Dx DMA2D Instance
  1318. * @retval Returned value can be one of the following values:
  1319. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1320. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1321. */
  1322. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(const DMA2D_TypeDef *DMA2Dx)
  1323. {
  1324. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1325. }
  1326. /**
  1327. * @}
  1328. */
  1329. /**
  1330. * @}
  1331. */
  1332. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1333. * @{
  1334. */
  1335. /**
  1336. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1337. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1338. * @param DMA2Dx DMA2D Instance
  1339. * @retval State of bit (1 or 0).
  1340. */
  1341. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(const DMA2D_TypeDef *DMA2Dx)
  1342. {
  1343. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
  1344. }
  1345. /**
  1346. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1347. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1348. * @param DMA2Dx DMA2D Instance
  1349. * @retval State of bit (1 or 0).
  1350. */
  1351. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(const DMA2D_TypeDef *DMA2Dx)
  1352. {
  1353. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
  1354. }
  1355. /**
  1356. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1357. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1358. * @param DMA2Dx DMA2D Instance
  1359. * @retval State of bit (1 or 0).
  1360. */
  1361. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(const DMA2D_TypeDef *DMA2Dx)
  1362. {
  1363. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
  1364. }
  1365. /**
  1366. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1367. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1368. * @param DMA2Dx DMA2D Instance
  1369. * @retval State of bit (1 or 0).
  1370. */
  1371. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(const DMA2D_TypeDef *DMA2Dx)
  1372. {
  1373. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
  1374. }
  1375. /**
  1376. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1377. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1378. * @param DMA2Dx DMA2D Instance
  1379. * @retval State of bit (1 or 0).
  1380. */
  1381. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(const DMA2D_TypeDef *DMA2Dx)
  1382. {
  1383. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
  1384. }
  1385. /**
  1386. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1387. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1388. * @param DMA2Dx DMA2D Instance
  1389. * @retval State of bit (1 or 0).
  1390. */
  1391. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(const DMA2D_TypeDef *DMA2Dx)
  1392. {
  1393. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
  1394. }
  1395. /**
  1396. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1397. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1398. * @param DMA2Dx DMA2D Instance
  1399. * @retval None
  1400. */
  1401. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1402. {
  1403. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1404. }
  1405. /**
  1406. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1407. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1408. * @param DMA2Dx DMA2D Instance
  1409. * @retval None
  1410. */
  1411. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1412. {
  1413. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1414. }
  1415. /**
  1416. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1417. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1418. * @param DMA2Dx DMA2D Instance
  1419. * @retval None
  1420. */
  1421. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1422. {
  1423. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1424. }
  1425. /**
  1426. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1427. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1428. * @param DMA2Dx DMA2D Instance
  1429. * @retval None
  1430. */
  1431. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1432. {
  1433. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1434. }
  1435. /**
  1436. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1437. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1438. * @param DMA2Dx DMA2D Instance
  1439. * @retval None
  1440. */
  1441. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1442. {
  1443. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1444. }
  1445. /**
  1446. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1447. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1448. * @param DMA2Dx DMA2D Instance
  1449. * @retval None
  1450. */
  1451. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1452. {
  1453. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1454. }
  1455. /**
  1456. * @}
  1457. */
  1458. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1459. * @{
  1460. */
  1461. /**
  1462. * @brief Enable Configuration Error Interrupt
  1463. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1464. * @param DMA2Dx DMA2D Instance
  1465. * @retval None
  1466. */
  1467. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1468. {
  1469. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1470. }
  1471. /**
  1472. * @brief Enable CLUT Transfer Complete Interrupt
  1473. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1474. * @param DMA2Dx DMA2D Instance
  1475. * @retval None
  1476. */
  1477. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1478. {
  1479. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1480. }
  1481. /**
  1482. * @brief Enable CLUT Access Error Interrupt
  1483. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1484. * @param DMA2Dx DMA2D Instance
  1485. * @retval None
  1486. */
  1487. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1488. {
  1489. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1490. }
  1491. /**
  1492. * @brief Enable Transfer Watermark Interrupt
  1493. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1494. * @param DMA2Dx DMA2D Instance
  1495. * @retval None
  1496. */
  1497. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1498. {
  1499. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1500. }
  1501. /**
  1502. * @brief Enable Transfer Complete Interrupt
  1503. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1504. * @param DMA2Dx DMA2D Instance
  1505. * @retval None
  1506. */
  1507. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1508. {
  1509. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1510. }
  1511. /**
  1512. * @brief Enable Transfer Error Interrupt
  1513. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1514. * @param DMA2Dx DMA2D Instance
  1515. * @retval None
  1516. */
  1517. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1518. {
  1519. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1520. }
  1521. /**
  1522. * @brief Disable Configuration Error Interrupt
  1523. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1524. * @param DMA2Dx DMA2D Instance
  1525. * @retval None
  1526. */
  1527. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1528. {
  1529. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1530. }
  1531. /**
  1532. * @brief Disable CLUT Transfer Complete Interrupt
  1533. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1534. * @param DMA2Dx DMA2D Instance
  1535. * @retval None
  1536. */
  1537. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1538. {
  1539. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1540. }
  1541. /**
  1542. * @brief Disable CLUT Access Error Interrupt
  1543. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1544. * @param DMA2Dx DMA2D Instance
  1545. * @retval None
  1546. */
  1547. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1548. {
  1549. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1550. }
  1551. /**
  1552. * @brief Disable Transfer Watermark Interrupt
  1553. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1554. * @param DMA2Dx DMA2D Instance
  1555. * @retval None
  1556. */
  1557. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1558. {
  1559. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1560. }
  1561. /**
  1562. * @brief Disable Transfer Complete Interrupt
  1563. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1564. * @param DMA2Dx DMA2D Instance
  1565. * @retval None
  1566. */
  1567. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1568. {
  1569. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1570. }
  1571. /**
  1572. * @brief Disable Transfer Error Interrupt
  1573. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1574. * @param DMA2Dx DMA2D Instance
  1575. * @retval None
  1576. */
  1577. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1578. {
  1579. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1580. }
  1581. /**
  1582. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1583. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1584. * @param DMA2Dx DMA2D Instance
  1585. * @retval State of bit (1 or 0).
  1586. */
  1587. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(const DMA2D_TypeDef *DMA2Dx)
  1588. {
  1589. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
  1590. }
  1591. /**
  1592. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1593. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1594. * @param DMA2Dx DMA2D Instance
  1595. * @retval State of bit (1 or 0).
  1596. */
  1597. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(const DMA2D_TypeDef *DMA2Dx)
  1598. {
  1599. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
  1600. }
  1601. /**
  1602. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1603. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1604. * @param DMA2Dx DMA2D Instance
  1605. * @retval State of bit (1 or 0).
  1606. */
  1607. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(const DMA2D_TypeDef *DMA2Dx)
  1608. {
  1609. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
  1610. }
  1611. /**
  1612. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1613. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1614. * @param DMA2Dx DMA2D Instance
  1615. * @retval State of bit (1 or 0).
  1616. */
  1617. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(const DMA2D_TypeDef *DMA2Dx)
  1618. {
  1619. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
  1620. }
  1621. /**
  1622. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1623. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1624. * @param DMA2Dx DMA2D Instance
  1625. * @retval State of bit (1 or 0).
  1626. */
  1627. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(const DMA2D_TypeDef *DMA2Dx)
  1628. {
  1629. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
  1630. }
  1631. /**
  1632. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1633. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1634. * @param DMA2Dx DMA2D Instance
  1635. * @retval State of bit (1 or 0).
  1636. */
  1637. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(const DMA2D_TypeDef *DMA2Dx)
  1638. {
  1639. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
  1640. }
  1641. /**
  1642. * @}
  1643. */
  1644. #if defined(USE_FULL_LL_DRIVER)
  1645. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1646. * @{
  1647. */
  1648. ErrorStatus LL_DMA2D_DeInit(const DMA2D_TypeDef *DMA2Dx);
  1649. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1650. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1651. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1652. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1653. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1654. uint32_t LL_DMA2D_GetOutputBlueColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1655. uint32_t LL_DMA2D_GetOutputGreenColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1656. uint32_t LL_DMA2D_GetOutputRedColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1657. uint32_t LL_DMA2D_GetOutputAlphaColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1658. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1659. /**
  1660. * @}
  1661. */
  1662. #endif /* USE_FULL_LL_DRIVER */
  1663. /**
  1664. * @}
  1665. */
  1666. /**
  1667. * @}
  1668. */
  1669. #endif /* defined (DMA2D) */
  1670. /**
  1671. * @}
  1672. */
  1673. #ifdef __cplusplus
  1674. }
  1675. #endif
  1676. #endif /* STM32F4xx_LL_DMA2D_H */