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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_sdram.c
  4. * @author MCD Application Team
  5. * @brief SDRAM HAL module driver.
  6. * This file provides a generic firmware to drive SDRAM memories mounted
  7. * as external device.
  8. *
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * Copyright (c) 2016 STMicroelectronics.
  13. * All rights reserved.
  14. *
  15. * This software is licensed under terms that can be found in the LICENSE file
  16. * in the root directory of this software component.
  17. * If no LICENSE file comes with this software, it is provided AS-IS.
  18. *
  19. ******************************************************************************
  20. @verbatim
  21. ==============================================================================
  22. ##### How to use this driver #####
  23. ==============================================================================
  24. [..]
  25. This driver is a generic layered driver which contains a set of APIs used to
  26. control SDRAM memories. It uses the FMC layer functions to interface
  27. with SDRAM devices.
  28. The following sequence should be followed to configure the FMC to interface
  29. with SDRAM memories:
  30. (#) Declare a SDRAM_HandleTypeDef handle structure, for example:
  31. SDRAM_HandleTypeDef hsdram
  32. (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
  33. values of the structure member.
  34. (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
  35. base register instance for NOR or SDRAM device
  36. (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
  37. FMC_SDRAM_TimingTypeDef Timing;
  38. and fill its fields with the allowed values of the structure member.
  39. (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
  40. performs the following sequence:
  41. (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
  42. (##) Control register configuration using the FMC SDRAM interface function
  43. FMC_SDRAM_Init()
  44. (##) Timing register configuration using the FMC SDRAM interface function
  45. FMC_SDRAM_Timing_Init()
  46. (##) Program the SDRAM external device by applying its initialization sequence
  47. according to the device plugged in your hardware. This step is mandatory
  48. for accessing the SDRAM device.
  49. (#) At this stage you can perform read/write accesses from/to the memory connected
  50. to the SDRAM Bank. You can perform either polling or DMA transfer using the
  51. following APIs:
  52. (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
  53. (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
  54. (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
  55. HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
  56. the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
  57. device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
  58. structure.
  59. (#) You can continuously monitor the SDRAM device HAL state by calling the function
  60. HAL_SDRAM_GetState()
  61. *** Callback registration ***
  62. =============================================
  63. [..]
  64. The compilation define USE_HAL_SDRAM_REGISTER_CALLBACKS when set to 1
  65. allows the user to configure dynamically the driver callbacks.
  66. Use Functions HAL_SDRAM_RegisterCallback() to register a user callback,
  67. it allows to register following callbacks:
  68. (+) MspInitCallback : SDRAM MspInit.
  69. (+) MspDeInitCallback : SDRAM MspDeInit.
  70. This function takes as parameters the HAL peripheral handle, the Callback ID
  71. and a pointer to the user callback function.
  72. Use function HAL_SDRAM_UnRegisterCallback() to reset a callback to the default
  73. weak (overridden) function. It allows to reset following callbacks:
  74. (+) MspInitCallback : SDRAM MspInit.
  75. (+) MspDeInitCallback : SDRAM MspDeInit.
  76. This function) takes as parameters the HAL peripheral handle and the Callback ID.
  77. By default, after the HAL_SDRAM_Init and if the state is HAL_SDRAM_STATE_RESET
  78. all callbacks are reset to the corresponding legacy weak (overridden) functions.
  79. Exception done for MspInit and MspDeInit callbacks that are respectively
  80. reset to the legacy weak (overridden) functions in the HAL_SDRAM_Init
  81. and HAL_SDRAM_DeInit only when these callbacks are null (not registered beforehand).
  82. If not, MspInit or MspDeInit are not null, the HAL_SDRAM_Init and HAL_SDRAM_DeInit
  83. keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
  84. Callbacks can be registered/unregistered in READY state only.
  85. Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
  86. in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
  87. during the Init/DeInit.
  88. In that case first register the MspInit/MspDeInit user callbacks
  89. using HAL_SDRAM_RegisterCallback before calling HAL_SDRAM_DeInit
  90. or HAL_SDRAM_Init function.
  91. When The compilation define USE_HAL_SDRAM_REGISTER_CALLBACKS is set to 0 or
  92. not defined, the callback registering feature is not available
  93. and weak (overridden) callbacks are used.
  94. @endverbatim
  95. ******************************************************************************
  96. */
  97. /* Includes ------------------------------------------------------------------*/
  98. #include "stm32f4xx_hal.h"
  99. #if defined(FMC_Bank5_6)
  100. /** @addtogroup STM32F4xx_HAL_Driver
  101. * @{
  102. */
  103. #ifdef HAL_SDRAM_MODULE_ENABLED
  104. /** @defgroup SDRAM SDRAM
  105. * @brief SDRAM driver modules
  106. * @{
  107. */
  108. /* Private typedef -----------------------------------------------------------*/
  109. /* Private define ------------------------------------------------------------*/
  110. /* Private macro -------------------------------------------------------------*/
  111. /* Private variables ---------------------------------------------------------*/
  112. /* Private function prototypes -----------------------------------------------*/
  113. /** @addtogroup SDRAM_Private_Functions SDRAM Private Functions
  114. * @{
  115. */
  116. static void SDRAM_DMACplt(DMA_HandleTypeDef *hdma);
  117. static void SDRAM_DMACpltProt(DMA_HandleTypeDef *hdma);
  118. static void SDRAM_DMAError(DMA_HandleTypeDef *hdma);
  119. /**
  120. * @}
  121. */
  122. /* Exported functions --------------------------------------------------------*/
  123. /** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions
  124. * @{
  125. */
  126. /** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions
  127. * @brief Initialization and Configuration functions
  128. *
  129. @verbatim
  130. ==============================================================================
  131. ##### SDRAM Initialization and de_initialization functions #####
  132. ==============================================================================
  133. [..]
  134. This section provides functions allowing to initialize/de-initialize
  135. the SDRAM memory
  136. @endverbatim
  137. * @{
  138. */
  139. /**
  140. * @brief Performs the SDRAM device initialization sequence.
  141. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  142. * the configuration information for SDRAM module.
  143. * @param Timing Pointer to SDRAM control timing structure
  144. * @retval HAL status
  145. */
  146. HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
  147. {
  148. /* Check the SDRAM handle parameter */
  149. if (hsdram == NULL)
  150. {
  151. return HAL_ERROR;
  152. }
  153. if (hsdram->State == HAL_SDRAM_STATE_RESET)
  154. {
  155. /* Allocate lock resource and initialize it */
  156. hsdram->Lock = HAL_UNLOCKED;
  157. #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
  158. if (hsdram->MspInitCallback == NULL)
  159. {
  160. hsdram->MspInitCallback = HAL_SDRAM_MspInit;
  161. }
  162. hsdram->RefreshErrorCallback = HAL_SDRAM_RefreshErrorCallback;
  163. hsdram->DmaXferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
  164. hsdram->DmaXferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
  165. /* Init the low level hardware */
  166. hsdram->MspInitCallback(hsdram);
  167. #else
  168. /* Initialize the low level hardware (MSP) */
  169. HAL_SDRAM_MspInit(hsdram);
  170. #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
  171. }
  172. /* Initialize the SDRAM controller state */
  173. hsdram->State = HAL_SDRAM_STATE_BUSY;
  174. /* Initialize SDRAM control Interface */
  175. (void)FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
  176. /* Initialize SDRAM timing Interface */
  177. (void)FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
  178. /* Update the SDRAM controller state */
  179. hsdram->State = HAL_SDRAM_STATE_READY;
  180. return HAL_OK;
  181. }
  182. /**
  183. * @brief Perform the SDRAM device initialization sequence.
  184. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  185. * the configuration information for SDRAM module.
  186. * @retval HAL status
  187. */
  188. HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
  189. {
  190. #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
  191. if (hsdram->MspDeInitCallback == NULL)
  192. {
  193. hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
  194. }
  195. /* DeInit the low level hardware */
  196. hsdram->MspDeInitCallback(hsdram);
  197. #else
  198. /* Initialize the low level hardware (MSP) */
  199. HAL_SDRAM_MspDeInit(hsdram);
  200. #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
  201. /* Configure the SDRAM registers with their reset values */
  202. (void)FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
  203. /* Reset the SDRAM controller state */
  204. hsdram->State = HAL_SDRAM_STATE_RESET;
  205. /* Release Lock */
  206. __HAL_UNLOCK(hsdram);
  207. return HAL_OK;
  208. }
  209. /**
  210. * @brief SDRAM MSP Init.
  211. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  212. * the configuration information for SDRAM module.
  213. * @retval None
  214. */
  215. __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
  216. {
  217. /* Prevent unused argument(s) compilation warning */
  218. UNUSED(hsdram);
  219. /* NOTE: This function Should not be modified, when the callback is needed,
  220. the HAL_SDRAM_MspInit could be implemented in the user file
  221. */
  222. }
  223. /**
  224. * @brief SDRAM MSP DeInit.
  225. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  226. * the configuration information for SDRAM module.
  227. * @retval None
  228. */
  229. __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
  230. {
  231. /* Prevent unused argument(s) compilation warning */
  232. UNUSED(hsdram);
  233. /* NOTE: This function Should not be modified, when the callback is needed,
  234. the HAL_SDRAM_MspDeInit could be implemented in the user file
  235. */
  236. }
  237. /**
  238. * @brief This function handles SDRAM refresh error interrupt request.
  239. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  240. * the configuration information for SDRAM module.
  241. * @retval HAL status
  242. */
  243. void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
  244. {
  245. /* Check SDRAM interrupt Rising edge flag */
  246. if (__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
  247. {
  248. /* SDRAM refresh error interrupt callback */
  249. #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
  250. hsdram->RefreshErrorCallback(hsdram);
  251. #else
  252. HAL_SDRAM_RefreshErrorCallback(hsdram);
  253. #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
  254. /* Clear SDRAM refresh error interrupt pending bit */
  255. __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
  256. }
  257. }
  258. /**
  259. * @brief SDRAM Refresh error callback.
  260. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  261. * the configuration information for SDRAM module.
  262. * @retval None
  263. */
  264. __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
  265. {
  266. /* Prevent unused argument(s) compilation warning */
  267. UNUSED(hsdram);
  268. /* NOTE: This function Should not be modified, when the callback is needed,
  269. the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
  270. */
  271. }
  272. /**
  273. * @brief DMA transfer complete callback.
  274. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  275. * the configuration information for the specified DMA module.
  276. * @retval None
  277. */
  278. __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
  279. {
  280. /* Prevent unused argument(s) compilation warning */
  281. UNUSED(hdma);
  282. /* NOTE: This function Should not be modified, when the callback is needed,
  283. the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
  284. */
  285. }
  286. /**
  287. * @brief DMA transfer complete error callback.
  288. * @param hdma DMA handle
  289. * @retval None
  290. */
  291. __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
  292. {
  293. /* Prevent unused argument(s) compilation warning */
  294. UNUSED(hdma);
  295. /* NOTE: This function Should not be modified, when the callback is needed,
  296. the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
  297. */
  298. }
  299. /**
  300. * @}
  301. */
  302. /** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions
  303. * @brief Input Output and memory control functions
  304. *
  305. @verbatim
  306. ==============================================================================
  307. ##### SDRAM Input and Output functions #####
  308. ==============================================================================
  309. [..]
  310. This section provides functions allowing to use and control the SDRAM memory
  311. @endverbatim
  312. * @{
  313. */
  314. /**
  315. * @brief Reads 8-bit data buffer from the SDRAM memory.
  316. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  317. * the configuration information for SDRAM module.
  318. * @param pAddress Pointer to read start address
  319. * @param pDstBuffer Pointer to destination buffer
  320. * @param BufferSize Size of the buffer to read from memory
  321. * @retval HAL status
  322. */
  323. HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer,
  324. uint32_t BufferSize)
  325. {
  326. uint32_t size;
  327. __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
  328. uint8_t *pdestbuff = pDstBuffer;
  329. HAL_SDRAM_StateTypeDef state = hsdram->State;
  330. /* Check the SDRAM controller state */
  331. if (state == HAL_SDRAM_STATE_BUSY)
  332. {
  333. return HAL_BUSY;
  334. }
  335. else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
  336. {
  337. /* Process Locked */
  338. __HAL_LOCK(hsdram);
  339. /* Update the SDRAM controller state */
  340. hsdram->State = HAL_SDRAM_STATE_BUSY;
  341. /* Read data from source */
  342. for (size = BufferSize; size != 0U; size--)
  343. {
  344. *pdestbuff = *(__IO uint8_t *)pSdramAddress;
  345. pdestbuff++;
  346. pSdramAddress++;
  347. }
  348. /* Update the SDRAM controller state */
  349. hsdram->State = state;
  350. /* Process Unlocked */
  351. __HAL_UNLOCK(hsdram);
  352. }
  353. else
  354. {
  355. return HAL_ERROR;
  356. }
  357. return HAL_OK;
  358. }
  359. /**
  360. * @brief Writes 8-bit data buffer to SDRAM memory.
  361. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  362. * the configuration information for SDRAM module.
  363. * @param pAddress Pointer to write start address
  364. * @param pSrcBuffer Pointer to source buffer to write
  365. * @param BufferSize Size of the buffer to write to memory
  366. * @retval HAL status
  367. */
  368. HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer,
  369. uint32_t BufferSize)
  370. {
  371. uint32_t size;
  372. __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
  373. uint8_t *psrcbuff = pSrcBuffer;
  374. /* Check the SDRAM controller state */
  375. if (hsdram->State == HAL_SDRAM_STATE_BUSY)
  376. {
  377. return HAL_BUSY;
  378. }
  379. else if (hsdram->State == HAL_SDRAM_STATE_READY)
  380. {
  381. /* Process Locked */
  382. __HAL_LOCK(hsdram);
  383. /* Update the SDRAM controller state */
  384. hsdram->State = HAL_SDRAM_STATE_BUSY;
  385. /* Write data to memory */
  386. for (size = BufferSize; size != 0U; size--)
  387. {
  388. *(__IO uint8_t *)pSdramAddress = *psrcbuff;
  389. psrcbuff++;
  390. pSdramAddress++;
  391. }
  392. /* Update the SDRAM controller state */
  393. hsdram->State = HAL_SDRAM_STATE_READY;
  394. /* Process Unlocked */
  395. __HAL_UNLOCK(hsdram);
  396. }
  397. else
  398. {
  399. return HAL_ERROR;
  400. }
  401. return HAL_OK;
  402. }
  403. /**
  404. * @brief Reads 16-bit data buffer from the SDRAM memory.
  405. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  406. * the configuration information for SDRAM module.
  407. * @param pAddress Pointer to read start address
  408. * @param pDstBuffer Pointer to destination buffer
  409. * @param BufferSize Size of the buffer to read from memory
  410. * @retval HAL status
  411. */
  412. HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer,
  413. uint32_t BufferSize)
  414. {
  415. uint32_t size;
  416. __IO uint32_t *pSdramAddress = pAddress;
  417. uint16_t *pdestbuff = pDstBuffer;
  418. HAL_SDRAM_StateTypeDef state = hsdram->State;
  419. /* Check the SDRAM controller state */
  420. if (state == HAL_SDRAM_STATE_BUSY)
  421. {
  422. return HAL_BUSY;
  423. }
  424. else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
  425. {
  426. /* Process Locked */
  427. __HAL_LOCK(hsdram);
  428. /* Update the SDRAM controller state */
  429. hsdram->State = HAL_SDRAM_STATE_BUSY;
  430. /* Read data from memory */
  431. for (size = BufferSize; size >= 2U ; size -= 2U)
  432. {
  433. *pdestbuff = (uint16_t)((*pSdramAddress) & 0x0000FFFFU);
  434. pdestbuff++;
  435. *pdestbuff = (uint16_t)(((*pSdramAddress) & 0xFFFF0000U) >> 16U);
  436. pdestbuff++;
  437. pSdramAddress++;
  438. }
  439. /* Read last 16-bits if size is not 32-bits multiple */
  440. if ((BufferSize % 2U) != 0U)
  441. {
  442. *pdestbuff = (uint16_t)((*pSdramAddress) & 0x0000FFFFU);
  443. }
  444. /* Update the SDRAM controller state */
  445. hsdram->State = state;
  446. /* Process Unlocked */
  447. __HAL_UNLOCK(hsdram);
  448. }
  449. else
  450. {
  451. return HAL_ERROR;
  452. }
  453. return HAL_OK;
  454. }
  455. /**
  456. * @brief Writes 16-bit data buffer to SDRAM memory.
  457. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  458. * the configuration information for SDRAM module.
  459. * @param pAddress Pointer to write start address
  460. * @param pSrcBuffer Pointer to source buffer to write
  461. * @param BufferSize Size of the buffer to write to memory
  462. * @retval HAL status
  463. */
  464. HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer,
  465. uint32_t BufferSize)
  466. {
  467. uint32_t size;
  468. __IO uint32_t *psdramaddress = pAddress;
  469. uint16_t *psrcbuff = pSrcBuffer;
  470. /* Check the SDRAM controller state */
  471. if (hsdram->State == HAL_SDRAM_STATE_BUSY)
  472. {
  473. return HAL_BUSY;
  474. }
  475. else if (hsdram->State == HAL_SDRAM_STATE_READY)
  476. {
  477. /* Process Locked */
  478. __HAL_LOCK(hsdram);
  479. /* Update the SDRAM controller state */
  480. hsdram->State = HAL_SDRAM_STATE_BUSY;
  481. /* Write data to memory */
  482. for (size = BufferSize; size >= 2U ; size -= 2U)
  483. {
  484. *psdramaddress = (uint32_t)(*psrcbuff);
  485. psrcbuff++;
  486. *psdramaddress |= ((uint32_t)(*psrcbuff) << 16U);
  487. psrcbuff++;
  488. psdramaddress++;
  489. }
  490. /* Write last 16-bits if size is not 32-bits multiple */
  491. if ((BufferSize % 2U) != 0U)
  492. {
  493. *psdramaddress = ((uint32_t)(*psrcbuff) & 0x0000FFFFU) | ((*psdramaddress) & 0xFFFF0000U);
  494. }
  495. /* Update the SDRAM controller state */
  496. hsdram->State = HAL_SDRAM_STATE_READY;
  497. /* Process Unlocked */
  498. __HAL_UNLOCK(hsdram);
  499. }
  500. else
  501. {
  502. return HAL_ERROR;
  503. }
  504. return HAL_OK;
  505. }
  506. /**
  507. * @brief Reads 32-bit data buffer from the SDRAM memory.
  508. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  509. * the configuration information for SDRAM module.
  510. * @param pAddress Pointer to read start address
  511. * @param pDstBuffer Pointer to destination buffer
  512. * @param BufferSize Size of the buffer to read from memory
  513. * @retval HAL status
  514. */
  515. HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
  516. uint32_t BufferSize)
  517. {
  518. uint32_t size;
  519. __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
  520. uint32_t *pdestbuff = pDstBuffer;
  521. HAL_SDRAM_StateTypeDef state = hsdram->State;
  522. /* Check the SDRAM controller state */
  523. if (state == HAL_SDRAM_STATE_BUSY)
  524. {
  525. return HAL_BUSY;
  526. }
  527. else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
  528. {
  529. /* Process Locked */
  530. __HAL_LOCK(hsdram);
  531. /* Update the SDRAM controller state */
  532. hsdram->State = HAL_SDRAM_STATE_BUSY;
  533. /* Read data from source */
  534. for (size = BufferSize; size != 0U; size--)
  535. {
  536. *pdestbuff = *(__IO uint32_t *)pSdramAddress;
  537. pdestbuff++;
  538. pSdramAddress++;
  539. }
  540. /* Update the SDRAM controller state */
  541. hsdram->State = state;
  542. /* Process Unlocked */
  543. __HAL_UNLOCK(hsdram);
  544. }
  545. else
  546. {
  547. return HAL_ERROR;
  548. }
  549. return HAL_OK;
  550. }
  551. /**
  552. * @brief Writes 32-bit data buffer to SDRAM memory.
  553. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  554. * the configuration information for SDRAM module.
  555. * @param pAddress Pointer to write start address
  556. * @param pSrcBuffer Pointer to source buffer to write
  557. * @param BufferSize Size of the buffer to write to memory
  558. * @retval HAL status
  559. */
  560. HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
  561. uint32_t BufferSize)
  562. {
  563. uint32_t size;
  564. __IO uint32_t *pSdramAddress = pAddress;
  565. uint32_t *psrcbuff = pSrcBuffer;
  566. /* Check the SDRAM controller state */
  567. if (hsdram->State == HAL_SDRAM_STATE_BUSY)
  568. {
  569. return HAL_BUSY;
  570. }
  571. else if (hsdram->State == HAL_SDRAM_STATE_READY)
  572. {
  573. /* Process Locked */
  574. __HAL_LOCK(hsdram);
  575. /* Update the SDRAM controller state */
  576. hsdram->State = HAL_SDRAM_STATE_BUSY;
  577. /* Write data to memory */
  578. for (size = BufferSize; size != 0U; size--)
  579. {
  580. *pSdramAddress = *psrcbuff;
  581. psrcbuff++;
  582. pSdramAddress++;
  583. }
  584. /* Update the SDRAM controller state */
  585. hsdram->State = HAL_SDRAM_STATE_READY;
  586. /* Process Unlocked */
  587. __HAL_UNLOCK(hsdram);
  588. }
  589. else
  590. {
  591. return HAL_ERROR;
  592. }
  593. return HAL_OK;
  594. }
  595. /**
  596. * @brief Reads a Words data from the SDRAM memory using DMA transfer.
  597. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  598. * the configuration information for SDRAM module.
  599. * @param pAddress Pointer to read start address
  600. * @param pDstBuffer Pointer to destination buffer
  601. * @param BufferSize Size of the buffer to read from memory
  602. * @retval HAL status
  603. */
  604. HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
  605. uint32_t BufferSize)
  606. {
  607. HAL_StatusTypeDef status;
  608. HAL_SDRAM_StateTypeDef state = hsdram->State;
  609. /* Check the SDRAM controller state */
  610. if (state == HAL_SDRAM_STATE_BUSY)
  611. {
  612. status = HAL_BUSY;
  613. }
  614. else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
  615. {
  616. /* Process Locked */
  617. __HAL_LOCK(hsdram);
  618. /* Update the SDRAM controller state */
  619. hsdram->State = HAL_SDRAM_STATE_BUSY;
  620. /* Configure DMA user callbacks */
  621. if (state == HAL_SDRAM_STATE_READY)
  622. {
  623. hsdram->hdma->XferCpltCallback = SDRAM_DMACplt;
  624. }
  625. else
  626. {
  627. hsdram->hdma->XferCpltCallback = SDRAM_DMACpltProt;
  628. }
  629. hsdram->hdma->XferErrorCallback = SDRAM_DMAError;
  630. /* Enable the DMA Stream */
  631. status = HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
  632. /* Process Unlocked */
  633. __HAL_UNLOCK(hsdram);
  634. }
  635. else
  636. {
  637. status = HAL_ERROR;
  638. }
  639. return status;
  640. }
  641. /**
  642. * @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
  643. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  644. * the configuration information for SDRAM module.
  645. * @param pAddress Pointer to write start address
  646. * @param pSrcBuffer Pointer to source buffer to write
  647. * @param BufferSize Size of the buffer to write to memory
  648. * @retval HAL status
  649. */
  650. HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
  651. uint32_t BufferSize)
  652. {
  653. HAL_StatusTypeDef status;
  654. /* Check the SDRAM controller state */
  655. if (hsdram->State == HAL_SDRAM_STATE_BUSY)
  656. {
  657. status = HAL_BUSY;
  658. }
  659. else if (hsdram->State == HAL_SDRAM_STATE_READY)
  660. {
  661. /* Process Locked */
  662. __HAL_LOCK(hsdram);
  663. /* Update the SDRAM controller state */
  664. hsdram->State = HAL_SDRAM_STATE_BUSY;
  665. /* Configure DMA user callbacks */
  666. hsdram->hdma->XferCpltCallback = SDRAM_DMACplt;
  667. hsdram->hdma->XferErrorCallback = SDRAM_DMAError;
  668. /* Enable the DMA Stream */
  669. status = HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
  670. /* Process Unlocked */
  671. __HAL_UNLOCK(hsdram);
  672. }
  673. else
  674. {
  675. status = HAL_ERROR;
  676. }
  677. return status;
  678. }
  679. #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
  680. /**
  681. * @brief Register a User SDRAM Callback
  682. * To be used to override the weak predefined callback
  683. * @param hsdram : SDRAM handle
  684. * @param CallbackId : ID of the callback to be registered
  685. * This parameter can be one of the following values:
  686. * @arg @ref HAL_SDRAM_MSP_INIT_CB_ID SDRAM MspInit callback ID
  687. * @arg @ref HAL_SDRAM_MSP_DEINIT_CB_ID SDRAM MspDeInit callback ID
  688. * @arg @ref HAL_SDRAM_REFRESH_ERR_CB_ID SDRAM Refresh Error callback ID
  689. * @param pCallback : pointer to the Callback function
  690. * @retval status
  691. */
  692. HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
  693. pSDRAM_CallbackTypeDef pCallback)
  694. {
  695. HAL_StatusTypeDef status = HAL_OK;
  696. HAL_SDRAM_StateTypeDef state;
  697. if (pCallback == NULL)
  698. {
  699. return HAL_ERROR;
  700. }
  701. state = hsdram->State;
  702. if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
  703. {
  704. switch (CallbackId)
  705. {
  706. case HAL_SDRAM_MSP_INIT_CB_ID :
  707. hsdram->MspInitCallback = pCallback;
  708. break;
  709. case HAL_SDRAM_MSP_DEINIT_CB_ID :
  710. hsdram->MspDeInitCallback = pCallback;
  711. break;
  712. case HAL_SDRAM_REFRESH_ERR_CB_ID :
  713. hsdram->RefreshErrorCallback = pCallback;
  714. break;
  715. default :
  716. /* update return status */
  717. status = HAL_ERROR;
  718. break;
  719. }
  720. }
  721. else if (hsdram->State == HAL_SDRAM_STATE_RESET)
  722. {
  723. switch (CallbackId)
  724. {
  725. case HAL_SDRAM_MSP_INIT_CB_ID :
  726. hsdram->MspInitCallback = pCallback;
  727. break;
  728. case HAL_SDRAM_MSP_DEINIT_CB_ID :
  729. hsdram->MspDeInitCallback = pCallback;
  730. break;
  731. default :
  732. /* update return status */
  733. status = HAL_ERROR;
  734. break;
  735. }
  736. }
  737. else
  738. {
  739. /* update return status */
  740. status = HAL_ERROR;
  741. }
  742. return status;
  743. }
  744. /**
  745. * @brief Unregister a User SDRAM Callback
  746. * SDRAM Callback is redirected to the weak predefined callback
  747. * @param hsdram : SDRAM handle
  748. * @param CallbackId : ID of the callback to be unregistered
  749. * This parameter can be one of the following values:
  750. * @arg @ref HAL_SDRAM_MSP_INIT_CB_ID SDRAM MspInit callback ID
  751. * @arg @ref HAL_SDRAM_MSP_DEINIT_CB_ID SDRAM MspDeInit callback ID
  752. * @arg @ref HAL_SDRAM_REFRESH_ERR_CB_ID SDRAM Refresh Error callback ID
  753. * @arg @ref HAL_SDRAM_DMA_XFER_CPLT_CB_ID SDRAM DMA Xfer Complete callback ID
  754. * @arg @ref HAL_SDRAM_DMA_XFER_ERR_CB_ID SDRAM DMA Xfer Error callback ID
  755. * @retval status
  756. */
  757. HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId)
  758. {
  759. HAL_StatusTypeDef status = HAL_OK;
  760. HAL_SDRAM_StateTypeDef state;
  761. state = hsdram->State;
  762. if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
  763. {
  764. switch (CallbackId)
  765. {
  766. case HAL_SDRAM_MSP_INIT_CB_ID :
  767. hsdram->MspInitCallback = HAL_SDRAM_MspInit;
  768. break;
  769. case HAL_SDRAM_MSP_DEINIT_CB_ID :
  770. hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
  771. break;
  772. case HAL_SDRAM_REFRESH_ERR_CB_ID :
  773. hsdram->RefreshErrorCallback = HAL_SDRAM_RefreshErrorCallback;
  774. break;
  775. case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
  776. hsdram->DmaXferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
  777. break;
  778. case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
  779. hsdram->DmaXferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
  780. break;
  781. default :
  782. /* update return status */
  783. status = HAL_ERROR;
  784. break;
  785. }
  786. }
  787. else if (hsdram->State == HAL_SDRAM_STATE_RESET)
  788. {
  789. switch (CallbackId)
  790. {
  791. case HAL_SDRAM_MSP_INIT_CB_ID :
  792. hsdram->MspInitCallback = HAL_SDRAM_MspInit;
  793. break;
  794. case HAL_SDRAM_MSP_DEINIT_CB_ID :
  795. hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
  796. break;
  797. default :
  798. /* update return status */
  799. status = HAL_ERROR;
  800. break;
  801. }
  802. }
  803. else
  804. {
  805. /* update return status */
  806. status = HAL_ERROR;
  807. }
  808. return status;
  809. }
  810. /**
  811. * @brief Register a User SDRAM Callback for DMA transfers
  812. * To be used to override the weak predefined callback
  813. * @param hsdram : SDRAM handle
  814. * @param CallbackId : ID of the callback to be registered
  815. * This parameter can be one of the following values:
  816. * @arg @ref HAL_SDRAM_DMA_XFER_CPLT_CB_ID SDRAM DMA Xfer Complete callback ID
  817. * @arg @ref HAL_SDRAM_DMA_XFER_ERR_CB_ID SDRAM DMA Xfer Error callback ID
  818. * @param pCallback : pointer to the Callback function
  819. * @retval status
  820. */
  821. HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
  822. pSDRAM_DmaCallbackTypeDef pCallback)
  823. {
  824. HAL_StatusTypeDef status = HAL_OK;
  825. HAL_SDRAM_StateTypeDef state;
  826. if (pCallback == NULL)
  827. {
  828. return HAL_ERROR;
  829. }
  830. /* Process locked */
  831. __HAL_LOCK(hsdram);
  832. state = hsdram->State;
  833. if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
  834. {
  835. switch (CallbackId)
  836. {
  837. case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
  838. hsdram->DmaXferCpltCallback = pCallback;
  839. break;
  840. case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
  841. hsdram->DmaXferErrorCallback = pCallback;
  842. break;
  843. default :
  844. /* update return status */
  845. status = HAL_ERROR;
  846. break;
  847. }
  848. }
  849. else
  850. {
  851. /* update return status */
  852. status = HAL_ERROR;
  853. }
  854. /* Release Lock */
  855. __HAL_UNLOCK(hsdram);
  856. return status;
  857. }
  858. #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
  859. /**
  860. * @}
  861. */
  862. /** @defgroup SDRAM_Exported_Functions_Group3 Control functions
  863. * @brief management functions
  864. *
  865. @verbatim
  866. ==============================================================================
  867. ##### SDRAM Control functions #####
  868. ==============================================================================
  869. [..]
  870. This subsection provides a set of functions allowing to control dynamically
  871. the SDRAM interface.
  872. @endverbatim
  873. * @{
  874. */
  875. /**
  876. * @brief Enables dynamically SDRAM write protection.
  877. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  878. * the configuration information for SDRAM module.
  879. * @retval HAL status
  880. */
  881. HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
  882. {
  883. /* Check the SDRAM controller state */
  884. if (hsdram->State == HAL_SDRAM_STATE_BUSY)
  885. {
  886. return HAL_BUSY;
  887. }
  888. else if (hsdram->State == HAL_SDRAM_STATE_READY)
  889. {
  890. /* Update the SDRAM state */
  891. hsdram->State = HAL_SDRAM_STATE_BUSY;
  892. /* Enable write protection */
  893. (void)FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
  894. /* Update the SDRAM state */
  895. hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
  896. }
  897. else
  898. {
  899. return HAL_ERROR;
  900. }
  901. return HAL_OK;
  902. }
  903. /**
  904. * @brief Disables dynamically SDRAM write protection.
  905. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  906. * the configuration information for SDRAM module.
  907. * @retval HAL status
  908. */
  909. HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
  910. {
  911. HAL_SDRAM_StateTypeDef state = hsdram->State;
  912. /* Check the SDRAM controller state */
  913. if (state == HAL_SDRAM_STATE_BUSY)
  914. {
  915. return HAL_BUSY;
  916. }
  917. else if (state == HAL_SDRAM_STATE_WRITE_PROTECTED)
  918. {
  919. /* Update the SDRAM state */
  920. hsdram->State = HAL_SDRAM_STATE_BUSY;
  921. /* Disable write protection */
  922. (void)FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
  923. /* Update the SDRAM state */
  924. hsdram->State = HAL_SDRAM_STATE_READY;
  925. }
  926. else
  927. {
  928. return HAL_ERROR;
  929. }
  930. return HAL_OK;
  931. }
  932. /**
  933. * @brief Sends Command to the SDRAM bank.
  934. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  935. * the configuration information for SDRAM module.
  936. * @param Command SDRAM command structure
  937. * @param Timeout Timeout duration
  938. * @retval HAL status
  939. */
  940. HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command,
  941. uint32_t Timeout)
  942. {
  943. HAL_SDRAM_StateTypeDef state = hsdram->State;
  944. /* Check the SDRAM controller state */
  945. if (state == HAL_SDRAM_STATE_BUSY)
  946. {
  947. return HAL_BUSY;
  948. }
  949. else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_PRECHARGED))
  950. {
  951. /* Update the SDRAM state */
  952. hsdram->State = HAL_SDRAM_STATE_BUSY;
  953. /* Send SDRAM command */
  954. (void)FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
  955. /* Update the SDRAM controller state state */
  956. if (Command->CommandMode == FMC_SDRAM_CMD_PALL)
  957. {
  958. hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
  959. }
  960. else
  961. {
  962. hsdram->State = HAL_SDRAM_STATE_READY;
  963. }
  964. }
  965. else
  966. {
  967. return HAL_ERROR;
  968. }
  969. return HAL_OK;
  970. }
  971. /**
  972. * @brief Programs the SDRAM Memory Refresh rate.
  973. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  974. * the configuration information for SDRAM module.
  975. * @param RefreshRate The SDRAM refresh rate value
  976. * @retval HAL status
  977. */
  978. HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
  979. {
  980. /* Check the SDRAM controller state */
  981. if (hsdram->State == HAL_SDRAM_STATE_BUSY)
  982. {
  983. return HAL_BUSY;
  984. }
  985. else if (hsdram->State == HAL_SDRAM_STATE_READY)
  986. {
  987. /* Update the SDRAM state */
  988. hsdram->State = HAL_SDRAM_STATE_BUSY;
  989. /* Program the refresh rate */
  990. (void)FMC_SDRAM_ProgramRefreshRate(hsdram->Instance, RefreshRate);
  991. /* Update the SDRAM state */
  992. hsdram->State = HAL_SDRAM_STATE_READY;
  993. }
  994. else
  995. {
  996. return HAL_ERROR;
  997. }
  998. return HAL_OK;
  999. }
  1000. /**
  1001. * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
  1002. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  1003. * the configuration information for SDRAM module.
  1004. * @param AutoRefreshNumber The SDRAM auto Refresh number
  1005. * @retval HAL status
  1006. */
  1007. HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
  1008. {
  1009. /* Check the SDRAM controller state */
  1010. if (hsdram->State == HAL_SDRAM_STATE_BUSY)
  1011. {
  1012. return HAL_BUSY;
  1013. }
  1014. else if (hsdram->State == HAL_SDRAM_STATE_READY)
  1015. {
  1016. /* Update the SDRAM state */
  1017. hsdram->State = HAL_SDRAM_STATE_BUSY;
  1018. /* Set the Auto-Refresh number */
  1019. (void)FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance, AutoRefreshNumber);
  1020. /* Update the SDRAM state */
  1021. hsdram->State = HAL_SDRAM_STATE_READY;
  1022. }
  1023. else
  1024. {
  1025. return HAL_ERROR;
  1026. }
  1027. return HAL_OK;
  1028. }
  1029. /**
  1030. * @brief Returns the SDRAM memory current mode.
  1031. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  1032. * the configuration information for SDRAM module.
  1033. * @retval The SDRAM memory mode.
  1034. */
  1035. uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
  1036. {
  1037. /* Return the SDRAM memory current mode */
  1038. return (FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
  1039. }
  1040. /**
  1041. * @}
  1042. */
  1043. /** @defgroup SDRAM_Exported_Functions_Group4 State functions
  1044. * @brief Peripheral State functions
  1045. *
  1046. @verbatim
  1047. ==============================================================================
  1048. ##### SDRAM State functions #####
  1049. ==============================================================================
  1050. [..]
  1051. This subsection permits to get in run-time the status of the SDRAM controller
  1052. and the data flow.
  1053. @endverbatim
  1054. * @{
  1055. */
  1056. /**
  1057. * @brief Returns the SDRAM state.
  1058. * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
  1059. * the configuration information for SDRAM module.
  1060. * @retval HAL state
  1061. */
  1062. HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(const SDRAM_HandleTypeDef *hsdram)
  1063. {
  1064. return hsdram->State;
  1065. }
  1066. /**
  1067. * @}
  1068. */
  1069. /**
  1070. * @}
  1071. */
  1072. /** @addtogroup SDRAM_Private_Functions SDRAM Private Functions
  1073. * @{
  1074. */
  1075. /**
  1076. * @brief DMA SDRAM process complete callback.
  1077. * @param hdma : DMA handle
  1078. * @retval None
  1079. */
  1080. static void SDRAM_DMACplt(DMA_HandleTypeDef *hdma)
  1081. {
  1082. /* Derogation MISRAC2012-Rule-11.5 */
  1083. SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent);
  1084. /* Disable the DMA channel */
  1085. __HAL_DMA_DISABLE(hdma);
  1086. /* Update the SDRAM controller state */
  1087. hsdram->State = HAL_SDRAM_STATE_READY;
  1088. #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
  1089. hsdram->DmaXferCpltCallback(hdma);
  1090. #else
  1091. HAL_SDRAM_DMA_XferCpltCallback(hdma);
  1092. #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
  1093. }
  1094. /**
  1095. * @brief DMA SRAM process complete callback.
  1096. * @param hdma : DMA handle
  1097. * @retval None
  1098. */
  1099. static void SDRAM_DMACpltProt(DMA_HandleTypeDef *hdma)
  1100. {
  1101. /* Derogation MISRAC2012-Rule-11.5 */
  1102. SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent);
  1103. /* Disable the DMA channel */
  1104. __HAL_DMA_DISABLE(hdma);
  1105. /* Update the SDRAM controller state */
  1106. hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
  1107. #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
  1108. hsdram->DmaXferCpltCallback(hdma);
  1109. #else
  1110. HAL_SDRAM_DMA_XferCpltCallback(hdma);
  1111. #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
  1112. }
  1113. /**
  1114. * @brief DMA SDRAM error callback.
  1115. * @param hdma : DMA handle
  1116. * @retval None
  1117. */
  1118. static void SDRAM_DMAError(DMA_HandleTypeDef *hdma)
  1119. {
  1120. /* Derogation MISRAC2012-Rule-11.5 */
  1121. SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent);
  1122. /* Disable the DMA channel */
  1123. __HAL_DMA_DISABLE(hdma);
  1124. /* Update the SDRAM controller state */
  1125. hsdram->State = HAL_SDRAM_STATE_ERROR;
  1126. #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
  1127. hsdram->DmaXferErrorCallback(hdma);
  1128. #else
  1129. HAL_SDRAM_DMA_XferErrorCallback(hdma);
  1130. #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
  1131. }
  1132. /**
  1133. * @}
  1134. */
  1135. /**
  1136. * @}
  1137. */
  1138. #endif /* HAL_SDRAM_MODULE_ENABLED */
  1139. /**
  1140. * @}
  1141. */
  1142. #endif /* FMC_Bank5_6 */