/* ********************************************************************************************************* * uC/OS-II * The Real-Time Kernel * * * (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL * All rights reserved. Protected by international copyright laws. * * ARM Cortex-M4 Port * * File : OS_CPU.H * Version : V2.92.09 * By : JJL * JBL * * LICENSING TERMS: * --------------- * uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or * for peaceful research. If you plan or intend to use uC/OS-II in a commercial application/ * product then, you need to contact Micrium to properly license uC/OS-II for its use in your * application/product. We provide ALL the source code for your convenience and to help you * experience uC/OS-II. The fact that the source is provided does NOT mean that you can use * it commercially without paying a licensing fee. * * Knowledge of the source code may NOT be used to develop a similar product. * * Please help us continue to provide the embedded community with the finest software available. * Your honesty is greatly appreciated. * * You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036. * * For : ARMv7 Cortex-M4 * Mode : Thumb-2 ISA * Toolchain : IAR EWARM ********************************************************************************************************* */ #ifndef OS_CPU_H #define OS_CPU_H #ifdef OS_CPU_GLOBALS #define OS_CPU_EXT #else #define OS_CPU_EXT extern #endif #ifndef OS_CPU_EXCEPT_STK_SIZE #define OS_CPU_EXCEPT_STK_SIZE 128u /* Default exception stack size is 128 OS_STK entries */ #endif /* ********************************************************************************************************* * DEFINES ********************************************************************************************************* */ #ifdef __ARMVFP__ #define OS_CPU_ARM_FP_EN 1u #else #define OS_CPU_ARM_FP_EN 0u #endif /* ********************************************************************************************************* * OS TICK INTERRUPT PRIORITY CONFIGURATION * * Note(s) : (1) For systems that don't need any high, real-time priority interrupts; the tick interrupt * should be configured as the highest priority interrupt but won't adversely affect system * operations. * * (2) For systems that need one or more high, real-time interrupts; these should be configured * higher than the tick interrupt which MAY delay execution of the tick interrupt. * * (a) If the higher priority interrupts do NOT continually consume CPU cycles but only * occasionally delay tick interrupts, then the real-time interrupts can successfully * handle their intermittent/periodic events with the system not losing tick interrupts * but only increasing the jitter. * * (b) If the higher priority interrupts consume enough CPU cycles to continually delay the * tick interrupt, then the CPU/system is most likely over-burdened & can't be expected * to handle all its interrupts/tasks. The system time reference gets compromised as a * result of losing tick interrupts. ********************************************************************************************************* */ #define OS_CPU_CFG_SYSTICK_PRIO 0u /* ********************************************************************************************************* * DATA TYPES * (Compiler Specific) ********************************************************************************************************* */ typedef unsigned char BOOLEAN; typedef unsigned char INT8U; /* Unsigned 8 bit quantity */ typedef signed char INT8S; /* Signed 8 bit quantity */ typedef unsigned short INT16U; /* Unsigned 16 bit quantity */ typedef signed short INT16S; /* Signed 16 bit quantity */ typedef unsigned int INT32U; /* Unsigned 32 bit quantity */ typedef signed int INT32S; /* Signed 32 bit quantity */ typedef float FP32; /* Single precision floating point */ typedef double FP64; /* Double precision floating point */ typedef unsigned int OS_STK; /* Each stack entry is 32-bit wide */ typedef unsigned int OS_CPU_SR; /* Define size of CPU status register (PSR = 32 bits) */ /* ********************************************************************************************************* * Cortex-M4 * Critical Section Management * * Method #1: Disable/Enable interrupts using simple instructions. After critical section, interrupts * will be enabled even if they were disabled before entering the critical section. * NOT IMPLEMENTED * * Method #2: Disable/Enable interrupts by preserving the state of interrupts. In other words, if * interrupts were disabled before entering the critical section, they will be disabled when * leaving the critical section. * NOT IMPLEMENTED * * Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you * would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then * disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to * disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr' * into the CPU's status register. ********************************************************************************************************* */ #define OS_CRITICAL_METHOD 3u #if OS_CRITICAL_METHOD == 3u #define OS_ENTER_CRITICAL() {cpu_sr = OS_CPU_SR_Save();} #define OS_EXIT_CRITICAL() {OS_CPU_SR_Restore(cpu_sr);} #endif /* ********************************************************************************************************* * Cortex-M4 Miscellaneous ********************************************************************************************************* */ #define OS_STK_GROWTH 1u /* Stack grows from HIGH to LOW memory on ARM */ #define OS_TASK_SW() OSCtxSw() /* ********************************************************************************************************* * GLOBAL VARIABLES ********************************************************************************************************* */ OS_CPU_EXT OS_STK OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE]; OS_CPU_EXT OS_STK *OS_CPU_ExceptStkBase; /* ********************************************************************************************************* * FUNCTION PROTOTYPES ********************************************************************************************************* */ #if OS_CRITICAL_METHOD == 3u /* See OS_CPU_A.ASM */ OS_CPU_SR OS_CPU_SR_Save (void); void OS_CPU_SR_Restore (OS_CPU_SR cpu_sr); #endif void OSCtxSw (void); void OSIntCtxSw (void); void OSStartHighRdy (void); void OS_CPU_PendSVHandler (void); /* See OS_CPU_C.C */ //void OS_CPU_SysTickHandler (void); //void OS_CPU_SysTickInit (INT32U cnts); #if (OS_CPU_ARM_FP_EN > 0u) void OS_CPU_FP_Reg_Push (OS_STK *stkPtr); void OS_CPU_FP_Reg_Pop (OS_STK *stkPtr); #endif #endif