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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2020 NXP
  4. * All rights reserved.
  5. *
  6. * SPDX-License-Identifier: BSD-3-Clause
  7. */
  8. #include "fsl_llwu.h"
  9. /* Component ID definition, used by tools. */
  10. #ifndef FSL_COMPONENT_ID
  11. #define FSL_COMPONENT_ID "platform.drivers.llwu"
  12. #endif
  13. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN)
  14. /*!
  15. * brief Sets the external input pin source mode.
  16. *
  17. * This function sets the external input pin source mode that is used
  18. * as a wake up source.
  19. *
  20. * param base LLWU peripheral base address.
  21. * param pinIndex A pin index to be enabled as an external wakeup source starting from 1.
  22. * param pinMode A pin configuration mode defined in the llwu_external_pin_modes_t.
  23. */
  24. void LLWU_SetExternalWakeupPinMode(LLWU_Type *base, uint32_t pinIndex, llwu_external_pin_mode_t pinMode)
  25. {
  26. #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
  27. volatile uint32_t *regBase;
  28. uint32_t regOffset;
  29. uint32_t reg;
  30. switch (pinIndex >> 4U)
  31. {
  32. case 0U:
  33. regBase = &base->PE1;
  34. break;
  35. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
  36. case 1U:
  37. regBase = &base->PE2;
  38. break;
  39. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  40. default:
  41. regBase = NULL;
  42. break;
  43. }
  44. if (NULL != regBase)
  45. {
  46. reg = *regBase;
  47. regOffset = ((pinIndex & 0x0FU) << 1U);
  48. reg &= LLWU_REG_VAL(~(3UL << regOffset));
  49. reg |= ((uint32_t)pinMode << regOffset);
  50. *regBase = reg;
  51. }
  52. #else
  53. volatile uint8_t *regBase;
  54. uint8_t regOffset;
  55. uint8_t reg;
  56. switch (pinIndex >> 2U)
  57. {
  58. case 0U:
  59. regBase = &base->PE1;
  60. break;
  61. case 1U:
  62. regBase = &base->PE2;
  63. break;
  64. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
  65. case 2U:
  66. regBase = &base->PE3;
  67. break;
  68. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  69. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 12))
  70. case 3U:
  71. regBase = &base->PE4;
  72. break;
  73. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  74. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
  75. case 4U:
  76. regBase = &base->PE5;
  77. break;
  78. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  79. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 20))
  80. case 5U:
  81. regBase = &base->PE6;
  82. break;
  83. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  84. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
  85. case 6U:
  86. regBase = &base->PE7;
  87. break;
  88. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  89. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 28))
  90. case 7U:
  91. regBase = &base->PE8;
  92. break;
  93. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  94. default:
  95. regBase = NULL;
  96. break;
  97. }
  98. if (NULL != regBase)
  99. {
  100. reg = *regBase;
  101. regOffset = (uint8_t)((pinIndex & 0x03U) << 1U);
  102. reg &= LLWU_REG_VAL(~(3UL << regOffset));
  103. reg |= (uint8_t)((uint32_t)pinMode << regOffset);
  104. *regBase = reg;
  105. }
  106. #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH == 32 */
  107. }
  108. /*!
  109. * brief Gets the external wakeup source flag.
  110. *
  111. * This function checks the external pin flag to detect whether the MCU is
  112. * woken up by the specific pin.
  113. *
  114. * param base LLWU peripheral base address.
  115. * param pinIndex A pin index, which starts from 1.
  116. * return True if the specific pin is a wakeup source.
  117. */
  118. bool LLWU_GetExternalWakeupPinFlag(LLWU_Type *base, uint32_t pinIndex)
  119. {
  120. #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
  121. return (0U != (base->PF & (1UL << pinIndex)));
  122. #else
  123. bool ret;
  124. volatile uint8_t *regBase;
  125. switch (pinIndex >> 3U)
  126. {
  127. #if (defined(FSL_FEATURE_LLWU_HAS_PF) && FSL_FEATURE_LLWU_HAS_PF)
  128. case 0U:
  129. regBase = &base->PF1;
  130. break;
  131. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
  132. case 1U:
  133. regBase = &base->PF2;
  134. break;
  135. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  136. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
  137. case 2U:
  138. regBase = &base->PF3;
  139. break;
  140. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  141. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
  142. case 3U:
  143. regBase = &base->PF4;
  144. break;
  145. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  146. #else
  147. case 0U:
  148. regBase = &base->F1;
  149. break;
  150. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
  151. case 1U:
  152. regBase = &base->F2;
  153. break;
  154. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  155. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
  156. case 2U:
  157. regBase = &base->F3;
  158. break;
  159. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  160. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
  161. case 3U:
  162. regBase = &base->F4;
  163. break;
  164. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  165. #endif /* FSL_FEATURE_LLWU_HAS_PF */
  166. default:
  167. regBase = NULL;
  168. break;
  169. }
  170. if (NULL != regBase)
  171. {
  172. if (0U != (*regBase & (1U << pinIndex % 8U)))
  173. {
  174. ret = true;
  175. }
  176. else
  177. {
  178. ret = false;
  179. }
  180. }
  181. else
  182. {
  183. ret = false;
  184. }
  185. return ret;
  186. #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
  187. }
  188. /*!
  189. * brief Clears the external wakeup source flag.
  190. *
  191. * This function clears the external wakeup source flag for a specific pin.
  192. *
  193. * param base LLWU peripheral base address.
  194. * param pinIndex A pin index, which starts from 1.
  195. */
  196. void LLWU_ClearExternalWakeupPinFlag(LLWU_Type *base, uint32_t pinIndex)
  197. {
  198. #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
  199. base->PF = (1UL << pinIndex);
  200. #else
  201. volatile uint8_t *regBase;
  202. switch (pinIndex >> 3U)
  203. {
  204. #if (defined(FSL_FEATURE_LLWU_HAS_PF) && FSL_FEATURE_LLWU_HAS_PF)
  205. case 0U:
  206. regBase = &base->PF1;
  207. break;
  208. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
  209. case 1U:
  210. regBase = &base->PF2;
  211. break;
  212. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  213. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
  214. case 2U:
  215. regBase = &base->PF3;
  216. break;
  217. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  218. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
  219. case 3U:
  220. regBase = &base->PF4;
  221. break;
  222. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  223. #else
  224. case 0U:
  225. regBase = &base->F1;
  226. break;
  227. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
  228. case 1U:
  229. regBase = &base->F2;
  230. break;
  231. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  232. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
  233. case 2U:
  234. regBase = &base->F3;
  235. break;
  236. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  237. #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
  238. case 3U:
  239. regBase = &base->F4;
  240. break;
  241. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  242. #endif /* FSL_FEATURE_LLWU_HAS_PF */
  243. default:
  244. regBase = NULL;
  245. break;
  246. }
  247. if (NULL != regBase)
  248. {
  249. *regBase = (1U << pinIndex % 8U);
  250. }
  251. #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
  252. }
  253. #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
  254. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && FSL_FEATURE_LLWU_HAS_PIN_FILTER)
  255. /*!
  256. * brief Sets the pin filter configuration.
  257. *
  258. * This function sets the pin filter configuration.
  259. *
  260. * param base LLWU peripheral base address.
  261. * param filterIndex A pin filter index used to enable/disable the digital filter, starting from 1.
  262. * param filterMode A filter mode configuration
  263. */
  264. void LLWU_SetPinFilterMode(LLWU_Type *base, uint32_t filterIndex, llwu_external_pin_filter_mode_t filterMode)
  265. {
  266. #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
  267. uint32_t filt;
  268. uint32_t shiftInReg;
  269. if ((filterIndex > 0U) && (filterIndex <= (uint32_t)FSL_FEATURE_LLWU_HAS_PIN_FILTER))
  270. {
  271. shiftInReg = (filterIndex - 1U) * 8U;
  272. filt = base->FILT;
  273. /* Clean the W1C bits, in case the flags are cleared by mistake. */
  274. filt &= ~(((uint32_t)LLWU_FILT_FILTF1_MASK << 0U) | ((uint32_t)LLWU_FILT_FILTF1_MASK << 8U) |
  275. ((uint32_t)LLWU_FILT_FILTF1_MASK << 16U) | ((uint32_t)LLWU_FILT_FILTF1_MASK << 24U));
  276. filt &= ~(((uint32_t)LLWU_FILT_FILTSEL1_MASK | (uint32_t)LLWU_FILT_FILTE1_MASK) << shiftInReg);
  277. filt |=
  278. ((LLWU_FILT_FILTSEL1(filterMode.pinIndex) | LLWU_FILT_FILTE1(filterMode.filterMode) | LLWU_FILT_FILTF1_MASK)
  279. << shiftInReg);
  280. base->FILT = filt;
  281. }
  282. #else
  283. volatile uint8_t *regBase;
  284. switch (filterIndex)
  285. {
  286. case 1U:
  287. regBase = &base->FILT1;
  288. break;
  289. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
  290. case 2U:
  291. regBase = &base->FILT2;
  292. break;
  293. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  294. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
  295. case 3U:
  296. regBase = &base->FILT3;
  297. break;
  298. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  299. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
  300. case 4U:
  301. regBase = &base->FILT4;
  302. break;
  303. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  304. default:
  305. regBase = NULL;
  306. break;
  307. }
  308. if (NULL != regBase)
  309. {
  310. *regBase = (uint8_t)((*regBase & ~(LLWU_FILT1_FILTSEL_MASK | LLWU_FILT1_FILTE_MASK)) |
  311. LLWU_FILT1_FILTSEL(filterMode.pinIndex) | LLWU_FILT1_FILTE(filterMode.filterMode) |
  312. LLWU_FILT1_FILTF_MASK) /* W1C to clear the FILTF flag bit. */
  313. ;
  314. }
  315. #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
  316. }
  317. /*!
  318. * brief Gets the pin filter configuration.
  319. *
  320. * This function gets the pin filter flag.
  321. *
  322. * param base LLWU peripheral base address.
  323. * param filterIndex A pin filter index, which starts from 1.
  324. * return True if the flag is a source of the existing low-leakage power mode.
  325. */
  326. bool LLWU_GetPinFilterFlag(LLWU_Type *base, uint32_t filterIndex)
  327. {
  328. #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
  329. return (0U != (base->FILT & (1UL << (filterIndex * 8U - 1U))));
  330. #else
  331. bool status = false;
  332. switch (filterIndex)
  333. {
  334. case 1:
  335. status = ((base->FILT1 & LLWU_FILT1_FILTF_MASK) != 0U);
  336. break;
  337. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
  338. case 2:
  339. status = ((base->FILT2 & LLWU_FILT2_FILTF_MASK) != 0U);
  340. break;
  341. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  342. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
  343. case 3:
  344. status = ((base->FILT3 & LLWU_FILT3_FILTF_MASK) != 0U);
  345. break;
  346. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  347. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
  348. case 4:
  349. status = ((base->FILT4 & LLWU_FILT4_FILTF_MASK) != 0U);
  350. break;
  351. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  352. default:
  353. status = false;
  354. break;
  355. }
  356. return status;
  357. #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
  358. }
  359. /*!
  360. * brief Clears the pin filter configuration.
  361. *
  362. * This function clears the pin filter flag.
  363. *
  364. * param base LLWU peripheral base address.
  365. * param filterIndex A pin filter index to clear the flag, starting from 1.
  366. */
  367. void LLWU_ClearPinFilterFlag(LLWU_Type *base, uint32_t filterIndex)
  368. {
  369. #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
  370. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 0))
  371. uint32_t reg;
  372. if ((filterIndex > 0U) && (filterIndex <= (uint32_t)FSL_FEATURE_LLWU_HAS_PIN_FILTER))
  373. {
  374. reg = base->FILT;
  375. /* Clean the W1C bits, in case the flags are cleared by mistake. */
  376. reg &= ~(((uint32_t)LLWU_FILT_FILTF1_MASK << 0U) | ((uint32_t)LLWU_FILT_FILTF1_MASK << 8U) |
  377. ((uint32_t)LLWU_FILT_FILTF1_MASK << 16U) | ((uint32_t)LLWU_FILT_FILTF1_MASK << 24U));
  378. reg |= ((uint32_t)LLWU_FILT_FILTF1_MASK << ((filterIndex - 1U) * 8U));
  379. base->FILT = reg;
  380. }
  381. #endif
  382. return;
  383. #else
  384. volatile uint8_t *regBase;
  385. uint8_t reg;
  386. switch (filterIndex)
  387. {
  388. case 1:
  389. regBase = &base->FILT1;
  390. break;
  391. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
  392. case 2:
  393. regBase = &base->FILT2;
  394. break;
  395. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  396. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
  397. case 3:
  398. regBase = &base->FILT3;
  399. break;
  400. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  401. #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
  402. case 4:
  403. regBase = &base->FILT4;
  404. break;
  405. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  406. default:
  407. regBase = NULL;
  408. break;
  409. }
  410. if (NULL != regBase)
  411. {
  412. reg = *regBase;
  413. reg |= LLWU_FILT1_FILTF_MASK;
  414. *regBase = reg;
  415. }
  416. #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
  417. }
  418. #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
  419. #if (defined(FSL_FEATURE_LLWU_HAS_RESET_ENABLE) && FSL_FEATURE_LLWU_HAS_RESET_ENABLE)
  420. /*!
  421. * brief Sets the reset pin mode.
  422. *
  423. * This function determines how the reset pin is used as a low leakage mode exit source.
  424. *
  425. * param pinEnable Enable reset the pin filter
  426. * param pinFilterEnable Specify whether the pin filter is enabled in Low-Leakage power mode.
  427. */
  428. void LLWU_SetResetPinMode(LLWU_Type *base, bool pinEnable, bool pinFilterEnable)
  429. {
  430. uint8_t reg;
  431. reg = base->RST;
  432. reg &= (uint8_t)(~(LLWU_RST_LLRSTE_MASK | LLWU_RST_RSTFILT_MASK));
  433. if (pinEnable)
  434. {
  435. reg |= LLWU_RST_LLRSTE_MASK;
  436. }
  437. if (pinFilterEnable)
  438. {
  439. reg |= LLWU_RST_RSTFILT_MASK;
  440. }
  441. base->RST = reg;
  442. }
  443. #endif /* FSL_FEATURE_LLWU_HAS_RESET_ENABLE */