通过提升优化等级改变了对堆栈的访问,解决了导致硬件错误中断的问题

PLSR/PLSR/Core/Inc/tim.h

@@ -107,6 +107,17 @@ typedef enum {
     PLSR_DIR_FORWARD = 0,       // 正向
     PLSR_DIR_REVERSE = 1        // 反向
 } PLSR_Direction_t;
+
+/**
+ * @brief PLSR错误代码枚举
+ */
+typedef enum {
+    PLSR_ERROR_NONE = 0,                ///< 无错误
+    PLSR_ERROR_FREQ_OUT_OF_RANGE = 1,   ///< 频率超出范围
+    PLSR_ERROR_PARAM_CALC_FAILED = 2,   ///< 参数计算失败
+    PLSR_ERROR_TIMER_CONFIG_FAILED = 3, ///< 定时器配置失败
+    PLSR_ERROR_HARDWARE_FAULT = 4       ///< 硬件故障
+} PLSR_ErrorCode_t;
 /* USER CODE END Private defines */
 
 void MX_TIM2_Init(void); // TIM2恢复用于脉冲计数
@@ -168,7 +179,7 @@ typedef struct
     uint32_t freq_step;             ///< 频率步长
     uint32_t default_freq;          ///< 脉冲默认速度
 
-    uint64_t pulse_count;            ///< 当前脉冲计数
+    int64_t pulse_count;            ///< 当前脉冲计数（支持正负值）
     int64_t prevPulseCount;         ///< 上阶段目标脉冲
     int64_t accel_pulse_count;      ///< 第一部分脉冲数（可能是加速、减速或匀速）
     int64_t const_pulse_count;      ///< 第二部分脉冲数（匀速）
@@ -203,6 +214,7 @@ typedef struct
     uint8_t ext_port;               ///< 外部事件端口选择
     uint8_t dir_port;               ///< 方向端口选择
     uint8_t current_part;           ///< 当前执行部分：1-第一部分，2-第二部分，3-第三部分
+    PLSR_ErrorCode_t error_code;    ///< 错误代码
 } PLSR_RouteConfig_t;
 
 // 三部分执行状态枚举
@@ -278,6 +290,8 @@ extern PLSR_RouteConfig_t PlsrRoute;    // 全局PLSR路径控制结构体
 extern uint8_t PlsrExtEventFlag;      // 外部事件标志
 extern int64_t PlsrTotalPulseCount;   // 全局累加脉冲计数器(程序运行期间持续累加，支持负数) 
 extern int64_t PlsrLocation;
+extern volatile uint8_t PlsrFreqUpdateRequest;  // 频率更新请求标志(中断安全)
+extern volatile uint32_t PlsrPendingFreq;       // 待更新的频率值(中断安全)
 /* USER CODE END Prototypes */
 
 #ifdef __cplusplus

PLSR/PLSR/Core/Src/tim.c

@@ -708,25 +708,29 @@ void PLSR_Route_PWM_Stop()
  */
 void PLSR_PWM_SetFrequency(uint32_t frequency)
 {
-    uint16_t prescaler = 0;     // 预分频器值
-    uint32_t period = 0;        // 自动重载值(周期)
-    uint32_t ccr = 0;
+    uint16_t prescaler = 0;     ///< 预分频器值
+    uint32_t period = 0;        ///< 自动重载值(周期)
+    uint32_t ccr = 0;           ///< 比较寄存器值
     
-    // 频率范围检查 - 确保频率在1hz到100khz范围内
+    /* 频率范围检查 - 确保频率在有效范围内 */
     if(frequency < PLSR_PWM_FREQ_MIN || frequency > PLSR_PWM_FREQ_MAX)
     {
-        return; // 频率超出范围，直接返回，不做任何修改
+        return; ///< 频率超出范围，直接返回，不做任何修改
     }
     
-    // 计算最佳定时器参数 - 根据目标频率计算预分频器和周期值
+    /* 计算最佳定时器参数 - 根据目标频率计算预分频器和周期值 */
     PLSR_CalculateTimerParams(frequency, &prescaler, &period);
-    ccr = (period + 1) / 2;
-    PLSR_Fix_Compensated(frequency,&ccr);
-    // 参数有效性检查 - 防止period为0导致除零错误
+    
+    /* 参数有效性检查 - 防止period为0导致除零错误 */
     if(period == 0)
     {
-        return; // period无效，直接返回，避免HardFault异常
+        return; ///< period无效，直接返回，避免HardFault异常
     }
+    
+    /* 安全计算CCR值，使用64位避免溢出 */
+    uint64_t ccr_temp = ((uint64_t)period + 1ULL) / 2ULL;
+    ccr = (uint32_t)ccr_temp;
+    PLSR_Fix_Compensated(frequency, &ccr);
     // 根据output_port选择目标定时器并更新参数
     switch(PlsrRoute.output_port)
     {
@@ -778,25 +782,32 @@ void PLSR_PWM_SetFrequency(uint32_t frequency)
  */
 void PLSR_TIM6_SetUpdateFreq(uint32_t freq_us)
 {
-    // 保存新的频率设置
+    /* 参数有效性检查 */
+    if (freq_us == 0) freq_us = 1; ///< 防止除零错误
+    if (freq_us > 65535) freq_us = 65535; ///< 限制最大周期值
+    
+    /* 保存新的频率设置 */
     s_tim6_update_freq_us = freq_us;
     
-    // 定时器时钟参数 (基于STM32F4系列APB1时钟配置)
-    // APB1时钟频率：42MHz 定时器二倍频
-    uint32_t target_period_us = freq_us; // 目标周期(微秒)
+    /* 定时器时钟参数 (基于STM32F4系列APB1时钟配置) */
+    /* APB1时钟频率：42MHz 定时器二倍频到84MHz */
+    uint32_t target_period_us = freq_us; ///< 目标周期(微秒)
+    
+    /* 计算定时器参数 */
+    /* 预分频器设为83，使计数频率为84MHz/(83+1) = 1MHz，即1us/tick */
+    uint16_t prescaler = 83;  ///< 预分频器值，产生1MHz计数频率
+    uint32_t period = target_period_us - 1;  ///< 自动重载值，减1是因为从0开始计数
     
-    // 计算定时器参数
-    // 预分频器设为41，使计数频率为84MHz/(83+1) = 1MHz，即1us/tick
-    uint16_t prescaler = 83;  // 预分频器值，产生1MHz计数频率
-    uint32_t period = target_period_us - 1;  // 自动重载值，减1是因为从0开始计数
+    /* 确保period在有效范围内 */
+    if (period > 65535) period = 65535; ///< 限制ARR最大值
     
-    // 停止TIM6中断 - 避免参数更新过程中的中断干扰
+    /* 停止TIM6中断 - 避免参数更新过程中的中断干扰 */
     HAL_TIM_Base_Stop_IT(&htim6);
     
-    // 更新TIM6核心参数
-    __HAL_TIM_SET_PRESCALER(&htim6, prescaler);  // 设置预分频器
-    __HAL_TIM_SET_AUTORELOAD(&htim6, period);    // 设置自动重载值(决定更新频率)
-    __HAL_TIM_SET_COUNTER(&htim6, 0);            // 重置计数器到初始状态
+    /* 更新TIM6核心参数 */
+    __HAL_TIM_SET_PRESCALER(&htim6, prescaler);  ///< 设置预分频器
+    __HAL_TIM_SET_AUTORELOAD(&htim6, period);    ///< 设置自动重载值(决定更新频率)
+    __HAL_TIM_SET_COUNTER(&htim6, 0);            ///< 重置计数器到初始状态
     
     // 触发更新事件 - 立即将新参数加载到影子寄存器
     HAL_TIM_GenerateEvent(&htim6, TIM_EVENTSOURCE_UPDATE);

PLSR/PLSR/Core/Src/tools.c

@@ -20,34 +20,44 @@ void PLSR_Fix_Compensated(uint32_t frequency, uint32_t* ccr)
  * @param  prescaler: 预分频器值指针
  * @param  period: 周期值指针
  * @retval None
- * @note   根据目标频率计算TIM10的预分频器和周期值
+ * @note   根据目标频率计算定时器的预分频器和周期值，使用64位数据类型避免高频时溢出
  */
 void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, uint32_t* period)
 {
+    /* 参数有效性检查 */
     if (frequency < PLSR_PWM_FREQ_MIN)  frequency = PLSR_PWM_FREQ_MIN;
     if (frequency > PLSR_PWM_FREQ_MAX)  frequency = PLSR_PWM_FREQ_MAX;
-    uint32_t timer_clock = 0;
+    
+    /* 使用64位数据类型避免高频计算时的溢出 */
+    uint64_t timer_clock = 0;
     if(PlsrRoute.output_port == 0 || PlsrRoute.output_port == 1)
     {
-       timer_clock = 168000000UL; // TIM10/TIM11时钟 (APB2 84MHz)
+       timer_clock = 168000000ULL; ///< TIM10/TIM11时钟 (APB2 168MHz)
     }
     else
     {
-        timer_clock = 84000000UL; // TIM13/TIM14时钟 (APB1 42MHz)
+        timer_clock = 84000000ULL; ///< TIM13/TIM14时钟 (APB1 84MHz)
     }
-    uint32_t divider = (timer_clock + frequency / 2) / frequency; // 四舍五入
-    if (divider < 2) divider = 2; // 至少 2
+    
+    /* 防止除零错误 */
+    if (frequency == 0) frequency = 1;
+    
+    /* 使用64位计算避免溢出，四舍五入处理 */
+    uint64_t divider = (timer_clock + (uint64_t)frequency / 2) / (uint64_t)frequency;
+    if (divider < 2) divider = 2; ///< 最小分频比为2
 
-    // 限制 ARR <= 65535
-    uint32_t psc = (divider + 65535) / 65536; // 向上取整
-    if (psc > 0xFFFF) psc = 0xFFFF;
+    /* 计算预分频器，限制ARR <= 65535 */
+    uint64_t psc = (divider + 65535ULL) / 65536ULL; ///< 向上取整
+    if (psc > 0xFFFFULL) psc = 0xFFFFULL; ///< 限制预分频器最大值
 
-    uint32_t arr = (divider / psc) - 1;
-    if (arr < 1) arr = 1;
-    if (arr > 65535) arr = 65535;
+    /* 计算自动重载值 */
+    uint64_t arr = (divider / psc) - 1;
+    if (arr < 1) arr = 1; ///< 最小ARR值为1
+    if (arr > 65535ULL) arr = 65535ULL; ///< 限制ARR最大值
 
+    /* 安全转换为16位和32位数据类型 */
     *prescaler = (uint16_t)(psc - 1);
-    *period = arr;
+    *period = (uint32_t)arr;
 }
 
 // ==================== PLSR 路径计算函数实现 ====================

PLSR/PLSR/EWARM/settings/test.1.dnx

@@ -20,7 +20,7 @@
         <stlinkResetStrategy>2</stlinkResetStrategy>
     </StLinkDriver>
     <DebugChecksum>
-        <Checksum>630028761</Checksum>
+        <Checksum>3379969080</Checksum>
     </DebugChecksum>
     <Exceptions>
         <StopOnUncaught>_ 0</StopOnUncaught>

PLSR/PLSR/EWARM/test.1.ewp

@@ -287,7 +287,7 @@
                 <option>
                     <name>CCAllowList</name>
                     <version>1</version>
-                    <state>00000000</state>
+                    <state>11111110</state>
                 </option>
                 <option>
                     <name>CCDebugInfo</name>
@@ -374,16 +374,16 @@
                 </option>
                 <option>
                     <name>CCOptLevel</name>
-                    <state>0</state>
+                    <state>3</state>
                 </option>
                 <option>
                     <name>CCOptStrategy</name>
                     <version>0</version>
-                    <state>2</state>
+                    <state>0</state>
                 </option>
                 <option>
                     <name>CCOptLevelSlave</name>
-                    <state>0</state>
+                    <state>3</state>
                 </option>
                 <option>
                     <name>CompilerMisraRules98</name>
@@ -442,7 +442,7 @@
                 <option>
                     <name>CCOptStrategySlave</name>
                     <version>0</version>
-                    <state>2</state>
+                    <state>0</state>
                 </option>
                 <option>
                     <name>CCGuardCalls</name>

PLSR/PLSR/EWARM/test.1/Obj/.ninja_log

@@ -1,165 +1,64 @@
 # ninja log v5
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-386	915	7780470552138436	test.1_part1.pbi	132c9eecf11b0e50
-75	585	7780462379034036	test.1_part2.pbi	9358ff0702a0a659
-1097	1422	7780461784319308	dma.pbi	4f5ebe00ac67ed57
-32	386	7780470546838343	tim.pbi	f07c6d790a519d93
-32	375	7780470434382331	usart.pbi	7c2d93866867ab60
-458	806	7780469798872479	modbus_log.pbi	596603da5f343c45
-42	484	7780469795422485	flash_save.pbi	dc7405226be28cc6
-1322	1716	7780461787579307	modbus_crc.pbi	9b76681ddf289794
-33	489	7780470178140982	tools.pbi	50c1b905eccec5a9
-30	552	7780470639100713	main.pbi	9c0a6aa02351636a
-40	561	7780470639170712	usart.pbi	7c2d93866867ab60
-38	573	7780470639300709	flash_save.pbi	dc7405226be28cc6
-42	573	7780470639240708	gpio.pbi	a088b5271f02118a
-36	573	7780470639300709	tools.pbi	50c1b905eccec5a9
-33	595	7780470639540709	tim.pbi	f07c6d790a519d93
-553	985	7780470642960704	modbus_log.pbi	596603da5f343c45
-596	1224	7780470645760723	test.1_part1.pbi	132c9eecf11b0e50
-985	1599	7780470649420706	test.1_part0.pbi	60db414ccd7a80f4
-1600	2007	7780470653570714	test.1.pbd	363d5d355a216cdf
-2008	3808	7780470671250697	test.1.pbw	f11e09b552b4c82f
-31	407	7780470841607438	tim.pbi	f07c6d790a519d93
-408	957	7780470847147452	test.1_part1.pbi	132c9eecf11b0e50
-958	1331	7780470850817453	test.1.pbd	363d5d355a216cdf
-1331	2960	7780470866947418	test.1.pbw	f11e09b552b4c82f
-32	490	7780470894370915	tim.pbi	f07c6d790a519d93
-491	1020	7780470899670910	test.1_part1.pbi	132c9eecf11b0e50
-1020	1362	7780470903100885	test.1.pbd	363d5d355a216cdf
-1363	2958	7780470918730892	test.1.pbw	f11e09b552b4c82f
-32	403	7780471109402400	tim.pbi	f07c6d790a519d93
-404	961	7780471114982410	test.1_part1.pbi	132c9eecf11b0e50
-961	1303	7780471118412410	test.1.pbd	363d5d355a216cdf
-1304	2897	7780471133992395	test.1.pbw	f11e09b552b4c82f
-36	429	7780471284169802	tim.pbi	f07c6d790a519d93
-429	1024	7780471290249805	test.1_part1.pbi	132c9eecf11b0e50
-1024	1404	7780471293869813	test.1.pbd	363d5d355a216cdf
-1405	3011	7780471309799785	test.1.pbw	f11e09b552b4c82f
-32	400	7780472177900002	tim.pbi	f07c6d790a519d93
-400	933	7780472183299998	test.1_part1.pbi	132c9eecf11b0e50
-933	1272	7780472186699991	test.1.pbd	363d5d355a216cdf
-1273	2856	7780472202159955	test.1.pbw	f11e09b552b4c82f
-32	396	7780472310710283	tim.pbi	f07c6d790a519d93
-396	931	7780472316070276	test.1_part1.pbi	132c9eecf11b0e50
-931	1272	7780472319490274	test.1.pbd	363d5d355a216cdf
-1273	2867	7780472335087873	test.1.pbw	f11e09b552b4c82f
-33	487	7780472485696402	tim.pbi	f07c6d790a519d93
-487	1037	7780472491206375	test.1_part1.pbi	132c9eecf11b0e50
-1037	1376	7780472494596371	test.1.pbd	363d5d355a216cdf
-1376	2942	7780472509926379	test.1.pbw	f11e09b552b4c82f
-32	393	7780472618508036	tim.pbi	f07c6d790a519d93
-393	937	7780472623938033	test.1_part1.pbi	132c9eecf11b0e50
-938	1286	7780472627418015	test.1.pbd	363d5d355a216cdf
-1287	2894	7780472643188022	test.1.pbw	f11e09b552b4c82f
-32	396	7780472669579323	tim.pbi	f07c6d790a519d93
-397	930	7780472674929320	test.1_part1.pbi	132c9eecf11b0e50
-931	1274	7780472678359320	test.1.pbd	363d5d355a216cdf
-1274	2867	7780472693979325	test.1.pbw	f11e09b552b4c82f
-32	377	7780472720204098	tim.pbi	f07c6d790a519d93
-378	912	7780472725554115	test.1_part1.pbi	132c9eecf11b0e50
-912	1251	7780472728944091	test.1.pbd	363d5d355a216cdf
-1251	2835	7780472744444077	test.1.pbw	f11e09b552b4c82f
-32	503	7780472812669599	tim.pbi	f07c6d790a519d93
-503	1043	7780472818069572	test.1_part1.pbi	132c9eecf11b0e50
-1043	1387	7780472821519595	test.1.pbd	363d5d355a216cdf
-1388	2967	7780472836985557	test.1.pbw	f11e09b552b4c82f
-32	399	7780472945623290	tim.pbi	f07c6d790a519d93
-400	955	7780472951193262	test.1_part1.pbi	132c9eecf11b0e50
-956	1304	7780472954673258	test.1.pbd	363d5d355a216cdf
-1305	2921	7780472970513264	test.1.pbw	f11e09b552b4c82f
-33	378	7780473079008484	tools.pbi	50c1b905eccec5a9
-378	914	7780473084398478	test.1_part1.pbi	132c9eecf11b0e50
-914	1259	7780473087857663	test.1.pbd	363d5d355a216cdf
-1259	2884	7780473103767648	test.1.pbw	f11e09b552b4c82f
-33	404	7780473130243055	tools.pbi	50c1b905eccec5a9
-404	960	7780473135933134	test.1_part1.pbi	132c9eecf11b0e50
-960	1350	7780473139633060	test.1.pbd	363d5d355a216cdf
-1351	2947	7780473155573124	test.1.pbw	f11e09b552b4c82f
-36	378	7780473243562326	tools.pbi	50c1b905eccec5a9
-378	913	7780473248922322	test.1_part1.pbi	132c9eecf11b0e50
-914	1265	7780473252442315	test.1.pbd	363d5d355a216cdf
-1265	2866	7780473268092329	test.1.pbw	f11e09b552b4c82f
-34	469	7780473396839426	usart.pbi	7c2d93866867ab60
-35	472	7780473396879440	tools.pbi	50c1b905eccec5a9
-41	472	7780473396769433	flash_save.pbi	dc7405226be28cc6
-31	544	7780473397119437	tim.pbi	f07c6d790a519d93
-37	574	7780473397959426	modbus_log.pbi	596603da5f343c45
-39	591	7780473398079435	gpio.pbi	a088b5271f02118a
-469	859	7780473400699426	main.pbi	9c0a6aa02351636a
-544	1165	7780473403659423	test.1_part1.pbi	132c9eecf11b0e50
-860	1450	7780473406729420	test.1_part0.pbi	60db414ccd7a80f4
-1451	1827	7780473410439429	test.1.pbd	363d5d355a216cdf
-1828	3717	7780473428979417	test.1.pbw	f11e09b552b4c82f
-42	487	7780473558806508	main.pbi	9c0a6aa02351636a
-36	490	7780473558806508	usart.pbi	7c2d93866867ab60
-31	508	7780473559096507	tim.pbi	f07c6d790a519d93
-40	610	7780473559966506	gpio.pbi	a088b5271f02118a
-38	610	7780473559986502	flash_save.pbi	dc7405226be28cc6
-34	610	7780473560026504	tools.pbi	50c1b905eccec5a9
-488	852	7780473562536529	modbus_log.pbi	596603da5f343c45
-611	1177	7780473565726508	test.1_part1.pbi	132c9eecf11b0e50
-852	1387	7780473567896500	test.1_part0.pbi	60db414ccd7a80f4
-1387	1740	7780473571426514	test.1.pbd	363d5d355a216cdf
-1741	3363	7780473587252683	test.1.pbw	f11e09b552b4c82f
-33	489	7780473614741806	tim.pbi	f07c6d790a519d93
-489	1016	7780473620031805	test.1_part1.pbi	132c9eecf11b0e50
-1017	1355	7780473623411784	test.1.pbd	363d5d355a216cdf
-1355	2994	7780473639301880	test.1.pbw	f11e09b552b4c82f
-32	504	7780473667090505	tim.pbi	f07c6d790a519d93
-505	1038	7780473672440500	test.1_part1.pbi	132c9eecf11b0e50
-1039	1374	7780473675800494	test.1.pbd	363d5d355a216cdf
-1375	2989	7780473691571675	test.1.pbw	f11e09b552b4c82f
+817	1281	7784095315510351	stm32f4xx_hal_i2c.pbi	74395538aa12fa10
+2579	3023	7784095332931819	stm32f4xx_hal_dma.pbi	2d6aa8f3983bf80a
+2028	2402	7784095326633620	stm32f4xx_hal_timebase_tim.pbi	b6f5ce0feaca8054
+685	1057	7784095313215134	stm32f4xx_hal_dma_ex.pbi	1960c5ab56ffede7
+176	583	7784095308534324	stm32f4xx_hal_i2c_ex.pbi	7798e48f8e6ef374
+39	455	7784095307177070	stm32f4xx_hal_exti.pbi	373789209d565f00
+2108	2578	7784095328313628	main.pbi	9c0a6aa02351636a
+2402	2827	7784095330459267	stm32f4xx_it.pbi	d01766022cb163bc
+2422	2883	7784095331169269	stm32f4xx_hal_cortex.pbi	2c6d2473a153fb5a
+2828	3211	7784095334201534	system_stm32f4xx.pbi	f50e519d7e78a5de
+2094	2545	7784095328073625	gpio.pbi	a088b5271f02118a
+3777	4151	7784095344123703	test.1.pbd	363d5d355a216cdf
+2693	3312	7784095335559038	test.1_part0.pbi	60db414ccd7a80f4
+773	1145	7784095313986274	stm32f4xx_hal_gpio.pbi	53b438f48be9a8d0
+3212	3777	7784095340331742	test.1_part1.pbi	132c9eecf11b0e50
+3024	3555	7784095338269031	test.1_part2.pbi	9358ff0702a0a659
+2062	2421	7784095326913633	dma.pbi	4f5ebe00ac67ed57
+1468	2062	7784095323280687	tim.pbi	f07c6d790a519d93
+2537	2985	7784095332441816	usart.pbi	7c2d93866867ab60
+1903	2369	7784095326383628	modbus_log.pbi	596603da5f343c45
+1573	2030	7784095323003812	modbus_crc.pbi	9b76681ddf289794
+1448	1903	7784095321727763	flash_save.pbi	dc7405226be28cc6
+2030	2536	7784095327803633	tools.pbi	50c1b905eccec5a9

PLSR/PLSR/EWARM/test.1/Obj/flash_save.pbi.dep

@@ -36,24 +36,6 @@ flash_save.pbi: \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/main.h \
-  E:\Software\IAR\arm\inc\c\stdio.h E:\Software\IAR\arm\inc\c\string.h \
-  E:\Software\IAR\arm\inc\c\DLib_Product_string.h \
-  E:\Software\IAR\arm\inc\c\ctype.h E:\Software\IAR\arm\inc\c\stdlib.h \
-  E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \
-  E:\Software\IAR\arm\inc\c\stdarg.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/tim.h \
-  E:\Software\IAR\arm\inc\c\math.h \
-  E:\Software\IAR\arm\inc\c\DLib_float_setup.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\modbus_crc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\usart.h
+  E:\Software\IAR\arm\inc\c\string.h \
+  E:\Software\IAR\arm\inc\c\DLib_Product_string.h

PLSR/PLSR/EWARM/test.1/Obj/gpio.pbi.dep

@@ -54,4 +54,6 @@ gpio.pbi: \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \
+  E:\Software\IAR\arm\inc\c\intrinsics.h \
+  E:\Software\IAR\arm\inc\c\iar_intrinsics_common.h

PLSR/PLSR/EWARM/test.1/Obj/main.pbi.dep

@@ -1,62 +1,57 @@
 main.pbi: \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\main.c \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\main.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\stm32f4xx_hal_conf.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_rcc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include\stm32f4xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\core_cm4.h \
-  E:\Software\IAR\arm\inc\c\stdint.h E:\Software\IAR\arm\inc\c\ycheck.h \
-  E:\Software\IAR\arm\inc\c\yvals.h \
-  E:\Software\IAR\arm\inc\c\DLib_Defaults.h \
-  E:\\Software\\IAR\\arm\\inc\\c\\DLib_Config_Full.h \
-  E:\Software\IAR\arm\inc\c\DLib_Product.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_version.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_compiler.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\cmsis_iccarm.h \
-  E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/mpu_armv7.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
-  E:\Software\IAR\arm\inc\c\stddef.h E:\Software\IAR\arm\inc\c\ysizet.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_gpio.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_exti.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_dma.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_cortex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_flash.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_pwr.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\gpio.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/main.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/tim.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \
-  E:\Software\IAR\arm\inc\c\stdio.h E:\Software\IAR\arm\inc\c\string.h \
-  E:\Software\IAR\arm\inc\c\DLib_Product_string.h \
-  E:\Software\IAR\arm\inc\c\ctype.h E:\Software\IAR\arm\inc\c\stdlib.h \
-  E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \
-  E:\Software\IAR\arm\inc\c\stdarg.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h \
-  E:\Software\IAR\arm\inc\c\math.h \
-  E:\Software\IAR\arm\inc\c\DLib_float_setup.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\dma.h \
+  E:\Software\IAR\arm\inc\c\iar_intrinsics_common.h \
+  E:\Software\IAR\arm\inc\c\intrinsics.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\gpio.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\os_trace.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\tim.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\usart.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\dma.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\flash_save.h
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \
+  E:\Software\IAR\arm\inc\c\DLib_float_setup.h \
+  E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\math.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\usart.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_log.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\flash_save.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_crc.h \
+  E:\Software\IAR\arm\inc\c\stdarg.h \
+  E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \
+  E:\Software\IAR\arm\inc\c\stdlib.h E:\Software\IAR\arm\inc\c\ctype.h \
+  E:\Software\IAR\arm\inc\c\DLib_Product_string.h \
+  E:\Software\IAR\arm\inc\c\string.h E:\Software\IAR\arm\inc\c\stdio.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h \
+  E:\Software\IAR\arm\inc\c\ysizet.h E:\Software\IAR\arm\inc\c\stddef.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\mpu_armv7.h \
+  E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_iccarm.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_compiler.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_version.h \
+  E:\Software\IAR\arm\inc\c\DLib_Product.h \
+  E:\Software\IAR\arm\inc\c\DLib_Defaults.h \
+  E:\Software\IAR\arm\inc\c\yvals.h E:\Software\IAR\arm\inc\c\stdint.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\core_cm4.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\stm32f4xx_hal_conf.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\main.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\main.c

PLSR/PLSR/EWARM/test.1/Obj/modbus_log.pbi.dep

@@ -54,4 +54,6 @@ modbus_log.pbi: \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \
+  E:\Software\IAR\arm\inc\c\intrinsics.h \
+  E:\Software\IAR\arm\inc\c\iar_intrinsics_common.h

PLSR/PLSR/EWARM/test.1/Obj/tim.pbi.dep

@@ -53,4 +53,7 @@ tim.pbi: e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\tim.c \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \
+  E:\Software\IAR\arm\inc\c\intrinsics.h \
+  E:\Software\IAR\arm\inc\c\iar_intrinsics_common.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\flash_save.h

PLSR/PLSR/EWARM/test.1/Obj/tools.pbi.dep

@@ -54,4 +54,6 @@ tools.pbi: \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \
+  E:\Software\IAR\arm\inc\c\intrinsics.h \
+  E:\Software\IAR\arm\inc\c\iar_intrinsics_common.h

PLSR/PLSR/EWARM/test.1/Obj/usart.pbi.dep

@@ -44,8 +44,8 @@ usart.pbi: \
   E:\Software\IAR\arm\inc\c\stdarg.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/tim.h \
   E:\Software\IAR\arm\inc\c\math.h \
   E:\Software\IAR\arm\inc\c\DLib_float_setup.h \
@@ -54,4 +54,7 @@ usart.pbi: \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \
+  E:\Software\IAR\arm\inc\c\intrinsics.h \
+  E:\Software\IAR\arm\inc\c\iar_intrinsics_common.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\flash_save.h

PLSR/PLSR/UCOS/Ports/os_cpu.h

@@ -61,7 +61,7 @@ extern  "C" {                                    /* See Note #1.
 */
 
 #ifndef  OS_CPU_EXCEPT_STK_SIZE
-#define  OS_CPU_EXCEPT_STK_SIZE    128u          /* Default exception stack size is 128 OS_STK entries */
+#define  OS_CPU_EXCEPT_STK_SIZE    512u          /* Default exception stack size is 128 OS_STK entries */
 #endif