完成加减速以及加减速多种算法,但是加减速过程中使用中断更新频率导致波形不完整,且通过在任务中判断是否计数够足够的值导致脉冲多发.

.vscode/launch.json

@@ -0,0 +1,18 @@
+{
+    // 使用 IntelliSense 了解相关属性。 
+    // 悬停以查看现有属性的描述。
+    // 欲了解更多信息，请访问: https://go.microsoft.com/fwlink/?linkid=830387
+    "version": "0.2.0",
+    "configurations": [
+        {
+            "type": "cspy",
+            "request": "launch",
+            "name": "Debug the active IAR Project with C-SPY",
+            "workbenchPath": "${command:iar-config.toolchain}",
+            "projectPath": "${command:iar-config.project-file}",
+            "projectConfiguration": "${command:iar-config.project-configuration}",
+            "buildBeforeDebugging": "AskOnFailure"
+        }
+
+    ]
+}

PLSR/PLSR/Core/Inc/tim.h

@@ -129,7 +129,7 @@ typedef struct {
     PLSR_WaitType_t wait_type;      // 等待条件类型
     uint32_t wait_time_ms;          // 等待时间(ms)
     uint32_t act_time_ms;           // ACT时间(ms)
-    uint8_t condition_flag;         // 条件标志
+    uint8_t condition_flag;         // 等待条件标志
     uint8_t ext_event_flag;         // 外部事件标志
 } PLSR_WaitCondition_t;
 
@@ -158,6 +158,7 @@ typedef struct {
     uint32_t current_freq;          // 当前频率
     uint32_t target_freq;           // 目标频率
     uint32_t pulse_count;           // 当前脉冲计数
+    uint32_t target_count;          // 目标脉冲数
     uint32_t start_freq;            // 起始频率
     uint32_t end_freq;              // 结束频率
     uint8_t output_port;            // 输出端口选择
@@ -194,13 +195,12 @@ void PLSR_PWM_Init(void);
 void PLSR_PWM_Start(void);
 void PLSR_PWM_Stop(void);
 void PLSR_PWM_SetFrequency(uint32_t frequency);
-uint8_t PLSR_PWM_IsRunning(void);
 
 // ==================== PLSR计数器控制函数 ====================
-uint32_t PLSR_Counter_GetCount(void);
+uint32_t PLSR_Counter_GetCount(void);  //<暂时无用
 void PLSR_Counter_Reset(void);
-void PLSR_Counter_SetTarget(uint32_t target);
-uint32_t PLSR_Counter_GetTarget(void);
+void PLSR_Counter_SetTarget(uint32_t target);  //<考虑配置定时器2中断,中断触发后执行段切换
+uint32_t PLSR_Counter_GetTarget(void); //<暂时无用
 
 // ==================== PLSR TIM6频率配置函数 ====================
 void PLSR_TIM6_SetUpdateFreq(uint32_t freq_us);
@@ -225,7 +225,6 @@ float PLSR_Accel_CalculateLinear(float progress);
 float PLSR_Accel_CalculateCurve(float progress);
 float PLSR_Accel_CalculateSine(float progress);
 void PLSR_Accel_Process(PLSR_RouteConfig_t* route);
-void PLSR_Accel_UpdateFrequency(PLSR_RouteConfig_t* route);
 
 // ==================== PLSR等待条件处理函数 ====================
 void PLSR_Wait_StartTimer(PLSR_RouteConfig_t* route);

PLSR/PLSR/Core/Src/main.c

@@ -101,6 +101,7 @@ int main(void)
   MX_USART1_UART_Init();
   MX_DMA_Init();
   PLSR_PWM_Init();
+  PLSR_Route_Init(&g_plsr_route);
   
   /* USER CODE BEGIN 2 */
  /* 初始化uC/OS-II */
@@ -229,16 +230,16 @@ static void LedTask(void *p_arg)
     uint8_t data = 0;
     while (1)
     {
-      if(HAL_UART_Receive(&huart1, &data, sizeof(data), 10) != HAL_OK)
-      {
-        // 接收超时或错误处理
-        HAL_UART_Transmit(&huart1, (uint8_t *)"Receive Error\r\n", 15, 10);
-      }
-      else
-      {
-        HAL_UART_Transmit(&huart1, &data, sizeof(data), 10);
-      }
-      OSTimeDlyHMSM(0, 0, 0, 10);                  /* 延时10ms */
+      // if(HAL_UART_Receive(&huart1, &data, sizeof(data), 10) != HAL_OK)
+      // {
+      //   // 接收超时或错误处理
+      //   HAL_UART_Transmit(&huart1, (uint8_t *)"Receive Error\r\n", 15, 10);
+      // }
+      // else
+      // {
+      //   HAL_UART_Transmit(&huart1, &data, sizeof(data), 10);
+      // }
+       OSTimeDlyHMSM(0, 0, 0, 10);                  /* 延时10ms */
     }
     
 
@@ -246,12 +247,9 @@ static void LedTask(void *p_arg)
 static void KeyTask(void *p_arg)
 {
     (void)p_arg;
-    while (1) {
-      for(int i = 0;i < 15;i++)
-      {
-        PLSR_PWM_SetFrequency(i);
-        OSTimeDlyHMSM(0, 0, 0, 500);                  /* 延时10ms */
-      }
+    PLSR_Route_Start(&g_plsr_route);
+    while (1) 
+    {
       OSTimeDlyHMSM(0, 0, 0, 10);                  /* 延时10ms */
     }
 }

PLSR/PLSR/Core/Src/tim.c

@@ -50,9 +50,10 @@ void PLSR_Wait_StartTimer(PLSR_RouteConfig_t* route)
     // 记录当前时间作为起始时间
     switch (wait_cond->wait_type) {
         case PLSR_WAIT_TIME:
-        case PLSR_WAIT_CONDITION:
             route->wait_start_tick = g_plsr_system_tick;
             break;
+        case PLSR_WAIT_CONDITION: //<停止条件不需要计数器
+            break;
             
         case PLSR_WAIT_ACT_TIME:
             route->act_start_tick = g_plsr_system_tick;
@@ -146,7 +147,8 @@ void PLSR_ClearExtEvent(void)
  */
 void PLSR_SetSectionCondition(PLSR_RouteConfig_t* route, uint8_t section_num, uint8_t flag)
 {
-    if (route == NULL || section_num == 0 || section_num > PLSR_MAX_SECTIONS) return;
+    if (route == NULL || section_num == 0 || section_num > PLSR_MAX_SECTIONS) 
+        return;
     
     route->section[section_num - 1].wait_condition.condition_flag = flag;
 }
@@ -217,7 +219,8 @@ void MX_TIM2_Init(void)
     Error_Handler();
   }
   /* USER CODE BEGIN TIM2_Init 2 */
-  
+  HAL_TIM_Base_Start(&htim2);
+  HAL_TIM_Base_MspInit(&htim2);  
   /* USER CODE END TIM2_Init 2 */
 }
 /* TIM6 init function */
@@ -270,7 +273,7 @@ void MX_TIM10_Init(void)
   htim10.Init.Prescaler = 16799;
   htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
   htim10.Init.Period = 9999;
-  htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV2;
   htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
   if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
   {
@@ -737,9 +740,6 @@ void PLSR_PWM_Start(void)  //<后续加入启动通道选择
         // 启动PWM输出
         HAL_TIM_PWM_Start(&htim10, TIM_CHANNEL_1);
         
-        // 启动TIM2计数器用于脉冲计数
-        HAL_TIM_Base_Start(&htim2);
-        
         s_pwm_running = 1; //< 更新PWM运行状态
     }
 }
@@ -764,15 +764,6 @@ void PLSR_PWM_Stop(void)
     }
 }
 
-/**
- * @brief  检查PWM是否正在运行
- * @param  None
- * @retval 1: 运行中, 0: 已停止
- */
-uint8_t PLSR_PWM_IsRunning(void)
-{
-    return s_pwm_running;
-}
 
 
 /**
@@ -786,7 +777,7 @@ uint8_t PLSR_PWM_IsRunning(void)
 static void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, uint32_t* period)
 {
     // STM32F4系列定时器时钟频率（通常为84MHz，具体取决于系统配置）
-    uint32_t timer_clock = 84000000;
+    uint32_t timer_clock = 168000000;
     
     // 定时器频率计算原理：
     // 输出频率 = 定时器时钟频率 / ((预分频器 + 1) * (自动重装载值 + 1))
@@ -851,9 +842,8 @@ void PLSR_PWM_SetFrequency(uint32_t frequency)
 {
     uint16_t prescaler = 0;     // 预分频器值
     uint32_t period = 0;        // 自动重载值(周期)
-    uint8_t was_running = s_pwm_running;  // 保存当前运行状态
     
-    // 频率范围检查 - 确保频率在PLSR_PWM_FREQ_MIN到PLSR_PWM_FREQ_MAX范围内
+    // 频率范围检查 - 确保频率在1hz到100khz范围内
     if(frequency < PLSR_PWM_FREQ_MIN || frequency > PLSR_PWM_FREQ_MAX)
     {
         return; // 频率超出范围，直接返回，不做任何修改
@@ -862,14 +852,10 @@ void PLSR_PWM_SetFrequency(uint32_t frequency)
     // 计算最佳定时器参数 - 根据目标频率计算预分频器和周期值
     PLSR_CalculateTimerParams(frequency, &prescaler, &period);
     
-    // 状态保护 - 如果PWM正在运行，先停止以避免参数更新时的干扰
-    if (was_running) {
-        HAL_TIM_PWM_Stop(&htim10, TIM_CHANNEL_1);
-    }
     
     // 更新定时器核心参数
-    __HAL_TIM_SET_PRESCALER(&htim10, prescaler);    // 设置预分频器
-    __HAL_TIM_SET_AUTORELOAD(&htim10, period);      // 设置自动重载值(决定周期)
+    __HAL_TIM_SET_PRESCALER(&htim10, prescaler);    //< 放置波形出现问题对参数直接进行更新
+    __HAL_TIM_SET_AUTORELOAD(&htim10, period);
     
     // 设置占空比为50% - 比较值设为周期的一半，产生对称的PWM波形
     __HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, period / 2);
@@ -877,14 +863,6 @@ void PLSR_PWM_SetFrequency(uint32_t frequency)
     // 重置计数器 - 确保从0开始计数，避免参数更新时的计数器状态不一致
     __HAL_TIM_SET_COUNTER(&htim10, 0);
     
-    // 触发更新事件 - 立即将新参数加载到影子寄存器，确保参数生效
-    HAL_TIM_GenerateEvent(&htim10, TIM_EVENTSOURCE_UPDATE);
-    
-    // 状态恢复 - 如果之前在运行，重新启动PWM输出
-    if (was_running) {
-        HAL_TIM_PWM_Start(&htim10, TIM_CHANNEL_1);
-    }
-    
     // 更新当前频率记录 - 保存新的频率值供其他函数查询使用
     s_current_pwm_freq = frequency;
 }
@@ -917,12 +895,12 @@ void PLSR_TIM6_SetUpdateFreq(uint32_t freq_us)
     s_tim6_update_freq_us = freq_us;
     
     // 定时器时钟参数 (基于STM32F4系列APB1时钟配置)
-    // APB1时钟频率：42MHz
+    // APB1时钟频率：42MHz 定时器二倍频
     uint32_t target_period_us = freq_us; // 目标周期(微秒)
     
     // 计算定时器参数
-    // 预分频器设为41，使计数频率为42MHz/(41+1) = 1MHz，即1us/tick
-    uint16_t prescaler = 41;  // 预分频器值，产生1MHz计数频率
+    // 预分频器设为41，使计数频率为84MHz/(83+1) = 1MHz，即1us/tick
+    uint16_t prescaler = 83;  // 预分频器值，产生1MHz计数频率
     uint32_t period = target_period_us - 1;  // 自动重载值，减1是因为从0开始计数
     
     // 停止TIM6中断 - 避免参数更新过程中的中断干扰
@@ -1146,17 +1124,17 @@ void PLSR_Route_Start(PLSR_RouteConfig_t* route)
     if (route->route_state == PLSR_ROUTE_RUNNING) return;
     
     // 路径状态初始化
-    route->route_state = PLSR_ROUTE_RUNNING;    // 设置路径状态为运行中
-    route->current_section_num = 1;             // 从第1段开始执行
-    route->current_freq = route->start_freq;    // 设置当前频率为起始频率
-    route->pulse_count = 0;                     // 清零脉冲计数
+    route->route_state = PLSR_ROUTE_RUNNING;    //< 设置路径状态为运行中
+    route->current_section_num = 1;             //< 从第1段开始执行
+    route->current_freq = route->start_freq;    //< 设置当前频率为起始频率
+    route->pulse_count = 0;                     //< 清零脉冲计数
     
     // 硬件资源初始化
-    PLSR_Counter_Reset();                       // 重置脉冲计数器
+    PLSR_Counter_Reset();                       //< 重置脉冲计数器
     
     // PWM输出初始化 - 根据起始频率决定是否启动
     if (route->start_freq > 0) {
-        PLSR_PWM_SetFrequency(route->start_freq); // 设置初始PWM频率
+        PLSR_PWM_SetFrequency(route->start_freq); //< 设置初始PWM频率
         PLSR_PWM_Start();                        // 启动PWM输出
     }
     
@@ -1207,8 +1185,8 @@ void PLSR_Section_Init(PLSR_SectionConfig_t* section, uint8_t section_num)
     
     // 基本参数初始化
     section->section_num = section_num;
-    section->target_freq = 0;
-    section->target_pulse = 0;
+    section->target_freq = section_num*1000;
+    section->target_pulse = 5000;
     section->next_section = (section_num < PLSR_MAX_SECTIONS) ? (section_num + 1) : 0;
     section->section_state = PLSR_SECTION_IDLE;
     
@@ -1239,14 +1217,23 @@ void PLSR_Section_Process(PLSR_RouteConfig_t* route)
     if (route == NULL) return;                              // 空指针检查
     if (route->route_state != PLSR_ROUTE_RUNNING) return;   // 路径必须处于运行状态
     
+    
     // 段号有效性检查
     if (route->current_section_num == 0 || route->current_section_num > PLSR_MAX_SECTIONS) {
         PLSR_Route_Stop(route);                             // 段号无效，停止路径执行
         return;
     }
     
+    /*如果是以下两种条件的话,触发立马进行段切换*/
+    if(route->section[route->current_section_num-1].wait_condition.wait_type == PLSR_WAIT_ACT_TIME
+        ||route->section[route->current_section_num-1].wait_condition.wait_type == PLSR_WAIT_EXT_EVENT)
+        {
+            PLSR_Section_ProcessWait(route);
+        }
+
     // 根据当前运行状态执行相应的处理逻辑
-    switch (route->run_state) {
+    switch (route->run_state) 
+    {
         case PLSR_STATE_IDLE:
             // 空闲状态：开始新段处理
             // 初始化段参数，计算加减速步数，设置目标频率
@@ -1307,17 +1294,22 @@ static void PLSR_Section_StartNewSection(PLSR_RouteConfig_t* route)
     route->target_freq = current_section->target_freq;
     
     // 根据目标频率与当前频率的关系，确定段的初始运行状态
-    if (route->target_freq > route->current_freq) {
+    if (route->target_freq > route->current_freq) 
+    {
         // 目标频率大于当前频率：需要加速到目标频率
         route->run_state = PLSR_STATE_ACCEL;
         // 计算加速过程的步数和参数（参数1表示加速过程）
         PLSR_Accel_CalculateSteps(route, current_section->accel_config.accel_time_ms, 1);
-    } else if (route->target_freq < route->current_freq) {
+    } 
+    else if (route->target_freq < route->current_freq) 
+    {
         // 目标频率小于当前频率：需要减速到目标频率
         route->run_state = PLSR_STATE_DECEL;
         // 计算减速过程的步数和参数（参数0表示减速过程）
         PLSR_Accel_CalculateSteps(route, current_section->accel_config.decel_time_ms, 0);
-    } else {
+    } 
+    else 
+    {
         // 目标频率等于当前频率：无需加减速，直接进入匀速状态
         route->run_state = PLSR_STATE_CONST;
     }
@@ -1344,7 +1336,7 @@ void PLSR_Section_SwitchNext(PLSR_RouteConfig_t* route)
     
     // 设置当前段状态为完成
     current_section->section_state = PLSR_SECTION_COMPLETED;
-    
+    route->target_count += current_section->target_pulse;
     // 检查下一段是否有效
     if (next_section_num == 0 || next_section_num > PLSR_MAX_SECTIONS) {
         // 路径结束
@@ -1378,9 +1370,8 @@ uint8_t PLSR_Section_CheckWaitCondition(PLSR_RouteConfig_t* route)
     // 根据等待条件类型进行相应的检查
     switch (wait_cond->wait_type) {
         case PLSR_WAIT_PLUSEEND:
-            // 脉冲结束条件：等待所有脉冲发送完成
-            // 总是返回真，实际的脉冲完成检查由其他函数负责
-            return 1;
+
+            return PLSR_Section_CheckPulseComplete(route);
             
         case PLSR_WAIT_TIME:
             // 等待指定时间条件：检查是否达到设定的等待时间
@@ -1427,34 +1418,41 @@ void PLSR_Section_CalculateConstPulse(PLSR_RouteConfig_t* route)
     
     // 根据路径模式计算本段需要执行的总脉冲数
     uint32_t total_pulse;
-    if (route->mode == PLSR_MODE_RELATIVE) {
+    if (route->mode == PLSR_MODE_RELATIVE) 
+    {
         // 相对模式：直接使用段配置中的目标脉冲数
         total_pulse = current_section->target_pulse;
-    } else {
+    } 
+    else 
+    {
         // 绝对模式：计算从当前位置到目标位置需要的脉冲数
         // 如果目标位置已达到或超过，则无需发送脉冲
         total_pulse = (current_section->target_pulse > route->pulse_count) ? 
                      (current_section->target_pulse - route->pulse_count) : 0;
     }
     
-    // 计算加减速过程中消耗的脉冲数
-    // 注意：某些等待条件下不考虑加减速脉冲数，因为这些条件可能在加减速过程中触发
-    uint32_t accel_decel_pulse = 0;
-    if (current_section->wait_condition.wait_type != PLSR_WAIT_PLUSEEND &&
-        current_section->wait_condition.wait_type != PLSR_WAIT_EXT_OR_END) {
-        // 加减速脉冲数 = 加速步数 + 减速步数
-        // 每一步对应一个脉冲周期
-        accel_decel_pulse = route->accel_step_count + route->decel_step_count;
-    }
-    
-    // 计算匀速段可以发送的脉冲数
-    // 匀速脉冲数 = 总脉冲数 - 加减速脉冲数
-    if (total_pulse > accel_decel_pulse) {
-        route->const_pulse_count = total_pulse - accel_decel_pulse;
-    } else {
-        // 如果加减速脉冲数已经超过或等于总脉冲数，则无匀速段
-        route->const_pulse_count = 0;
-    }
+    // // 计算加减速过程中消耗的脉冲数,方便计算何时进入匀速阶段   
+    // //有问题,步数不等价于脉冲数.
+    // uint32_t accel_decel_pulse = 0;
+    // if (current_section->wait_condition.wait_type != PLSR_WAIT_PLUSEEND &&
+    //     current_section->wait_condition.wait_type != PLSR_WAIT_EXT_OR_END) 
+    // {
+    //     // 加减速脉冲数 = 加速步数 + 减速步数
+    //     // 每一步对应一个脉冲周期
+    //     accel_decel_pulse = route->accel_step_count + route->decel_step_count;
+    // }
+    
+    // // 计算匀速段可以发送的脉冲数
+    // // 匀速脉冲数 = 总脉冲数 - 加减速脉冲数
+    // if (total_pulse > accel_decel_pulse) 
+    // {
+    //     route->const_pulse_count = total_pulse - accel_decel_pulse;
+    // } 
+    // else 
+    // {
+    //     // 如果加减速脉冲数已经超过或等于总脉冲数，则无匀速段
+    //     route->const_pulse_count = 0;
+    // }
 }
 
 // ==================== PLSR加减速算法函数实现 ====================
@@ -1547,9 +1545,9 @@ static void PLSR_Accel_CalculateSteps(PLSR_RouteConfig_t* route, uint32_t time_m
         return;
     }
     
-    // 根据指定时间和TIM6更新周期计算总步数
+
     // TIM6更新周期从微秒转换为毫秒：s_tim6_update_freq_us / 1000
-    uint32_t total_steps = time_ms / (s_tim6_update_freq_us / 1000);
+    uint32_t total_steps = time_ms / (s_tim6_update_freq_us / 1000);    //< 根据指定加减速时间和TIM6更新周期计算总步数
     // 确保至少有1步，避免除零错误
     if (total_steps == 0) total_steps = 1;
     
@@ -1563,11 +1561,14 @@ static void PLSR_Accel_CalculateSteps(PLSR_RouteConfig_t* route, uint32_t time_m
     total_steps = freq_diff / route->freq_step;
     
     // 根据加速或减速模式，设置对应的步数计数器
-    if (is_accel) {
+    if (is_accel) 
+    {
         // 加速模式：设置加速步数，清零减速步数
         route->accel_step_count = total_steps;
         route->decel_step_count = 0;
-    } else {
+    } 
+    else 
+    {
         // 减速模式：设置减速步数，清零加速步数
         route->accel_step_count = 0;
         route->decel_step_count = total_steps;
@@ -1606,7 +1607,8 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route)
     uint8_t state_changed = 0;                              // 状态改变标志
     
     // ==================== 加速处理 ====================
-    if (route->run_state == PLSR_STATE_ACCEL) {
+    if (route->run_state == PLSR_STATE_ACCEL) 
+    {
         // 检查是否还有加速步数需要执行
         if (route->accel_step_count > 0) {
             // 记录总步数和起始频率（仅在第一次进入加速时）
@@ -1616,7 +1618,8 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route)
             }
             
             // 根据加速算法类型计算新频率
-            switch (current_section->accel_config.accel_algorithm) {
+            switch (current_section->accel_config.accel_algorithm) 
+            {
                 case PLSR_ACCEL_LINEAR:
                     {
                         // 直线加速：使用固定频率增量
@@ -1625,7 +1628,7 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route)
                         uint32_t freq_increment = freq_range / total_accel_steps;
                         // 计算已完成的步数
                         uint32_t completed_steps = total_accel_steps - route->accel_step_count;
-                        // 计算新频率 = 起始频率 + (增量 × 已完成步数)
+                        // 计算新频率 = 起始频率 + (增量 × 已完成步数) 起始频率不变,频率增量不变,非累加
                         new_freq = start_freq_accel + (freq_increment * completed_steps);
                     }
                     break;
@@ -1662,7 +1665,9 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route)
             
             // 减少剩余加速步数
             route->accel_step_count--;
-        } else {
+        } 
+        else 
+        {
             // 加速完成，设置为目标频率并切换到匀速状态
             new_freq = route->target_freq;
             route->run_state = PLSR_STATE_CONST;
@@ -1673,7 +1678,8 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route)
         }
     } 
     // ==================== 减速处理 ====================
-    else if (route->run_state == PLSR_STATE_DECEL) {
+    else if (route->run_state == PLSR_STATE_DECEL) 
+    {
         // 检查是否还有减速步数需要执行
         if (route->decel_step_count > 0) {
             // 记录总步数和起始频率（仅在第一次进入减速时）
@@ -1729,7 +1735,9 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route)
             
             // 减少剩余减速步数
             route->decel_step_count--;
-        } else {
+        } 
+        else 
+        {
             // 减速完成，设置为目标频率并切换到匀速状态
             new_freq = route->target_freq;
             route->run_state = PLSR_STATE_CONST;
@@ -1742,9 +1750,11 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route)
     
     // ==================== 频率更新和状态检查 ====================
     // 如果频率发生变化，更新PWM输出频率
-    if (new_freq != route->current_freq) {
+    if (new_freq != route->current_freq) 
+    {
         route->current_freq = new_freq;                     // 更新当前频率
         PLSR_PWM_SetFrequency(new_freq);                   // 设置PWM输出频率
+        PLSR_PWM_Start(); 
     }
     
     // 更新脉冲计数
@@ -1752,7 +1762,8 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route)
     
     // 检查是否需要切换状态或段
     // 当状态改变或脉冲完成时，进行状态转换检查
-    if (state_changed || PLSR_Section_CheckPulseComplete(route)) {
+    if (PLSR_Section_CheckPulseComplete(route)) 
+    {
         PLSR_Section_CheckTransition(route);
     }
 }
@@ -1771,7 +1782,8 @@ static void PLSR_Section_ProcessConstSpeed(PLSR_RouteConfig_t* route)
     route->pulse_count = PLSR_Counter_GetCount();
     
     // 检查是否需要进入减速或完成段
-    if (PLSR_Section_CheckPulseComplete(route)) {
+    if (PLSR_Section_CheckPulseComplete(route)) 
+    {
         PLSR_Section_CheckTransition(route);
     }
 }
@@ -1787,7 +1799,8 @@ static void PLSR_Section_ProcessWait(PLSR_RouteConfig_t* route)
     if (route == NULL) return;
     
     // 检查等待条件是否满足
-    if (PLSR_Section_CheckWaitCondition(route)) {
+    if (PLSR_Section_CheckWaitCondition(route)) 
+    {
         // 等待条件满足，切换到下一段
         PLSR_Section_SwitchNext(route);
     }
@@ -1809,9 +1822,12 @@ static uint8_t PLSR_Section_CheckPulseComplete(PLSR_RouteConfig_t* route)
         current_section->wait_condition.wait_type == PLSR_WAIT_EXT_OR_END) {
         
         uint32_t target_pulse;
-        if (route->mode == PLSR_MODE_RELATIVE) {
-            target_pulse = current_section->target_pulse;
-        } else {
+        if (route->mode == PLSR_MODE_RELATIVE) 
+        {
+            target_pulse = current_section->target_pulse + route->target_count;
+        } 
+        else 
+        {
             target_pulse = current_section->target_pulse;
         }
         
@@ -1833,7 +1849,8 @@ static void PLSR_Section_CheckTransition(PLSR_RouteConfig_t* route)
     PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1];
     
     // 根据等待条件类型决定转换逻辑
-    switch (current_section->wait_condition.wait_type) {
+    switch (current_section->wait_condition.wait_type) 
+    {
         case PLSR_WAIT_PLUSEEND:
             // 脉冲结束直接切换
             PLSR_Section_SwitchNext(route);
@@ -1847,10 +1864,6 @@ static void PLSR_Section_CheckTransition(PLSR_RouteConfig_t* route)
             // 进入等待状态
             route->run_state = PLSR_STATE_WAIT;
             break;
-            
-        default:
-            PLSR_Section_SwitchNext(route);
-            break;
     }
 }
 

PLSR/PLSR/EWARM/settings/Project_EditorBookmarks.xml

@@ -0,0 +1,2 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<userBookmarks />

PLSR/PLSR/EWARM/settings/test.1.dnx

@@ -20,7 +20,7 @@
         <LeaveTargetRunning>_ 0</LeaveTargetRunning>
     </StLinkDriver>
     <DebugChecksum>
-        <Checksum>1315455460</Checksum>
+        <Checksum>154654718</Checksum>
     </DebugChecksum>
     <Exceptions>
         <StopOnUncaught>_ 0</StopOnUncaught>
@@ -75,6 +75,15 @@
         <ITMportsLogFile>0</ITMportsLogFile>
         <ITMlogFile>$PROJ_DIR$\ITM.log</ITMlogFile>
     </SWOTraceHWSettings>
+    <TermIOLog>
+        <LoggingEnabled>_ 0</LoggingEnabled>
+        <LogFile>_ ""</LogFile>
+    </TermIOLog>
+    <LogFile>
+        <LoggingEnabled>_ 0</LoggingEnabled>
+        <LogFile>_ ""</LogFile>
+        <Category>_ 0</Category>
+    </LogFile>
     <Trace2>
         <Enabled>0</Enabled>
         <ShowSource>0</ShowSource>
@@ -120,15 +129,6 @@
         <ShowTimeSum>1</ShowTimeSum>
         <SumSortOrder>0</SumSortOrder>
     </EventLog>
-    <TermIOLog>
-        <LoggingEnabled>_ 0</LoggingEnabled>
-        <LogFile>_ ""</LogFile>
-    </TermIOLog>
-    <LogFile>
-        <LoggingEnabled>_ 0</LoggingEnabled>
-        <LogFile>_ ""</LogFile>
-        <Category>_ 0</Category>
-    </LogFile>
     <DriverProfiling>
         <Enabled>0</Enabled>
         <Mode>3</Mode>

PLSR/PLSR/EWARM/settings/test.1.ewp.reggroups

@@ -0,0 +1 @@
+

PLSR/PLSR/EWARM/test.1/Obj/.ninja_log

@@ -1,140 +1,146 @@
 # ninja log v5
-1898	1932	7763459911931639	stm32f4xx_ll_rng.pbi	5e12b9ea00d0b826
-1752	1898	7763459911572842	stm32f4xx_ll_gpio.pbi	df8b54563945d41d
-443	835	7763459900764778	stm32f4xx_hal_flash_ex.pbi	ac2d035774fe6a2e
-2298	2812	7763459920413304	stm32f4xx_hal_pwr.pbi	b347497fce55b6a8
-1782	1817	7763459910762262	stm32f4xx_ll_pwr.pbi	952cb4e4f4edb65b
-1815	1972	7763459912190382	stm32f4xx_ll_tim.pbi	b88554c6464192f5
-1907	2130	7763459913420501	app_hooks.pbi	ffd399489d189d5a
-2844	3382	7763459926438996	test.1_part3.pbi	6eb1d553da066571
-1863	2274	7763459915155066	stm32f4xx_hal_rcc_ex.pbi	c1d751d24d77a2df
-2134	2231	7763459914905062	os_cpu_c.pbi	eb75b848b406ea34
-1933	2402	7763459916599741	stm32f4xx_hal_pwr_ex.pbi	b84426bf5a4ce0cf
-2859	3114	7763459923759003	test.1_part4.pbi	4a2716eb92784a90
-2403	2812	7763459920443291	stm32f4xx_hal_rcc.pbi	50976e6b18f3b8bc
-1349	1782	7763459910390879	stm32f4xx_hal_usart.pbi	b368fafd8b8b8bb9
-2406	2843	7763459921013294	stm32f4xx_hal_tim.pbi	71840baae88d57c4
-1728	1873	7763459911252827	stm32f4xx_ll_dac.pbi	7dfc4be0933cdfaf
+123	258	7764177383144035	stm32f4xx_ll_rng.pbi	5e12b9ea00d0b826
+865	901	7764177389514042	stm32f4xx_ll_gpio.pbi	df8b54563945d41d
+628	661	7764177387144037	stm32f4xx_ll_tim.pbi	b88554c6464192f5
+2012	2480	7764177404774077	stm32f4xx_hal_flash_ex.pbi	ac2d035774fe6a2e
+771	1102	7764177391494047	stm32f4xx_hal_pwr.pbi	b347497fce55b6a8
+661	722	7764177387504039	stm32f4xx_ll_pwr.pbi	952cb4e4f4edb65b
+1103	1682	7764177397334057	test.1_part3.pbi	6eb1d553da066571
+716	1080	7764177391154049	stm32f4xx_hal_rcc_ex.pbi	c1d751d24d77a2df
+41	229	7764177382754038	app_hooks.pbi	ffd399489d189d5a
+1017	1345	7764177393944061	test.1_part4.pbi	4a2716eb92784a90
+186	649	7764177386924039	stm32f4xx_hal_pwr_ex.pbi	b84426bf5a4ce0cf
+44	123	7764177381674037	os_cpu_c.pbi	eb75b848b406ea34
+34	420	7764177384704032	stm32f4xx_hal_rcc.pbi	50976e6b18f3b8bc
+37	596	7764177386454061	stm32f4xx_hal_tim.pbi	71840baae88d57c4
+46	516	7764177385524038	stm32f4xx_hal_usart.pbi	b368fafd8b8b8bb9
+1177	2720	7764189921464956	test.1.pbw	f11e09b552b4c82f
 2014	2487	7762488664073707	uart.pbi	5ce52444157923c9
-1299	2924	7763466946582286	test.1.pbw	f11e09b552b4c82f
-1741	1779	7763459910380885	stm32f4xx_ll_crc.pbi	dcf41d4b97590765
-1972	2006	7763459912668209	stm32f4xx_ll_rcc.pbi	fb9ace481decf8ab
-2284	2390	7763459916268396	stm32f4xx_ll_spi.pbi	ce805017b70a4f43
-907	1291	7763459905221739	stm32f4xx_hal_msp.pbi	8144db72f01a260b
-1874	1906	7763459911661784	stm32f4xx_ll_usart.pbi	783190689e783d9
-1910	1975	7763459912274195	os_dbg.pbi	f7287a072fe86a55
-2707	2859	7763459921093945	stm32f4xx_ll_dma.pbi	f9e6142ede2883b4
-47	443	7763459897020578	stm32f4xx_hal_crc.pbi	881b29e4c80746b3
-2237	2283	7763459915415065	stm32f4xx_ll_exti.pbi	883a2fd463949e02
-1975	2134	7763459913621586	ucos_ii.pbi	4e0ab25e0060431e
-2391	2405	7763459916659739	test.1_part5.pbi	d64d2ad0ff3eb443
-1779	1814	7763459910740024	stm32f4xx_ll_i2c.pbi	7f1151d8874c40c9
-531	907	7763459901614190	stm32f4xx_hal.pbi	a073c739b6b34173
-1328	1751	7763459910059914	stm32f4xx_hal_sram.pbi	4652c5af4efd4e19
-2231	2297	7763459915545095	test.1_part6.pbi	ddc887ac32bb1191
-929	1297	7763459905561771	stm32f4xx_hal_flash.pbi	eccf13860e1d0c6a
-1818	2236	7763459914945062	stm32f4xx_hal_tim_ex.pbi	3c68a2e86514987f
-1331	1863	7763459911232856	stm32f4xx_hal_wwdg.pbi	fca2b44f67349f99
-461	950	7763459902074178	stm32f4xx_hal_flash_ramfunc.pbi	ae498685b336a49c
-1345	1910	7763459911696586	stm32f4xx_hal_uart.pbi	e7ca7ebbb4330340
+517	553	7764177386084042	stm32f4xx_ll_dac.pbi	7dfc4be0933cdfaf
+852	1017	7764177390414063	stm32f4xx_ll_crc.pbi	dcf41d4b97590765
+553	719	7764177387484040	stm32f4xx_ll_rcc.pbi	fb9ace481decf8ab
+1430	1744	7764177397994062	stm32f4xx_hal_msp.pbi	8144db72f01a260b
+594	627	7764177386824042	stm32f4xx_ll_spi.pbi	ce805017b70a4f43
+597	771	7764177388264055	os_dbg.pbi	f7287a072fe86a55
+720	865	7764177389204042	stm32f4xx_ll_usart.pbi	783190689e783d9
+1489	1912	7764177399674064	stm32f4xx_hal_crc.pbi	881b29e4c80746b3
+659	716	7764177387464040	stm32f4xx_ll_dma.pbi	f9e6142ede2883b4
+39	185	7764177382404038	stm32f4xx_ll_exti.pbi	883a2fd463949e02
+933	944	7764177390014073	test.1_part5.pbi	d64d2ad0ff3eb443
+723	852	7764177389074049	ucos_ii.pbi	4e0ab25e0060431e
+2002	2368	7764177403764082	stm32f4xx_hal.pbi	a073c739b6b34173
+901	933	7764177389864043	stm32f4xx_ll_i2c.pbi	7f1151d8874c40c9
+229	594	7764177386264071	stm32f4xx_hal_sram.pbi	4652c5af4efd4e19
+2005	2316	7764177403594076	stm32f4xx_hal_flash.pbi	eccf13860e1d0c6a
+945	1014	7764177390454069	test.1_part6.pbi	ddc887ac32bb1191
+650	1020	7764177390704070	stm32f4xx_hal_tim_ex.pbi	3c68a2e86514987f
+2148	2564	7764177406134072	stm32f4xx_hal_flash_ramfunc.pbi	ae498685b336a49c
+421	755	7764177388104041	stm32f4xx_hal_wwdg.pbi	fca2b44f67349f99
+258	658	7764177387144037	stm32f4xx_hal_uart.pbi	e7ca7ebbb4330340
 35	454	7762489045860992	timer.pbi	8f8acc6a162957f
-455	833	7763459900784779	stm32f4xx_hal_i2c.pbi	74395538aa12fa10
-43	530	7763459897904281	stm32f4xx_hal_dma.pbi	2d6aa8f3983bf80a
-1291	1727	7763459909843444	stm32f4xx_hal_timebase_tim.pbi	b6f5ce0feaca8054
-2275	2742	7763459920001797	stm32f4xx_hal_i2c_ex.pbi	7798e48f8e6ef374
-49	461	7763459897197258	stm32f4xx_hal_dma_ex.pbi	1960c5ab56ffede7
-32	387	7763466921528063	main.pbi	9c0a6aa02351636a
-439	928	7763459901864174	stm32f4xx_hal_exti.pbi	373789209d565f00
-836	1345	7763459906010783	stm32f4xx_it.pbi	d01766022cb163bc
-45	452	7763459897107248	stm32f4xx_hal_cortex.pbi	2c6d2473a153fb5a
-41	454	7763459897117251	system_stm32f4xx.pbi	f50e519d7e78a5de
-947	1327	7763459905700794	gpio.pbi	a088b5271f02118a
-452	947	7763459902064172	stm32f4xx_hal_gpio.pbi	53b438f48be9a8d0
-388	933	7763466927012381	test.1_part0.pbi	524317d160cb374e
-934	1298	7763466930660818	test.1.pbd	dd3dd60110e24e1b
-315	811	7763466753894371	test.1_part1.pbi	dc01e3b8207ff4ec
-2742	3273	7763459925288998	test.1_part2.pbi	5b60a24e7c60e7e6
-37	438	7763459896980581	dma.pbi	4f5ebe00ac67ed57
-38	369	7763460183536997	tim.pbi	f07c6d790a519d93
-32	314	7763466748895702	usart.pbi	7c2d93866867ab60
-33	355	7763466973088681	main.pbi	9c0a6aa02351636a
-355	878	7763466978344077	test.1_part0.pbi	524317d160cb374e
-879	1215	7763466981707520	test.1.pbd	dd3dd60110e24e1b
-1215	2819	7763466997409525	test.1.pbw	f11e09b552b4c82f
-34	454	7763467126666753	main.pbi	9c0a6aa02351636a
-455	961	7763467131753581	test.1_part0.pbi	524317d160cb374e
-962	1285	7763467134993586	test.1.pbd	dd3dd60110e24e1b
-1285	2855	7763467150311962	test.1.pbw	f11e09b552b4c82f
-36	369	7763468803882384	usart.pbi	7c2d93866867ab60
-370	875	7763468809028623	test.1_part1.pbi	dc01e3b8207ff4ec
-876	1212	7763468812381384	test.1.pbd	dd3dd60110e24e1b
-1212	2781	7763468827743710	test.1.pbw	f11e09b552b4c82f
-32	414	7763469100988198	usart.pbi	7c2d93866867ab60
-35	73	7763469181738939	stm32f4xx_ll_rcc.pbi	fb9ace481decf8ab
-39	76	7763469181760313	stm32f4xx_ll_rng.pbi	5e12b9ea00d0b826
-43	100	7763469181808933	stm32f4xx_ll_pwr.pbi	952cb4e4f4edb65b
-48	104	7763469181848938	stm32f4xx_ll_usart.pbi	783190689e783d9
-74	107	7763469182078952	stm32f4xx_ll_tim.pbi	b88554c6464192f5
-46	110	7763469182098939	os_dbg.pbi	f7287a072fe86a55
-76	135	7763469182348935	app_hooks.pbi	ffd399489d189d5a
-108	140	7763469182418942	stm32f4xx_ll_dma.pbi	f9e6142ede2883b4
-41	213	7763469182868930	stm32f4xx_ll_spi.pbi	ce805017b70a4f43
-105	234	7763469183218942	ucos_ii.pbi	4e0ab25e0060431e
-101	298	7763469183828943	os_cpu_c.pbi	eb75b848b406ea34
-299	348	7763469184518932	test.1_part6.pbi	ddc887ac32bb1191
-136	542	7763469186202826	stm32f4xx_hal_tim_ex.pbi	3c68a2e86514987f
-110	572	7763469186678973	stm32f4xx_hal_rcc_ex.pbi	c1d751d24d77a2df
-542	577	7763469186768965	stm32f4xx_ll_crc.pbi	dcf41d4b97590765
-234	609	7763469187028973	stm32f4xx_hal_crc.pbi	881b29e4c80746b3
-572	620	7763469187148966	stm32f4xx_ll_exti.pbi	883a2fd463949e02
-141	630	7763469187298977	tim.pbi	f07c6d790a519d93
-610	648	7763469187494850	stm32f4xx_ll_gpio.pbi	df8b54563945d41d
-213	663	7763469187640870	stm32f4xx_hal_cortex.pbi	2c6d2473a153fb5a
-620	767	7763469188580109	stm32f4xx_ll_i2c.pbi	7f1151d8874c40c9
-349	770	7763469188590103	stm32f4xx_hal_tim.pbi	71840baae88d57c4
-767	779	7763469188820119	test.1_part5.pbi	d64d2ad0ff3eb443
-577	937	7763469190359881	stm32f4xx_hal_wwdg.pbi	fca2b44f67349f99
-630	1112	7763469191984835	stm32f4xx_hal_flash_ramfunc.pbi	ae498685b336a49c
-649	1128	7763469192204886	system_stm32f4xx.pbi	f50e519d7e78a5de
-770	1147	7763469192474858	stm32f4xx_hal_flash_ex.pbi	ac2d035774fe6a2e
-663	1149	7763469192424858	stm32f4xx_hal_gpio.pbi	53b438f48be9a8d0
-779	1254	7763469193326483	stm32f4xx_hal_exti.pbi	373789209d565f00
-937	1292	7763469193922199	stm32f4xx_hal_i2c.pbi	74395538aa12fa10
-1112	1514	7763469195612003	stm32f4xx_hal_pwr_ex.pbi	b84426bf5a4ce0cf
-1147	1621	7763469197207328	stm32f4xx_hal_sram.pbi	4652c5af4efd4e19
-1150	1628	7763469197287322	stm32f4xx_hal_dma.pbi	2d6aa8f3983bf80a
-1293	1675	7763469197650753	stm32f4xx_hal_usart.pbi	b368fafd8b8b8bb9
-1128	1677	7763469197570666	stm32f4xx_hal_uart.pbi	e7ca7ebbb4330340
-1254	1680	7763469197385195	stm32f4xx_hal_dma_ex.pbi	1960c5ab56ffede7
-1514	1880	7763469199567787	stm32f4xx_hal_i2c_ex.pbi	7798e48f8e6ef374
-1881	1921	7763469200199813	stm32f4xx_ll_dac.pbi	7dfc4be0933cdfaf
-1622	1969	7763469200646069	usart.pbi	7c2d93866867ab60
-1678	2032	7763469201321472	stm32f4xx_hal_flash.pbi	eccf13860e1d0c6a
-1680	2068	7763469201521468	stm32f4xx_hal_rcc.pbi	50976e6b18f3b8bc
-1629	2094	7763469201936103	stm32f4xx_hal_pwr.pbi	b347497fce55b6a8
-1675	2142	7763469202426108	stm32f4xx_hal.pbi	a073c739b6b34173
-1921	2243	7763469203226104	test.1_part4.pbi	4a2716eb92784a90
-2069	2450	7763469205216106	dma.pbi	4f5ebe00ac67ed57
-1970	2453	7763469205356135	stm32f4xx_hal_msp.pbi	8144db72f01a260b
-2243	2600	7763469206846101	gpio.pbi	a088b5271f02118a
-2033	2666	7763469207246126	test.1_part2.pbi	5b60a24e7c60e7e6
-2094	2695	7763469207814054	test.1_part3.pbi	6eb1d553da066571
-2142	2718	7763469208054059	test.1_part1.pbi	dc01e3b8207ff4ec
-2450	2789	7763469208604051	stm32f4xx_hal_timebase_tim.pbi	b6f5ce0feaca8054
-2453	2801	7763469208984032	main.pbi	9c0a6aa02351636a
-2601	3022	7763469211226931	stm32f4xx_it.pbi	d01766022cb163bc
-3022	3527	7763469216296962	test.1_part0.pbi	524317d160cb374e
-3527	3861	7763469219638095	test.1.pbd	dd3dd60110e24e1b
-3861	5400	7763469234720055	test.1.pbw	f11e09b552b4c82f
-35	345	7763470203709256	usart.pbi	7c2d93866867ab60
-346	847	7763470208755062	test.1_part1.pbi	dc01e3b8207ff4ec
-848	1195	7763470212229474	test.1.pbd	dd3dd60110e24e1b
-1196	2751	7763470227473108	test.1.pbw	f11e09b552b4c82f
-31	316	7763471055024799	usart.pbi	7c2d93866867ab60
-316	801	7763471059885472	test.1_part1.pbi	dc01e3b8207ff4ec
-801	1137	7763471063249237	test.1.pbd	dd3dd60110e24e1b
-1137	2652	7763471078084141	test.1.pbw	f11e09b552b4c82f
-34	319	7763473523476950	usart.pbi	7c2d93866867ab60
-319	825	7763473528562964	test.1_part1.pbi	dc01e3b8207ff4ec
-826	1160	7763473531915827	test.1.pbd	dd3dd60110e24e1b
-1161	2739	7763473547370471	test.1.pbw	f11e09b552b4c82f
+2316	2631	7764177406654074	stm32f4xx_hal_i2c.pbi	74395538aa12fa10
+1763	2148	7764177401454076	stm32f4xx_hal_dma.pbi	2d6aa8f3983bf80a
+1020	1430	7764177394364052	stm32f4xx_hal_timebase_tim.pbi	b6f5ce0feaca8054
+1570	2002	7764177400514075	stm32f4xx_hal_dma_ex.pbi	1960c5ab56ffede7
+755	1077	7764177391224051	stm32f4xx_hal_i2c_ex.pbi	7798e48f8e6ef374
+1913	2229	7764177402714070	stm32f4xx_hal_exti.pbi	373789209d565f00
+1745	2145	7764177401774091	main.pbi	9c0a6aa02351636a
+1078	1489	7764177395304063	stm32f4xx_it.pbi	d01766022cb163bc
+1428	1763	7764177398054059	stm32f4xx_hal_cortex.pbi	2c6d2473a153fb5a
+1683	2011	7764177400604103	system_stm32f4xx.pbi	f50e519d7e78a5de
+1346	1677	7764177397304058	gpio.pbi	a088b5271f02118a
+845	1177	7764189906354929	test.1.pbd	dd3dd60110e24e1b
+339	844	7764189903034906	test.1_part0.pbi	524317d160cb374e
+2229	2565	7764177405934099	stm32f4xx_hal_gpio.pbi	53b438f48be9a8d0
+2368	2891	7764177409414108	test.1_part1.pbi	dc01e3b8207ff4ec
+2631	3131	7764177411864092	test.1_part2.pbi	5b60a24e7c60e7e6
+1014	1427	7764177394414055	dma.pbi	4f5ebe00ac67ed57
+31	338	7764189897954924	tim.pbi	f07c6d790a519d93
+1678	2004	7764177400524070	usart.pbi	7c2d93866867ab60
+44	80	7764217976173092	stm32f4xx_ll_dma.pbi	f9e6142ede2883b4
+37	101	7764217976413106	os_cpu_c.pbi	eb75b848b406ea34
+80	121	7764217976623103	stm32f4xx_ll_rcc.pbi	fb9ace481decf8ab
+35	167	7764217977093094	stm32f4xx_ll_gpio.pbi	df8b54563945d41d
+122	271	7764217978023102	stm32f4xx_ll_rng.pbi	5e12b9ea00d0b826
+31	487	7764217979423102	stm32f4xx_hal_rcc.pbi	50976e6b18f3b8bc
+40	491	7764217979403106	stm32f4xx_hal_tim_ex.pbi	3c68a2e86514987f
+167	510	7764217980403109	stm32f4xx_hal_rcc_ex.pbi	c1d751d24d77a2df
+510	555	7764217980963120	stm32f4xx_ll_dac.pbi	7dfc4be0933cdfaf
+101	558	7764217980983108	stm32f4xx_hal_wwdg.pbi	fca2b44f67349f99
+42	611	7764217981523111	stm32f4xx_hal_tim.pbi	71840baae88d57c4
+39	66	7764218055246764	stm32f4xx_ll_exti.pbi	883a2fd463949e02
+35	168	7764218056256766	stm32f4xx_ll_gpio.pbi	df8b54563945d41d
+32	171	7764218056276770	stm32f4xx_ll_tim.pbi	b88554c6464192f5
+171	206	7764218056636771	stm32f4xx_ll_dma.pbi	f9e6142ede2883b4
+41	377	7764218058306766	stm32f4xx_hal_rcc_ex.pbi	c1d751d24d77a2df
+207	381	7764218057986773	stm32f4xx_ll_i2c.pbi	7f1151d8874c40c9
+378	412	7764218058686776	stm32f4xx_ll_pwr.pbi	952cb4e4f4edb65b
+412	468	7764218059256791	app_hooks.pbi	ffd399489d189d5a
+43	509	7764218059666769	stm32f4xx_hal_sram.pbi	4652c5af4efd4e19
+168	511	7764218059676773	stm32f4xx_hal_wwdg.pbi	fca2b44f67349f99
+37	522	7764218059796775	stm32f4xx_hal_uart.pbi	e7ca7ebbb4330340
+469	539	7764218059876772	os_cpu_c.pbi	eb75b848b406ea34
+381	541	7764218059856770	stm32f4xx_ll_rng.pbi	5e12b9ea00d0b826
+67	543	7764218059916773	stm32f4xx_hal_rcc.pbi	50976e6b18f3b8bc
+539	577	7764218060286781	stm32f4xx_ll_rcc.pbi	fb9ace481decf8ab
+541	580	7764218060316784	stm32f4xx_ll_spi.pbi	ce805017b70a4f43
+523	584	7764218060416785	os_dbg.pbi	f7287a072fe86a55
+580	593	7764218060516780	test.1_part5.pbi	d64d2ad0ff3eb443
+594	749	7764218061836782	stm32f4xx_ll_crc.pbi	dcf41d4b97590765
+584	752	7764218061516779	ucos_ii.pbi	4e0ab25e0060431e
+753	785	7764218062426787	stm32f4xx_ll_usart.pbi	783190689e783d9
+749	789	7764218062416777	stm32f4xx_ll_dac.pbi	7dfc4be0933cdfaf
+785	834	7764218062926793	test.1_part6.pbi	ddc887ac32bb1191
+512	877	7764218063336785	stm32f4xx_hal_tim_ex.pbi	3c68a2e86514987f
+544	918	7764218063346786	stm32f4xx_hal_pwr_ex.pbi	b84426bf5a4ce0cf
+509	928	7764218063856785	stm32f4xx_hal_tim.pbi	71840baae88d57c4
+578	1063	7764218064706802	stm32f4xx_hal_usart.pbi	b368fafd8b8b8bb9
+789	1168	7764218065856794	stm32f4xx_hal_msp.pbi	8144db72f01a260b
+835	1185	7764218066326789	dma.pbi	4f5ebe00ac67ed57
+918	1265	7764218066996795	stm32f4xx_hal_crc.pbi	881b29e4c80746b3
+877	1328	7764218067666797	stm32f4xx_hal_dma.pbi	2d6aa8f3983bf80a
+1063	1350	7764218067886792	test.1_part4.pbi	4a2716eb92784a90
+929	1373	7764218068306791	gpio.pbi	a088b5271f02118a
+1169	1505	7764218069566789	stm32f4xx_hal_dma_ex.pbi	1960c5ab56ffede7
+1185	1508	7764218069656796	stm32f4xx_hal_timebase_tim.pbi	b6f5ce0feaca8054
+1329	1688	7764218071406797	stm32f4xx_hal_flash_ramfunc.pbi	ae498685b336a49c
+1266	1691	7764218070906791	stm32f4xx_hal_exti.pbi	373789209d565f00
+1351	1751	7764218071656846	stm32f4xx_hal_gpio.pbi	53b438f48be9a8d0
+1505	1857	7764218073146806	stm32f4xx_hal_cortex.pbi	2c6d2473a153fb5a
+1509	1860	7764218073176797	stm32f4xx_hal_flash.pbi	eccf13860e1d0c6a
+1373	1911	7764218073366807	tim.pbi	f07c6d790a519d93
+1689	1997	7764218074406797	stm32f4xx_hal_i2c_ex.pbi	7798e48f8e6ef374
+1691	1999	7764218074516809	stm32f4xx_hal_flash_ex.pbi	ac2d035774fe6a2e
+1752	2177	7764218076306808	system_stm32f4xx.pbi	f50e519d7e78a5de
+1860	2300	7764218077576804	stm32f4xx_hal.pbi	a073c739b6b34173
+1858	2366	7764218078086813	main.pbi	9c0a6aa02351636a
+1911	2367	7764218078036804	stm32f4xx_hal_pwr.pbi	b347497fce55b6a8
+2000	2369	7764218078056809	usart.pbi	7c2d93866867ab60
+1997	2436	7764218078246818	stm32f4xx_it.pbi	d01766022cb163bc
+2178	2535	7764218079506808	stm32f4xx_hal_i2c.pbi	74395538aa12fa10
+2367	2951	7764218083776823	test.1_part3.pbi	6eb1d553da066571
+2370	2951	7764218083516820	test.1_part1.pbi	dc01e3b8207ff4ec
+2437	2988	7764218084336837	test.1_part0.pbi	524317d160cb374e
+2536	3065	7764218085236817	test.1_part2.pbi	5b60a24e7c60e7e6
+3066	3396	7764218088546845	test.1.pbd	dd3dd60110e24e1b
+3396	4920	7764218103477785	test.1.pbw	f11e09b552b4c82f
+31	334	7764230767009972	tim.pbi	f07c6d790a519d93
+334	841	7764230772080115	test.1_part0.pbi	524317d160cb374e
+841	1183	7764230775509986	test.1.pbd	dd3dd60110e24e1b
+1183	2728	7764230790630017	test.1.pbw	f11e09b552b4c82f
+32	354	7764230836851837	tim.pbi	f07c6d790a519d93
+355	865	7764230841961851	test.1_part0.pbi	524317d160cb374e
+865	1193	7764230845241838	test.1.pbd	dd3dd60110e24e1b
+1193	2721	7764230860219795	test.1.pbw	f11e09b552b4c82f
+37	350	7764231234861946	tim.pbi	f07c6d790a519d93
+351	897	7764231240342996	test.1_part0.pbi	524317d160cb374e
+898	1240	7764231243673001	test.1.pbd	dd3dd60110e24e1b
+1241	2831	7764231259343011	test.1.pbw	f11e09b552b4c82f
+33	368	7764233132077882	tim.pbi	f07c6d790a519d93
+368	881	7764233137177890	test.1_part0.pbi	524317d160cb374e
+882	1214	7764233140537918	test.1.pbd	dd3dd60110e24e1b
+1214	2895	7764233155807946	test.1.pbw	f11e09b552b4c82f
+30	505	7764247219630332	tim.pbi	f07c6d790a519d93
+505	1019	7764247224790357	test.1_part0.pbi	524317d160cb374e
+1020	1348	7764247228080358	test.1.pbd	dd3dd60110e24e1b
+1349	2879	7764247243080386	test.1.pbw	f11e09b552b4c82f

PLSR/PLSR/EWARM/test.1/Obj/main.pbi.dep

@@ -1,4 +1,5 @@
 main.pbi: \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\dma.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\usart.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \
   e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\os_trace.h \

PLSR/PLSR/EWARM/test.1/Obj/stm32f4xx_hal_uart.pbi.dep

@@ -1,36 +1,37 @@
 stm32f4xx_hal_uart.pbi: \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h \
-  E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\ysizet.h \
-  E:\Software\IAR\arm\inc\c\stddef.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\mpu_armv7.h \
-  E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_iccarm.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_compiler.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_version.h \
-  E:\Software\IAR\arm\inc\c\DLib_Product.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\stm32f4xx_hal_conf.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_rcc.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include\stm32f4xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\core_cm4.h \
+  E:\Software\IAR\arm\inc\c\stdint.h E:\Software\IAR\arm\inc\c\ycheck.h \
+  E:\Software\IAR\arm\inc\c\yvals.h \
   E:\Software\IAR\arm\inc\c\DLib_Defaults.h \
-  E:\Software\IAR\arm\inc\c\yvals.h E:\Software\IAR\arm\inc\c\stdint.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\core_cm4.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\stm32f4xx_hal_conf.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c
+  E:\\Software\\IAR\\arm\\inc\\c\\DLib_Config_Full.h \
+  E:\Software\IAR\arm\inc\c\DLib_Product.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_version.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_compiler.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\cmsis_iccarm.h \
+  E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/mpu_armv7.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+  E:\Software\IAR\arm\inc\c\stddef.h E:\Software\IAR\arm\inc\c\ysizet.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_gpio.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_exti.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_dma.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_cortex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_flash.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_pwr.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h

PLSR/PLSR/EWARM/test.1/Obj/tim.pbi.dep

@@ -1,40 +1,38 @@
-tim.pbi: e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\tim.c \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\tim.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/main.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\stm32f4xx_hal_conf.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_rcc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include\stm32f4xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\core_cm4.h \
-  E:\Software\IAR\arm\inc\c\stdint.h E:\Software\IAR\arm\inc\c\ycheck.h \
-  E:\Software\IAR\arm\inc\c\yvals.h \
-  E:\Software\IAR\arm\inc\c\DLib_Defaults.h \
-  E:\\Software\\IAR\\arm\\inc\\c\\DLib_Config_Full.h \
-  E:\Software\IAR\arm\inc\c\DLib_Product.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_version.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_compiler.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\cmsis_iccarm.h \
+tim.pbi: E:\Software\IAR\arm\inc\c\DLib_float_setup.h \
+  E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\math.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h \
+  E:\Software\IAR\arm\inc\c\ysizet.h E:\Software\IAR\arm\inc\c\stddef.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\mpu_armv7.h \
   E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/mpu_armv7.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
-  E:\Software\IAR\arm\inc\c\stddef.h E:\Software\IAR\arm\inc\c\ysizet.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_gpio.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_exti.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_dma.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_cortex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_flash.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_pwr.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h \
-  E:\Software\IAR\arm\inc\c\math.h \
-  E:\Software\IAR\arm\inc\c\DLib_float_setup.h
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_iccarm.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_compiler.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_version.h \
+  E:\Software\IAR\arm\inc\c\DLib_Product.h \
+  E:\Software\IAR\arm\inc\c\DLib_Defaults.h \
+  E:\Software\IAR\arm\inc\c\yvals.h E:\Software\IAR\arm\inc\c\stdint.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\core_cm4.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\stm32f4xx_hal_conf.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\main.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\tim.c

PLSR/PLSR/EWARM/test.1/Obj/usart.pbi.dep

@@ -1,38 +1,39 @@
 usart.pbi: \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h \
-  E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\ysizet.h \
-  E:\Software\IAR\arm\inc\c\stddef.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\mpu_armv7.h \
-  E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_iccarm.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_compiler.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_version.h \
-  E:\Software\IAR\arm\inc\c\DLib_Product.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\usart.c \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\usart.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/main.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\stm32f4xx_hal_conf.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_rcc.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include\stm32f4xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\core_cm4.h \
+  E:\Software\IAR\arm\inc\c\stdint.h E:\Software\IAR\arm\inc\c\ycheck.h \
+  E:\Software\IAR\arm\inc\c\yvals.h \
   E:\Software\IAR\arm\inc\c\DLib_Defaults.h \
-  E:\Software\IAR\arm\inc\c\yvals.h E:\Software\IAR\arm\inc\c\stdint.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\core_cm4.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\stm32f4xx_hal_conf.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\main.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\usart.h \
-  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\usart.c
+  E:\\Software\\IAR\\arm\\inc\\c\\DLib_Config_Full.h \
+  E:\Software\IAR\arm\inc\c\DLib_Product.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_version.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_compiler.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\cmsis_iccarm.h \
+  E:\Software\IAR\arm\inc\c\iccarm_builtin.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/mpu_armv7.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+  E:\Software\IAR\arm\inc\c\stddef.h E:\Software\IAR\arm\inc\c\ysizet.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_gpio.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_exti.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_dma.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_cortex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_flash.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_pwr.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+  e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h