diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 0000000..e2ce420 --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,17 @@ +{ + "files.associations": { + "usart.h": "c", + "modbus_log.h": "c", + "ucos_ii.h": "c", + "app_cfg.h": "c", + "tim.h": "c", + "tool.h": "c", + "main.h": "c", + "ctype.h": "c", + "math.h": "c", + "stm32f4xx_hal.h": "c", + "stm32f4xx_hal_conf.h": "c", + "intrinsics.h": "c", + "gpio.h": "c" + } +} \ No newline at end of file diff --git a/PLSR/PLSR/Core/Inc/flash_save.h b/PLSR/PLSR/Core/Inc/flash_save.h new file mode 100644 index 0000000..1f278fd --- /dev/null +++ b/PLSR/PLSR/Core/Inc/flash_save.h @@ -0,0 +1,161 @@ +#ifndef FLASH_SAVE_H +#define FLASH_SAVE_H + +#include "stm32f4xx_hal.h" +#include + +// 实际需要的寄存器数量（优化内存使用） +#define MODBUS_ACTUAL_REG_COUNT 76 // 实际使用的寄存器数量 + +// Modbus 地址宏定义 +// 基本配置参数地址 (0x1000-0x100C) +#define MODBUS_ADDR_PULSE_OUTPUT_PIN 0x1000 // 脉冲发送端子 +#define MODBUS_ADDR_DIRECTION_OUTPUT_PIN 0x1001 // 脉冲方向端子 +#define MODBUS_ADDR_EXT_INPUT_PIN 0x1002 // EXT信号 +#define MODBUS_ADDR_DIRECTION_DELAY_TIME 0x1003 // 脉冲方向延时时间 +#define MODBUS_ADDR_DIRECTION_LOGIC 0x1004 // 脉冲方向逻辑 +#define MODBUS_ADDR_ACCEL_DECEL_MODE 0x1005 // 脉冲加减速模式 +#define MODBUS_ADDR_RUN_MODE 0x1006 // 运行模式 +#define MODBUS_ADDR_TOTAL_SEGMENTS 0x1007 // 脉冲总段数 +#define MODBUS_ADDR_START_SEGMENT 0x1008 // 起始执行段数 +#define MODBUS_ADDR_DEFAULT_SPEED_LOW 0x1009 // 脉冲默认速度低16位 +#define MODBUS_ADDR_DEFAULT_SPEED_HIGH 0x100A // 脉冲默认速度高16位 +#define MODBUS_ADDR_DEFAULT_ACCEL_TIME 0x100B // 脉冲默认速度加速时间 +#define MODBUS_ADDR_DEFAULT_DECEL_TIME 0x100C // 脉冲默认速度减速时间 + +// 段参数地址基址定义 +#define MODBUS_ADDR_SEGMENT_BASE 0x1100 // 段参数基址 +#define MODBUS_ADDR_SEGMENT_OFFSET 0x0010 // 段间地址偏移 + +// 段参数偏移定义 +#define MODBUS_OFFSET_FREQ_LOW 0x0000 // 脉冲频率低16位偏移 +#define MODBUS_OFFSET_FREQ_HIGH 0x0001 // 脉冲频率高16位偏移 +#define MODBUS_OFFSET_PULSE_COUNT_LOW 0x0002 // 脉冲个数低16位偏移 +#define MODBUS_OFFSET_PULSE_COUNT_HIGH 0x0003 // 脉冲个数高16位偏移 +#define MODBUS_OFFSET_WAIT_CONDITION 0x0004 // 等待条件偏移 +#define MODBUS_OFFSET_JUMP_NUMBER 0x0005 // 跳转编号偏移 + +// 各段参数地址宏定义 +#define MODBUS_ADDR_SEG1_FREQ_LOW 0x1100 // 第1段脉冲频率低16位 +#define MODBUS_ADDR_SEG1_FREQ_HIGH 0x1101 // 第1段脉冲频率高16位 +#define MODBUS_ADDR_SEG1_PULSE_COUNT_LOW 0x1102 // 第1段脉冲个数低16位 +#define MODBUS_ADDR_SEG1_PULSE_COUNT_HIGH 0x1103 // 第1段脉冲个数高16位 +#define MODBUS_ADDR_SEG1_WAIT_CONDITION 0x1104 // 第1段等待条件 +#define MODBUS_ADDR_SEG1_JUMP_NUMBER 0x1105 // 第1段跳转编号 + +#define MODBUS_ADDR_SEG2_FREQ_LOW 0x1110 // 第2段脉冲频率低16位 +#define MODBUS_ADDR_SEG2_FREQ_HIGH 0x1111 // 第2段脉冲频率高16位 +#define MODBUS_ADDR_SEG2_PULSE_COUNT_LOW 0x1112 // 第2段脉冲个数低16位 +#define MODBUS_ADDR_SEG2_PULSE_COUNT_HIGH 0x1113 // 第2段脉冲个数高16位 +#define MODBUS_ADDR_SEG2_WAIT_CONDITION 0x1114 // 第2段等待条件 +#define MODBUS_ADDR_SEG2_JUMP_NUMBER 0x1115 // 第2段跳转编号 + +#define MODBUS_ADDR_SEG3_FREQ_LOW 0x1120 // 第3段脉冲频率低16位 +#define MODBUS_ADDR_SEG3_FREQ_HIGH 0x1121 // 第3段脉冲频率高16位 +#define MODBUS_ADDR_SEG3_PULSE_COUNT_LOW 0x1122 // 第3段脉冲个数低16位 +#define MODBUS_ADDR_SEG3_PULSE_COUNT_HIGH 0x1123 // 第3段脉冲个数高16位 +#define MODBUS_ADDR_SEG3_WAIT_CONDITION 0x1124 // 第3段等待条件 +#define MODBUS_ADDR_SEG3_JUMP_NUMBER 0x1125 // 第3段跳转编号 + +#define MODBUS_ADDR_SEG4_FREQ_LOW 0x1130 // 第4段脉冲频率低16位 +#define MODBUS_ADDR_SEG4_FREQ_HIGH 0x1131 // 第4段脉冲频率高16位 +#define MODBUS_ADDR_SEG4_PULSE_COUNT_LOW 0x1132 // 第4段脉冲个数低16位 +#define MODBUS_ADDR_SEG4_PULSE_COUNT_HIGH 0x1133 // 第4段脉冲个数高16位 +#define MODBUS_ADDR_SEG4_WAIT_CONDITION 0x1134 // 第4段等待条件 +#define MODBUS_ADDR_SEG4_JUMP_NUMBER 0x1135 // 第4段跳转编号 + +#define MODBUS_ADDR_SEG5_FREQ_LOW 0x1140 // 第5段脉冲频率低16位 +#define MODBUS_ADDR_SEG5_FREQ_HIGH 0x1141 // 第5段脉冲频率高16位 +#define MODBUS_ADDR_SEG5_PULSE_COUNT_LOW 0x1142 // 第5段脉冲个数低16位 +#define MODBUS_ADDR_SEG5_PULSE_COUNT_HIGH 0x1143 // 第5段脉冲个数高16位 +#define MODBUS_ADDR_SEG5_WAIT_CONDITION 0x1144 // 第5段等待条件 +#define MODBUS_ADDR_SEG5_JUMP_NUMBER 0x1145 // 第5段跳转编号 + +#define MODBUS_ADDR_SEG6_FREQ_LOW 0x1150 // 第6段脉冲频率低16位 +#define MODBUS_ADDR_SEG6_FREQ_HIGH 0x1151 // 第6段脉冲频率高16位 +#define MODBUS_ADDR_SEG6_PULSE_COUNT_LOW 0x1152 // 第6段脉冲个数低16位 +#define MODBUS_ADDR_SEG6_PULSE_COUNT_HIGH 0x1153 // 第6段脉冲个数高16位 +#define MODBUS_ADDR_SEG6_WAIT_CONDITION 0x1154 // 第6段等待条件 +#define MODBUS_ADDR_SEG6_JUMP_NUMBER 0x1155 // 第6段跳转编号 + +#define MODBUS_ADDR_SEG7_FREQ_LOW 0x1160 // 第7段脉冲频率低16位 +#define MODBUS_ADDR_SEG7_FREQ_HIGH 0x1161 // 第7段脉冲频率高16位 +#define MODBUS_ADDR_SEG7_PULSE_COUNT_LOW 0x1162 // 第7段脉冲个数低16位 +#define MODBUS_ADDR_SEG7_PULSE_COUNT_HIGH 0x1163 // 第7段脉冲个数高16位 +#define MODBUS_ADDR_SEG7_WAIT_CONDITION 0x1164 // 第7段等待条件 +#define MODBUS_ADDR_SEG7_JUMP_NUMBER 0x1165 // 第7段跳转编号 + +#define MODBUS_ADDR_SEG8_FREQ_LOW 0x1170 // 第8段脉冲频率低16位 +#define MODBUS_ADDR_SEG8_FREQ_HIGH 0x1171 // 第8段脉冲频率高16位 +#define MODBUS_ADDR_SEG8_PULSE_COUNT_LOW 0x1172 // 第8段脉冲个数低16位 +#define MODBUS_ADDR_SEG8_PULSE_COUNT_HIGH 0x1173 // 第8段脉冲个数高16位 +#define MODBUS_ADDR_SEG8_WAIT_CONDITION 0x1174 // 第8段等待条件 +#define MODBUS_ADDR_SEG8_JUMP_NUMBER 0x1175 // 第8段跳转编号 + +#define MODBUS_ADDR_SEG9_FREQ_LOW 0x1180 // 第9段脉冲频率低16位 +#define MODBUS_ADDR_SEG9_FREQ_HIGH 0x1181 // 第9段脉冲频率高16位 +#define MODBUS_ADDR_SEG9_PULSE_COUNT_LOW 0x1182 // 第9段脉冲个数低16位 +#define MODBUS_ADDR_SEG9_PULSE_COUNT_HIGH 0x1183 // 第9段脉冲个数高16位 +#define MODBUS_ADDR_SEG9_WAIT_CONDITION 0x1184 // 第9段等待条件 +#define MODBUS_ADDR_SEG9_JUMP_NUMBER 0x1185 // 第9段跳转编号 + +#define MODBUS_ADDR_SEG10_FREQ_LOW 0x1190 // 第10段脉冲频率低16位 +#define MODBUS_ADDR_SEG10_FREQ_HIGH 0x1191 // 第10段脉冲频率高16位 +#define MODBUS_ADDR_SEG10_PULSE_COUNT_LOW 0x1192 // 第10段脉冲个数低16位 +#define MODBUS_ADDR_SEG10_PULSE_COUNT_HIGH 0x1193 // 第10段脉冲个数高16位 +#define MODBUS_ADDR_SEG10_WAIT_CONDITION 0x1194 // 第10段等待条件 +#define MODBUS_ADDR_SEG10_JUMP_NUMBER 0x1195 // 第10段跳转编号 + +// 监控值地址 (0x2000-0x2001) +#define MODBUS_ADDR_PULSE_COUNT_MONITOR_LOW 0x2000 // 脉冲个数监控值低16位 +#define MODBUS_ADDR_PULSE_COUNT_MONITOR_HIGH 0x2001 // 脉冲个数监控值高16位 +#define MODBUS_ADDR_PULSE_COUNT_LOW 0x2000 // 脉冲个数监控值低16位（别名） +#define MODBUS_ADDR_PULSE_COUNT_HIGH 0x2001 // 脉冲个数监控值高16位（别名） + +// 控制按钮地址 (0x3000) +#define MODBUS_ADDR_PULSE_SEND_BUTTON 0x3000 // 脉冲发送按钮 + +// 特殊值定义 +#define MODBUS_INVALID_ADDRESS 0xFFFF // 无效地址标识 + +// 地址映射结构体 +typedef struct { + uint16_t modbus_addr; ///< Modbus地址s + uint16_t array_index; ///< 数组索引 +} modbus_addr_map_t; + + +// 备份SRAM相关定义 +#define BACKUP_SRAM_BASE 0x40024000 +#define BACKUP_MAGIC_NUMBER 0x12345678 +#define BKPSRAM_BASE_ADDR ((uint32_t)0x40024000) + +#define OFFSET_REGS 0x00 // 假设占字节 +/** + * @brief 备份数据结构 + * @note 使用MODBUS_ACTUAL_REG_COUNT(76)作为数组大小，减少内存占用 + */ +typedef struct { + uint16_t holding_regs[MODBUS_ACTUAL_REG_COUNT]; ///< 保持寄存器数组，大小为76 + uint32_t holding_crc; ///< 保持寄存器CRC校验值 + uint32_t magic_number; ///< 魔法数字，用于验证数据有效性 + uint32_t save_timestamp; ///< 保存时间戳（可选） +} BackupData_t; + +void DMA_Start_CopyToBKPSRAM(uint8_t *src, uint32_t len,uint32_t offset); +void DMA_Start_CopyFromBKPSRAM(uint8_t *dst, uint32_t len, uint32_t offset); +// ==================== 备份SRAM相关函数 ==================== +void BackupSRAM_Init(void); +void BackupSRAM_SaveRegData(void); +uint8_t BackupSRAM_RestoreData(void); +void BackupSRAM_ClearData(void); + +// 全局变量声明 +extern BackupData_t* backup_data; + +// Modbus寄存器操作函数 +void FlashSave_Set_Holding_Register(uint16_t address, uint16_t value); +uint16_t FlashSave_Get_Holding_Register(uint16_t address); + + +#endif // FLASH_SAVE_H \ No newline at end of file diff --git a/PLSR/PLSR/Core/Inc/modbus_crc.h b/PLSR/PLSR/Core/Inc/modbus_crc.h new file mode 100644 index 0000000..5018593 --- /dev/null +++ b/PLSR/PLSR/Core/Inc/modbus_crc.h @@ -0,0 +1,9 @@ +#ifndef __MODBUS_CRC_H +#define __MODBUS_CRC_H + +#include "stm32f4xx.h" + +uint16_t Modbus_CRC16(uint8_t *data, uint16_t length); +uint8_t Modbus_CheckCRC(uint8_t *data, uint16_t length); + +#endif \ No newline at end of file diff --git a/PLSR/PLSR/Core/Inc/modbus_log.h b/PLSR/PLSR/Core/Inc/modbus_log.h new file mode 100644 index 0000000..b71718d --- /dev/null +++ b/PLSR/PLSR/Core/Inc/modbus_log.h @@ -0,0 +1,17 @@ +#ifndef MODBUS_LOG_H +#define MODBUS_LOG_H +#include "usart.h" + +#define MODBUS_LOG_MAX 128 ///> 最多保存128条记录 + +typedef struct { + uint8_t element_type; ///> 软元件类型：0x01=保持寄存器，0x02=线圈，0x03=输入寄存器，0x04=离散输入 + uint8_t function_code; ///> 功能码：0x01, 0x03, 0x10等 + uint16_t start_address; ///> 操作起始地址 + uint16_t data_len; ///> 数据长度（读写寄存器数） + uint8_t operation_type; ///> 0x01=读, 0x02=写 + uint8_t error_code; ///> 0=无错，其它=异常码（如0x02地址非法） +}ModbusLog; +void Modbus_Log(uint8_t element, uint8_t func, uint16_t addr, uint16_t len, uint8_t op_type, uint8_t err); +extern ModbusLog modbus_logs[MODBUS_LOG_MAX]; +#endif \ No newline at end of file diff --git a/PLSR/PLSR/Core/Src/flash_save.c b/PLSR/PLSR/Core/Src/flash_save.c new file mode 100644 index 0000000..28f1c56 --- /dev/null +++ b/PLSR/PLSR/Core/Src/flash_save.c @@ -0,0 +1,308 @@ +#include "flash_save.h" +#include "modbus_crc.h" +#include "stm32f4xx_hal.h" +#include + +// 前向声明，避免循环依赖 +typedef struct { + uint8_t slave_address; +} ModbusSlave_t; +extern ModbusSlave_t ModbusSlave; + +// Modbus地址映射表（将Modbus地址映射到紧凑的数组索引） +static const modbus_addr_map_t modbus_address_map[MODBUS_ACTUAL_REG_COUNT] = { + // 基本配置参数 (0x1000-0x100C) -> 索引 0-12 + {MODBUS_ADDR_PULSE_OUTPUT_PIN, 0}, {MODBUS_ADDR_DIRECTION_OUTPUT_PIN, 1}, {MODBUS_ADDR_EXT_INPUT_PIN, 2}, + {MODBUS_ADDR_DIRECTION_DELAY_TIME, 3}, {MODBUS_ADDR_DIRECTION_LOGIC, 4}, {MODBUS_ADDR_ACCEL_DECEL_MODE, 5}, + {MODBUS_ADDR_RUN_MODE, 6}, {MODBUS_ADDR_TOTAL_SEGMENTS, 7}, {MODBUS_ADDR_START_SEGMENT, 8}, + {MODBUS_ADDR_DEFAULT_SPEED_LOW, 9}, {MODBUS_ADDR_DEFAULT_SPEED_HIGH, 10}, {MODBUS_ADDR_DEFAULT_ACCEL_TIME, 11}, {MODBUS_ADDR_DEFAULT_DECEL_TIME, 12}, + + // 第1段参数 (0x1100-0x1105) -> 索引 13-18 + {MODBUS_ADDR_SEG1_FREQ_LOW, 13}, {MODBUS_ADDR_SEG1_FREQ_HIGH, 14}, {MODBUS_ADDR_SEG1_PULSE_COUNT_LOW, 15}, + {MODBUS_ADDR_SEG1_PULSE_COUNT_HIGH, 16}, {MODBUS_ADDR_SEG1_WAIT_CONDITION, 17}, {MODBUS_ADDR_SEG1_JUMP_NUMBER, 18}, + + // 第2段参数 (0x1110-0x1115) -> 索引 19-24 + {MODBUS_ADDR_SEG2_FREQ_LOW, 19}, {MODBUS_ADDR_SEG2_FREQ_HIGH, 20}, {MODBUS_ADDR_SEG2_PULSE_COUNT_LOW, 21}, + {MODBUS_ADDR_SEG2_PULSE_COUNT_HIGH, 22}, {MODBUS_ADDR_SEG2_WAIT_CONDITION, 23}, {MODBUS_ADDR_SEG2_JUMP_NUMBER, 24}, + + // 第3段参数 (0x1120-0x1125) -> 索引 25-30 + {MODBUS_ADDR_SEG3_FREQ_LOW, 25}, {MODBUS_ADDR_SEG3_FREQ_HIGH, 26}, {MODBUS_ADDR_SEG3_PULSE_COUNT_LOW, 27}, + {MODBUS_ADDR_SEG3_PULSE_COUNT_HIGH, 28}, {MODBUS_ADDR_SEG3_WAIT_CONDITION, 29}, {MODBUS_ADDR_SEG3_JUMP_NUMBER, 30}, + + // 第4段参数 (0x1130-0x1135) -> 索引 31-36 + {MODBUS_ADDR_SEG4_FREQ_LOW, 31}, {MODBUS_ADDR_SEG4_FREQ_HIGH, 32}, {MODBUS_ADDR_SEG4_PULSE_COUNT_LOW, 33}, + {MODBUS_ADDR_SEG4_PULSE_COUNT_HIGH, 34}, {MODBUS_ADDR_SEG4_WAIT_CONDITION, 35}, {MODBUS_ADDR_SEG4_JUMP_NUMBER, 36}, + + // 第5段参数 (0x1140-0x1145) -> 索引 37-42 + {MODBUS_ADDR_SEG5_FREQ_LOW, 37}, {MODBUS_ADDR_SEG5_FREQ_HIGH, 38}, {MODBUS_ADDR_SEG5_PULSE_COUNT_LOW, 39}, + {MODBUS_ADDR_SEG5_PULSE_COUNT_HIGH, 40}, {MODBUS_ADDR_SEG5_WAIT_CONDITION, 41}, {MODBUS_ADDR_SEG5_JUMP_NUMBER, 42}, + + // 第6段参数 (0x1150-0x1155) -> 索引 43-48 + {MODBUS_ADDR_SEG6_FREQ_LOW, 43}, {MODBUS_ADDR_SEG6_FREQ_HIGH, 44}, {MODBUS_ADDR_SEG6_PULSE_COUNT_LOW, 45}, + {MODBUS_ADDR_SEG6_PULSE_COUNT_HIGH, 46}, {MODBUS_ADDR_SEG6_WAIT_CONDITION, 47}, {MODBUS_ADDR_SEG6_JUMP_NUMBER, 48}, + + // 第7段参数 (0x1160-0x1165) -> 索引 49-54 + {MODBUS_ADDR_SEG7_FREQ_LOW, 49}, {MODBUS_ADDR_SEG7_FREQ_HIGH, 50}, {MODBUS_ADDR_SEG7_PULSE_COUNT_LOW, 51}, + {MODBUS_ADDR_SEG7_PULSE_COUNT_HIGH, 52}, {MODBUS_ADDR_SEG7_WAIT_CONDITION, 53}, {MODBUS_ADDR_SEG7_JUMP_NUMBER, 54}, + + // 第8段参数 (0x1170-0x1175) -> 索引 55-60 + {MODBUS_ADDR_SEG8_FREQ_LOW, 55}, {MODBUS_ADDR_SEG8_FREQ_HIGH, 56}, {MODBUS_ADDR_SEG8_PULSE_COUNT_LOW, 57}, + {MODBUS_ADDR_SEG8_PULSE_COUNT_HIGH, 58}, {MODBUS_ADDR_SEG8_WAIT_CONDITION, 59}, {MODBUS_ADDR_SEG8_JUMP_NUMBER, 60}, + + // 第9段参数 (0x1180-0x1185) -> 索引 61-66 + {MODBUS_ADDR_SEG9_FREQ_LOW, 61}, {MODBUS_ADDR_SEG9_FREQ_HIGH, 62}, {MODBUS_ADDR_SEG9_PULSE_COUNT_LOW, 63}, + {MODBUS_ADDR_SEG9_PULSE_COUNT_HIGH, 64}, {MODBUS_ADDR_SEG9_WAIT_CONDITION, 65}, {MODBUS_ADDR_SEG9_JUMP_NUMBER, 66}, + + // 第10段参数 (0x1190-0x1195) -> 索引 67-72 + {MODBUS_ADDR_SEG10_FREQ_LOW, 67}, {MODBUS_ADDR_SEG10_FREQ_HIGH, 68}, {MODBUS_ADDR_SEG10_PULSE_COUNT_LOW, 69}, + {MODBUS_ADDR_SEG10_PULSE_COUNT_HIGH, 70}, {MODBUS_ADDR_SEG10_WAIT_CONDITION, 71}, {MODBUS_ADDR_SEG10_JUMP_NUMBER, 72}, + + // 监控值 (0x2000-0x2001) -> 索引 73-74 + {MODBUS_ADDR_PULSE_COUNT_MONITOR_LOW, 73}, {MODBUS_ADDR_PULSE_COUNT_MONITOR_HIGH, 74}, + + // 控制按钮 (0x3000) -> 索引 75 + {MODBUS_ADDR_PULSE_SEND_BUTTON, 75} +}; + +// 备份SRAM中的数据指针声明在头文件中 + +/** + * @brief 根据Modbus地址获取数组索引 + * @param modbus_addr: Modbus地址 + * @retval 数组索引，如果地址无效返回0xFFFF + */ +static uint16_t FlashSave_Get_Array_Index(uint16_t modbus_addr) +{ + for (uint16_t i = 0; i < MODBUS_ACTUAL_REG_COUNT; i++) { + if (modbus_address_map[i].modbus_addr == modbus_addr) + { + return modbus_address_map[i].array_index; + } + } + return MODBUS_INVALID_ADDRESS; // 无效地址 +} + +/** + * @brief 设置保持寄存器值 + * @param address: 寄存器地址 + * @param value: 寄存器值 + * @retval None + */ +void FlashSave_Set_Holding_Register(uint16_t address, uint16_t value) +{ + uint16_t array_index = FlashSave_Get_Array_Index(address); + if (array_index != MODBUS_INVALID_ADDRESS && backup_data != NULL) { + backup_data->holding_regs[array_index] = value; + } +} + +/** + * @brief 获取保持寄存器值 + * @param address: 寄存器地址 + * @retval uint16_t: 寄存器值 + */ +uint16_t FlashSave_Get_Holding_Register(uint16_t address) +{ + uint16_t array_index = FlashSave_Get_Array_Index(address); + if (array_index != MODBUS_INVALID_ADDRESS && backup_data != NULL) + { + return backup_data->holding_regs[array_index]; + } + return 0; +} + +volatile uint8_t dma_bkpsram_done_flag = 0; + +// 添加备份域访问使能函数 +void EnableBackupDomain(void) { + // 1. 使能PWR时钟 + __HAL_RCC_PWR_CLK_ENABLE(); + + // 2. 使能备份域访问 + HAL_PWR_EnableBkUpAccess(); +} + +// DMA句柄 +DMA_HandleTypeDef hdma_backup; + +// 备份数据指针定义，指向备份SRAM中的数据结构 +BackupData_t* backup_data = (BackupData_t*)BKPSRAM_BASE_ADDR; + +// Error_Handler函数已在main.c中定义，此处移除重复定义 + +void DMA_Backup_Init(void) +{ + EnableBackupDomain(); + __HAL_RCC_DMA2_CLK_ENABLE(); + + // 配置DMA2 Stream0用于内存到备份SRAM传输 + hdma_backup.Instance = DMA2_Stream0; + hdma_backup.Init.Channel = DMA_CHANNEL_0; + hdma_backup.Init.Direction = DMA_MEMORY_TO_MEMORY; + hdma_backup.Init.PeriphInc = DMA_PINC_ENABLE; + hdma_backup.Init.MemInc = DMA_MINC_ENABLE; + hdma_backup.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_backup.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_backup.Init.Mode = DMA_NORMAL; + hdma_backup.Init.Priority = DMA_PRIORITY_HIGH; + hdma_backup.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + hdma_backup.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL; + hdma_backup.Init.MemBurst = DMA_MBURST_SINGLE; + hdma_backup.Init.PeriphBurst = DMA_PBURST_SINGLE; + + HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); +} + +void DMA_Start_CopyToBKPSRAM(uint8_t *src, uint32_t len, uint32_t offset) +{ + EnableBackupDomain(); + + // 停止之前的DMA传输 + HAL_DMA_Abort(&hdma_backup); + + // 清除标志位 + dma_bkpsram_done_flag = 0; + + // 使用HAL库函数启动DMA传输 + if(HAL_DMA_Start_IT(&hdma_backup, (uint32_t)src, BKPSRAM_BASE_ADDR + offset, len) != HAL_OK) + { + // DMA启动失败，设置标志位避免死等 + dma_bkpsram_done_flag = 1; + } +} + +void DMA_Start_CopyFromBKPSRAM(uint8_t *dst, uint32_t len, uint32_t offset) +{ + EnableBackupDomain(); + + // 停止之前的DMA传输 + HAL_DMA_Abort(&hdma_backup); + + // 清除标志位 + dma_bkpsram_done_flag = 0; + + // 使用HAL库函数启动DMA传输 + HAL_DMA_Start_IT(&hdma_backup, BKPSRAM_BASE_ADDR + offset, (uint32_t)dst, len); + dma_bkpsram_done_flag = 1; +} + + +// DMA传输完成回调函数 +void HAL_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma) +{ + if(hdma->Instance == DMA2_Stream0) + { + dma_bkpsram_done_flag = 1; + } +} + + + + +/** + * @brief 初始化备份域和PVD + */ +void BackupSRAM_Init(void) +{ + // 1. 使能PWR和备份域时钟 + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_RCC_BKPSRAM_CLK_ENABLE(); + + // 2. 使能备份域访问 + HAL_PWR_EnableBkUpAccess(); + + // 3. 使能备份SRAM + HAL_PWREx_EnableBkUpReg(); + + // 4. 等待备份稳压器就绪 + while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET); + + // 初始化DMA + DMA_Backup_Init(); +} + + +/** + * @brief 保存数据到备份SRAM + * @note 该函数执行时间很短，适合在掉电中断中调用 + */ +void BackupSRAM_SaveRegData(void) +{ + // 检查备份SRAM是否可用 + if(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET) + { + return; + } + + /* 使用DMA传输76个uint16_t寄存器到备份SRAM */ + DMA_Start_CopyToBKPSRAM((uint8_t*)backup_data->holding_regs, + MODBUS_ACTUAL_REG_COUNT * sizeof(uint16_t), + OFFSET_REGS); + + // 使用HAL_GetTick()实现100ms超时机制 + uint32_t start_tick = HAL_GetTick(); + while(!dma_bkpsram_done_flag) + { + if((HAL_GetTick() - start_tick) > 100) // 100ms超时 + { + HAL_DMA_Abort(&hdma_backup); // 超时则中止DMA传输 + break; + } + HAL_Delay(1); // 让出CPU时间 + } + + // 计算CRC校验 + backup_data->holding_crc = 0xffff; +} + +/** + * @brief 从备份SRAM恢复数据 + * @param[out] 无直接输出参数，数据恢复到backup_data->holding_regs + * @return 1-恢复成功, 0-恢复失败 + * @note 恢复MODBUS_ACTUAL_REG_COUNT(76)个uint16_t寄存器数据 + */ +uint8_t BackupSRAM_RestoreData(void) +{ + if(backup_data->holding_crc != 0xffff) + { + //printf("Backup holding registers CRC error\r\n"); + return 0; + } + + /* 确保数据长度为4字节对齐，提高DMA传输效率 */ + uint32_t transfer_len = MODBUS_ACTUAL_REG_COUNT * sizeof(uint16_t); + if(transfer_len % 4 != 0) + { + transfer_len = ((transfer_len + 3) / 4) * 4; // 向上对齐到4字节边界 + } + + // 恢复保持寄存器 + DMA_Start_CopyFromBKPSRAM((uint8_t*)backup_data->holding_regs, + transfer_len, OFFSET_REGS); + + // 使用HAL_GetTick()实现100ms超时机制 + uint32_t start_tick = HAL_GetTick(); + while(!dma_bkpsram_done_flag) + { + if((HAL_GetTick() - start_tick) > 100) // 100ms超时 + { + HAL_DMA_Abort(&hdma_backup); // 超时则中止DMA传输 + return 0; // 超时失败 + } + HAL_Delay(1); // 让出CPU时间 + } + + return 1; // 恢复成功 +} + +/** + * @brief 清除备份SRAM数据 + */ +void BackupSRAM_ClearData(void) +{ + memset((void*)backup_data, 0, sizeof(BackupData_t)); +} + + + diff --git a/PLSR/PLSR/Core/Src/modbus_crc.c b/PLSR/PLSR/Core/Src/modbus_crc.c new file mode 100644 index 0000000..3d74634 --- /dev/null +++ b/PLSR/PLSR/Core/Src/modbus_crc.c @@ -0,0 +1,71 @@ +#include "modbus_crc.h" + +static const uint16_t crc_table[256] = +{ + 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, + 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, + 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, + 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, + 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, + 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, + 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, + 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, + 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, + 0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441, + 0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41, + 0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840, + 0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41, + 0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40, + 0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640, + 0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041, + 0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240, + 0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441, + 0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41, + 0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840, + 0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41, + 0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40, + 0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640, + 0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041, + 0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241, + 0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440, + 0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40, + 0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841, + 0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40, + 0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41, + 0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641, + 0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040 +}; + +/** + * @brief 计算Modbus CRC16校验码 + * @param data 数据指针 + * @param length 数据长度 + * @return CRC16校验码 + */ +uint16_t Modbus_CRC16(uint8_t *data, uint16_t length) +{ + uint16_t crc = 0xFFFF; + + while(length--) + { + crc = (crc >> 8) ^ crc_table[(crc ^ *data++) & 0xFF]; + } + + return crc; +} + +/** + * @brief 检查Modbus帧的CRC校验 + * @param data 帧数据指针 + * @param length 帧长度（包括CRC） + * @return 1:校验正确, 0:校验错误 + */ +uint8_t Modbus_CheckCRC(uint8_t *data, uint16_t length) +{ + if(length < 3) return 0; + + uint16_t crc_calculated = Modbus_CRC16(data, length - 2); + uint16_t crc_received = (data[length-1] << 8) | data[length-2]; + + return (crc_calculated == crc_received) ? 1 : 0; +} \ No newline at end of file diff --git a/PLSR/PLSR/Core/Src/modbus_log.c b/PLSR/PLSR/Core/Src/modbus_log.c new file mode 100644 index 0000000..c2c335d --- /dev/null +++ b/PLSR/PLSR/Core/Src/modbus_log.c @@ -0,0 +1,24 @@ +#include "modbus_log.h" + +uint16_t log_write_index = 0; +ModbusLog modbus_logs[MODBUS_LOG_MAX]; +/*@brief 记录Modbus操作日志 + @param element 软元件类型：0x01=保持寄存器，0x02=线圈，0x03=输入寄存器，0x04=离散输入 + @param func 功能码：0x01, 0x03, 0x10等 + @param addr 操作起始地址 + @param len 数据长度（读写寄存器数） + @param op_type 0x01=读, 0x02=写 + @param err 错误码：0=无错，其它=异常码（如0x02地址非法） + */ +void Modbus_Log(uint8_t element, uint8_t func, uint16_t addr, uint16_t len, uint8_t op_type, uint8_t err) +{ + ModbusLog* log = &modbus_logs[log_write_index]; + log->element_type = element; + log->function_code = func; + log->start_address = addr; + log->data_len = len; + log->operation_type = op_type; + log->error_code = err; + + log_write_index = (log_write_index + 1) % MODBUS_LOG_MAX; +} diff --git a/PLSR/PLSR/Core/Src/tools.c b/PLSR/PLSR/Core/Src/tools.c new file mode 100644 index 0000000..d9946c0 --- /dev/null +++ b/PLSR/PLSR/Core/Src/tools.c @@ -0,0 +1,964 @@ +#include "tim.h" +void PLSR_Fix_Compensated(uint32_t frequency, uint32_t* ccr) +{ + if (frequency >= 100000) // >= 100kHz + { + *ccr *= 1.05f; // 5% 补偿 + } + else if (frequency >= 50000) // 50-100kHz + { + *ccr *= 1.04f; // 3% 补偿 + } + else if (frequency >= 20000) // 20-50kHz + { + *ccr *= 1.02f; // 2% 补偿 + } +} +/** + * @brief 计算定时器参数 + * @param frequency: 目标频率(Hz) + * @param prescaler: 预分频器值指针 + * @param period: 周期值指针 + * @retval None + * @note 根据目标频率计算TIM10的预分频器和周期值 + */ +void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, uint32_t* period) +{ + if (frequency < PLSR_PWM_FREQ_MIN) frequency = PLSR_PWM_FREQ_MIN; + if (frequency > PLSR_PWM_FREQ_MAX) frequency = PLSR_PWM_FREQ_MAX; + uint32_t timer_clock = 0; + if(PlsrRoute.output_port == 0 || PlsrRoute.output_port == 1) + { + timer_clock = 168000000UL; // TIM10/TIM11时钟 (APB2 84MHz) + } + else + { + timer_clock = 84000000UL; // TIM13/TIM14时钟 (APB1 42MHz) + } + uint32_t divider = (timer_clock + frequency / 2) / frequency; // 四舍五入 + if (divider < 2) divider = 2; // 至少 2 + + // 限制 ARR <= 65535 + uint32_t psc = (divider + 65535) / 65536; // 向上取整 + if (psc > 0xFFFF) psc = 0xFFFF; + + uint32_t arr = (divider / psc) - 1; + if (arr < 1) arr = 1; + if (arr > 65535) arr = 65535; + + *prescaler = (uint16_t)(psc - 1); + *period = arr; +} + +// ==================== PLSR 路径计算函数实现 ==================== +//在加速度较小时,可能会出现计算脉冲数为0的情况,此时会导致无法进入加速状态 +/** + * @brief 计算段脉冲数分配(简化版) + * @param route: 路径控制结构体指针 + * @retval None + * @note 为最后一段或等待脉冲结束的段设计，不区分算法类型 + */ +void Calculate_PluseNum_Simplified(PLSR_RouteConfig_t *route) +{ + int32_t accel_pulse_num = 0; // 加速过程脉冲数 + int32_t decel_pulse_num = 0; // 减速过程脉冲数 + int32_t const_pulse_num = 0; // 匀速过程脉冲数 + uint32_t accel_time = 0; // 加速时间(ms) + uint32_t decel_time = 0; // 减速时间(ms) + + // 参数有效性检查 + if (route == NULL || route->current_section_num == 0) return; + + // 边界检查 + if (route->current_section_num > PLSR_MAX_SECTIONS) return; + + // 获取当前段配置（段号从1开始，数组索引从0开始） + PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; + + uint32_t v0 = route->current_freq; // 起始频率 + uint32_t vt = current_section->target_freq; // 目标频率 + uint32_t a = route->accel_rate; // 加速度 + uint32_t d = route->decel_rate; // 减速度 + // 使用实际可发脉冲数，不再区分相对/绝对模式 + int32_t total_pulses = current_section->actual_pulse; // 总脉冲数 + + + // 防止除零错误 + if (a == 0) a = 1; + if (d == 0) d = 1; + + if (vt > v0) + { + // 情况1：目标频率大于当前频率，需要加速 + route->run_state = PLSR_STATE_ACCEL; + + // 计算从v0加速到vt所需的时间和脉冲数 + accel_time = (vt - v0) / a; // 加速时间(ms) + if (accel_time == 0) accel_time = 1; // 至少1ms + + // 加速阶段脉冲数 = (起始频率 + 目标频率) * 时间 / 2000 + // 使用梯形积分公式：面积 = (上底 + 下底) * 高 / 2 + uint64_t temp_accel = (uint64_t)(v0 + vt) * accel_time; + int32_t required_accel_pulses = (int32_t)(temp_accel / 2000); + if(required_accel_pulses == 0) required_accel_pulses = 1; // 至少1个脉冲 + + if (required_accel_pulses <= total_pulses) + { + // 脉冲数足够完成加速，剩余脉冲用于匀速 + accel_pulse_num = required_accel_pulses; + const_pulse_num = total_pulses - required_accel_pulses; + decel_pulse_num = 0; + } + else + { + // 脉冲数不够完成完整加速，全部用于加速 + accel_pulse_num = total_pulses; + const_pulse_num = 0; + decel_pulse_num = 0; + + // 重新计算实际能达到的最大频率 + // 根据：pulses = (v0 + v_actual) * t / 2000，且 t = (v_actual - v0) / a + // 代入得：pulses = (v0 + v_actual) * (v_actual - v0) / (2000 * a) + // 整理得：pulses * 2000 * a = v_actual^2 - v0^2 + // 所以：v_actual^2 = pulses * 2000 * a + v0^2 + + uint64_t v_actual_squared = (uint64_t)total_pulses * 2000ULL * a + (uint64_t)v0 * v0; + + // 检查是否溢出 + if (v_actual_squared <= 0xFFFFFFFFULL) + { + uint32_t v_actual = integer_sqrt_64((uint32_t)v_actual_squared); + + // 确保不超过目标频率 + if (v_actual > vt) + v_actual = vt; + } + } + } + else if (vt < v0) + { + // 情况2：目标频率小于当前频率，需要减速 + route->run_state = PLSR_STATE_DECEL; + + // 计算从v0减速到vt所需的时间和脉冲数 + decel_time = (v0 - vt) / d; // 减速时间(ms) + if (decel_time == 0) decel_time = 1; // 至少1ms + + // 减速阶段脉冲数 = (起始频率 + 目标频率) * 时间 / 2000 + uint64_t temp_decel = (uint64_t)(v0 + vt) * decel_time; + int32_t required_decel_pulses = (int32_t)(temp_decel / 2000); + if(required_decel_pulses == 0) required_decel_pulses = 1; // 至少1个脉冲 + + if (required_decel_pulses <= total_pulses) + { + // 脉冲数足够完成减速，剩余脉冲用于匀速 + decel_pulse_num = required_decel_pulses; + const_pulse_num = total_pulses - required_decel_pulses; + accel_pulse_num = 0; + } + else + { + // 脉冲数不够完成完整减速，全部用于减速 + decel_pulse_num = total_pulses; + const_pulse_num = 0; + accel_pulse_num = 0; + + // 重新计算实际能减速到的最低频率 + // 根据：pulses = (v0 + v_actual) * t / 2000，且 t = (v0 - v_actual) / d + // 代入得：pulses = (v0 + v_actual) * (v0 - v_actual) / (2000 * d) + // 整理得：pulses * 2000 * d = v0^2 - v_actual^2 + // 所以：v_actual^2 = v0^2 - pulses * 2000 * d + + uint64_t v0_squared = (uint64_t)v0 * v0; // 起始频率的平方 + uint64_t reduction = (uint64_t)total_pulses * 2000ULL * d; // 减速所需的脉冲数 + + if (v0_squared > reduction) + { + uint32_t v_actual_squared = (uint32_t)(v0_squared - reduction); + uint32_t v_actual = integer_sqrt_64(v_actual_squared); + + // 确保不低于目标频率（理论上不应该，但防御性编程） + if (v_actual < vt) + v_actual = vt; + } + } + } + else + { + // 情况3：目标频率等于当前频率，全部为匀速 + route->run_state = PLSR_STATE_CONST; + accel_pulse_num = 0; + const_pulse_num = total_pulses; + decel_pulse_num = 0; + } + + // 保存计算结果 + route->accel_pulse_count = accel_pulse_num; + route->const_pulse_count = const_pulse_num; + route->decel_pulse_count = decel_pulse_num; +} + +void Calculate_PluseNum(PLSR_RouteConfig_t *route) +{ + int32_t part1_pulse_num = 0; // 第一部分脉冲数 + int32_t part2_pulse_num = 0; // 第二部分脉冲数 + int32_t part3_pulse_num = 0; // 第三部分脉冲数 + uint32_t part1_time = 0; // 第一部分时间(ms) + uint32_t part3_time = 0; // 第三部分时间(ms) + + // 参数有效性检查 + if (route == NULL || route->current_section_num == 0) return; + + // 边界检查 + if (route->current_section_num > PLSR_MAX_SECTIONS) return; + + // 获取当前段配置（段号从1开始，数组索引从0开始） + PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; + + // 只处理线性加减速算法 + if (route->accel_config.accel_algorithm == PLSR_ACCEL_LINEAR) + { + uint32_t v0 = route->current_freq; // 起始频率 + uint32_t vt_desired = current_section->target_freq; // 期望目标频率 + uint32_t vt = vt_desired; // 实际目标频率（可能会被调整） + uint32_t a = route->accel_rate; // 加速度 + uint32_t d = route->decel_rate; // 减速度 + + // 在PLSR_Section_StartNewSection中已经根据模式计算了actual_pulse + int32_t total_pulses = current_section->actual_pulse; // 总脉冲数 + + // 防止除零错误 + if (a == 0) a = 1; + if (d == 0) d = 1; + + // 初始计算：按理想情况计算各部分脉冲数 + PLSR_RunState_t part1_state = PLSR_STATE_CONST; + PLSR_RunState_t part2_state = PLSR_STATE_CONST; + PLSR_RunState_t part3_state = PLSR_STATE_DECEL; + + // 计算理想情况下的第一部分：v0 -> vt + if (v0 < vt) + { + part1_state = PLSR_STATE_ACCEL; + part1_time = (vt - v0) / a; + if (part1_time == 0) part1_time = 1; + + uint64_t temp_calc = (uint64_t)(v0 + vt) * part1_time; + part1_pulse_num = (uint32_t)(temp_calc / 2000); + if(part1_pulse_num == 0) part1_pulse_num = 1; + } + else if (v0 > vt) + { + part1_state = PLSR_STATE_DECEL; + part1_time = (v0 - vt) / d; + if (part1_time == 0) part1_time = 1; + + uint64_t temp_calc = (uint64_t)(v0 + vt) * part1_time; + part1_pulse_num = (uint32_t)(temp_calc / 2000); + if(part1_pulse_num == 0) part1_pulse_num = 1; + } + else + { + part1_pulse_num = 0; + part1_time = 0; + } + + // 计算理想情况下的第三部分：vt -> 0 + if (vt > 0) + { + part3_time = vt / d; + if (part3_time == 0) part3_time = 1; + + uint64_t temp_calc = (uint64_t)vt * part3_time; + part3_pulse_num = (uint32_t)(temp_calc / 2000); + if(part3_pulse_num == 0) part3_pulse_num = 1; + } + else + { + part3_pulse_num = 0; + part3_time = 0; + } + + // 检查脉冲数是否足够 + int32_t used_pulses = part1_pulse_num + part3_pulse_num; + + if (used_pulses <= total_pulses) + { + // 脉冲数足够，计算匀速部分 + part2_pulse_num = total_pulses - used_pulses; + } + else + { + // 脉冲数不足，需要重新规划运动 + part2_pulse_num = 0; // 没有匀速阶段 + + // 优化策略：寻找最优的中间频率vm，使得总脉冲数刚好等于available_pulses + uint32_t vm = OptimalIntermediateFrequency(v0, vt_desired, total_pulses, a, d); + + if (vm != v0) // 找到了有效的中间频率 + { + vt = vm; // 更新实际目标频率 + + // 重新计算第一部分 + if (v0 < vm) + { + part1_state = PLSR_STATE_ACCEL; + // 使用运动学公式：s = (v0 + vm) * t / 2，其中 t = (vm - v0) / a + // 所以：s = (v0 + vm) * (vm - v0) / (2 * a) = (vm^2 - v0^2) / (2 * a) + uint64_t numerator = (uint64_t)vm * vm - (uint64_t)v0 * v0; + part1_pulse_num = (uint32_t)(numerator / (2000ULL * a)); + if (part1_pulse_num == 0) part1_pulse_num = 1; + + part1_time = (vm - v0) / a; + if (part1_time == 0) part1_time = 1; + } + else if (v0 > vm) + { + part1_state = PLSR_STATE_DECEL; + // 减速情况：s = (v0^2 - vm^2) / (2 * d) + uint64_t numerator = (uint64_t)v0 * v0 - (uint64_t)vm * vm; + part1_pulse_num = (uint32_t)(numerator / (2000ULL * d)); + if (part1_pulse_num == 0) part1_pulse_num = 1; + + part1_time = (v0 - vm) / d; + if (part1_time == 0) part1_time = 1; + } + else + { + part1_state = PLSR_STATE_CONST; + part1_pulse_num = 0; + part1_time = 0; + } + + // 重新计算第三部分：vm -> 0 + if (vm > 0) + { + part3_state = PLSR_STATE_DECEL; + // s = vm^2 / (2 * d) + uint64_t numerator = (uint64_t)vm * vm; + part3_pulse_num = (uint32_t)(numerator / (2000ULL * d)); + if (part3_pulse_num == 0) part3_pulse_num = 1; + + part3_time = vm / d; + if (part3_time == 0) part3_time = 1; + } + else + { + part3_pulse_num = 0; + part3_time = 0; + } + + // 确保总脉冲数完全匹配 + int32_t calculated_total = part1_pulse_num + part3_pulse_num; + if (calculated_total != total_pulses) + { + if (calculated_total > total_pulses) + { + // 脉冲数超出限制，按比例缩减 + if (part1_pulse_num > 0 && part3_pulse_num > 0) + { + // 两个阶段都有脉冲，按比例分配 + part1_pulse_num = ((part1_pulse_num * total_pulses) + calculated_total / 2) / calculated_total; //解决脉冲数过小时导致的问题 + part3_pulse_num = total_pulses - part1_pulse_num; + } + else if (part1_pulse_num > 0) + { + // 只有第一阶段有脉冲 + part1_pulse_num = total_pulses; + } + else if (part3_pulse_num > 0) + { + // 只有第三阶段有脉冲 + part3_pulse_num = total_pulses; + } + } + else + { + // 脉冲数不足，将剩余脉冲分配给匀速阶段 + int32_t remaining_pulses = total_pulses - calculated_total; + + // 将剩余脉冲分配给第二阶段（匀速阶段） + // 这样既不影响加减速的数学精确性，又能充分利用所有脉冲 + part2_pulse_num = remaining_pulses; + + // 更新第二阶段状态为匀速 + part2_state = PLSR_STATE_CONST; + } + } + } + else + { + // 无法找到有效的运动规划，保持当前频率 + part1_state = PLSR_STATE_DECEL; + part1_pulse_num = total_pulses; + part1_time = (total_pulses * 1000) / v0; + part3_pulse_num = 0; + part3_time = 0; + vt = 0; // 实际目标频率等于起始频率 + } + } + + // 保存计算结果到结构体 + if (part1_state == PLSR_STATE_ACCEL) + { + route->accel_pulse_count = part1_pulse_num; + } + else + { + route->accel_pulse_count = (part1_state == PLSR_STATE_DECEL) ? part1_pulse_num : 0; + } + + route->const_pulse_count = part2_pulse_num; + route->decel_pulse_count = part3_pulse_num; + + route->part1_state = part1_state; + route->part2_state = part2_state; + route->part3_state = part3_state; + route->part1_target_freq = vt; + route->part2_target_freq = vt; + route->part3_target_freq = 0; + + // 设置初始运行状态 + if (part1_pulse_num > 0) + { + route->run_state = part1_state; + route->target_freq = vt; + } else if (part2_pulse_num > 0) + { + route->run_state = PLSR_STATE_CONST; + route->target_freq = vt; + } else if (part3_pulse_num > 0) + { + route->run_state = PLSR_STATE_DECEL; + route->target_freq = 0; + } else + { + route->run_state = PLSR_STATE_CONST; + route->target_freq = v0; + } + } +} + + +/** + * @brief 计算最优中间频率 + */ +uint32_t OptimalIntermediateFrequency(uint32_t v0, uint32_t vt_desired, + int32_t total_pulses, uint32_t a, uint32_t d) +{ + if (total_pulses <= 0 || a == 0 || d == 0) { + return v0; // 无法优化 + } + + uint32_t vm = v0; + + // 统一平方项 + uint64_t v0_sq = square_u32(v0); + + if (v0 < vt_desired) + { + // 加速情况 + // 公式：vm^2 = [(total + v0^2/(2a)) * 2ad] / (a+d) + uint64_t rhs = (uint64_t)total_pulses * SCALE_FACTOR + (v0_sq / a); //total*2000 + v0^2/a + uint64_t vm_sq = (rhs * a * d) / (a + d); + + if (vm_sq > 0xFFFFFFFFULL) vm_sq = 0xFFFFFFFFULL; + vm = integer_sqrt_64((uint32_t)vm_sq); + + if (vm > vt_desired * 2) vm = vt_desired * 2; + + // 验证是否超出 total_pulses + uint64_t s1 = (square_u32(vm) - v0_sq) / (SCALE_FACTOR * a); + uint64_t s3 = square_u32(vm) / (SCALE_FACTOR * d); + if (s1 + s3 > (uint64_t)total_pulses) { + vm = BinarySearchOptimalFreq(v0, vt_desired, total_pulses, a, d, 1); + } + + } + else if (v0 > vt_desired) + { + // 减速情况 + uint64_t required = v0_sq / (SCALE_FACTOR * d); + if (required <= (uint64_t)total_pulses) { + vm = (vt_desired < v0) ? vt_desired : v0 / 2; + } else + { + uint64_t reduction = (uint64_t)total_pulses * SCALE_FACTOR * d; + vm = (v0_sq > reduction) ? integer_sqrt_64((uint32_t)(v0_sq - reduction)) : 0; + } + } + + return vm; +} + +/** + * @brief 二分搜索寻找最优频率 + * @param v0 起始频率 + * @param vt_desired 期望目标频率 + * @param total_pulses 可用总脉冲数 + * @param a 加速度 + * @param d 减速度 + * @param is_accel 是否为加速情况 + * @return 最优频率 + */ +uint32_t BinarySearchOptimalFreq(uint32_t v0, uint32_t vt_desired, + int32_t total_pulses, uint32_t a, uint32_t d, + uint8_t is_accel) +{ + uint32_t low = is_accel ? v0 : 0; + uint32_t high = is_accel ? (vt_desired * 2) : v0; + uint32_t best_vm = v0; + + for (int iterations = 0; iterations < 20; iterations++) // 限制迭代次数 + { + uint32_t mid = low + (high - low) / 2; + + // 计算当前频率下的脉冲数 + uint32_t s1, s3; + if (is_accel) + { + s1 = ((uint64_t)mid * mid - (uint64_t)v0 * v0) / (2000ULL * a); + } + else + { + s1 = ((uint64_t)v0 * v0 - (uint64_t)mid * mid) / (2000ULL * d); + } + s3 = ((uint64_t)mid * mid) / (2000ULL * d); + + int32_t total_calc = s1 + s3; + + if (total_calc == total_pulses) { + return mid; // 找到精确解 + } else if (total_calc < total_pulses) { + best_vm = mid; + low = mid + 1; + } else { + high = mid - 1; + } + + if (low > high) break; + } + + return best_vm; +} + + +uint64_t square_u32(uint32_t x) +{ + return (uint64_t)x * (uint64_t)x; +} + +static inline int clzll(uint64_t x) { + if (x == 0) return 64; + uint32_t hi = (uint32_t)(x >> 32); + if (hi) return __CLZ(hi); + else return 32 + __CLZ((uint32_t)x); +} + +uint64_t integer_sqrt_64(uint64_t n) +{ + if (n == 0 || n == 1) return n; + + int bitlen = 64 - clzll(n); + uint64_t x = 1ULL << ((bitlen + 1) / 2); + + for (int i = 0; i < 6; i++) { + uint64_t y = (x + n / x) >> 1; + if (y >= x) break; + x = y; + } + + // 修正 + while ((x+1) > 0 && (x+1) <= UINT64_MAX / (x+1) && (x+1)*(x+1) <= n) x++; + while (x*x > n) x--; + + return x; +} + +/** + * @brief 更新加减速度 + * @param route: 路径控制结构体指针 + * @retval None + * @note 根据默认频率和加减速时间重新计算加减速度 + * 计算得到的加速度单位为Hz/ms，在PLSR_Calculate_FreqByPosition函数中 + * 会将其转换为Hz/s^2以符合物理公式要求 + */ +void PLSR_Accel_UpdateRates(PLSR_RouteConfig_t* route) +{ + if (route == NULL) return; + + // 计算加速度 (Hz/ms) + if (route->default_accel_time_ms > 0) + { + route->accel_rate = route->default_freq / route->default_accel_time_ms; + } + else + { + route->accel_rate = 0; // 避免除零错误 + } + + // 计算减速度 (Hz/ms) + if (route->default_decel_time_ms > 0) + { + route->decel_rate = route->default_freq / route->default_decel_time_ms; + } + else + { + route->decel_rate = 0; // 避免除零错误 + } +} + +/* ==================== 快速立方根近似 ==================== */ +static uint32_t cbrt_approx(uint64_t x) +{ + if (x == 0) return 0; + + /* 使用位操作快速初始估算 */ + uint32_t guess; + if (x >= 1000000000ULL) guess = 1000; + else if (x >= 1000000ULL) guess = 100; + else if (x >= 1000ULL) guess = 10; + else guess = 1; + + /* 牛顿法迭代：x_{n+1} = (2*x_n + a/x_n²) / 3 */ + for (int i = 0; i < 3; i++) { + uint64_t guess_sq = (uint64_t)guess * guess; + if (guess_sq == 0) break; + guess = (uint32_t)((2ULL * guess + x / guess_sq) / 3); + } + + return guess; +} + +/* ==================== S曲线参数初始化函数 ==================== */ +void SCurve_InitializeParameters(PLSR_RouteConfig_t* route) +{ + if (route == NULL) return; + + /* 输入参数验证和预处理 */ + const uint32_t accel_rate = (route->accel_rate == 0) ? 1 : route->accel_rate; // Hz/ms + const uint32_t decel_rate = (route->decel_rate == 0) ? 1 : route->decel_rate; // Hz/ms + + /* ============ 加速段参数计算 ============ */ + uint32_t vel_start_accel = route->initial_freq; + uint32_t vel_target_accel = route->part1_target_freq; + if (vel_target_accel > PLSR_PWM_FREQ_MAX) { + vel_target_accel = PLSR_PWM_FREQ_MAX; + } + + uint32_t delta_vel_accel = (vel_target_accel > vel_start_accel) ? + (vel_target_accel - vel_start_accel) : 0; + + if (delta_vel_accel > 0) { + /* 计算加速时间参数 */ + uint32_t total_accel_time_ms = CLAMP_MIN(delta_vel_accel / accel_rate, 1); + uint32_t jerk_time_ms = CLAMP_MIN(total_accel_time_ms / 2, 1); + + /* 关键公式：Δv = J·Tj²，因此 J = Δv / Tj² */ + uint32_t jerk = (uint32_t)DIV_ROUND((uint64_t)delta_vel_accel * 1000ULL, + (uint64_t)jerk_time_ms * jerk_time_ms); + uint32_t max_accel = (jerk * jerk_time_ms) / 1000; // 转换单位 + + /* 脉冲数计算 - 使用精确积分公式 */ + uint64_t T = jerk_time_ms; + uint64_t T_sq = T * T; + uint64_t T_cu = T_sq * T; + + /* 第一阶段: s₁ = v₀·T + (1/6)·J·T³ */ + uint64_t phase1_displacement = (uint64_t)vel_start_accel * T + + ((uint64_t)jerk * T_cu) / 6000; // 除以6000而不是6是因为单位换算 + uint32_t phase1_pulses = (uint32_t)DIV_ROUND(phase1_displacement, 1000); + + /* 第二阶段：中间速度计算 */ + uint32_t vel_mid = vel_start_accel + (uint32_t)((jerk * T_sq) / 2000); + + /* 第二阶段位移：s₂ = v_mid·T - (1/6)·J·T³ （注意减号，因为是减jerk阶段）*/ + uint64_t phase2_displacement = (uint64_t)vel_mid * T - + ((uint64_t)jerk * T_cu) / 6000; + uint32_t phase2_pulses = (uint32_t)DIV_ROUND(phase2_displacement, 1000); + + /* 归一化到实际脉冲总数，防止舍入误差 */ + uint32_t calculated_total = phase1_pulses + phase2_pulses; + uint32_t actual_total = route->accel_pulse_count; + if (calculated_total != actual_total && calculated_total > 0) { + if (actual_total > calculated_total) { + phase2_pulses += (actual_total - calculated_total); + } else { + phase1_pulses = (uint32_t)(((uint64_t)phase1_pulses * actual_total) / calculated_total); + phase2_pulses = actual_total - phase1_pulses; + } + } + + /* 存储加速段参数 */ + route->scurve.accel_jerk = jerk; + route->scurve.accel_max = max_accel; + route->scurve.accel_jerk_time_ms = jerk_time_ms; + route->scurve.accel_phase1_pulses = phase1_pulses; + route->scurve.accel_phase2_pulses = phase2_pulses; + } else { + /* 无加速段，清零参数 */ + route->scurve.accel_jerk = 0; + route->scurve.accel_max = 0; + route->scurve.accel_jerk_time_ms = 0; + route->scurve.accel_phase1_pulses = 0; + route->scurve.accel_phase2_pulses = 0; + } + + /* ============ 减速段参数计算 ============ */ + uint32_t vel_start_decel = route->initial_freq; + uint32_t vel_target_decel = route->part3_target_freq; + if (vel_start_decel > PLSR_PWM_FREQ_MAX) { + vel_start_decel = PLSR_PWM_FREQ_MAX; + } + + uint32_t delta_vel_decel = (vel_start_decel > vel_target_decel) ? + (vel_start_decel - vel_target_decel) : 0; + + if (delta_vel_decel > 0) { + /* 计算减速时间参数 */ + uint32_t total_decel_time_ms = CLAMP_MIN(delta_vel_decel / decel_rate, 1); + uint32_t jerk_time_ms = CLAMP_MIN(total_decel_time_ms / 2, 1); + + /* 减速jerk计算 */ + uint32_t jerk = (uint32_t)DIV_ROUND((uint64_t)delta_vel_decel * 1000ULL, + (uint64_t)jerk_time_ms * jerk_time_ms); + uint32_t max_decel = (jerk * jerk_time_ms) / 1000; + + /* 减速段脉冲数计算 */ + uint64_t T = jerk_time_ms; + uint64_t T_sq = T * T; + uint64_t T_cu = T_sq * T; + + /* 第一阶段(减速开始): s₁ = v₀·T - (1/6)·J·T³ （减号，因为是减速）*/ + uint64_t phase1_displacement = (uint64_t)vel_start_decel * T - + ((uint64_t)jerk * T_cu) / 6000; + /* 防止负数 */ + if ((int64_t)phase1_displacement < 0) phase1_displacement = 0; + uint32_t phase1_pulses = (uint32_t)DIV_ROUND(phase1_displacement, 1000); + + /* 第二阶段：中间速度 */ + uint32_t vel_mid = (vel_start_decel > (jerk * T_sq) / 2000) ? + vel_start_decel - (jerk * T_sq) / 2000 : 0; + + /* 第二阶段位移：s₂ = v_mid·T + (1/6)·J·T³ （加号，因为是减jerk阶段）*/ + uint64_t phase2_displacement = (uint64_t)vel_mid * T + + ((uint64_t)jerk * T_cu) / 6000; + uint32_t phase2_pulses = (uint32_t)DIV_ROUND(phase2_displacement, 1000); + + /* 归一化到实际脉冲总数 */ + uint32_t calculated_total = phase1_pulses + phase2_pulses; + uint32_t actual_total = route->decel_pulse_count; + if (calculated_total != actual_total && calculated_total > 0) { + if (actual_total > calculated_total) { + phase2_pulses += (actual_total - calculated_total); + } else { + phase1_pulses = (uint32_t)(((uint64_t)phase1_pulses * actual_total) / calculated_total); + phase2_pulses = actual_total - phase1_pulses; + } + } + + /* 存储减速段参数 */ + route->scurve.decel_jerk = jerk; + route->scurve.decel_max = max_decel; + route->scurve.decel_jerk_time_ms = jerk_time_ms; + route->scurve.decel_phase1_pulses = phase1_pulses; + route->scurve.decel_phase2_pulses = phase2_pulses; + } + else + { + /* 无减速段，清零参数 */ + route->scurve.decel_jerk = 0; + route->scurve.decel_max = 0; + route->scurve.decel_jerk_time_ms = 0; + route->scurve.decel_phase1_pulses = 0; + route->scurve.decel_phase2_pulses = 0; + } +} + +/* ==================== 第一阶段多项式求解（加速或减速开始阶段）==================== */ +static uint32_t SCurve_SolvePhase1_Polynomial(uint32_t vel_start, uint32_t jerk, + uint64_t displacement, uint8_t is_deceleration) +{ + if (jerk == 0) return vel_start; + + /* 方程: s = v₀·t ± (1/6)·J·t³ + 对于加速: s = v₀·t + (1/6)·J·t³ (正号) + 对于减速: s = v₀·t - (1/6)·J·t³ (负号) + */ + + if (vel_start == 0) + { + /* 特殊情况：从零速开始 */ + if (is_deceleration) return 0; /* 减速从0开始不合理 */ + + /* 纯立方方程: s = (1/6)·J·t³ => t = ∛(6s/J) */ + uint64_t t_cubed = (6000ULL * displacement) / jerk; /* 乘1000是单位换算 */ + uint32_t time_ms = cbrt_approx(t_cubed); + + /* v = (1/2)·J·t² */ + uint64_t velocity = ((uint64_t)jerk * time_ms * time_ms) / 2000; + return CLAMP_FREQUENCY(velocity); + } + + /* 使用多项式近似求解 */ + /* 设 x = J·s/(v₀³), 则 t/τ ≈ 1 + x/6 - x²/36，其中 τ = s/v₀ */ + uint64_t v0_sq = (uint64_t)vel_start * vel_start; + uint64_t v0_cu = v0_sq * vel_start; + + /* 基础时间估计: τ = s/v₀ */ + uint64_t tau_ms = displacement / vel_start; + + /* 修正项计算: x = J·s/(v₀³) */ + uint64_t x_numerator = (uint64_t)jerk * displacement; + uint64_t x = x_numerator / v0_cu; + + /* 多项式修正: t ≈ τ·(1 + x/6 - x²/36) */ + uint64_t correction = x / 6; + if (x < 36) { /* 防止溢出和负数 */ + uint64_t x_sq = x * x; + if (correction > x_sq / 36) { + correction -= x_sq / 36; + } + } + + uint64_t time_ms = tau_ms + (tau_ms * correction) / 1000; + if (time_ms == 0) time_ms = 1; + + /* 计算速度: v = v₀ ± (1/2)·J·t² */ + uint64_t time_sq = (time_ms * time_ms) / 1000; /* 防止溢出 */ + uint64_t accel_term = ((uint64_t)jerk * time_sq) / 2; + + uint64_t velocity; + if (is_deceleration) { + /* 减速: v = v₀ - (1/2)·J·t² */ + velocity = ((uint64_t)vel_start * 1000 > accel_term) ? + ((uint64_t)vel_start * 1000 - accel_term) / 1000 : 0; + } else { + /* 加速: v = v₀ + (1/2)·J·t² */ + velocity = vel_start + accel_term / 1000; + } + + return CLAMP_FREQUENCY(velocity); +} + +/* ==================== 第二阶段多项式求解（jerk减小阶段）==================== */ +static uint32_t SCurve_SolvePhase2_Polynomial(uint32_t vel_start, uint32_t jerk, + uint32_t jerk_time_ms, uint64_t displacement, + uint8_t is_deceleration) +{ + if (jerk == 0 || jerk_time_ms == 0) return vel_start; + + /* 第二阶段的起点速度计算 */ + uint64_t T_sq = (uint64_t)jerk_time_ms * jerk_time_ms; + uint32_t vel_mid; + + if (is_deceleration) { + /* 减速段：第二阶段起点是第一阶段结束点 */ + vel_mid = ((uint64_t)vel_start * 1000 > (jerk * T_sq) / 2) ? + vel_start - (uint32_t)((jerk * T_sq) / 2000) : 0; + } else { + /* 加速段：第二阶段起点 */ + vel_mid = vel_start + (uint32_t)((jerk * T_sq) / 2000); + } + + /* 第二阶段方程求解 */ + /* 加速第二阶段: s = v_mid·t - (1/6)·J·t³ （减jerk） + 减速第二阶段: s = v_mid·t + (1/6)·J·t³ （减jerk，但整体仍是减速）*/ + + if (vel_mid == 0) { + /* 特殊情况处理 */ + uint64_t t_cubed = (6000ULL * displacement) / jerk; + uint32_t time_ms = cbrt_approx(t_cubed); + + uint64_t velocity; + if (is_deceleration) { + velocity = ((uint64_t)jerk * time_ms * time_ms) / 2000; + } else { + velocity = vel_mid > ((uint64_t)jerk * time_ms * time_ms) / 2000 ? + vel_mid - ((uint64_t)jerk * time_ms * time_ms) / 2000 : 0; + } + return CLAMP_FREQUENCY(velocity); + } + + /* 多项式近似求解 */ + uint64_t v_mid_sq = (uint64_t)vel_mid * vel_mid; + uint64_t v_mid_cu = v_mid_sq * vel_mid; + + /* 基础时间: τ = s/v_mid */ + uint64_t tau_ms = displacement / vel_mid; + + /* 修正项: x = J·s/(v_mid³) */ + uint64_t x = ((uint64_t)jerk * displacement) / v_mid_cu; + + /* 第二阶段的修正（负jerk效应）*/ + uint64_t correction = x / 6; + uint64_t time_ms = (tau_ms > correction) ? tau_ms - correction : tau_ms; + if (time_ms == 0) time_ms = 1; + + /* 计算最终速度 */ + uint64_t time_sq = (time_ms * time_ms) / 1000; + uint64_t jerk_term = ((uint64_t)jerk * time_sq) / 2000; + + uint64_t velocity; + if (is_deceleration) { + /* 减速第二阶段: v = v_mid + (1/2)·J·t² （注意这里是加号，因为jerk方向改变）*/ + velocity = vel_mid + jerk_term; + } else { + /* 加速第二阶段: v = v_mid - (1/2)·J·t² （减jerk阶段）*/ + velocity = (vel_mid > jerk_term) ? vel_mid - jerk_term : 0; + } + + return CLAMP_FREQUENCY(velocity); +} + +/* ==================== 主要的多项式近似速度计算函数 ==================== */ +uint32_t SCurve_CalculateVelocityByPosition_Polynomial(PLSR_RouteConfig_t* route, + uint8_t is_acceleration, + uint32_t executed_pulses) +{ + if (route == NULL) return 0; + + uint32_t vel_start, jerk, jerk_time_ms; + uint32_t phase1_pulses, phase2_pulses; + + if (is_acceleration) { + /* 加速段参数 */ + vel_start = route->initial_freq; + jerk = route->scurve.accel_jerk; + jerk_time_ms = route->scurve.accel_jerk_time_ms; + phase1_pulses = route->scurve.accel_phase1_pulses; + phase2_pulses = route->scurve.accel_phase2_pulses; + } else { + /* 减速段参数 */ + vel_start = route->initial_freq; + jerk = route->scurve.decel_jerk; + jerk_time_ms = route->scurve.decel_jerk_time_ms; + phase1_pulses = route->scurve.decel_phase1_pulses; + phase2_pulses = route->scurve.decel_phase2_pulses; + } + + /* 参数有效性检查 */ + if (jerk == 0 || jerk_time_ms == 0) return vel_start; + if ((phase1_pulses + phase2_pulses) == 0) return vel_start; + + /* 将脉冲转换为位移 (Hz·ms) */ + uint64_t displacement = (uint64_t)executed_pulses * 1000ULL; + + /* 判断当前处于哪个阶段并求解 */ + if (executed_pulses <= phase1_pulses) { + /* 第一阶段：正jerk或负jerk开始 */ + return SCurve_SolvePhase1_Polynomial(vel_start, jerk, displacement, !is_acceleration); + } else if (executed_pulses <= (phase1_pulses + phase2_pulses)) { + /* 第二阶段：jerk减小阶段 */ + uint64_t phase2_displacement = (uint64_t)(executed_pulses - phase1_pulses) * 1000ULL; + return SCurve_SolvePhase2_Polynomial(vel_start, jerk, jerk_time_ms, + phase2_displacement, !is_acceleration); + } else { + /* 超出范围，返回目标速度 */ + if (is_acceleration) { + return CLAMP_FREQUENCY(route->part1_target_freq); + } else { + return CLAMP_FREQUENCY(route->part3_target_freq); + } + } +} \ No newline at end of file diff --git a/PLSR/PLSR/EWARM/settings/test.1.dnx b/PLSR/PLSR/EWARM/settings/test.1.dnx index bdf21f1..6036b0f 100644 --- a/PLSR/PLSR/EWARM/settings/test.1.dnx +++ b/PLSR/PLSR/EWARM/settings/test.1.dnx @@ -12,12 +12,12 @@ 50 - 46232557 - _ 0 _ 0 0 2 + 46232557 + 630028761 diff --git a/PLSR/PLSR/EWARM/test.1.dep b/PLSR/PLSR/EWARM/test.1.dep index da22127..45c4779 100644 --- a/PLSR/PLSR/EWARM/test.1.dep +++ b/PLSR/PLSR/EWARM/test.1.dep @@ -5,670 +5,682 @@ test.1 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_pwr.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rng.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dac.c - $PROJ_DIR$\..\UCOS\Config\app_hooks.c - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_uart.o - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_pwr.o - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c - $PROJ_DIR$\..\UCOS\Ports\os_cpu_c.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c - $PROJ_DIR$\test.1\Obj\stm32f4xx_ll_spi.o - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c - $PROJ_DIR$\..\UCOS\Ports\os_cpu_a.asm - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c - $PROJ_DIR$\..\UCOS\Ports\os_dbg.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_i2c.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_wwdg.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_spi.c - $PROJ_DIR$\..\UCOS\Source\ucos_ii.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_crc.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_wwdg.o - $PROJ_DIR$\test.1\Obj\os_cpu_a.o - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_usart.c - $PROJ_DIR$\test.1\Obj\stm32f4xx_ll_tim.o - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sram.c - $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_timebase_tim.c - $PROJ_DIR$\..\Core\Src\main.c + $PROJ_DIR$\..\Core\Src\usart.c + $PROJ_DIR$\..\Core\Src\tools.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + $PROJ_DIR$\startup_stm32f407xx.s + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c - $PROJ_DIR$\..\Core\Src\modbus_crc.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c - $PROJ_DIR$\..\Core\Src\flash_save.c - $PROJ_DIR$\..\Core\Src\usart.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c - $PROJ_DIR$\..\Core\Src\tim.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c $PROJ_DIR$\..\Core\Src\dma.c - $PROJ_DIR$\..\Core\Src\modbus_log.c - $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c - $PROJ_DIR$\..\Core\Src\stm32f4xx_it.c - $PROJ_DIR$\startup_stm32f407xx.s + $PROJ_DIR$\..\Core\Src\modbus_crc.c $PROJ_DIR$\..\Core\Src\system_stm32f4xx.c + $PROJ_DIR$\..\Core\Src\tim.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c + $PROJ_DIR$\..\Core\Src\flash_save.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_timebase_tim.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + $PROJ_DIR$\..\Core\Src\main.c + $PROJ_DIR$\..\Core\Src\modbus_log.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_it.c $PROJ_DIR$\..\Core\Src\gpio.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c - $PROJ_DIR$\..\Core\Src\tools.c - $PROJ_DIR$\test.1\Obj\flash_save.o - $TOOLKIT_DIR$\inc\c\DLib_Product.h - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h - $PROJ_DIR$\..\Core\Inc\main.h - $PROJ_DIR$\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h - $TOOLKIT_DIR$\inc\c\stdint.h - $TOOLKIT_DIR$\inc\c\iccarm_builtin.h - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h - $PROJ_DIR$\test.1\Exe\test.1.hex - $PROJ_DIR$\..\Drivers\CMSIS\Include\cmsis_version.h - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h - 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$PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_i2c.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_pwr.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c + $PROJ_DIR$\..\UCOS\Ports\os_cpu_c.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sram.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_spi.c + $PROJ_DIR$\..\UCOS\Config\app_hooks.c + $PROJ_DIR$\..\UCOS\Ports\os_cpu_a.asm + $TOOLKIT_DIR$\inc\c\ctype.h + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h + $TOOLKIT_DIR$\lib\m7M_tls.a + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_crc.c + $PROJ_DIR$\..\UCOS\Ports\os_dbg.c + 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+ 98 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dac.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c ICCARM - 113 + 101 - $PROJ_DIR$\..\UCOS\Config\app_hooks.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c ICCARM - 114 + 111 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c ICCARM - 6 + 134 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c ICCARM - 93 + 129 - $PROJ_DIR$\..\UCOS\Ports\os_cpu_c.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c ICCARM - 121 + 160 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c ICCARM - 97 + 110 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + 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$PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c ICCARM - 30 + 113 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_usart.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c ICCARM - 120 + 62 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sram.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_it.c ICCARM - 101 + 133 - $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_timebase_tim.c + $PROJ_DIR$\..\Core\Src\gpio.c ICCARM - 86 + 126 + + + ICCARM + 86 164 173 88 94 153 171 107 146 170 91 112 105 155 168 163 103 119 154 95 142 157 114 102 161 158 167 74 48 67 140 68 79 109 52 85 33 72 141 93 118 139 136 61 47 121 84 89 77 122 132 60 120 125 64 76 128 66 59 81 + + - $PROJ_DIR$\..\Core\Src\main.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c ICCARM - 122 + 130 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_usart.c ICCARM - 74 + 143 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c ICCARM - 7 + 92 - $PROJ_DIR$\..\Core\Src\modbus_crc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_wwdg.c ICCARM - 135 + 156 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c ICCARM - 72 + 162 - $PROJ_DIR$\..\Core\Src\flash_save.c + $PROJ_DIR$\..\UCOS\Source\ucos_ii.c ICCARM - 59 + 152 - $PROJ_DIR$\..\Core\Src\usart.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dac.c ICCARM - 125 + 124 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_i2c.c ICCARM - 150 + 138 - $PROJ_DIR$\..\Core\Src\tim.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_pwr.c ICCARM - 82 + 135 - - - ICCARM - 84 62 66 85 96 71 63 95 76 64 81 92 94 78 60 70 87 88 65 98 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b/PLSR/PLSR/EWARM/test.1/List/test.1.map @@ -0,0 +1,1611 @@ +############################################################################### +# +# IAR ELF Linker V8.40.1.212/W32 for ARM 30/Aug/2025 17:12:07 +# Copyright 2007-2019 IAR Systems AB. +# +# Output file = +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Exe\test.1.out +# Map file = +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\List\test.1.map +# Command line = +# -f C:\Users\Mortal\AppData\Local\Temp\EW24DB.tmp +# (e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\app_hooks.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\dma.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\flash_save.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\gpio.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\main.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\modbus_crc.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\modbus_log.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\os_cpu_a.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\os_cpu_c.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\os_dbg.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\startup_stm32f407xx.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_cortex.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_crc.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_dma.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_dma_ex.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_exti.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_flash.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_flash_ex.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_flash_ramfunc.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_gpio.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_i2c.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_i2c_ex.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_msp.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_pwr.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_pwr_ex.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_rcc.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_rcc_ex.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_sram.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_tim.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_tim_ex.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_timebase_tim.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_uart.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_usart.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_hal_wwdg.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_it.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_crc.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_dac.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_dma.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_exti.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_gpio.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_i2c.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_pwr.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_rcc.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_rng.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_spi.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_tim.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\stm32f4xx_ll_usart.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\system_stm32f4xx.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\tim.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\tools.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\ucos_ii.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\usart.o +# --redirect _Printf=_PrintfFull --redirect _Scanf=_ScanfFull +# --no_out_extension -o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Exe\test.1.out +# --map +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\List\test.1.map +# --config +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/stm32f407xx_flash.icf +# --semihosting --entry __iar_program_start --vfe --enable_stack_usage +# --text_out locale) +# +############################################################################### + +******************************************************************************* +*** MESSAGES +*** + +Warning[Ls014]: [stack usage analysis] at least one function does not have + stack usage information. Example: "OSStartHighRdy". A complete list + of such functions is in the map file. +Warning[Ls016]: [stack usage analysis] the program contains at least one + indirect call. Example: from "HAL_DMA_IRQHandler". A complete list of + such functions is in the map file. + + +******************************************************************************* +*** RUNTIME MODEL ATTRIBUTES +*** + +CppFlavor = * +__SystemLibrary = DLib +__dlib_version = 6 + + +******************************************************************************* +*** HEAP SELECTION +*** + +The basic heap was selected because no calls to memory allocation +functions were found in the application outside of system library +functions, and there are calls to deallocation functions in the +application. + + +******************************************************************************* +*** PLACEMENT SUMMARY +*** + +"A0": place at address 0x800'0000 { ro section .intvec }; +"P1": place in [from 0x800'0000 to 0x80f'ffff] { ro }; +define block CSTACK with size = 4K, alignment = 8 { }; +define block HEAP with size = 1536, alignment = 8 { }; +"P2": place in [from 0x2000'0000 to 0x2001'ffff] { + rw, block CSTACK, block HEAP }; +initialize by copy { rw }; + + Section Kind Address Size Object + ------- ---- ------- ---- ------ +"A0": 0x188 + .intvec ro code 0x800'0000 0x188 startup_stm32f407xx.o [1] + - 0x800'0188 0x188 + +"P1": 0xa263 + .text ro code 0x800'0188 0x1ba4 tim.o [1] + .text ro code 0x800'1d2c 0x66 ABImemset.o [4] + .text ro code 0x800'1d92 0x3a zero_init3.o [4] + .text ro code 0x800'1dcc 0xa22 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'27ee 0x1e xencoding_8859_1.o [2] + .text ro code 0x800'280c 0x250 main.o [1] + .text ro code 0x800'2a5c 0xac stm32f4xx_hal_tim_ex.o [1] + .text ro code 0x800'2b08 0x29c stm32f4xx_hal_gpio.o [1] + .text ro code 0x800'2da4 0x14c stm32f4xx_hal_cortex.o [1] + .text ro code 0x800'2ef0 0x2a8 flash_save.o [1] + .text ro code 0x800'3198 0xa7c tools.o [1] + .text ro code 0x800'3c14 0x28 stm32f4xx_hal.o [1] + .text ro code 0x800'3c3c 0x15c gpio.o [1] + .text ro code 0x800'3d98 0x15dc ucos_ii.o [1] + .text ro code 0x800'5374 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'5376 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'5378 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'537a 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'537c 0x2 stm32f4xx_hal_tim_ex.o [1] + .text ro code 0x800'537e 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'5380 0x2 stm32f4xx_hal_tim_ex.o [1] + .rodata const 0x800'5382 0x2 os_dbg.o [1] + .text ro code 0x800'5384 0x34 stm32f4xx_hal.o [1] + .text ro code 0x800'53b8 0x924 usart.o [1] + .text ro code 0x800'5cdc 0x40 dma.o [1] + .text ro code 0x800'5d1c 0x3ec stm32f4xx_hal_rcc.o [1] + .text ro code 0x800'6108 0x260 stm32f4xx_hal_rcc.o [1] + .text ro code 0x800'6368 0x190 os_cpu_c.o [1] + .text ro code 0x800'64f8 0x1c stm32f4xx_hal_pwr.o [1] + .text ro code 0x800'6514 0x544 stm32f4xx_hal_dma.o [1] + .text ro code 0x800'6a58 0x38 stm32f4xx_hal_pwr_ex.o [1] + .text ro code 0x800'6a90 0xc stm32f4xx_hal.o [1] + .text ro code 0x800'6a9c 0x230 I64DivMod.o [4] + .text ro code 0x800'6ccc 0x22 I64Shl.o [4] + .rodata const 0x800'6cee 0x2 os_dbg.o [1] + CODE ro code 0x800'6cf0 0xc4 os_cpu_a.o [1] + .text ro code 0x800'6db4 0x1c0 os_dbg.o [1] + .text ro code 0x800'6f74 0xc0 stm32f4xx_hal_timebase_tim.o [1] + .text ro code 0x800'7034 0x48 stm32f4xx_hal_msp.o [1] + .text ro code 0x800'707c 0xdb4 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'7e30 0xa6 ABImemcpy.o [4] + .rodata const 0x800'7ed6 0x2 os_dbg.o [1] + .text ro code 0x800'7ed8 0x38 modbus_crc.o [1] + .text ro code 0x800'7f10 0x44 modbus_log.o [1] + .text ro code 0x800'7f54 0x10 app_hooks.o [1] + .text ro code 0x800'7f64 0x2 I64DivZer.o [4] + .text ro code 0x800'7f66 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'7f68 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'7f6a 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'7f6c 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'7f6e 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'7f70 0x10c6 xprintffull.o [2] + .rodata const 0x800'9036 0x2 os_dbg.o [1] + .text ro code 0x800'9038 0x7c xlocale_c.o [2] + .text ro code 0x800'90b4 0x16 strchr.o [4] + .rodata const 0x800'90ca 0x2 os_dbg.o [1] + .text ro code 0x800'90cc 0x40 xfail_s.o [2] + .text ro code 0x800'910c 0x36 strlen.o [4] + .rodata const 0x800'9142 0x2 os_dbg.o [1] + .text ro code 0x800'9144 0x58 memchr.o [4] + .text ro code 0x800'919c 0x70 frexp.o [3] + .text ro code 0x800'920c 0x2e DblCmpLe.o [3] + .rodata const 0x800'923a 0x2 os_dbg.o [1] + .text ro code 0x800'923c 0x2e DblCmpGe.o [3] + .rodata const 0x800'926a 0x2 os_dbg.o [1] + .text ro code 0x800'926c 0x13a ldexp.o [3] + .rodata const 0x800'93a6 0x2 os_dbg.o [1] + .text ro code 0x800'93a8 0x3a DblToS32.o [3] + .rodata const 0x800'93e2 0x2 os_dbg.o [1] + .text ro code 0x800'93e4 0x22 S32ToDbl.o [3] + .rodata const 0x800'9406 0x2 os_dbg.o [1] + .text ro code 0x800'9408 0xe2 DblSub.o [3] + .rodata const 0x800'94ea 0x2 os_dbg.o [1] + .text ro code 0x800'94ec 0x246 DblDiv.o [3] + .rodata const 0x800'9732 0x2 os_dbg.o [1] + .text ro code 0x800'9734 0x28 DblToU32.o [3] + .text ro code 0x800'975c 0x1a U32ToDbl.o [3] + .rodata const 0x800'9776 0x2 os_dbg.o [1] + .text ro code 0x800'9778 0x1a2 DblMul.o [3] + .text ro code 0x800'991a 0xa xmbcurmax.o [2] + .text ro code 0x800'9924 0x6 abort.o [2] + .rodata const 0x800'992a 0x2 os_dbg.o [1] + .text ro code 0x800'992c 0x16a DblAdd.o [3] + .rodata const 0x800'9a96 0x2 os_dbg.o [1] + .text ro code 0x800'9a98 0x14 exit.o [5] + .rodata const 0x800'9aac 0x200 modbus_crc.o [1] + .rodata const 0x800'9cac 0x130 flash_save.o [1] + .rodata const 0x800'9ddc 0x100 ucos_ii.o [1] + .text ro code 0x800'9edc 0xf2 stm32f4xx_it.o [1] + .rodata const 0x800'9fce 0x2 os_dbg.o [1] + .text ro code 0x800'9fd0 0x28 printf.o [2] + .text ro code 0x800'9ff8 0x18 stm32f4xx_hal.o [1] + .text ro code 0x800'a010 0x78 lz77_init_single.o [4] + .rodata const 0x800'a088 0x28 stm32f4xx_it.o [1] + .text ro code 0x800'a0b0 0x28 data_init.o [4] + .text ro code 0x800'a0d8 0x22 fpinit_M.o [3] + .iar.init_table const 0x800'a0fc 0x20 - Linker created - + .rodata const 0x800'a11c 0x2 os_dbg.o [1] + .text ro code 0x800'a120 0x1e cmain.o [4] + .text ro code 0x800'a13e 0x4 low_level_init.o [2] + .text ro code 0x800'a142 0x4 exit.o [2] + .rodata const 0x800'a146 0x2 os_dbg.o [1] + .text ro code 0x800'a148 0xa cexit.o [4] + .text ro code 0x800'a152 0x16 xprout.o [2] + .text ro code 0x800'a168 0xc putchar.o [2] + .rodata const 0x800'a174 0x14 ucos_ii.o [1] + .rodata const 0x800'a188 0x14 ucos_ii.o [1] + .rodata const 0x800'a19c 0x10 system_stm32f4xx.o [1] + .rodata const 0x800'a1ac 0x10 ucos_ii.o [1] + .rodata const 0x800'a1bc 0x10 ucos_ii.o [1] + .rodata const 0x800'a1cc 0x10 ucos_ii.o [1] + .text ro code 0x800'a1dc 0x10 startup_stm32f407xx.o [1] + .text ro code 0x800'a1ec 0x10 system_stm32f4xx.o [1] + .text ro code 0x800'a1fc 0xc cstartup_M.o [4] + .rodata const 0x800'a208 0x8 stm32f4xx_hal_dma.o [1] + .rodata const 0x800'a210 0x8 system_stm32f4xx.o [1] + .rodata const 0x800'a218 0x4 os_dbg.o [1] + .text ro code 0x800'a21c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a220 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a224 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a228 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a22c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a230 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a234 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a238 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a23c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a240 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a244 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a248 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a24c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a250 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a254 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a258 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a25c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a260 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a264 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a268 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a26c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a270 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a274 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a278 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a27c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a280 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a284 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a288 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a28c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a290 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a294 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a298 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a29c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2a0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2a4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2a8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2ac 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2b0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2b4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2b8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2bc 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2c0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2c4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2c8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2cc 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2d0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2d4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2d8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2dc 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2e0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2e4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2e8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2ec 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2f0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2f4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2f8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a2fc 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a300 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a304 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a308 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a30c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a310 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a314 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a318 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a31c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a320 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a324 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a328 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a32c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a330 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a334 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'a338 0x4 startup_stm32f407xx.o [1] + .rodata const 0x800'a33c 0x2 os_dbg.o [1] + .rodata const 0x800'a33e 0x2 os_dbg.o [1] + .rodata const 0x800'a340 0x2 os_dbg.o [1] + .rodata const 0x800'a342 0x2 os_dbg.o [1] + .rodata const 0x800'a344 0x2 os_dbg.o [1] + .rodata const 0x800'a346 0x2 os_dbg.o [1] + .rodata const 0x800'a348 0x2 os_dbg.o [1] + .rodata const 0x800'a34a 0x2 os_dbg.o [1] + .rodata const 0x800'a34c 0x2 os_dbg.o [1] + .rodata const 0x800'a34e 0x2 os_dbg.o [1] + .rodata const 0x800'a350 0x2 os_dbg.o [1] + .rodata const 0x800'a352 0x2 os_dbg.o [1] + .rodata const 0x800'a354 0x2 os_dbg.o [1] + .rodata const 0x800'a356 0x2 os_dbg.o [1] + .rodata const 0x800'a358 0x2 os_dbg.o [1] + .rodata const 0x800'a35a 0x2 os_dbg.o [1] + .rodata const 0x800'a35c 0x2 os_dbg.o [1] + .rodata const 0x800'a35e 0x2 os_dbg.o [1] + .rodata const 0x800'a360 0x2 os_dbg.o [1] + .rodata const 0x800'a362 0x2 os_dbg.o [1] + .rodata const 0x800'a364 0x2 os_dbg.o [1] + .rodata const 0x800'a366 0x2 os_dbg.o [1] + .rodata const 0x800'a368 0x2 os_dbg.o [1] + .rodata const 0x800'a36a 0x2 os_dbg.o [1] + .rodata const 0x800'a36c 0x2 os_dbg.o [1] + .rodata const 0x800'a36e 0x2 os_dbg.o [1] + .rodata const 0x800'a370 0x2 os_dbg.o [1] + .rodata const 0x800'a372 0x2 os_dbg.o [1] + .rodata const 0x800'a374 0x2 os_dbg.o [1] + .rodata const 0x800'a376 0x2 os_dbg.o [1] + .rodata const 0x800'a378 0x2 os_dbg.o [1] + .rodata const 0x800'a37a 0x2 os_dbg.o [1] + .rodata const 0x800'a37c 0x2 os_dbg.o [1] + .rodata const 0x800'a37e 0x2 os_dbg.o [1] + .rodata const 0x800'a380 0x2 os_dbg.o [1] + .rodata const 0x800'a382 0x2 os_dbg.o [1] + .rodata const 0x800'a384 0x2 xlocale_c.o [2] + .rodata const 0x800'a386 0x2 xlocale_c.o [2] + .rodata const 0x800'a388 0x1 xlocale_c.o [2] + .rodata const 0x800'a389 0x0 zero_init3.o [4] + .rodata const 0x800'a389 0x0 lz77_init_single.o [4] + Initializer bytes const 0x800'a389 0x62 + - 0x800'a3eb 0xa263 + +"P2", part 1 of 3: 0xe2 + P2-1 0x2000'0000 0xe2 + .data inited 0x2000'0000 0x4 flash_save.o [1] + .data inited 0x2000'0004 0x4 stm32f4xx_hal.o [1] + .data inited 0x2000'0008 0x4 system_stm32f4xx.o [1] + .data inited 0x2000'000c 0x4 tim.o [1] + .data inited 0x2000'0010 0x4 tim.o [1] + .data inited 0x2000'0014 0x38 xlocale_c.o [2] + .data inited 0x2000'004c 0x48 xlocale_c.o [2] + .data inited 0x2000'0094 0x48 xfiles.o [2] + .data inited 0x2000'00dc 0x1 stm32f4xx_hal.o [1] + .data inited 0x2000'00dd 0x1 tim.o [1] + .data inited 0x2000'00de 0x1 tim.o [1] + .data inited 0x2000'00df 0x1 tim.o [1] + .data inited 0x2000'00e0 0x1 tim.o [1] + .data inited 0x2000'00e1 0x1 tim.o [1] + - 0x2000'00e2 0xe2 + +"P2", part 2 of 3: 0x3448 + .bss zero 0x2000'00e4 0x7e8 ucos_ii.o [1] + .bss zero 0x2000'08cc 0x400 main.o [1] + .bss zero 0x2000'0ccc 0x400 main.o [1] + .bss zero 0x2000'10cc 0x400 main.o [1] + .bss zero 0x2000'14cc 0x400 modbus_log.o [1] + .bss zero 0x2000'18cc 0x400 ucos_ii.o [1] + .bss zero 0x2000'1ccc 0x400 ucos_ii.o [1] + .bss zero 0x2000'20cc 0x280 ucos_ii.o [1] + .bss zero 0x2000'234c 0x200 main.o [1] + .bss zero 0x2000'254c 0x200 os_cpu_c.o [1] + .bss zero 0x2000'274c 0x200 ucos_ii.o [1] + .bss zero 0x2000'294c 0x138 tim.o [1] + .bss zero 0x2000'2a84 0x100 ucos_ii.o [1] + .bss zero 0x2000'2b84 0x100 usart.o [1] + .bss zero 0x2000'2c84 0x100 usart.o [1] + .bss zero 0x2000'2d84 0x100 usart.o [1] + .bss zero 0x2000'2e84 0xf0 ucos_ii.o [1] + .bss zero 0x2000'2f74 0x78 ucos_ii.o [1] + .bss zero 0x2000'2fec 0x60 flash_save.o [1] + .bss zero 0x2000'304c 0x60 ucos_ii.o [1] + .bss zero 0x2000'30ac 0x60 usart.o [1] + .bss zero 0x2000'310c 0x60 usart.o [1] + .bss zero 0x2000'316c 0x50 ucos_ii.o [1] + .bss zero 0x2000'31bc 0x50 xfiles.o [2] + .bss zero 0x2000'320c 0x48 stm32f4xx_hal_timebase_tim.o [1] + .bss zero 0x2000'3254 0x48 tim.o [1] + .bss zero 0x2000'329c 0x48 tim.o [1] + .bss zero 0x2000'32e4 0x48 tim.o [1] + .bss zero 0x2000'332c 0x48 tim.o [1] + .bss zero 0x2000'3374 0x48 tim.o [1] + .bss zero 0x2000'33bc 0x48 tim.o [1] + .bss zero 0x2000'3404 0x48 usart.o [1] + .bss zero 0x2000'344c 0x40 ucos_ii.o [1] + .bss zero 0x2000'348c 0x8 ucos_ii.o [1] + .bss zero 0x2000'3494 0x4 gpio.o [1] + .bss zero 0x2000'3498 0x4 os_cpu_c.o [1] + .bss zero 0x2000'349c 0x4 stm32f4xx_hal.o [1] + .bss zero 0x2000'34a0 0x4 tim.o [1] + .bss zero 0x2000'34a4 0x4 tim.o [1] + .bss zero 0x2000'34a8 0x4 tim.o [1] + .bss zero 0x2000'34ac 0x4 tim.o [1] + .bss zero 0x2000'34b0 0x4 tim.o [1] + .bss zero 0x2000'34b4 0x4 tim.o [1] + .bss zero 0x2000'34b8 0x4 tim.o [1] + .bss zero 0x2000'34bc 0x4 tim.o [1] + .bss zero 0x2000'34c0 0x4 ucos_ii.o [1] + .bss zero 0x2000'34c4 0x4 ucos_ii.o [1] + .bss zero 0x2000'34c8 0x4 ucos_ii.o [1] + .bss zero 0x2000'34cc 0x4 ucos_ii.o [1] + .bss zero 0x2000'34d0 0x4 ucos_ii.o [1] + .bss zero 0x2000'34d4 0x4 ucos_ii.o [1] + .bss zero 0x2000'34d8 0x4 ucos_ii.o [1] + .bss zero 0x2000'34dc 0x4 ucos_ii.o [1] + .bss zero 0x2000'34e0 0x4 ucos_ii.o [1] + .bss zero 0x2000'34e4 0x4 ucos_ii.o [1] + .bss zero 0x2000'34e8 0x4 ucos_ii.o [1] + .bss zero 0x2000'34ec 0x4 ucos_ii.o [1] + .bss zero 0x2000'34f0 0x4 ucos_ii.o [1] + .bss zero 0x2000'34f4 0x4 ucos_ii.o [1] + .bss zero 0x2000'34f8 0x4 ucos_ii.o [1] + .bss zero 0x2000'34fc 0x4 ucos_ii.o [1] + .bss zero 0x2000'3500 0x4 ucos_ii.o [1] + .bss zero 0x2000'3504 0x4 xfail_s.o [2] + .bss zero 0x2000'3508 0x2 modbus_log.o [1] + .bss zero 0x2000'350a 0x2 os_cpu_c.o [1] + .bss zero 0x2000'350c 0x2 ucos_ii.o [1] + .bss zero 0x2000'350e 0x2 ucos_ii.o [1] + .bss zero 0x2000'3510 0x2 usart.o [1] + .bss zero 0x2000'3512 0x2 usart.o [1] + .bss zero 0x2000'3514 0x2 usart.o [1] + .bss zero 0x2000'3516 0x2 usart.o [1] + .bss zero 0x2000'3518 0x1 flash_save.o [1] + .bss zero 0x2000'3519 0x1 gpio.o [1] + .bss zero 0x2000'351a 0x1 tim.o [1] + .bss zero 0x2000'351b 0x1 tim.o [1] + .bss zero 0x2000'351c 0x1 tim.o [1] + .bss zero 0x2000'351d 0x1 ucos_ii.o [1] + .bss zero 0x2000'351e 0x1 ucos_ii.o [1] + .bss zero 0x2000'351f 0x1 ucos_ii.o [1] + .bss zero 0x2000'3520 0x1 ucos_ii.o [1] + .bss zero 0x2000'3521 0x1 ucos_ii.o [1] + .bss zero 0x2000'3522 0x1 ucos_ii.o [1] + .bss zero 0x2000'3523 0x1 ucos_ii.o [1] + .bss zero 0x2000'3524 0x1 ucos_ii.o [1] + .bss zero 0x2000'3525 0x1 ucos_ii.o [1] + .bss zero 0x2000'3526 0x1 ucos_ii.o [1] + .bss zero 0x2000'3527 0x1 ucos_ii.o [1] + .bss zero 0x2000'3528 0x1 usart.o [1] + .bss zero 0x2000'3529 0x1 usart.o [1] + - 0x2000'352a 0x3446 + +"P2", part 3 of 3: 0x1000 + CSTACK 0x2000'3530 0x1000 + CSTACK uninit 0x2000'3530 0x1000 + - 0x2000'4530 0x1000 + +Unused ranges: + + From To Size + ---- -- ---- + 0x800'a3eb 0x80f'ffff 0xf'5c15 + 0x2000'00e2 0x2000'00e3 0x2 + 0x2000'352c 0x2000'352f 0x4 + 0x2000'4530 0x2001'ffff 0x1'bad0 + + +******************************************************************************* +*** INIT TABLE +*** + + Address Size + ------- ---- +Zero (__iar_zero_init3) + 1 destination range, total size 0x3446: + 0x2000'00e4 0x3446 + +Copy/lz77 (__iar_lz77_init_single3) + 1 source range, total size 0x62 (43% of destination): + 0x800'a389 0x62 + 1 destination range, total size 0xe2: + 0x2000'0000 0xe2 + + +******************************************************************************* +*** STACK USAGE +*** + + Call Graph Root Category Max Use Total Use + ------------------------ ------- --------- + Program entry 284 284 + Uncalled function 696 3'868 + + +Program entry + "__iar_program_start": 0x800'a1fd + + Maximum call chain *?* 284 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "__iar_program_start" 0 + "__cmain" 0 + "main" 32 + "SystemClock_Config" 80 + "HAL_RCC_ClockConfig" 24 + "HAL_InitTick" 64 + "HAL_TIM_Base_Init" 8 + "HAL_TIM_Base_MspInit" 40 + "HAL_NVIC_SetPriority" 24 + "NVIC_EncodePriority" in stm32f4xx_hal_cortex.o [1] + 12 + +Uncalled function + "KeyTask" in main.o [1]: 0x800'29d5 + + Maximum call chain *?* 268 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "KeyTask" in main.o [1] 16 + "PLSR_Route_Start" 16 + "PLSR_Section_StartNewSection" 16 + "Calculate_PluseNum" 88 + "OptimalIntermediateFrequency" 80 + "BinarySearchOptimalFreq" 52 + "__aeabi_uldivmod" 0 + "__aeabi_ldiv0" 0 + +Uncalled function + "MODBUSTask" in main.o [1]: 0x800'29bd + + Maximum call chain *?* 696 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "MODBUSTask" in main.o [1] 8 + "Modbus_Process" 280 + "Modbus_Process_Read_Holding_Regs" in usart.o [1] + 288 + "Modbus_Send_Exception" in usart.o [1] 24 + "USART1_SendData_DMA" 32 + "HAL_UART_Transmit_DMA" 24 + "HAL_DMA_Start_IT" 32 + "DMA_SetConfig" in stm32f4xx_hal_dma.o [1] 8 + +Uncalled function + "StartupTask" in main.o [1]: 0x800'2915 + + Maximum call chain *?* 160 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "StartupTask" in main.o [1] 40 + "OSTaskCreateExt" 64 + "OS_TCBInit" 48 + "OSTCBInitHook" 8 + "App_TCBInitHook" 0 + +Uncalled function + "OSTaskSwHook": 0x800'6457 + + Maximum call chain 8 bytes + + "OSTaskSwHook" 8 + "App_TaskSwHook" 0 + +Uncalled function + "UART_DMAAbortOnError" in stm32f4xx_hal_uart.o [1]: 0x800'7989 + + Maximum call chain 16 bytes + + "UART_DMAAbortOnError" in stm32f4xx_hal_uart.o [1] + 16 + "HAL_UART_ErrorCallback" 0 + +Uncalled function + "UART_DMAError" in stm32f4xx_hal_uart.o [1]: 0x800'7759 + + Maximum call chain 24 bytes + + "UART_DMAError" in stm32f4xx_hal_uart.o [1] 24 + "UART_EndTxTransfer" in stm32f4xx_hal_uart.o [1] + 0 + +Uncalled function + "UART_DMAReceiveCplt" in stm32f4xx_hal_uart.o [1]: 0x800'7689 + + Maximum call chain 16 bytes + + "UART_DMAReceiveCplt" in stm32f4xx_hal_uart.o [1] + 16 + "HAL_UARTEx_RxEventCallback" 0 + +Uncalled function + "UART_DMARxHalfCplt" in stm32f4xx_hal_uart.o [1]: 0x800'7733 + + Maximum call chain 16 bytes + + "UART_DMARxHalfCplt" in stm32f4xx_hal_uart.o [1] + 16 + "HAL_UARTEx_RxEventCallback" 0 + +Uncalled function + "UART_DMATransmitCplt" in stm32f4xx_hal_uart.o [1]: 0x800'7627 + + Maximum call chain 16 bytes + + "UART_DMATransmitCplt" in stm32f4xx_hal_uart.o [1] + 16 + "HAL_UART_TxCpltCallback" 0 + +Uncalled function + "UART_DMATxHalfCplt" in stm32f4xx_hal_uart.o [1]: 0x800'767b + + Maximum call chain 16 bytes + + "UART_DMATxHalfCplt" in stm32f4xx_hal_uart.o [1] + 16 + "HAL_UART_TxHalfCpltCallback" 0 + +Uncalled function + "BusFault_Handler": 0x800'9eff + + Maximum call chain 0 bytes + + "BusFault_Handler" 0 + +Uncalled function + "DMA2_Stream0_IRQHandler": 0x800'9f79 + + Maximum call chain *?* 32 bytes + (** call graph contains indirect calls (example: "HAL_DMA_IRQHandler") + functions with no stack usage info (example: "OSIntCtxSw") **) + + "DMA2_Stream0_IRQHandler" 8 + "HAL_DMA_IRQHandler" 24 + +Uncalled function + "DMA2_Stream2_IRQHandler": 0x800'9f55 + + Maximum call chain *?* 32 bytes + (** call graph contains indirect calls (example: "HAL_DMA_IRQHandler") + functions with no stack usage info (example: "OSIntCtxSw") **) + + "DMA2_Stream2_IRQHandler" 8 + "HAL_DMA_IRQHandler" 24 + +Uncalled function + "DMA2_Stream7_IRQHandler": 0x800'9f67 + + Maximum call chain *?* 32 bytes + (** call graph contains indirect calls (example: "HAL_DMA_IRQHandler") + functions with no stack usage info (example: "OSIntCtxSw") **) + + "DMA2_Stream7_IRQHandler" 8 + "HAL_DMA_IRQHandler" 24 + +Uncalled function + "DebugMon_Handler": 0x800'9f05 + + Maximum call chain 0 bytes + + "DebugMon_Handler" 0 + +Uncalled function + "EXTI15_10_IRQHandler": 0x800'9fc3 + + Maximum call chain *?* 112 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "EXTI15_10_IRQHandler" 8 + "HAL_GPIO_EXTI_IRQHandler" 8 + "HAL_GPIO_EXTI_Callback" 16 + "PLSR_SectionSwitchSignal" 8 + "OSSemPost" 16 + "OS_EventTaskRdy" 40 + "OS_EventTaskRemoveMulti" 16 + +Uncalled function + "EXTI9_5_IRQHandler": 0x800'9fb9 + + Maximum call chain *?* 112 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "EXTI9_5_IRQHandler" 8 + "HAL_GPIO_EXTI_IRQHandler" 8 + "HAL_GPIO_EXTI_Callback" 16 + "PLSR_SectionSwitchSignal" 8 + "OSSemPost" 16 + "OS_EventTaskRdy" 40 + "OS_EventTaskRemoveMulti" 16 + +Uncalled function + "HardFault_Handler": 0x800'9edf + + Maximum call chain 624 bytes + + "HardFault_Handler" 24 + "printf" 24 + "_PrintfFull" 240 + "_PutstrFull" in xprintffull.o [2] 176 + "_PuttxtFull" in xprintffull.o [2] 32 + "_PutcharsFull" in xprintffull.o [2] 24 + "_Prout" 16 + "putchar" 0 + "fputc" 16 + "HAL_UART_Transmit" 40 + "UART_WaitOnFlagUntilTimeout" in stm32f4xx_hal_uart.o [1] + 32 + "UART_EndRxTransfer" in stm32f4xx_hal_uart.o [1] + 0 + +Uncalled function + "MemManage_Handler": 0x800'9efd + + Maximum call chain 0 bytes + + "MemManage_Handler" 0 + +Uncalled function + "NMI_Handler": 0x800'9edd + + Maximum call chain 0 bytes + + "NMI_Handler" 0 + +Uncalled function + "PendSV_Handler": 0x800'9f07 + + Maximum call chain *?* 8 bytes + (** call graph contains functions with no stack usage info (example: "OS_CPU_PendSVHandler") **) + + "PendSV_Handler" 8 + "OS_CPU_PendSVHandler" - no info - + +Uncalled function + "SVC_Handler": 0x800'9f03 + + Maximum call chain 0 bytes + + "SVC_Handler" 0 + +Uncalled function + "SysTick_Handler": 0x800'9f0f + + Maximum call chain *?* 128 bytes + (** call graph contains functions with no stack usage info (example: "OSIntCtxSw") **) + + "SysTick_Handler" 8 + "OS_CPU_SysTickHandler" 8 + "OSTimeTick" 24 + "OSTimeTickHook" 8 + "OSTmrSignal" 8 + "OSSemPost" 16 + "OS_EventTaskRdy" 40 + "OS_EventTaskRemoveMulti" 16 + +Uncalled function + "TIM1_UP_TIM10_IRQHandler": 0x800'9f1b + + Maximum call chain *?* 300 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "TIM1_UP_TIM10_IRQHandler" 8 + "HAL_TIM_IRQHandler" 16 + "HAL_TIM_PeriodElapsedCallback" 40 + "PLSR_Section_StartNewSection" 16 + "Calculate_PluseNum" 88 + "OptimalIntermediateFrequency" 80 + "BinarySearchOptimalFreq" 52 + "__aeabi_uldivmod" 0 + "__aeabi_ldiv0" 0 + +Uncalled function + "TIM2_IRQHandler": 0x800'9f41 + + Maximum call chain *?* 300 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "TIM2_IRQHandler" 8 + "HAL_TIM_IRQHandler" 16 + "HAL_TIM_PeriodElapsedCallback" 40 + "PLSR_Section_StartNewSection" 16 + "Calculate_PluseNum" 88 + "OptimalIntermediateFrequency" 80 + "BinarySearchOptimalFreq" 52 + "__aeabi_uldivmod" 0 + "__aeabi_ldiv0" 0 + +Uncalled function + "TIM6_DAC_IRQHandler": 0x800'9f4b + + Maximum call chain *?* 300 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "TIM6_DAC_IRQHandler" 8 + "HAL_TIM_IRQHandler" 16 + "HAL_TIM_PeriodElapsedCallback" 40 + "PLSR_Section_StartNewSection" 16 + "Calculate_PluseNum" 88 + "OptimalIntermediateFrequency" 80 + "BinarySearchOptimalFreq" 52 + "__aeabi_uldivmod" 0 + "__aeabi_ldiv0" 0 + +Uncalled function + "USART1_IRQHandler": 0x800'9f2b + + Maximum call chain *?* 112 bytes + (** call graph contains indirect calls (example: "HAL_UART_IRQHandler") + functions with no stack usage info (example: "OSIntCtxSw") **) + + "USART1_IRQHandler" 8 + "USART1_IDLE_IRQHandler" 24 + "HAL_UART_Receive_DMA" 16 + "UART_Start_Receive_DMA" 24 + "HAL_DMA_Start_IT" 32 + "DMA_SetConfig" in stm32f4xx_hal_dma.o [1] 8 + +Uncalled function + "UsageFault_Handler": 0x800'9f01 + + Maximum call chain 0 bytes + + "UsageFault_Handler" 0 + +Uncalled function + "SystemInit": 0x800'a1ed + + Maximum call chain 0 bytes + + "SystemInit" 0 + +Uncalled function + "PLSR_SectionSwitchTask": 0x800'1cdb + + Maximum call chain *?* 276 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "PLSR_SectionSwitchTask" 16 + "PLSR_TaskSectionSwitch" 24 + "PLSR_Section_StartNewSection" 16 + "Calculate_PluseNum" 88 + "OptimalIntermediateFrequency" 80 + "BinarySearchOptimalFreq" 52 + "__aeabi_uldivmod" 0 + "__aeabi_ldiv0" 0 + +Uncalled function + "OSTmr_Task" in ucos_ii.o [1]: 0x800'52ad + + Maximum call chain *?* 92 bytes + (** call graph contains indirect calls (example: "OSTmr_Task" in ucos_ii.o [1]) + functions with no stack usage info (example: "OS_CPU_SR_Restore") **) + + "OSTmr_Task" in ucos_ii.o [1] 40 + "OSSemPend" 32 + "OS_Sched" 16 + "OS_SchedNew" in ucos_ii.o [1] 4 + +Uncalled function + "OS_TaskIdle": 0x800'44ed + + Maximum call chain *?* 24 bytes + (** call graph contains functions with no stack usage info (example: "OS_CPU_SR_Restore") **) + + "OS_TaskIdle" 16 + "OSTaskIdleHook" 8 + "App_TaskIdleHook" 0 + +Uncalled function + "OS_TaskReturn": 0x800'4f6d + + Maximum call chain *?* 60 bytes + (** call graph contains functions with no stack usage info (example: "OSCtxSw") **) + + "OS_TaskReturn" 8 + "OSTaskDel" 32 + "OS_Sched" 16 + "OS_SchedNew" in ucos_ii.o [1] 4 + +Uncalled function + "OS_TaskStat": 0x800'4515 + + Maximum call chain *?* 88 bytes + (** call graph contains functions with no stack usage info (example: "OS_CPU_SR_Restore") **) + + "OS_TaskStat" 32 + "OS_TaskStatStkChk" 24 + "OSTaskStkChk" 32 + "OS_CPU_SR_Restore" - no info - + +The following functions appear to be called, but have no stack +usage information: + + "OSCtxSw": 0x800'6d27 + "OSIntCtxSw": 0x800'6d2f + "OSStartHighRdy": 0x800'6cff + "OS_CPU_PendSVHandler": 0x800'6d37 + "OS_CPU_SR_Restore": 0x800'6cf9 + "OS_CPU_SR_Save": 0x800'6cf1 + +The following functions perform unknown indirect calls: + + "HAL_DMA_IRQHandler": 0x800'6747 + "HAL_UART_IRQHandler": 0x800'7331 + "OSTmr_Task" in ucos_ii.o [1]: 0x800'52ad + + +******************************************************************************* +*** MODULE SUMMARY +*** + + Module ro code ro data rw data + ------ ------- ------- ------- +command line/config: + ------------------------------------------------------- + Total: + +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj: [1] + app_hooks.o 16 + dma.o 64 + flash_save.o 680 305 101 + gpio.o 348 5 + main.o 592 3'584 + modbus_crc.o 56 512 + modbus_log.o 68 1'026 + os_cpu_a.o 196 + os_cpu_c.o 400 518 + os_dbg.o 448 114 + startup_stm32f407xx.o 696 + stm32f4xx_hal.o 128 2 9 + stm32f4xx_hal_cortex.o 332 + stm32f4xx_hal_dma.o 1'348 8 + stm32f4xx_hal_gpio.o 668 + stm32f4xx_hal_msp.o 72 + stm32f4xx_hal_pwr.o 28 + stm32f4xx_hal_pwr_ex.o 56 + stm32f4xx_hal_rcc.o 1'612 + stm32f4xx_hal_tim.o 2'604 + stm32f4xx_hal_tim_ex.o 176 + stm32f4xx_hal_timebase_tim.o 192 72 + stm32f4xx_hal_uart.o 3'518 + stm32f4xx_it.o 242 40 + system_stm32f4xx.o 16 26 4 + tim.o 7'076 6 792 + tools.o 2'684 + ucos_ii.o 5'596 344 6'171 + usart.o 2'340 1'042 + ------------------------------------------------------- + Total: 32'252 1'357 13'324 + +dl7M_tlf.a: [2] + abort.o 6 + exit.o 4 + low_level_init.o 4 + printf.o 40 + putchar.o 12 + xencoding_8859_1.o 30 + xfail_s.o 64 4 + xfiles.o 31 152 + xlocale_c.o 124 61 128 + xmbcurmax.o 10 + xprintffull.o 4'294 + xprout.o 22 + ------------------------------------------------------- + Total: 4'610 92 284 + +m7M_tls.a: [3] + DblAdd.o 362 + DblCmpGe.o 46 + DblCmpLe.o 46 + DblDiv.o 582 + DblMul.o 418 + DblSub.o 226 + DblToS32.o 58 + DblToU32.o 40 + S32ToDbl.o 34 + U32ToDbl.o 26 + fpinit_M.o 34 + frexp.o 112 + ldexp.o 314 + ------------------------------------------------------- + Total: 2'298 + +rt7M_tl.a: [4] + ABImemcpy.o 166 + ABImemset.o 102 + I64DivMod.o 560 + I64DivZer.o 2 + I64Shl.o 34 + cexit.o 10 + cmain.o 30 + cstartup_M.o 12 + data_init.o 40 + lz77_init_single.o 120 + memchr.o 88 + strchr.o 22 + strlen.o 54 + zero_init3.o 58 + ------------------------------------------------------- + Total: 1'298 + +shb_l.a: [5] + exit.o 20 + ------------------------------------------------------- + Total: 20 + + Gaps 2 2 + Linker created 32 4'096 +----------------------------------------------------------- + Grand Total: 40'480 1'483 17'704 + + +******************************************************************************* +*** ENTRY LIST +*** + +Entry Address Size Type Object +----- ------- ---- ---- ------ +.iar.init_table$$Base 0x800'a0fc -- Gb - Linker created - +.iar.init_table$$Limit 0x800'a11c -- Gb - Linker created - +?main 0x800'a121 Code Gb cmain.o [4] +AHBPrescTable 0x800'a19c 0x10 Data Gb system_stm32f4xx.o [1] +APBPrescTable 0x800'a210 0x8 Data Gb system_stm32f4xx.o [1] +App_TCBInitHook 0x800'7f61 0x2 Code Gb app_hooks.o [1] +App_TaskCreateHook 0x800'7f55 0x2 Code Gb app_hooks.o [1] +App_TaskDelHook 0x800'7f57 0x2 Code Gb app_hooks.o [1] +App_TaskIdleHook 0x800'7f59 0x2 Code Gb app_hooks.o [1] +App_TaskReturnHook 0x800'7f5d 0x2 Code Gb app_hooks.o [1] +App_TaskStatHook 0x800'7f5b 0x2 Code Gb app_hooks.o [1] +App_TaskSwHook 0x800'7f5f 0x2 Code Gb app_hooks.o [1] +App_TimeTickHook 0x800'7f63 0x2 Code Gb app_hooks.o [1] +BackupSRAM_Init 0x800'308b 0x48 Code Gb flash_save.o [1] +BackupSRAM_RestoreData 0x800'311d 0x5c Code Gb flash_save.o [1] +BackupSRAM_SaveRegData 0x800'30d3 0x4a Code Gb flash_save.o [1] +BinarySearchOptimalFreq + 0x800'39dd 0xc4 Code Gb tools.o [1] +BusFault_Handler 0x800'9eff 0x2 Code Gb stm32f4xx_it.o [1] +CSTACK$$Base 0x2000'3530 -- Gb - Linker created - +CSTACK$$Limit 0x2000'4530 -- Gb - Linker created - +CacheMore 0x800'903d 0x28 Code Lc xlocale_c.o [2] +Calculate_PluseNum 0x800'348b 0x370 Code Gb tools.o [1] +Calculate_PluseNum_Simplified + 0x800'3285 0x206 Code Gb tools.o [1] +DMA2_Stream0_IRQHandler + 0x800'9f79 0x12 Code Gb stm32f4xx_it.o [1] +DMA2_Stream2_IRQHandler + 0x800'9f55 0x12 Code Gb stm32f4xx_it.o [1] +DMA2_Stream7_IRQHandler + 0x800'9f67 0x12 Code Gb stm32f4xx_it.o [1] +DMA_Backup_Init 0x800'2fa7 0x6c Code Gb flash_save.o [1] +DMA_CalcBaseAndBitshift + 0x800'697d 0x30 Code Lc stm32f4xx_hal_dma.o [1] +DMA_CalcBaseAndBitshift::flagBitshiftOffset + 0x800'a208 0x8 Data Lc stm32f4xx_hal_dma.o [1] +DMA_CheckFifoParam 0x800'69bd 0x9c Code Lc stm32f4xx_hal_dma.o [1] +DMA_SetConfig 0x800'694f 0x2e Code Lc stm32f4xx_hal_dma.o [1] +DMA_Start_CopyFromBKPSRAM + 0x800'304f 0x3c Code Gb flash_save.o [1] +DMA_Start_CopyToBKPSRAM + 0x800'3013 0x3c Code Gb flash_save.o [1] +DebugMon_Handler 0x800'9f05 0x2 Code Gb stm32f4xx_it.o [1] +EXTI15_10_IRQHandler 0x800'9fc3 0xc Code Gb stm32f4xx_it.o [1] +EXTI9_5_IRQHandler 0x800'9fb9 0xa Code Gb stm32f4xx_it.o [1] +EnableBackupDomain 0x800'2f87 0x20 Code Gb flash_save.o [1] +Error_Handler 0x800'2a59 0x4 Code Gb main.o [1] +FirstFlag 0x2000'351b 0x1 Data Lc tim.o [1] +FlashSave_Get_Array_Index + 0x800'2ef1 0x36 Code Lc flash_save.o [1] +FlashSave_Get_Holding_Register + 0x800'2f57 0x30 Code Gb flash_save.o [1] +FlashSave_Set_Holding_Register + 0x800'2f27 0x30 Code Gb flash_save.o [1] +HAL_DMA_Abort 0x800'6683 0x9c Code Gb stm32f4xx_hal_dma.o [1] +HAL_DMA_Abort_IT 0x800'671f 0x28 Code Gb stm32f4xx_hal_dma.o [1] +HAL_DMA_IRQHandler 0x800'6747 0x208 Code Gb stm32f4xx_hal_dma.o [1] +HAL_DMA_Init 0x800'6515 0xe2 Code Gb stm32f4xx_hal_dma.o [1] +HAL_DMA_Start_IT 0x800'65f7 0x8c Code Gb stm32f4xx_hal_dma.o [1] +HAL_Delay 0x800'3c15 0x28 Code Wk stm32f4xx_hal.o [1] +HAL_GPIO_EXTI_Callback 0x800'3d27 0x4a Code Gb gpio.o [1] +HAL_GPIO_EXTI_IRQHandler + 0x800'2d45 0x20 Code Gb stm32f4xx_hal_gpio.o [1] +HAL_GPIO_Init 0x800'2b09 0x222 Code Gb stm32f4xx_hal_gpio.o [1] +HAL_GPIO_WritePin 0x800'2d2b 0x1a Code Gb stm32f4xx_hal_gpio.o [1] +HAL_GetTick 0x800'6a91 0xc Code Wk stm32f4xx_hal.o [1] +HAL_IncTick 0x800'9ff9 0x18 Code Wk stm32f4xx_hal.o [1] +HAL_Init 0x800'5385 0x30 Code Gb stm32f4xx_hal.o [1] +HAL_InitTick 0x800'6f75 0xac Code Gb stm32f4xx_hal_timebase_tim.o [1] +HAL_MspInit 0x800'7035 0x48 Code Gb stm32f4xx_hal_msp.o [1] +HAL_NVIC_DisableIRQ 0x800'2ecb 0xe Code Gb stm32f4xx_hal_cortex.o [1] +HAL_NVIC_EnableIRQ 0x800'2ebd 0xe Code Gb stm32f4xx_hal_cortex.o [1] +HAL_NVIC_SetPriority 0x800'2e93 0x2a Code Gb stm32f4xx_hal_cortex.o [1] +HAL_NVIC_SetPriorityGrouping + 0x800'2e87 0xc Code Gb stm32f4xx_hal_cortex.o [1] +HAL_PWREx_EnableBkUpReg + 0x800'6a59 0x2e Code Gb stm32f4xx_hal_pwr_ex.o [1] +HAL_PWR_EnableBkUpAccess + 0x800'64f9 0x14 Code Gb stm32f4xx_hal_pwr.o [1] +HAL_RCC_ClockConfig 0x800'6109 0x140 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_GetClockConfig 0x800'627b 0x34 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_GetHCLKFreq 0x800'6249 0x6 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_GetPCLK1Freq 0x800'624f 0x16 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_GetPCLK2Freq 0x800'6265 0x16 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_OscConfig 0x800'5d1d 0x3ec Code Wk stm32f4xx_hal_rcc.o [1] +HAL_TIMEx_BreakCallback + 0x800'537d 0x2 Code Wk stm32f4xx_hal_tim_ex.o [1] +HAL_TIMEx_CommutCallback + 0x800'5381 0x2 Code Wk stm32f4xx_hal_tim_ex.o [1] +HAL_TIMEx_MasterConfigSynchronization + 0x800'2a5d 0x8e Code Gb stm32f4xx_hal_tim_ex.o [1] +HAL_TIM_Base_Init 0x800'1dcd 0x6e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_Base_MspInit 0x800'0443 0x14e Code Gb tim.o [1] +HAL_TIM_Base_Start_IT 0x800'1e3b 0x9a Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_Base_Stop_IT 0x800'1ed5 0x3c Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_ConfigClockSource + 0x800'23dd 0xf4 Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_GenerateEvent 0x800'23af 0x2e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_IRQHandler 0x800'2175 0x13e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_MspPostInit 0x800'0591 0x128 Code Gb tim.o [1] +HAL_TIM_PWM_ConfigChannel + 0x800'22b3 0xfc Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_PWM_Init 0x800'1f2d 0x6e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_PWM_Start 0x800'1f9b 0x10e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_PWM_Stop 0x800'20a9 0xae Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_PeriodElapsedCallback + 0x800'0aa5 0x2ec Code Gb tim.o [1] +HAL_UART_DMAStop 0x800'729f 0x92 Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_IRQHandler 0x800'7331 0x2f6 Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_Init 0x800'707d 0x7a Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_MspInit 0x800'5417 0x13c Code Gb usart.o [1] +HAL_UART_Receive_DMA 0x800'7269 0x36 Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_Transmit 0x800'70f7 0xcc Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_Transmit_DMA 0x800'71c3 0x9a Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_TxCpltCallback + 0x800'5679 0x14 Code Gb usart.o [1] +HardFault_Handler 0x800'9edf 0x1e Code Gb stm32f4xx_it.o [1] +KeyTask 0x800'29d5 0x5a Code Lc main.o [1] +KeyTaskStk 0x2000'10cc 0x400 Data Lc main.o [1] +MODBUSTask 0x800'29bd 0x16 Code Lc main.o [1] +MODBUSTaskStk 0x2000'0ccc 0x400 Data Lc main.o [1] +MX_DMA_Init 0x800'5cdd 0x40 Code Gb dma.o [1] +MX_GPIO_Init 0x800'3c3d 0xea Code Gb gpio.o [1] +MX_TIM10_Init 0x800'0261 0x7a Code Gb tim.o [1] +MX_TIM11_Init 0x800'02db 0x78 Code Gb tim.o [1] +MX_TIM13_Init 0x800'0353 0x78 Code Gb tim.o [1] +MX_TIM14_Init 0x800'03cb 0x78 Code Gb tim.o [1] +MX_TIM2_Init 0x800'0189 0x86 Code Gb tim.o [1] +MX_TIM6_Init 0x800'020f 0x52 Code Gb tim.o [1] +MX_USART1_UART_Init 0x800'53b9 0x5e Code Gb usart.o [1] +MemManage_Handler 0x800'9efd 0x2 Code Gb stm32f4xx_it.o [1] +ModbusSlave 0x2000'3529 0x1 Data Gb usart.o [1] +Modbus_CRC16 0x800'7ed9 0x34 Code Gb modbus_crc.o [1] +Modbus_Clear_Pluse 0x800'578d 0x68 Code Gb usart.o [1] +Modbus_Handle_SendLog 0x800'57f5 0x11e Code Gb usart.o [1] +Modbus_Init 0x800'568d 0x8 Code Gb usart.o [1] +Modbus_Log 0x800'7f11 0x44 Code Gb modbus_log.o [1] +Modbus_Process 0x800'5695 0xf8 Code Gb usart.o [1] +Modbus_Process_Read_Holding_Regs + 0x800'5913 0x122 Code Lc usart.o [1] +Modbus_Process_Write_Multiple_Regs + 0x800'5af1 0x126 Code Lc usart.o [1] +Modbus_Process_Write_Reg + 0x800'5a35 0xbc Code Lc usart.o [1] +Modbus_Send_Exception 0x800'5c49 0x3e Code Lc usart.o [1] +Modbus_Send_Response 0x800'5c17 0x32 Code Lc usart.o [1] +NMI_Handler 0x800'9edd 0x2 Code Gb stm32f4xx_it.o [1] +NVIC_EncodePriority 0x800'2e47 0x40 Code Lc stm32f4xx_hal_cortex.o [1] +OSCPUUsage 0x2000'351d 0x1 Data Gb ucos_ii.o [1] +OSCtxSw 0x800'6d27 Code Gb os_cpu_a.o [1] +OSCtxSwCtr 0x2000'34c0 0x4 Data Gb ucos_ii.o [1] +OSDataSize 0x800'a382 0x2 Data Gb os_dbg.o [1] +OSDebugEn 0x800'5382 0x2 Data Gb os_dbg.o [1] +OSDebugInit 0x800'6db5 0x1c0 Code Gb os_dbg.o [1] +OSEndiannessTest 0x800'a218 0x4 Data Gb os_dbg.o [1] +OSEventEn 0x800'6cee 0x2 Data Gb os_dbg.o [1] +OSEventFreeList 0x2000'34c4 0x4 Data Gb ucos_ii.o [1] +OSEventMax 0x800'7ed6 0x2 Data Gb os_dbg.o [1] +OSEventMultiEn 0x800'923a 0x2 Data Gb os_dbg.o [1] +OSEventNameEn 0x800'9036 0x2 Data Gb os_dbg.o [1] +OSEventNameSet 0x800'3d99 0x54 Code Gb ucos_ii.o [1] +OSEventSize 0x800'90ca 0x2 Data Gb os_dbg.o [1] +OSEventTbl 0x2000'2e84 0xf0 Data Gb ucos_ii.o [1] +OSEventTblSize 0x800'9142 0x2 Data Gb os_dbg.o [1] +OSFlagEn 0x800'926a 0x2 Data Gb os_dbg.o [1] +OSFlagFreeList 0x2000'34c8 0x4 Data Gb ucos_ii.o [1] +OSFlagGrpSize 0x800'93a6 0x2 Data Gb os_dbg.o [1] +OSFlagMax 0x800'94ea 0x2 Data Gb os_dbg.o [1] +OSFlagNameEn 0x800'9732 0x2 Data Gb os_dbg.o [1] +OSFlagNodeSize 0x800'93e2 0x2 Data Gb os_dbg.o [1] +OSFlagTbl 0x2000'316c 0x50 Data Gb ucos_ii.o [1] +OSFlagWidth 0x800'9406 0x2 Data Gb os_dbg.o [1] +OSIdleCtr 0x2000'34d4 0x4 Data Gb ucos_ii.o [1] +OSIdleCtrMax 0x2000'34cc 0x4 Data Gb ucos_ii.o [1] +OSIdleCtrRun 0x2000'34d0 0x4 Data Gb ucos_ii.o [1] +OSInit 0x800'3ded 0x38 Code Gb ucos_ii.o [1] +OSInitHookBegin 0x800'6369 0x2c Code Gb os_cpu_c.o [1] +OSInitHookEnd 0x800'6395 0x2 Code Gb os_cpu_c.o [1] +OSIntCtxSw 0x800'6d2f Code Gb os_cpu_a.o [1] +OSIntEnter 0x800'3e25 0x1c Code Gb ucos_ii.o [1] +OSIntExit 0x800'3e41 0x78 Code Gb ucos_ii.o [1] +OSIntNesting 0x2000'351f 0x1 Data Gb ucos_ii.o [1] +OSLockNesting 0x2000'3520 0x1 Data Gb ucos_ii.o [1] +OSLowestPrio 0x800'9776 0x2 Data Gb os_dbg.o [1] +OSMboxEn 0x800'992a 0x2 Data Gb os_dbg.o [1] +OSMemEn 0x800'9a96 0x2 Data Gb os_dbg.o [1] +OSMemFreeList 0x2000'34e8 0x4 Data Gb ucos_ii.o [1] +OSMemMax 0x800'9fce 0x2 Data Gb os_dbg.o [1] +OSMemNameEn 0x800'a11c 0x2 Data Gb os_dbg.o [1] +OSMemSize 0x800'a146 0x2 Data Gb os_dbg.o [1] +OSMemTbl 0x2000'2f74 0x78 Data Gb ucos_ii.o [1] +OSMemTblSize 0x800'a33c 0x2 Data Gb os_dbg.o [1] +OSMutexEn 0x800'a33e 0x2 Data Gb os_dbg.o [1] +OSPrioCur 0x2000'3521 0x1 Data Gb ucos_ii.o [1] +OSPrioHighRdy 0x2000'3522 0x1 Data Gb ucos_ii.o [1] +OSPtrSize 0x800'a340 0x2 Data Gb os_dbg.o [1] +OSQEn 0x800'a342 0x2 Data Gb os_dbg.o [1] +OSQFreeList 0x2000'34ec 0x4 Data Gb ucos_ii.o [1] +OSQMax 0x800'a344 0x2 Data Gb os_dbg.o [1] +OSQSize 0x800'a346 0x2 Data Gb os_dbg.o [1] +OSQTbl 0x2000'304c 0x60 Data Gb ucos_ii.o [1] +OSRdyGrp 0x2000'3523 0x1 Data Gb ucos_ii.o [1] +OSRdyTbl 0x2000'348c 0x8 Data Gb ucos_ii.o [1] +OSRdyTblSize 0x800'a348 0x2 Data Gb os_dbg.o [1] +OSRunning 0x2000'3524 0x1 Data Gb ucos_ii.o [1] +OSSchedLock 0x800'3eb9 0x36 Code Gb ucos_ii.o [1] +OSSchedUnlock 0x800'3eef 0x58 Code Gb ucos_ii.o [1] +OSSemCreate 0x800'4943 0x4e Code Gb ucos_ii.o [1] +OSSemEn 0x800'a34a 0x2 Data Gb os_dbg.o [1] +OSSemPend 0x800'4993 0xe8 Code Gb ucos_ii.o [1] +OSSemPost 0x800'4a85 0x62 Code Gb ucos_ii.o [1] +OSStart 0x800'3f47 0x3a Code Gb ucos_ii.o [1] +OSStartHighRdy 0x800'6cff Code Gb os_cpu_a.o [1] +OSStatInit 0x800'3f81 0x42 Code Gb ucos_ii.o [1] +OSStatRdy 0x2000'351e 0x1 Data Gb ucos_ii.o [1] +OSStkWidth 0x800'a34c 0x2 Data Gb os_dbg.o [1] +OSTCBCur 0x2000'34d8 0x4 Data Gb ucos_ii.o [1] +OSTCBFreeList 0x2000'34dc 0x4 Data Gb ucos_ii.o [1] +OSTCBHighRdy 0x2000'34e0 0x4 Data Gb ucos_ii.o [1] +OSTCBInitHook 0x800'645f 0xc Code Gb os_cpu_c.o [1] +OSTCBList 0x2000'34e4 0x4 Data Gb ucos_ii.o [1] +OSTCBPrioTbl 0x2000'2a84 0x100 Data Gb ucos_ii.o [1] +OSTCBPrioTblMax 0x800'a366 0x2 Data Gb os_dbg.o [1] +OSTCBSize 0x800'a368 0x2 Data Gb os_dbg.o [1] +OSTCBTbl 0x2000'00e4 0x7e8 Data Gb ucos_ii.o [1] +OSTaskCreateEn 0x800'a34e 0x2 Data Gb os_dbg.o [1] +OSTaskCreateExt 0x800'4af1 0xd4 Code Gb ucos_ii.o [1] +OSTaskCreateExtEn 0x800'a350 0x2 Data Gb os_dbg.o [1] +OSTaskCreateHook 0x800'6397 0xc Code Gb os_cpu_c.o [1] +OSTaskCtr 0x2000'3525 0x1 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xlocale_c.o [2] +_main 0x800'a13b Code Gb cmain.o [4] +abort 0x800'9925 0x6 Code Gb abort.o [2] +backup_data 0x2000'0000 0x4 Data Gb flash_save.o [1] +clzll 0x800'3aa7 0x24 Code Lc tools.o [1] +crc_table 0x800'9aac 0x200 Data Lc modbus_crc.o [1] +dma_bkpsram_done_flag 0x2000'3518 0x1 Data Gb flash_save.o [1] +exit 0x800'a143 0x4 Code Gb exit.o [2] +fputc 0x800'5553 0x1a Code Gb usart.o [1] +hdma_backup 0x2000'2fec 0x60 Data Gb flash_save.o [1] +hdma_usart1_rx 0x2000'30ac 0x60 Data Gb usart.o [1] +hdma_usart1_tx 0x2000'310c 0x60 Data Gb usart.o [1] +htim1 0x2000'320c 0x48 Data Gb stm32f4xx_hal_timebase_tim.o [1] +htim10 0x2000'32e4 0x48 Data Gb tim.o [1] +htim11 0x2000'332c 0x48 Data Gb tim.o [1] +htim13 0x2000'3374 0x48 Data Gb tim.o [1] +htim14 0x2000'33bc 0x48 Data Gb tim.o [1] +htim2 0x2000'3254 0x48 Data Gb tim.o [1] +htim6 0x2000'329c 0x48 Data Gb tim.o [1] +huart1 0x2000'3404 0x48 Data Gb usart.o [1] +integer_sqrt_64 0x800'3acb 0x104 Code Gb tools.o [1] +ldexp 0x800'926d Code Gb ldexp.o [3] +ldexpl 0x800'926d Code Gb ldexp.o [3] +localeconv 0x800'90a9 0x4 Code Gb xlocale_c.o [2] +log_write_index 0x2000'3508 0x2 Data Gb modbus_log.o [1] +main 0x800'280d 0x5c Code Gb main.o [1] +memchr 0x800'9145 Code Gb memchr.o [4] +modbus_address_map 0x800'9cac 0x130 Data Lc flash_save.o [1] +modbus_logs 0x2000'14cc 0x400 Data Gb modbus_log.o [1] +obuf 0x2000'31bc 0x50 Data Lc xfiles.o [2] +printf 0x800'9fd1 0x28 Code Gb printf.o [2] +putchar 0x800'a169 0xc Code Gb putchar.o [2] +s_last_direction 0x2000'00de 0x1 Data Lc tim.o [1] +s_last_total_pulse 0x2000'34b4 0x4 Data Lc tim.o [1] +s_last_trigger_time 0x2000'3494 0x4 Data Lc gpio.o [1] +s_pulse_count_direction + 0x2000'00dd 0x1 Data Lc tim.o [1] +s_section_switch_sem 0x2000'34bc 0x4 Data Lc tim.o [1] +s_tim6_update_freq_us 0x2000'000c 0x4 Data Lc tim.o [1] +s_trigger_flag 0x2000'3519 0x1 Data Lc gpio.o [1] +scalbln 0x800'926d Code Gb ldexp.o [3] +scalblnl 0x800'926d Code Gb ldexp.o [3] +scalbn 0x800'926d Code Gb ldexp.o [3] +scalbnl 0x800'926d Code Gb ldexp.o [3] +scale 0x800'8f8d 0x46 Code Lc xprintffull.o [2] +sec_hand 0x2000'3504 0x4 Data Lc xfail_s.o [2] +square_u32 0x800'3aa1 0x6 Code Gb tools.o [1] +strchr 0x800'90b5 Code Gb strchr.o [4] +strlen 0x800'910d Code Gb strlen.o [4] +usart1_dma_rx_buffer 0x2000'2c84 0x100 Data Gb usart.o [1] +usart1_dma_rx_len 0x2000'3516 0x2 Data Gb usart.o [1] +usart1_dma_tx_buffer 0x2000'2d84 0x100 Data Gb usart.o [1] +usart1_rx_buffer 0x2000'2b84 0x100 Data Gb usart.o [1] +usart1_rx_head 0x2000'3510 0x2 Data Gb usart.o [1] +usart1_rx_tail 0x2000'3512 0x2 Data Gb usart.o [1] +usart1_tx_busy 0x2000'3528 0x1 Data Gb usart.o [1] +uwTick 0x2000'349c 0x4 Data Gb stm32f4xx_hal.o [1] +uwTickFreq 0x2000'00dc 0x1 Data Gb stm32f4xx_hal.o [1] +uwTickPrio 0x2000'0004 0x4 Data Gb stm32f4xx_hal.o [1] + + +[1] = e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj +[2] = dl7M_tlf.a +[3] = m7M_tls.a +[4] = rt7M_tl.a +[5] = shb_l.a + + 40'480 bytes of readonly code memory + 1'483 bytes of readonly data memory + 17'704 bytes of readwrite data memory + +Errors: none +Warnings: 2 diff --git a/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.o b/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.o new file mode 100644 index 0000000..0a44cff Binary files /dev/null and b/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/dma.o b/PLSR/PLSR/EWARM/test.1/Obj/dma.o new file mode 100644 index 0000000..3632bd5 Binary files /dev/null and b/PLSR/PLSR/EWARM/test.1/Obj/dma.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/flash_save.o b/PLSR/PLSR/EWARM/test.1/Obj/flash_save.o new file mode 100644 index 0000000..27ece15 Binary files /dev/null and b/PLSR/PLSR/EWARM/test.1/Obj/flash_save.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/flash_save.pbi b/PLSR/PLSR/EWARM/test.1/Obj/flash_save.pbi new file mode 100644 index 0000000..78a0185 Binary files /dev/null and b/PLSR/PLSR/EWARM/test.1/Obj/flash_save.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/flash_save.pbi.dep b/PLSR/PLSR/EWARM/test.1/Obj/flash_save.pbi.dep new file mode 100644 index 0000000..363b5e5 --- /dev/null +++ b/PLSR/PLSR/EWARM/test.1/Obj/flash_save.pbi.dep @@ -0,0 +1,59 @@ +flash_save.pbi: \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\flash_save.c \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\flash_save.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\stm32f4xx_hal_conf.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_rcc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include\stm32f4xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\core_cm4.h \ + E:\Software\IAR\arm\inc\c\stdint.h E:\Software\IAR\arm\inc\c\ycheck.h \ + E:\Software\IAR\arm\inc\c\yvals.h \ + E:\Software\IAR\arm\inc\c\DLib_Defaults.h \ + E:\\Software\\IAR\\arm\\inc\\c\\DLib_Config_Full.h \ + E:\Software\IAR\arm\inc\c\DLib_Product.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_version.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_compiler.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\cmsis_iccarm.h \ + E:\Software\IAR\arm\inc\c\iccarm_builtin.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/mpu_armv7.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + E:\Software\IAR\arm\inc\c\stddef.h E:\Software\IAR\arm\inc\c\ysizet.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_gpio.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_exti.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_dma.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_cortex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_flash.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_pwr.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/main.h \ + E:\Software\IAR\arm\inc\c\stdio.h E:\Software\IAR\arm\inc\c\string.h \ + E:\Software\IAR\arm\inc\c\DLib_Product_string.h \ + E:\Software\IAR\arm\inc\c\ctype.h E:\Software\IAR\arm\inc\c\stdlib.h \ + E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \ + E:\Software\IAR\arm\inc\c\stdarg.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/tim.h \ + E:\Software\IAR\arm\inc\c\math.h \ + E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/gpio.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\modbus_crc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\usart.h diff --git a/PLSR/PLSR/EWARM/test.1/Obj/flash_save.xcl b/PLSR/PLSR/EWARM/test.1/Obj/flash_save.xcl new file mode 100644 index 0000000..510aa82 --- /dev/null +++ b/PLSR/PLSR/EWARM/test.1/Obj/flash_save.xcl @@ -0,0 +1,384 @@ +"e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\flash_save.c" +-std=c11 +-ferror-limit=0 +-fbracket-depth=512 +-MD +-MF +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\flash_save.pbi.dep +-o +flash_save.pbi +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source +-I +E:\Software\IAR\arm\inc +-I +E:\Software\IAR\arm\inc\c +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Inc +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Drivers\STM32F4xx_HAL_Driver\Inc +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Drivers\CMSIS\Device\ST\STM32F4xx\Include +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Drivers\CMSIS\Include +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\UCOS\Config +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\UCOS\Ports +-I +e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\UCOS\Source +-D__CHAR_BITS__=8 +-D__CHAR_MAX__=0xff +-D__CHAR_MIN__=0 +-D__CHAR_SIZE__=1 +-D__UNSIGNED_CHAR_MAX__=0xff +-D__SIGNED_CHAR_MAX__=127 +-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1) +-D__CHAR_ALIGN__=1 +-D__SHORT_SIZE__=2 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b/PLSR/PLSR/EWARM/test.1/Obj/modbus_crc.pbi new file mode 100644 index 0000000..53e151e Binary files /dev/null and b/PLSR/PLSR/EWARM/test.1/Obj/modbus_crc.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/modbus_crc.pbi.dep b/PLSR/PLSR/EWARM/test.1/Obj/modbus_crc.pbi.dep new file mode 100644 index 0000000..5cf4b20 --- /dev/null +++ b/PLSR/PLSR/EWARM/test.1/Obj/modbus_crc.pbi.dep @@ -0,0 +1,38 @@ +modbus_crc.pbi: \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\modbus_crc.c \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\modbus_crc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include\stm32f4xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\core_cm4.h \ + E:\Software\IAR\arm\inc\c\stdint.h E:\Software\IAR\arm\inc\c\ycheck.h \ + E:\Software\IAR\arm\inc\c\yvals.h \ + E:\Software\IAR\arm\inc\c\DLib_Defaults.h \ + E:\\Software\\IAR\\arm\\inc\\c\\DLib_Config_Full.h \ + E:\Software\IAR\arm\inc\c\DLib_Product.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_version.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_compiler.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\cmsis_iccarm.h \ + E:\Software\IAR\arm\inc\c\iccarm_builtin.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/mpu_armv7.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\stm32f4xx_hal_conf.h \ + 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e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h \ + E:\Software\IAR\arm\inc\c\math.h \ + E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source/os_trace.h diff --git a/PLSR/PLSR/EWARM/test.1/Obj/tool.xcl b/PLSR/PLSR/EWARM/test.1/Obj/tool.xcl new file mode 100644 index 0000000..24363d7 --- /dev/null +++ b/PLSR/PLSR/EWARM/test.1/Obj/tool.xcl @@ -0,0 +1,384 @@ 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