diff --git a/PLSR/PLSR/Core/Inc/stm32f4xx_hal_conf.h b/PLSR/PLSR/Core/Inc/stm32f4xx_hal_conf.h index 80457c3..e0e1665 100644 --- a/PLSR/PLSR/Core/Inc/stm32f4xx_hal_conf.h +++ b/PLSR/PLSR/Core/Inc/stm32f4xx_hal_conf.h @@ -64,7 +64,9 @@ /* #define HAL_MMC_MODULE_ENABLED */ /* #define HAL_SPI_MODULE_ENABLED */ #define HAL_TIM_MODULE_ENABLED +#ifndef HAL_UART_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED +#endif /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ diff --git a/PLSR/PLSR/Core/Inc/stm32f4xx_it.h b/PLSR/PLSR/Core/Inc/stm32f4xx_it.h index bc6fb34..c14ff27 100644 --- a/PLSR/PLSR/Core/Inc/stm32f4xx_it.h +++ b/PLSR/PLSR/Core/Inc/stm32f4xx_it.h @@ -58,6 +58,7 @@ void SysTick_Handler(void); void TIM1_UP_TIM10_IRQHandler(void); void USART1_IRQHandler(void); void TIM6_DAC_IRQHandler(void); +void DMA2_Stream0_IRQHandler(void); void DMA2_Stream2_IRQHandler(void); void DMA2_Stream7_IRQHandler(void); /* USER CODE BEGIN EFP */ diff --git a/PLSR/PLSR/Core/Inc/tim.h b/PLSR/PLSR/Core/Inc/tim.h index a993ad0..b368ca3 100644 --- a/PLSR/PLSR/Core/Inc/tim.h +++ b/PLSR/PLSR/Core/Inc/tim.h @@ -32,7 +32,7 @@ extern "C" { /* USER CODE END Includes */ -extern TIM_HandleTypeDef htim2; +extern TIM_HandleTypeDef htim2; // TIM2恢复用于脉冲计数 extern TIM_HandleTypeDef htim6; @@ -56,9 +56,7 @@ extern TIM_HandleTypeDef htim14; #define PLSR_PWM_PIN GPIO_PIN_6 // PF6 - TIM10_CH1 #define PLSR_PWM_PORT GPIOF -// 硬件计数器定义 (使用TIM2作为硬件计数器) -#define PLSR_COUNTER_PIN GPIO_PIN_5 // PA5 - TIM2_CH1 (外部时钟输入) -#define PLSR_COUNTER_PORT GPIOA +// TIM2硬件计数器已删除 - 改用TIM10中断计数 // 等待条件类型枚举 typedef enum { @@ -83,8 +81,8 @@ typedef enum { PLSR_STATE_ACCEL = 1, // 加速状态 PLSR_STATE_CONST = 2, // 匀速状态 PLSR_STATE_DECEL = 3, // 减速状态 - PLSR_STATE_WAIT = 4, // 等待状态 - PLSR_STATE_STOP = 5 // 停止状态 + PLSR_STATE_WAIT = 4 // 等待状态 + // 注意：移除了PLSR_STATE_STOP状态，减速到0频率时直接进入等待状态 } PLSR_RunState_t; // 路径状态枚举 @@ -115,7 +113,7 @@ typedef enum { } PLSR_Direction_t; /* USER CODE END Private defines */ -void MX_TIM2_Init(void); +void MX_TIM2_Init(void); // TIM2恢复用于脉冲计数 void MX_TIM6_Init(void); void MX_TIM10_Init(void); void MX_TIM11_Init(void); @@ -147,7 +145,6 @@ typedef struct { uint32_t target_pulse; // 目标脉冲数 uint8_t next_section; // 下一段号(0表示结束) PLSR_SectionState_t section_state; // 段状态 - PLSR_AccelConfig_t accel_config; // 加减速配置 PLSR_WaitCondition_t wait_condition; // 等待条件 } PLSR_SectionConfig_t; @@ -164,6 +161,7 @@ typedef struct { uint8_t output_port; // 输出端口选择 PLSR_Mode_t mode; // 模式(相对/绝对) PLSR_Direction_t direction; // 方向 + PLSR_AccelConfig_t accel_config; // 加减速配置 // 运行状态参数 PLSR_RunState_t run_state; // 运行状态 @@ -184,6 +182,7 @@ typedef struct { #define PLSR_DEFAULT_ACT_TIME_MS 200 // 默认ACT时间200ms #define PLSR_DEFAULT_WAIT_TIME_MS 200 // 默认等待时间200ms #define PLSR_DEFAULT_START_SECTION 0 // 默认起始段编号 +#define PLSR_TASK_CHECK_INTERVAL 100 // 每100个脉冲通知任务一次 @@ -195,12 +194,15 @@ void PLSR_PWM_Init(void); void PLSR_PWM_Start(void); void PLSR_PWM_Stop(void); void PLSR_PWM_SetFrequency(uint32_t frequency); +void PLSR_PWM_SetFrequency_Immediate(uint32_t frequency); // ==================== PLSR计数器控制函数 ==================== -uint32_t PLSR_Counter_GetCount(void); //<暂时无用 +// ==================== PLSR计数器控制函数 ==================== +void PLSR_Counter_Init(void); +void PLSR_Counter_Start(void); +void PLSR_Counter_Stop(void); void PLSR_Counter_Reset(void); -void PLSR_Counter_SetTarget(uint32_t target); //<考虑配置定时器2中断,中断触发后执行段切换 -uint32_t PLSR_Counter_GetTarget(void); //<暂时无用 +uint32_t PLSR_Counter_GetCount(void); // ==================== PLSR TIM6频率配置函数 ==================== void PLSR_TIM6_SetUpdateFreq(uint32_t freq_us); @@ -221,7 +223,6 @@ uint8_t PLSR_Section_CheckWaitCondition(PLSR_RouteConfig_t* route); void PLSR_Section_CalculateConstPulse(PLSR_RouteConfig_t* route); // ==================== PLSR加减速算法函数 ==================== -float PLSR_Accel_CalculateLinear(float progress); float PLSR_Accel_CalculateCurve(float progress); float PLSR_Accel_CalculateSine(float progress); void PLSR_Accel_Process(PLSR_RouteConfig_t* route); @@ -240,9 +241,13 @@ uint32_t PLSR_GetSystemTick(void); uint32_t PLSR_PWM_GetFrequency(void); void PLSR_PWM_SetDutyCycle(uint8_t duty_percent); +// UCOSII任务相关函数 +uint8_t PLSR_CheckTaskNotification(void); +void PLSR_Task_SectionProcess(PLSR_RouteConfig_t* route); + // ==================== PLSR全局变量声明 ==================== extern PLSR_RouteConfig_t g_plsr_route; // 全局PLSR路径控制结构体 -extern uint32_t g_plsr_system_tick; // 系统时钟计数器 +// g_plsr_system_tick已删除 - 不再使用UCOSII时间基准 extern uint8_t g_plsr_ext_event_flag; // 外部事件标志 /* USER CODE END Prototypes */ diff --git a/PLSR/PLSR/Core/Inc/usart.h b/PLSR/PLSR/Core/Inc/usart.h index 10c6193..f9c6eca 100644 --- a/PLSR/PLSR/Core/Inc/usart.h +++ b/PLSR/PLSR/Core/Inc/usart.h @@ -29,19 +29,85 @@ extern "C" { #include "main.h" /* USER CODE BEGIN Includes */ - +#include +#include +#include +#include +#include +#include "modbus_crc.h" +#include "flash_save.h" +#include "modbus_log.h" /* USER CODE END Includes */ extern UART_HandleTypeDef huart1; /* USER CODE BEGIN Private defines */ +///> ==================== 寄存器配置 ==================== +#define MODBUS_HOLDING_REG_COUNT 1200 ///> 保持寄存器数量 (40001-49999) +#define MODBUS_COIL_COUNT 256 ///> 线圈数量 (00001-09999) +#define SRAM_HOLDING_REG_COUNT 256 ///> SRAM保持寄存器数量 (60001-69999) +#define SRAM_HOLDING_COIL_COUNT 1000 ///> SRAM保持寄存器数量 (60001-69999) + +///> ==================== Modbus功能码定义 ==================== +#define MODBUS_FC_READ_COILS 0x01 ///> 读线圈状态 +#define MODBUS_FC_READ_HOLDING_REGS 0x03 ///> 读保持寄存器 +#define MODBUS_FC_WRITE_REG 0x06 +#define MODBUS_FC_WRITE_MULTIPLE_COILS 0x0F ///> 写多个线圈 +#define MODBUS_FC_WRITE_MULTIPLE_REGS 0x10 ///> 写多个保持寄存器 +#define MODBUS_FC_SEND_LOG 0x46 ///> 发送Modbus日志 + +///> ==================== Modbus异常码定义 ==================== +#define MODBUS_EX_NONE 0x00 ///> 无异常 +#define MODBUS_EX_ILLEGAL_FUNCTION 0x01 ///> 非法功能码 +#define MODBUS_EX_ILLEGAL_DATA_ADDRESS 0x02 ///> 非法数据地址 +#define MODBUS_EX_ILLEGAL_DATA_VALUE 0x03 ///> 数据帧长度异常 +#define MODBUS_EX_ILLEGAL_COUNT 0x04 ///> 非法寄存器数量 + +#define USART1_RX_BUFFER_SIZE 256 +#define USART1_TX_BUFFER_SIZE 256 +///> ==================== Modbus从机配置结构体 ==================== +typedef struct +{ + uint8_t slave_address; ///> 从机地址 + uint16_t holding_regs[MODBUS_HOLDING_REG_COUNT]; ///> 保持寄存器 (40001-49999) + uint8_t coils[MODBUS_COIL_COUNT/8 + 1]; ///> 线圈状态 (00001-09999) +} ModbusSlave_t; /* USER CODE END Private defines */ void MX_USART1_UART_Init(void); /* USER CODE BEGIN Prototypes */ +// Modbus从机实例 +extern ModbusSlave_t ModbusSlave; + +// USART1缓冲区变量 +extern uint8_t usart1_rx_buffer[USART1_RX_BUFFER_SIZE]; +extern volatile uint16_t usart1_rx_head; +extern volatile uint16_t usart1_rx_tail; +extern uint16_t Usart1_Rx_Count; +extern uint8_t usart1_dma_rx_buffer[USART1_RX_BUFFER_SIZE]; +extern volatile uint16_t usart1_dma_rx_len; +extern uint8_t usart1_dma_tx_buffer[USART1_TX_BUFFER_SIZE]; +extern volatile uint8_t usart1_tx_busy; + +// Modbus功能函数 +void Modbus_Init(uint8_t slave_addr); +void Modbus_Process(void); +void Modbus_SetHoldingRegister(uint16_t addr, uint16_t value); +uint16_t Modbus_GetHoldingRegister(uint16_t addr); +void Modbus_SetCoil(uint16_t addr, uint8_t value); +uint8_t Modbus_GetCoil(uint16_t addr); +void Modbus_Handle_SendLog(uint8_t* frame, uint16_t length); +void Modbus_Process_Write_Reg(uint8_t *frame, uint16_t length); + +// USART功能函数 +void USART1_SendData(uint8_t* data, uint16_t len); +uint8_t USART1_SendData_DMA(uint8_t* data, uint16_t len); +int fputc(int ch, FILE *f); +// 中断处理函数 +void USART1_IDLE_IRQHandler(void); /* USER CODE END Prototypes */ #ifdef __cplusplus diff --git a/PLSR/PLSR/Core/Src/gpio.c b/PLSR/PLSR/Core/Src/gpio.c index 91c4aa6..ded71ef 100644 --- a/PLSR/PLSR/Core/Src/gpio.c +++ b/PLSR/PLSR/Core/Src/gpio.c @@ -47,18 +47,31 @@ void MX_GPIO_Init(void) /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE(); __HAL_RCC_GPIOF_CLK_ENABLE(); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOF, GPIO_PIN_6|GPIO_PIN_8, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOH, GPIO_PIN_6|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_7, GPIO_PIN_RESET); - /*Configure GPIO pins : PF6 PF8 */ - GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_8; + /*Configure GPIO pin : PB5 */ + GPIO_InitStruct.Pin = GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*Configure GPIO pin : PG12 */ + GPIO_InitStruct.Pin = GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /*Configure GPIO pins : PH6 PH8 PH9 PH7 */ + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_7; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); } diff --git a/PLSR/PLSR/Core/Src/main.c b/PLSR/PLSR/Core/Src/main.c index 25e99c2..c05aed9 100644 --- a/PLSR/PLSR/Core/Src/main.c +++ b/PLSR/PLSR/Core/Src/main.c @@ -27,6 +27,7 @@ #include "tim.h" #include "usart.h" #include "dma.h" +#include "flash_save.h" /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -49,13 +50,13 @@ /* USER CODE BEGIN PV */ /* 任务堆栈定义 */ static OS_STK StartupTaskStk[APP_CFG_STARTUP_TASK_STK_SIZE]; -static OS_STK LedTaskStk[APP_CFG_LED_TASK_STK_SIZE]; +static OS_STK MODBUSTaskStk[APP_CFG_MODBUS_TASK_STK_SIZE]; static OS_STK KeyTaskStk[APP_CFG_KEY_TASK_STK_SIZE]; // 全局加速配置 //static PLSR_AccelProfile_t motor_profile; /* 任务函数声明 */ static void StartupTask(void *p_arg); -static void LedTask(void *p_arg); +static void MODBUSTask(void *p_arg); static void KeyTask(void *p_arg); /* USER CODE END PV */ @@ -97,11 +98,11 @@ int main(void) /* USER CODE END SysInit */ /* Initialize all configured peripherals */ - //MX_GPIO_Init(); + MX_GPIO_Init(); MX_USART1_UART_Init(); MX_DMA_Init(); - PLSR_PWM_Init(); - PLSR_Route_Init(&g_plsr_route); + /* 初始化备份SRAM和DMA */ + BackupSRAM_Init(); /* USER CODE BEGIN 2 */ /* 初始化uC/OS-II */ @@ -191,18 +192,23 @@ static void StartupTask(void *p_arg) /* 初始化SysTick */ OS_CPU_SysTickInitFreq(SystemCoreClock); + PLSR_PWM_Init(); + PLSR_Route_Init(&g_plsr_route); + + + /* 启用统计任务 */ #if OS_TASK_STAT_EN > 0u OSStatInit(); #endif /* 创建启动任务 */ - err = OSTaskCreateExt(LedTask, + err = OSTaskCreateExt(MODBUSTask, (void *)0, - &LedTaskStk[APP_CFG_LED_TASK_STK_SIZE - 1], - APP_CFG_LED_TASK_PRIO, - APP_CFG_LED_TASK_PRIO, - &LedTaskStk[0], - APP_CFG_LED_TASK_STK_SIZE, + &MODBUSTaskStk[APP_CFG_MODBUS_TASK_STK_SIZE - 1], + APP_CFG_MODBUS_TASK_PRIO, + APP_CFG_MODBUS_TASK_PRIO, + &MODBUSTaskStk[0], + APP_CFG_MODBUS_TASK_STK_SIZE, (void *)0, OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); /* 创建启动任务 */ @@ -224,22 +230,15 @@ static void StartupTask(void *p_arg) /* 启动任务完成，删除自身 */ OSTaskDel(OS_PRIO_SELF); } -static void LedTask(void *p_arg) +static void MODBUSTask(void *p_arg) { (void)p_arg; uint8_t data = 0; while (1) { - // if(HAL_UART_Receive(&huart1, &data, sizeof(data), 10) != HAL_OK) - // { - // // 接收超时或错误处理 - // HAL_UART_Transmit(&huart1, (uint8_t *)"Receive Error\r\n", 15, 10); - // } - // else - // { - // HAL_UART_Transmit(&huart1, &data, sizeof(data), 10); - // } - OSTimeDlyHMSM(0, 0, 0, 10); /* 延时10ms */ + + Modbus_Process(); + OSTimeDlyHMSM(0, 0, 0, 10); /* 延时10ms */ } @@ -250,6 +249,7 @@ static void KeyTask(void *p_arg) PLSR_Route_Start(&g_plsr_route); while (1) { + OSTimeDlyHMSM(0, 0, 0, 10); /* 延时10ms */ } } @@ -281,7 +281,7 @@ void Error_Handler(void) * @param line: assert_param error line source number * @retval None */ -void assert_failed(uint8_t *file, uint32_t line) +void assert_faiMODBUS(uint8_t *file, uint32_t line) { /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, diff --git a/PLSR/PLSR/Core/Src/stm32f4xx_it.c b/PLSR/PLSR/Core/Src/stm32f4xx_it.c index 923a39d..39059a8 100644 --- a/PLSR/PLSR/Core/Src/stm32f4xx_it.c +++ b/PLSR/PLSR/Core/Src/stm32f4xx_it.c @@ -49,6 +49,7 @@ extern DMA_HandleTypeDef hdma_usart1_rx; extern DMA_HandleTypeDef hdma_usart1_tx; extern UART_HandleTypeDef huart1; extern TIM_HandleTypeDef htim1; +extern DMA_HandleTypeDef hdma_backup; /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ @@ -226,11 +227,16 @@ void TIM1_UP_TIM10_IRQHandler(void) void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ - + OSIntEnter(); + + // 处理UART空闲中断 + extern void USART1_IDLE_IRQHandler(void); + USART1_IDLE_IRQHandler(); /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); /* USER CODE BEGIN USART1_IRQn 1 */ - + + OSIntExit(); /* USER CODE END USART1_IRQn 1 */ } @@ -254,11 +260,11 @@ void TIM6_DAC_IRQHandler(void) void DMA2_Stream2_IRQHandler(void) { /* USER CODE BEGIN DMA2_Stream2_IRQn 0 */ - + OSIntEnter(); /* USER CODE END DMA2_Stream2_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); /* USER CODE BEGIN DMA2_Stream2_IRQn 1 */ - + OSIntExit(); /* USER CODE END DMA2_Stream2_IRQn 1 */ } @@ -268,14 +274,23 @@ void DMA2_Stream2_IRQHandler(void) void DMA2_Stream7_IRQHandler(void) { /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */ - + OSIntEnter(); /* USER CODE END DMA2_Stream7_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */ - + OSIntExit(); /* USER CODE END DMA2_Stream7_IRQn 1 */ } +void DMA2_Stream0_IRQHandler(void) +{ + OSIntEnter(); + + HAL_DMA_IRQHandler(&hdma_backup); + + OSIntExit(); +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/PLSR/PLSR/Core/Src/tim.c b/PLSR/PLSR/Core/Src/tim.c index 818339e..c9a9c27 100644 --- a/PLSR/PLSR/Core/Src/tim.c +++ b/PLSR/PLSR/Core/Src/tim.c @@ -24,14 +24,38 @@ /* USER CODE BEGIN 0 */ // ==================== PLSR全局变量定义 ==================== PLSR_RouteConfig_t g_plsr_route; // 全局PLSR路径控制结构体 -uint32_t g_plsr_system_tick = 0; // 系统时钟计数器(ms) +// g_plsr_system_tick已删除 - 不再使用UCOSII时间基准 uint8_t g_plsr_ext_event_flag = 0; // 外部事件标志 // ==================== PLSR内部变量 ==================== static uint32_t s_tim6_update_freq_us = 1000; // TIM6更新频率(微秒) static uint32_t s_current_pwm_freq = 0; // 当前PWM频率 static uint8_t s_pwm_running = 0; // PWM运行状态 -static uint32_t s_target_pulse_count = 0; // 目标脉冲计数 +// static uint32_t s_target_pulse_count = 0; // 目标脉冲计数 - 暂时注释掉未使用的变量 + +// ==================== 等待时间相关变量 ==================== +static volatile uint32_t s_wait_time_counter = 0; // 等待时间计数器 +static volatile uint32_t s_wait_time_target = 0; // 等待时间目标值 +static volatile uint8_t s_wait_time_flag = 0; // 等待时间到达标志 +static volatile uint32_t s_act_time_counter = 0; // ACT时间计数器 +static volatile uint32_t s_act_time_target = 0; // ACT时间目标值 +static volatile uint8_t s_act_time_flag = 0; // ACT时间到达标志 + +// 频率更新相关静态变量 +static volatile uint8_t s_freq_update_pending = 0; // 频率更新挂起标志 +static volatile uint16_t s_next_prescaler = 0; // 下一个预分频器值 +static volatile uint32_t s_next_period = 0; // 下一个周期值 +static volatile uint8_t s_task_notification_flag = 0; // 任务通知标志 +static uint32_t s_pulse_check_counter = 0; // 脉冲检查计数器 +// ==================== PLSR辅助函数声明 ==================== +static void PLSR_Section_StartNewSection(PLSR_RouteConfig_t* route); +static void PLSR_Accel_CalculateSteps(PLSR_RouteConfig_t* route, uint32_t time_ms, uint8_t is_accel); +static void PLSR_Section_ProcessConstSpeed(PLSR_RouteConfig_t* route); +static void PLSR_Section_ProcessWait(PLSR_RouteConfig_t* route); +static uint8_t PLSR_Section_CheckPulseComplete(PLSR_RouteConfig_t* route); +static void PLSR_Section_CheckTransition(PLSR_RouteConfig_t* route); +static void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, uint32_t* period); + // ==================== PLSR等待条件处理函数实现 ==================== /** @@ -47,21 +71,26 @@ void PLSR_Wait_StartTimer(PLSR_RouteConfig_t* route) PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; PLSR_WaitCondition_t* wait_cond = ¤t_section->wait_condition; - // 记录当前时间作为起始时间 + // 根据等待类型设置TIM6计时器 switch (wait_cond->wait_type) { case PLSR_WAIT_TIME: - route->wait_start_tick = g_plsr_system_tick; - break; - case PLSR_WAIT_CONDITION: //<停止条件不需要计数器 + s_wait_time_target = wait_cond->wait_time_ms; + s_wait_time_counter = 0; + s_wait_time_flag = 0; + PLSR_TIM6_Start(); break; case PLSR_WAIT_ACT_TIME: - route->act_start_tick = g_plsr_system_tick; + s_act_time_target = wait_cond->act_time_ms; + s_act_time_counter = 0; + s_act_time_flag = 0; + PLSR_TIM6_Start(); break; + case PLSR_WAIT_CONDITION: case PLSR_WAIT_EXT_EVENT: case PLSR_WAIT_EXT_OR_END: - // 外部事件不需要计时器 + // 这些条件不需要TIM6计时器 break; default: @@ -79,10 +108,16 @@ uint8_t PLSR_Wait_CheckTimeCondition(PLSR_RouteConfig_t* route) { if (route == NULL) return 0; - PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; - uint32_t elapsed_time = g_plsr_system_tick - route->wait_start_tick; + // 检查等待时间标志位 + if (s_wait_time_flag) { + // 清除标志位和停止计时器 + s_wait_time_flag = 0; + s_wait_time_target = 0; + PLSR_TIM6_Stop(); + return 1; // 等待时间已到 + } - return (elapsed_time >= current_section->wait_condition.wait_time_ms) ? 1 : 0; + return 0; // 等待时间未到 } /** @@ -95,10 +130,16 @@ uint8_t PLSR_Wait_CheckActTime(PLSR_RouteConfig_t* route) { if (route == NULL) return 0; - PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; - uint32_t elapsed_time = g_plsr_system_tick - route->act_start_tick; + // 检查ACT时间标志位 + if (s_act_time_flag) { + // 清除标志位和停止计时器 + s_act_time_flag = 0; + s_act_time_target = 0; + PLSR_TIM6_Stop(); + return 1; // ACT时间已到 + } - return (elapsed_time >= current_section->wait_condition.act_time_ms) ? 1 : 0; + return 0; // ACT时间未到 } /** @@ -160,21 +201,92 @@ void PLSR_SetSectionCondition(PLSR_RouteConfig_t* route, uint8_t section_num, ui */ uint32_t PLSR_GetSystemTick(void) { - return g_plsr_system_tick; + return s_wait_time_counter; } -// ==================== PLSR辅助函数声明 ==================== -static void PLSR_Section_StartNewSection(PLSR_RouteConfig_t* route); -static void PLSR_Accel_CalculateSteps(PLSR_RouteConfig_t* route, uint32_t time_ms, uint8_t is_accel); -static void PLSR_Section_ProcessConstSpeed(PLSR_RouteConfig_t* route); -static void PLSR_Section_ProcessWait(PLSR_RouteConfig_t* route); -static uint8_t PLSR_Section_CheckPulseComplete(PLSR_RouteConfig_t* route); -static void PLSR_Section_CheckTransition(PLSR_RouteConfig_t* route); -static void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, uint32_t* period); +/** + * @brief 检查任务通知标志 + * @retval 1: 有通知, 0: 无通知 + * + * 该函数用于UCOSII任务中检查是否需要进行段处理。 + * 调用后会自动清除通知标志。 + */ +uint8_t PLSR_CheckTaskNotification(void) +{ + if(s_task_notification_flag) + { + s_task_notification_flag = 0; + return 1; + } + return 0; +} + +/** + * @brief 任务级段处理函数 + * @param route 路径控制结构体指针 + * + * 该函数在UCOSII任务中调用，负责处理段切换逻辑。 + * 与中断级的频率更新分离，避免中断处理时间过长。 + */ +void PLSR_Task_SectionProcess(PLSR_RouteConfig_t* route) +{ + // 参数有效性检查 + if (route == NULL) return; + if (route->route_state != PLSR_ROUTE_RUNNING) return; + + // 段号有效性检查 + if (route->current_section_num == 0 || route->current_section_num > PLSR_MAX_SECTIONS) { + PLSR_Route_Stop(route); + return; + } + + // 处理特殊等待条件（ACT_TIME和EXT_EVENT需要实时处理） + if(route->section[route->current_section_num-1].wait_condition.wait_type == PLSR_WAIT_ACT_TIME + || route->section[route->current_section_num-1].wait_condition.wait_type == PLSR_WAIT_EXT_EVENT) + { + PLSR_Section_ProcessWait(route); + } + + // 根据当前运行状态执行相应的处理逻辑 + switch (route->run_state) + { + case PLSR_STATE_IDLE: + // 空闲状态：开始新段处理 + PLSR_Section_StartNewSection(route); + break; + + case PLSR_STATE_ACCEL: + // 加速状态：加速处理在TIM10中断中进行，任务中只检查状态转换 + PLSR_Section_CheckTransition(route); + break; + + case PLSR_STATE_CONST: + // 匀速状态：保持目标频率运行 + PLSR_Section_ProcessConstSpeed(route); + break; + + case PLSR_STATE_DECEL: + // 减速状态：减速处理在TIM10中断中进行，任务中只检查状态转换 + PLSR_Section_CheckTransition(route); + break; + + case PLSR_STATE_WAIT: + // 等待状态：处理等待条件 + PLSR_Section_ProcessWait(route); + break; + + default: + // 未知状态：重置为空闲状态 + route->run_state = PLSR_STATE_IDLE; + break; + } +} + +// 辅助函数声明已在文件开头声明 /* USER CODE END 1 */ -TIM_HandleTypeDef htim2; +TIM_HandleTypeDef htim2; // TIM2恢复用于脉冲计数 TIM_HandleTypeDef htim6; TIM_HandleTypeDef htim10; TIM_HandleTypeDef htim11; @@ -183,7 +295,6 @@ TIM_HandleTypeDef htim14; /* TIM2 init function */ void MX_TIM2_Init(void) { - /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ @@ -195,19 +306,20 @@ void MX_TIM2_Init(void) /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; - htim2.Init.Prescaler = 0; - htim2.Init.CounterMode = TIM_COUNTERMODE_UP; - htim2.Init.Period = 4294967295; - htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim2.Init.Prescaler = 0; // 不分频，直接计数外部脉冲 + htim2.Init.CounterMode = TIM_COUNTERMODE_UP; // 向上计数 + htim2.Init.Period = 0xFFFFFFFF; // 32位最大值，避免溢出 + htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; // 时钟不分频 htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; if (HAL_TIM_Base_Init(&htim2) != HAL_OK) { Error_Handler(); } - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_ETRMODE2; - sClockSourceConfig.ClockPolarity = TIM_CLOCKPOLARITY_NONINVERTED; - sClockSourceConfig.ClockPrescaler = TIM_CLOCKPRESCALER_DIV1; - sClockSourceConfig.ClockFilter = 0; + // 配置外部时钟源 - ETR模式 + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_ETRMODE2; // 外部时钟模式2 + sClockSourceConfig.ClockPolarity = TIM_CLOCKPOLARITY_NONINVERTED; // 上升沿触发 + sClockSourceConfig.ClockPrescaler = TIM_CLOCKPRESCALER_DIV1; // 不分频 + sClockSourceConfig.ClockFilter = 0; // 无滤波 if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) { Error_Handler(); @@ -219,9 +331,9 @@ void MX_TIM2_Init(void) Error_Handler(); } /* USER CODE BEGIN TIM2_Init 2 */ - HAL_TIM_Base_Start(&htim2); - HAL_TIM_Base_MspInit(&htim2); + /* USER CODE END TIM2_Init 2 */ + } /* TIM6 init function */ void MX_TIM6_Init(void) @@ -433,9 +545,6 @@ void MX_TIM14_Init(void) */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { - // 定义GPIO初始化结构体 - GPIO_InitTypeDef GPIO_InitStruct = {0}; - // 根据定时器实例进行不同的初始化配置 if(tim_baseHandle->Instance==TIM2) { @@ -445,25 +554,25 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) // 使能TIM2时钟 __HAL_RCC_TIM2_CLK_ENABLE(); - // 使能GPIOA时钟，用于配置PA15引脚 + // 使能GPIOA时钟 __HAL_RCC_GPIOA_CLK_ENABLE(); - + /**TIM2 GPIO Configuration - PA15 ------> TIM2_ETR (外部触发输入) + PA15 ------> TIM2_ETR */ - // 配置PA15为TIM2的外部触发输入引脚 - GPIO_InitStruct.Pin = GPIO_PIN_15; // 选择PA15引脚 - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; // 复用推挽输出模式 - GPIO_InitStruct.Pull = GPIO_NOPULL; // 无上下拉 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; // 极高速度 - GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; // 复用功能1：TIM2 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); // 初始化GPIO + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = GPIO_PIN_15; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; // 复用推挽输出 + GPIO_InitStruct.Pull = GPIO_NOPULL; // 无上下拉 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // 高速 + GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; // TIM2复用功能 + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USER CODE BEGIN TIM2_MspInit 1 */ /* USER CODE END TIM2_MspInit 1 */ } - else if(tim_baseHandle->Instance==TIM6) + if(tim_baseHandle->Instance==TIM6) { /* USER CODE BEGIN TIM6_MspInit 0 */ @@ -637,7 +746,7 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle) /* USER CODE END TIM2_MspDeInit 1 */ } - else if(tim_baseHandle->Instance==TIM6) + if(tim_baseHandle->Instance==TIM6) { /* USER CODE BEGIN TIM6_MspDeInit 0 */ @@ -720,10 +829,12 @@ void PLSR_PWM_Init(void) MX_TIM11_Init(); MX_TIM13_Init(); MX_TIM14_Init(); - MX_TIM2_Init(); + MX_TIM2_Init(); // TIM2恢复用于脉冲计数 MX_TIM6_Init(); // 停止PWM输出 HAL_TIM_PWM_Stop(&htim10, TIM_CHANNEL_1); + + BackupSRAM_RestoreData(); } @@ -731,16 +842,19 @@ void PLSR_PWM_Init(void) * @brief 启动PLSR PWM输出 * @param None * @retval None - * @note 启动TIM10 PWM输出和TIM2计数器 + * @note 启动TIM10 PWM输出和更新中断 */ -void PLSR_PWM_Start(void) //<后续加入启动通道选择 +void PLSR_PWM_Start(void) { if (!s_pwm_running) { - // 启动PWM输出 - HAL_TIM_PWM_Start(&htim10, TIM_CHANNEL_1); + // 启动PWM输出和更新中断 + HAL_TIM_PWM_Start_IT(&htim10, TIM_CHANNEL_1); + + // 启动TIM2脉冲计数器 + PLSR_Counter_Start(); - s_pwm_running = 1; //< 更新PWM运行状态 + s_pwm_running = 1; } } @@ -757,7 +871,7 @@ void PLSR_PWM_Stop(void) HAL_TIM_PWM_Stop(&htim10, TIM_CHANNEL_1); // 停止TIM2计数器 - HAL_TIM_Base_Stop(&htim2); + HAL_TIM_Base_Stop(&htim2); // TIM2恢复用于脉冲计数 s_pwm_running = 0; s_current_pwm_freq = 0; @@ -783,8 +897,9 @@ static void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, u // 输出频率 = 定时器时钟频率 / ((预分频器 + 1) * (自动重装载值 + 1)) // 因此：(预分频器 + 1) * (自动重装载值 + 1) = 定时器时钟频率 / 目标频率 - // 频率为0时的异常处理 + // 频率为0时停止PWM输出 if (frequency == 0) { + PLSR_PWM_Stop(); // 直接停止PWM输出 *prescaler = 0; *period = 0; return; @@ -795,7 +910,8 @@ static void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, u // 遍历所有可能的预分频器值，寻找合适的组合 // 预分频器范围：1-65536（寄存器值0-65535） - for (uint16_t psc = 1; psc <= 65535; psc++) { + for (uint16_t psc = 1; psc <= 65535; psc++) + { // 计算对应的自动重装载值 uint32_t arr = total_count / psc; @@ -838,6 +954,13 @@ static void PLSR_CalculateTimerParams(uint32_t frequency, uint16_t* prescaler, u * 6. 状态恢复 - 如果之前在运行，重新启动PWM * 7. 记录更新 - 更新当前频率记录 */ +/** + * @brief 安全设置PWM频率（通过中断更新） + * @param frequency 目标频率(Hz) + * + * 该函数不直接更新定时器参数，而是设置待更新的参数， + * 实际更新在TIM10中断中完成，确保原子性和波形连续性。 + */ void PLSR_PWM_SetFrequency(uint32_t frequency) { uint16_t prescaler = 0; // 预分频器值 @@ -852,18 +975,44 @@ void PLSR_PWM_SetFrequency(uint32_t frequency) // 计算最佳定时器参数 - 根据目标频率计算预分频器和周期值 PLSR_CalculateTimerParams(frequency, &prescaler, &period); + // 设置待更新的参数（在中断中会检查并更新） + s_next_prescaler = prescaler; + s_next_period = period; - // 更新定时器核心参数 - __HAL_TIM_SET_PRESCALER(&htim10, prescaler); //< 放置波形出现问题对参数直接进行更新 - __HAL_TIM_SET_AUTORELOAD(&htim10, period); + // 设置更新挂起标志，中断中会检查此标志并执行更新 + s_freq_update_pending = 1; + + // 更新当前频率记录 - 保存新的频率值供其他函数查询使用 + s_current_pwm_freq = frequency; +} + +/** + * @brief 立即设置PWM频率（直接更新，用于初始化） + * @param frequency 目标频率(Hz) + * + * 该函数直接更新定时器参数，仅用于初始化或紧急情况。 + * 正常运行时应使用PLSR_PWM_SetFrequency()。 + */ +void PLSR_PWM_SetFrequency_Immediate(uint32_t frequency) +{ + uint16_t prescaler = 0; // 预分频器值 + uint32_t period = 0; // 自动重载值(周期) - // 设置占空比为50% - 比较值设为周期的一半，产生对称的PWM波形 - __HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, period / 2); + // 频率范围检查 + if(frequency < PLSR_PWM_FREQ_MIN || frequency > PLSR_PWM_FREQ_MAX) + { + return; + } - // 重置计数器 - 确保从0开始计数，避免参数更新时的计数器状态不一致 - __HAL_TIM_SET_COUNTER(&htim10, 0); + // 计算定时器参数 + PLSR_CalculateTimerParams(frequency, &prescaler, &period); - // 更新当前频率记录 - 保存新的频率值供其他函数查询使用 + // 直接更新定时器参数 + __HAL_TIM_SET_PRESCALER(&htim10, prescaler); + __HAL_TIM_SET_AUTORELOAD(&htim10, period); + __HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, period / 2); + + // 更新当前频率记录 s_current_pwm_freq = frequency; } @@ -873,17 +1022,7 @@ void PLSR_PWM_SetFrequency(uint32_t frequency) * @brief 设置TIM6更新频率 * @param freq_us 更新频率(微秒) * - * 该函数用于动态配置TIM6的更新中断频率，主要用于PLSR系统的加减速控制。 - * TIM6作为基础定时器，其更新频率直接影响加减速算法的执行精度和平滑度。 - * - * 处理流程： - * 1. 频率范围限制 - 确保频率在合理范围内(100us-100ms) - * 2. 参数计算 - 基于APB1时钟计算预分频器和周期值 - * 3. 定时器停止 - 停止当前运行以避免参数更新冲突 - * 4. 参数更新 - 设置新的预分频器、自动重载值和计数器 - * 5. 寄存器同步 - 触发更新事件使新参数生效 - * - * @note 定时器参数计算基于APB1时钟42MHz，预分频器设为41，得到1MHz计数频率(1us/tick) + * @note 定时器参数计算基于APB1时钟84MHz，预分频器设为83，得到1MHz计数频率(1us/tick) */ void PLSR_TIM6_SetUpdateFreq(uint32_t freq_us) { @@ -947,45 +1086,6 @@ void PLSR_TIM6_Stop(void) HAL_TIM_Base_Stop_IT(&htim6); } -/** - * @brief 获取硬件计数器当前值 - * @param None - * @retval 当前计数值 - */ -uint32_t PLSR_Counter_GetCount(void) -{ - return __HAL_TIM_GET_COUNTER(&htim2); -} - -/** - * @brief 重置硬件计数器 - * @param None - * @retval None - */ -void PLSR_Counter_Reset(void) -{ - __HAL_TIM_SET_COUNTER(&htim2, 0); -} - -/** - * @brief 设置目标脉冲数 - * @param target: 目标脉冲数 - * @retval None - */ -void PLSR_Counter_SetTarget(uint32_t target) -{ - s_target_pulse_count = target; -} - -/** - * @brief 获取目标脉冲数 - * @param None - * @retval 目标脉冲数 - */ -uint32_t PLSR_Counter_GetTarget(void) -{ - return s_target_pulse_count; -} /** * @brief 获取当前PWM频率 @@ -1015,37 +1115,78 @@ void PLSR_PWM_SetDutyCycle(uint8_t duty_percent) /** * @brief 定时器周期结束中断回调函数 * @param htim 定时器句柄指针 - * - * 该函数是HAL库的标准定时器中断回调函数，当定时器计数器溢出时被自动调用。 - * 在PLSR系统中，主要用于TIM6的周期性中断处理，实现精确的时序控制。 - * - * 处理流程： - * 1. 定时器识别 - 检查是否为TIM6中断 - * 2. 路径处理 - 调用PLSR_Section_Process执行路径状态机 - * 3. 时钟更新 - 递增系统时钟计数器 - * * @note TIM6中断频率由PLSR_TIM6_SetUpdateFreq函数设置，直接影响加减速算法的执行精度 * @note 该函数在中断上下文中执行，应保持处理时间尽可能短 */ +// 全局变量用于TIM10中断与任务通信 +// 频率更新相关静态变量已在文件开头声明 + +#define PLSR_TASK_CHECK_INTERVAL 100 // 每100个脉冲通知任务一次 + void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - // 检查中断源 - 确保只处理TIM6的中断 + // 检查中断源 - 处理TIM10的PWM更新中断 + if(htim->Instance == TIM10) + { + // 1. 脉冲计数 - 每个PWM脉冲完成时计数 + g_plsr_route.pulse_count++; + + // 2. 加减速过程中的频率参数更新 + if(g_plsr_route.run_state == PLSR_STATE_ACCEL || g_plsr_route.run_state == PLSR_STATE_DECEL) + { + PLSR_Accel_Process(&g_plsr_route); // 在中断中进行加减速处理 + } + + // 3. 检查是否需要频率更新 + if(s_freq_update_pending) + { + // 原子性频率参数更新 + __HAL_TIM_SET_PRESCALER(&htim10, s_next_prescaler); + __HAL_TIM_SET_AUTORELOAD(&htim10, s_next_period); + __HAL_TIM_SET_COMPARE(&htim10, TIM_CHANNEL_1, s_next_period / 2); + + // 清除更新标志 + s_freq_update_pending = 0; + } + + // 4. 定期通知任务进行段处理 + s_pulse_check_counter++; + if(s_pulse_check_counter >= PLSR_TASK_CHECK_INTERVAL) + { + s_pulse_check_counter = 0; + s_task_notification_flag = 1; + } + } + + // TIM6用于等待时间计时 if(htim->Instance == TIM6) { - // PLSR路径状态机处理 - 这是PLSR系统的核心调度函数 - // 在每个TIM6中断周期内执行一次路径处理，包括： - // - 加速/减速算法计算 - // - 匀速段控制 - // - 等待条件检查 - // - 段间切换逻辑 - PLSR_Section_Process(&g_plsr_route); - - // 系统时钟计数器递增 - 提供毫秒级时间基准 - // 注意：这里假设TIM6中断频率配置为1ms，如果频率不同需要相应调整 - g_plsr_system_tick++; + // 等待时间计数器递增 + if(s_wait_time_flag == 0 && s_wait_time_target > 0) + { + uint32_t temp_counter = s_wait_time_counter + 1; + s_wait_time_counter = temp_counter; + if(temp_counter >= s_wait_time_target) + { + s_wait_time_flag = 1; + s_task_notification_flag = 1; // 通知任务进行段切换 + } + } + + if(s_act_time_flag == 0 && s_act_time_target > 0) + { + uint32_t temp_counter = s_act_time_counter + 1; + s_act_time_counter = temp_counter; + if(temp_counter >= s_act_time_target) + { + s_act_time_flag = 1; + s_task_notification_flag = 1; // 通知任务进行段切换 + } + } } } + // ==================== 路径控制函数实现 ==================== /** @@ -1080,6 +1221,11 @@ void PLSR_Route_Init(PLSR_RouteConfig_t* route) route->mode = PLSR_MODE_RELATIVE; // 路径模式：默认相对模式 route->direction = PLSR_DIR_FORWARD; // 运行方向：默认正向 + // 初始化加减速配置 - 系统级配置 + route->accel_config.accel_time_ms = PLSR_DEFAULT_ACCEL_TIME_MS; // 默认加速时间 + route->accel_config.decel_time_ms = PLSR_DEFAULT_DECEL_TIME_MS; // 默认减速时间 + route->accel_config.accel_algorithm = PLSR_ACCEL_LINEAR; // 默认线性加减速 + // 初始化运行状态参数 - 清零所有运行时状态 route->run_state = PLSR_STATE_IDLE; // 运行状态：空闲 route->accel_step_count = 0; // 加速步数计数：清零 @@ -1094,8 +1240,6 @@ void PLSR_Route_Init(PLSR_RouteConfig_t* route) PLSR_Section_Init(&route->section[i], i + 1); // 段号从1开始 } - // 硬件资源重置 - 确保硬件处于安全的初始状态 - PLSR_Counter_Reset(); // 重置脉冲计数器 PLSR_PWM_Stop(); // 停止PWM输出 PLSR_TIM6_Stop(); // 停止TIM6定时器 } @@ -1129,8 +1273,8 @@ void PLSR_Route_Start(PLSR_RouteConfig_t* route) route->current_freq = route->start_freq; //< 设置当前频率为起始频率 route->pulse_count = 0; //< 清零脉冲计数 - // 硬件资源初始化 - PLSR_Counter_Reset(); //< 重置脉冲计数器 + // 重置脉冲计数器 - 现在使用软件计数 + route->pulse_count = 0; // 直接重置软件脉冲计数 // PWM输出初始化 - 根据起始频率决定是否启动 if (route->start_freq > 0) { @@ -1165,7 +1309,7 @@ void PLSR_Route_Stop(PLSR_RouteConfig_t* route) route->current_freq = 0; // 重置计数器 - PLSR_Counter_Reset(); + PLSR_Counter_Reset(); // TIM2恢复用于脉冲计数 } @@ -1190,10 +1334,7 @@ void PLSR_Section_Init(PLSR_SectionConfig_t* section, uint8_t section_num) section->next_section = (section_num < PLSR_MAX_SECTIONS) ? (section_num + 1) : 0; section->section_state = PLSR_SECTION_IDLE; - // 加减速参数初始化 - section->accel_config.accel_time_ms = PLSR_DEFAULT_ACCEL_TIME_MS; - section->accel_config.decel_time_ms = PLSR_DEFAULT_DECEL_TIME_MS; - section->accel_config.accel_algorithm = PLSR_ACCEL_LINEAR; + // 注意：加减速参数现在在路径级别配置，不在段级别 // 等待条件初始化 section->wait_condition.wait_type = PLSR_WAIT_PLUSEEND; @@ -1264,10 +1405,7 @@ void PLSR_Section_Process(PLSR_RouteConfig_t* route) PLSR_Section_ProcessWait(route); break; - case PLSR_STATE_STOP: - // 停止状态：立即停止路径执行 - PLSR_Route_Stop(route); - break; + default: // 未知状态：重置为空闲状态 @@ -1299,14 +1437,14 @@ static void PLSR_Section_StartNewSection(PLSR_RouteConfig_t* route) // 目标频率大于当前频率：需要加速到目标频率 route->run_state = PLSR_STATE_ACCEL; // 计算加速过程的步数和参数（参数1表示加速过程） - PLSR_Accel_CalculateSteps(route, current_section->accel_config.accel_time_ms, 1); + PLSR_Accel_CalculateSteps(route, route->accel_config.accel_time_ms, 1); } else if (route->target_freq < route->current_freq) { // 目标频率小于当前频率：需要减速到目标频率 route->run_state = PLSR_STATE_DECEL; // 计算减速过程的步数和参数（参数0表示减速过程） - PLSR_Accel_CalculateSteps(route, current_section->accel_config.decel_time_ms, 0); + PLSR_Accel_CalculateSteps(route, route->accel_config.decel_time_ms, 0); } else { @@ -1413,23 +1551,23 @@ void PLSR_Section_CalculateConstPulse(PLSR_RouteConfig_t* route) // 参数有效性检查：路径指针不能为空 if (route == NULL) return; - // 获取当前段的配置指针 - PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; + //// 获取当前段的配置指针 + //PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; // 根据路径模式计算本段需要执行的总脉冲数 - uint32_t total_pulse; - if (route->mode == PLSR_MODE_RELATIVE) - { - // 相对模式：直接使用段配置中的目标脉冲数 - total_pulse = current_section->target_pulse; - } - else - { - // 绝对模式：计算从当前位置到目标位置需要的脉冲数 - // 如果目标位置已达到或超过，则无需发送脉冲 - total_pulse = (current_section->target_pulse > route->pulse_count) ? - (current_section->target_pulse - route->pulse_count) : 0; - } + // uint32_t total_pulse; // 暂时注释掉未使用的变量 + // if (route->mode == PLSR_MODE_RELATIVE) + // { + // // 相对模式：直接使用段配置中的目标脉冲数 + // total_pulse = current_section->target_pulse; + // } + // else + // { + // // 绝对模式：计算从当前位置到目标位置需要的脉冲数 + // // 如果目标位置已达到或超过，则无需发送脉冲 + // total_pulse = (current_section->target_pulse > route->pulse_count) ? + // (current_section->target_pulse - route->pulse_count) : 0; + // } // // 计算加减速过程中消耗的脉冲数,方便计算何时进入匀速阶段 // //有问题,步数不等价于脉冲数. @@ -1457,24 +1595,6 @@ void PLSR_Section_CalculateConstPulse(PLSR_RouteConfig_t* route) // ==================== PLSR加减速算法函数实现 ==================== -/** - * @brief 线性加减速算法 - * @param progress: 进度值(0.0-1.0) - * @retval 频率比例(0.0-1.0) - * @note 线性变化的加减速算法 - */ -float PLSR_Accel_CalculateLinear(float progress) -{ - // 线性加减速算法 - // progress: 0.0 到 1.0 的进度值 - // 返回: 0.0 到 1.0 的频率比例 - - if (progress < 0.0f) progress = 0.0f; - if (progress > 1.0f) progress = 1.0f; - - return progress; -} - /** * @brief 曲线加减速算法 * @param progress: 进度值(0.0-1.0) @@ -1602,23 +1722,24 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route) static uint32_t total_decel_steps = 0; // 总减速步数 // 获取当前段配置和初始化变量 - PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; + // PLSR_SectionConfig_t* current_section = &route->section[route->current_section_num - 1]; // 暂时注释掉未使用的变量 uint32_t new_freq = route->current_freq; // 新频率，默认为当前频率 - uint8_t state_changed = 0; // 状态改变标志 // ==================== 加速处理 ==================== if (route->run_state == PLSR_STATE_ACCEL) { // 检查是否还有加速步数需要执行 - if (route->accel_step_count > 0) { + if (route->accel_step_count > 0) + { // 记录总步数和起始频率（仅在第一次进入加速时） - if (total_accel_steps == 0) { + if (total_accel_steps == 0) + { total_accel_steps = route->accel_step_count; // 保存总加速步数 start_freq_accel = route->current_freq; // 保存加速起始频率 } // 根据加速算法类型计算新频率 - switch (current_section->accel_config.accel_algorithm) + switch (route->accel_config.accel_algorithm) { case PLSR_ACCEL_LINEAR: { @@ -1641,12 +1762,14 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route) // 根据算法类型计算频率比例 float freq_ratio = 0.0f; - if (current_section->accel_config.accel_algorithm == PLSR_ACCEL_CURVE) { + if (route->accel_config.accel_algorithm == PLSR_ACCEL_CURVE) + { freq_ratio = PLSR_Accel_CalculateCurve(progress); // 曲线算法 - } else { + } + else + { freq_ratio = PLSR_Accel_CalculateSine(progress); // 正弦算法 - } - + } // 计算新频率 = 起始频率 + (频率范围 × 频率比例) uint32_t freq_range = route->target_freq - start_freq_accel; new_freq = start_freq_accel + (uint32_t)(freq_range * freq_ratio); @@ -1671,7 +1794,6 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route) // 加速完成，设置为目标频率并切换到匀速状态 new_freq = route->target_freq; route->run_state = PLSR_STATE_CONST; - state_changed = 1; // 标记状态已改变 // 重置加速相关的静态变量 total_accel_steps = 0; start_freq_accel = 0; @@ -1689,7 +1811,7 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route) } // 根据减速算法类型计算新频率 - switch (current_section->accel_config.accel_algorithm) { + switch (route->accel_config.accel_algorithm) { case PLSR_ACCEL_LINEAR: { // 直线减速：使用固定频率减量 @@ -1711,7 +1833,7 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route) // 根据算法类型计算频率比例 float freq_ratio = 0.0f; - if (current_section->accel_config.accel_algorithm == PLSR_ACCEL_CURVE) { + if (route->accel_config.accel_algorithm == PLSR_ACCEL_CURVE) { freq_ratio = PLSR_Accel_CalculateCurve(progress); // 曲线算法 } else { freq_ratio = PLSR_Accel_CalculateSine(progress); // 正弦算法 @@ -1738,10 +1860,17 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route) } else { - // 减速完成，设置为目标频率并切换到匀速状态 + // 减速完成，设置为目标频率 new_freq = route->target_freq; - route->run_state = PLSR_STATE_CONST; - state_changed = 1; // 标记状态已改变 + + // 如果目标频率为0，停止PWM输出并直接进入等待状态 + if (route->target_freq == 0) { + PLSR_PWM_Stop(); // 停止PWM输出 + route->run_state = PLSR_STATE_WAIT; // 直接进入等待状态 + } else { + route->run_state = PLSR_STATE_CONST; // 进入匀速状态 + } + // 重置减速相关的静态变量 total_decel_steps = 0; start_freq_decel = 0; @@ -1749,16 +1878,20 @@ void PLSR_Accel_Process(PLSR_RouteConfig_t* route) } // ==================== 频率更新和状态检查 ==================== - // 如果频率发生变化，更新PWM输出频率 + // 如果频率发生变化，设置频率更新标志 if (new_freq != route->current_freq) { route->current_freq = new_freq; // 更新当前频率 - PLSR_PWM_SetFrequency(new_freq); // 设置PWM输出频率 - PLSR_PWM_Start(); + // 计算新的定时器参数并设置更新标志 + uint16_t prescaler; + uint32_t period; + PLSR_CalculateTimerParams(new_freq, &prescaler, &period); + s_next_prescaler = prescaler; + s_next_period = period; + s_freq_update_pending = 1; // 设置频率更新标志 } - // 更新脉冲计数 - route->pulse_count = PLSR_Counter_GetCount(); + // 脉冲计数已在TIM10中断中自动更新 // 检查是否需要切换状态或段 // 当状态改变或脉冲完成时，进行状态转换检查 @@ -1778,8 +1911,7 @@ static void PLSR_Section_ProcessConstSpeed(PLSR_RouteConfig_t* route) { if (route == NULL) return; - // 更新脉冲计数 - route->pulse_count = PLSR_Counter_GetCount(); + // 脉冲计数已在TIM10中断中自动更新 // 检查是否需要进入减速或完成段 if (PLSR_Section_CheckPulseComplete(route)) @@ -1867,6 +1999,67 @@ static void PLSR_Section_CheckTransition(PLSR_RouteConfig_t* route) } } +// ==================== PLSR计数器控制函数实现 ==================== + +/** + * @brief 初始化PLSR计数器 + * @param None + * @retval None + * @note 初始化TIM2作为外部脉冲计数器 + */ +void PLSR_Counter_Init(void) +{ + // TIM2初始化已在MX_TIM2_Init中完成 + // 这里可以添加额外的计数器配置 +} + +/** + * @brief 启动PLSR计数器 + * @param None + * @retval None + * @note 启动TIM2计数器开始计数外部脉冲 + */ +void PLSR_Counter_Start(void) +{ + // 重置计数器到0 + __HAL_TIM_SET_COUNTER(&htim2, 0); + // 启动TIM2计数器 + HAL_TIM_Base_Start(&htim2); +} + +/** + * @brief 停止PLSR计数器 + * @param None + * @retval None + * @note 停止TIM2计数器 + */ +void PLSR_Counter_Stop(void) +{ + HAL_TIM_Base_Stop(&htim2); +} + +/** + * @brief 重置PLSR计数器 + * @param None + * @retval None + * @note 将TIM2计数器重置为0 + */ +void PLSR_Counter_Reset(void) +{ + __HAL_TIM_SET_COUNTER(&htim2, 0); +} + +/** + * @brief 获取PLSR计数器当前值 + * @param None + * @retval 当前计数值 + * @note 读取TIM2计数器的当前值 + */ +uint32_t PLSR_Counter_GetCount(void) +{ + return __HAL_TIM_GET_COUNTER(&htim2); +} + diff --git a/PLSR/PLSR/Core/Src/usart.c b/PLSR/PLSR/Core/Src/usart.c index 852d080..d0926ca 100644 --- a/PLSR/PLSR/Core/Src/usart.c +++ b/PLSR/PLSR/Core/Src/usart.c @@ -21,7 +21,30 @@ #include "usart.h" /* USER CODE BEGIN 0 */ +// USART1缓冲区变量定义 - 添加内存对齐确保DMA传输稳定 +uint8_t usart1_rx_buffer[USART1_RX_BUFFER_SIZE] __attribute__((aligned(4))); +volatile uint16_t usart1_rx_head = 0; +volatile uint16_t usart1_rx_tail = 0; +uint16_t Usart1_Rx_Count = 0; +uint8_t usart1_dma_rx_buffer[USART1_RX_BUFFER_SIZE] __attribute__((aligned(4))); +volatile uint16_t usart1_dma_rx_len = 0; +uint8_t usart1_dma_tx_buffer[USART1_TX_BUFFER_SIZE] __attribute__((aligned(4))); +volatile uint8_t usart1_tx_busy = 0; // 发送忙标志 +// Modbus从机实例 +ModbusSlave_t ModbusSlave; + +// 内部函数声明 +static void Modbus_Send_Response(uint8_t *data, uint16_t length); +static void Modbus_Send_Exception(uint8_t function_code, uint8_t exception_code); +static void Modbus_Process_Read_Coils(uint8_t *frame, uint16_t length); +static void Modbus_Process_Read_Holding_Regs(uint8_t *frame, uint16_t length); +static void Modbus_Process_Write_Multiple_Coils(uint8_t *frame, uint16_t length); +static void Modbus_Process_Write_Multiple_Regs(uint8_t *frame, uint16_t length); + +// 辅助函数声明 +static uint8_t Get_Coil_Bit(uint16_t addr); +static void Set_Coil_Bit(uint16_t addr, uint8_t value); /* USER CODE END 0 */ UART_HandleTypeDef huart1; @@ -53,7 +76,14 @@ void MX_USART1_UART_Init(void) Error_Handler(); } /* USER CODE BEGIN USART1_Init 2 */ - HAL_UART_MspInit(&huart1); + // 使能IDLE中断 + __HAL_UART_ENABLE_IT(&huart1, UART_IT_IDLE); + + // 启动DMA接收 + HAL_UART_Receive_DMA(&huart1, usart1_dma_rx_buffer, USART1_RX_BUFFER_SIZE); + + // 初始化Modbus + Modbus_Init(1); // 默认从机地址为1 /* USER CODE END USART1_Init 2 */ } @@ -82,6 +112,9 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) GPIO_InitStruct.Alternate = GPIO_AF7_USART1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + /* DMA controller clock enable */ + __HAL_RCC_DMA2_CLK_ENABLE(); + /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA2_Stream2; @@ -119,8 +152,16 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx); + /* DMA interrupt init */ + /* DMA2_Stream2_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 6, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); + /* DMA2_Stream7_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 4, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + /* USART1 interrupt Init */ - HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); + HAL_NVIC_SetPriority(USART1_IRQn, 4, 0); HAL_NVIC_EnableIRQ(USART1_IRQn); /* USER CODE BEGIN USART1_MspInit 1 */ @@ -159,4 +200,534 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) /* USER CODE BEGIN 1 */ -/* USER CODE END 1 */ +// printf重定向函数 +int fputc(int ch, FILE *f) +{ + HAL_UART_Transmit(&huart1, (uint8_t*)&ch, 1, HAL_MAX_DELAY); + return ch; +} + + +void USART1_IDLE_IRQHandler(void) +{ + if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_IDLE)) + { + __HAL_UART_CLEAR_IDLEFLAG(&huart1); + + // 停止DMA接收 + HAL_UART_DMAStop(&huart1); + + // 计算接收到的数据长度 + usart1_dma_rx_len = USART1_RX_BUFFER_SIZE - __HAL_DMA_GET_COUNTER(huart1.hdmarx); + + if(usart1_dma_rx_len > 0) + { + // 将DMA缓冲区数据复制到接收缓冲区 + for(uint16_t i = 0; i < usart1_dma_rx_len; i++) + { + if(Usart1_Rx_Count < USART1_RX_BUFFER_SIZE) + { + usart1_rx_buffer[usart1_rx_head] = usart1_dma_rx_buffer[i]; + usart1_rx_head = (usart1_rx_head + 1) % USART1_RX_BUFFER_SIZE; + Usart1_Rx_Count++; + } + } + } + + // 重新启动DMA接收 + HAL_UART_Receive_DMA(&huart1, usart1_dma_rx_buffer, USART1_RX_BUFFER_SIZE); + } +} + +// DMA发送函数 +uint8_t USART1_SendData_DMA(uint8_t* data, uint16_t len) +{ + if(usart1_tx_busy) + { + return 0; // 发送忙，返回失败 + } + + if(len > USART1_TX_BUFFER_SIZE) + { + return 0; // 数据长度超出缓冲区大小 + } + + // 复制数据到发送缓冲区 + memcpy(usart1_dma_tx_buffer, data, len); + + usart1_tx_busy = 1; + + // 启动DMA发送 + if(HAL_UART_Transmit_DMA(&huart1, usart1_dma_tx_buffer, len) != HAL_OK) + { + usart1_tx_busy = 0; + return 0; + } + + return 1; // 发送成功 +} + +// HAL库版本的串口发送函数 +void USART1_SendData(uint8_t* data, uint16_t len) +{ + HAL_UART_Transmit_DMA(&huart1, data, len); +} + +// DMA发送完成回调函数 +void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) +{ + if(huart->Instance == USART1) + { + usart1_tx_busy = 0; // 清除发送忙标志 + } +} + +/** + * @brief Modbus从机初始化 + * @param slave_addr 从机地址 + */ +void Modbus_Init(uint8_t slave_addr) +{ + ModbusSlave.slave_address = slave_addr; + memset(ModbusSlave.holding_regs, 0, sizeof(ModbusSlave.holding_regs)); + memset(ModbusSlave.coils, 0, sizeof(ModbusSlave.coils)); +} + +/** + * @brief Modbus数据处理函数 + */ +void Modbus_Process(void) +{ + if(Usart1_Rx_Count < 8) return; // 最小Modbus帧长度检查 + + // 检查帧完整性 + uint8_t frame[256]; + uint16_t frame_len = 0; + + // 从接收缓冲区读取数据 + while(Usart1_Rx_Count > 0) + { + frame[frame_len] = usart1_rx_buffer[usart1_rx_tail]; + usart1_rx_tail = (usart1_rx_tail + 1) % USART1_RX_BUFFER_SIZE; + Usart1_Rx_Count--; + frame_len++; + + // 检查是否为完整帧 + if(frame_len >= 8) + { + // 验证CRC + uint16_t crc_received = (frame[frame_len-1] << 8) | frame[frame_len-2]; + uint16_t crc_calculated = Modbus_CRC16(frame, frame_len - 2); + + if(crc_received == crc_calculated && frame[0] == ModbusSlave.slave_address) + { + // 处理Modbus帧 + uint8_t function_code = frame[1]; + + switch(function_code) + { + case MODBUS_FC_READ_COILS: + Modbus_Process_Read_Coils(frame, frame_len); + break; + case MODBUS_FC_READ_HOLDING_REGS: + Modbus_Process_Read_Holding_Regs(frame, frame_len); + break; + case MODBUS_FC_WRITE_MULTIPLE_COILS: + Modbus_Process_Write_Multiple_Coils(frame, frame_len); + break; + case MODBUS_FC_WRITE_MULTIPLE_REGS: + Modbus_Process_Write_Multiple_Regs(frame, frame_len); + break; + case MODBUS_FC_WRITE_REG: + Modbus_Process_Write_Reg(frame,frame_len); + break; + case MODBUS_FC_SEND_LOG: + Modbus_Handle_SendLog(frame, frame_len); + break; + default: + Modbus_Send_Exception(function_code, MODBUS_EX_ILLEGAL_FUNCTION); + break; + } + break; + } + } + } +} + +/** + * @brief 处理Modbus日志发送请求 + * @param frame 接收的Modbus帧 + * @param length 帧长度 + */ +void Modbus_Handle_SendLog(uint8_t* frame, uint16_t length) +{ + if(length != 8) + { + Modbus_Log(0x01, MODBUS_FC_SEND_LOG, 0, 0, 0x01, MODBUS_EX_ILLEGAL_DATA_VALUE); + Modbus_Send_Exception(MODBUS_FC_SEND_LOG, MODBUS_EX_ILLEGAL_DATA_VALUE); + return; + } + + uint16_t log_index = (frame[2] << 8) | frame[3]; + uint16_t log_count = (frame[4] << 8) | frame[5]; + + if(log_count == 0 || log_count > 30) + { + Modbus_Log(0x01, MODBUS_FC_SEND_LOG, log_index, log_count, 0x01, MODBUS_EX_ILLEGAL_COUNT); + Modbus_Send_Exception(MODBUS_FC_SEND_LOG, MODBUS_EX_ILLEGAL_COUNT); + return; + } + + if(log_index >= MODBUS_LOG_MAX) + { + Modbus_Log(0x01, MODBUS_FC_SEND_LOG, log_index, log_count, 0x01, MODBUS_EX_ILLEGAL_DATA_ADDRESS); + Modbus_Send_Exception(MODBUS_FC_SEND_LOG, MODBUS_EX_ILLEGAL_DATA_ADDRESS); + return; + } + + // 发送日志数据 + for(uint16_t i = 0; i < log_count && (log_index + i) < MODBUS_LOG_MAX; i++) + { + uint8_t buf[8]; + ModbusLog* log = &modbus_logs[(log_index + i) % MODBUS_LOG_MAX]; + + buf[0] = log->element_type; + buf[1] = log->function_code; + buf[2] = (log->start_address >> 8) & 0xFF; + buf[3] = log->start_address & 0xFF; + buf[4] = (log->data_len >> 8) & 0xFF; + buf[5] = log->data_len & 0xFF; + buf[6] = log->operation_type; + buf[7] = log->error_code; + + // 发送日志数据 + USART1_SendData(buf, 8); + } + } + + /** + * @brief 处理读线圈请求 + * @param frame 接收的Modbus帧 + * @param length 帧长度 + */ + static void Modbus_Process_Read_Coils(uint8_t *frame, uint16_t length) + { + if(length != 8) + { + Modbus_Send_Exception(MODBUS_FC_READ_COILS, MODBUS_EX_ILLEGAL_DATA_VALUE); + return; + } + + uint16_t start_addr = (frame[2] << 8) | frame[3]; + uint16_t coil_count = (frame[4] << 8) | frame[5]; + + if(coil_count == 0 || coil_count > 2000 || start_addr + coil_count > MODBUS_COIL_COUNT) + { + Modbus_Send_Exception(MODBUS_FC_READ_COILS, MODBUS_EX_ILLEGAL_DATA_ADDRESS); + return; + } + + uint8_t response[256]; + response[0] = ModbusSlave.slave_address; + response[1] = MODBUS_FC_READ_COILS; + response[2] = (coil_count + 7) / 8; // 字节数 + + uint16_t byte_count = response[2]; + for(uint16_t i = 0; i < byte_count; i++) + { + response[3 + i] = 0; + for(uint8_t bit = 0; bit < 8 && (i * 8 + bit) < coil_count; bit++) + { + if(Get_Coil_Bit(start_addr + i * 8 + bit)) + { + response[3 + i] |= (1 << bit); + } + } + } + + Modbus_Send_Response(response, 3 + byte_count); + } + + /** + * @brief 读保持寄存器请求 + * @param frame 接收的Modbus帧 + * @param length 帧长度 + */ + static void Modbus_Process_Read_Holding_Regs(uint8_t *frame, uint16_t length) + { + if(length != 8) + { + Modbus_Send_Exception(MODBUS_FC_READ_HOLDING_REGS, MODBUS_EX_ILLEGAL_DATA_VALUE); + return; + } + + uint16_t start_addr = (frame[2] << 8) | frame[3]; + uint16_t reg_count = (frame[4] << 8) | frame[5]; + + if(reg_count == 0 || reg_count > 125 || start_addr + reg_count > MODBUS_HOLDING_REG_COUNT) + { + Modbus_Send_Exception(MODBUS_FC_READ_HOLDING_REGS, MODBUS_EX_ILLEGAL_DATA_ADDRESS); + return; + } + + uint8_t response[256]; + response[0] = ModbusSlave.slave_address; + response[1] = MODBUS_FC_READ_HOLDING_REGS; + response[2] = reg_count * 2; // 字节数 + + for(uint16_t i = 0; i < reg_count; i++) + { + uint16_t reg_value = ModbusSlave.holding_regs[start_addr + i]; + response[3 + i * 2] = (reg_value >> 8) & 0xFF; + response[4 + i * 2] = reg_value & 0xFF; + } + + Modbus_Send_Response(response, 3 + reg_count * 2); + } + + /** + * @brief 处理写多个线圈请求 + * @param frame 接收的Modbus帧 + * @param length 帧长度 + */ + static void Modbus_Process_Write_Multiple_Coils(uint8_t *frame, uint16_t length) + { + if(length < 9) + { + Modbus_Send_Exception(MODBUS_FC_WRITE_MULTIPLE_COILS, MODBUS_EX_ILLEGAL_DATA_VALUE); + return; + } + + uint16_t start_addr = (frame[2] << 8) | frame[3]; + uint16_t coil_count = (frame[4] << 8) | frame[5]; + uint8_t byte_count = frame[6]; + + if(coil_count == 0 || coil_count > 1968 || start_addr + coil_count > MODBUS_COIL_COUNT || + byte_count != (coil_count + 7) / 8 || length != 9 + byte_count) + { + Modbus_Send_Exception(MODBUS_FC_WRITE_MULTIPLE_COILS, MODBUS_EX_ILLEGAL_DATA_VALUE); + return; + } + + // 写入线圈数据 + for(uint16_t i = 0; i < coil_count; i++) + { + uint8_t byte_index = i / 8; + uint8_t bit_index = i % 8; + uint8_t coil_value = (frame[7 + byte_index] >> bit_index) & 0x01; + Set_Coil_Bit(start_addr + i, coil_value); + } + + // 发送响应 + uint8_t response[8]; + response[0] = ModbusSlave.slave_address; + response[1] = MODBUS_FC_WRITE_MULTIPLE_COILS; + response[2] = (start_addr >> 8) & 0xFF; + response[3] = start_addr & 0xFF; + response[4] = (coil_count >> 8) & 0xFF; + response[5] = coil_count & 0xFF; + + Modbus_Send_Response(response, 6); + } + + /** + * @brief 处理写单个保持寄存器请求 + * @param frame 接收的Modbus帧 + * @param length 帧长度 + */ + static void Modbus_Process_Write_Reg(uint8_t *frame, uint16_t length) + { + if(length != 8) + { + Modbus_Send_Exception(MODBUS_FC_WRITE_REG, MODBUS_EX_ILLEGAL_DATA_VALUE); + return; + } + + uint16_t reg_addr = (frame[2] << 8) | frame[3]; + uint16_t write_num = (frame[4] << 8) | frame[5]; + + if(reg_addr > MODBUS_HOLDING_REG_COUNT) + { + Modbus_Send_Exception(MODBUS_FC_WRITE_REG, MODBUS_EX_ILLEGAL_DATA_ADDRESS); + return; + } + + ModbusSlave.holding_regs[reg_addr] = write_num; + + BackupSRAM_SaveRegData(); + + // 发送响应 + uint8_t response[8]; + response[0] = ModbusSlave.slave_address; + response[1] = MODBUS_FC_WRITE_REG; + response[2] = (reg_addr >> 8) & 0xFF; + response[3] = reg_addr & 0xFF; + response[4] = (write_num >> 8) & 0xFF; + response[5] = write_num & 0xFF; + + Modbus_Send_Response(response, 8); + } + + /** + * @brief 处理写多个保持寄存器请求 + * @param frame 接收的Modbus帧 + * @param length 帧长度 + */ + static void Modbus_Process_Write_Multiple_Regs(uint8_t *frame, uint16_t length) + { + if(length < 9) + { + Modbus_Send_Exception(MODBUS_FC_WRITE_MULTIPLE_REGS, MODBUS_EX_ILLEGAL_DATA_VALUE); + return; + } + + uint16_t start_addr = (frame[2] << 8) | frame[3]; + uint16_t reg_count = (frame[4] << 8) | frame[5]; + uint8_t byte_count = frame[6]; + + if(reg_count == 0 || reg_count > 123 || start_addr + reg_count > MODBUS_HOLDING_REG_COUNT || + byte_count != reg_count * 2 || length != 9 + byte_count) + { + Modbus_Send_Exception(MODBUS_FC_WRITE_MULTIPLE_REGS, MODBUS_EX_ILLEGAL_DATA_VALUE); + return; + } + + // 写入寄存器数据 + for(uint16_t i = 0; i < reg_count; i++) + { + uint16_t reg_value = (frame[7 + i * 2] << 8) | frame[8 + i * 2]; + ModbusSlave.holding_regs[start_addr + i] = reg_value; + } + + BackupSRAM_SaveRegData(); + + // 发送响应 + uint8_t response[8]; + response[0] = ModbusSlave.slave_address; + response[1] = MODBUS_FC_WRITE_MULTIPLE_REGS; + response[2] = (start_addr >> 8) & 0xFF; + response[3] = start_addr & 0xFF; + response[4] = (reg_count >> 8) & 0xFF; + response[5] = reg_count & 0xFF; + + Modbus_Send_Response(response, 6); + } + + /** + * @brief 发送Modbus响应 + * @param data 响应数据 + * @param length 数据长度 + */ + static void Modbus_Send_Response(uint8_t *data, uint16_t length) + { + uint16_t crc = Modbus_CRC16(data, length); + data[length] = crc & 0xFF; + data[length + 1] = (crc >> 8) & 0xFF; + + USART1_SendData_DMA(data, length + 2); + } + + /** + * @brief 发送Modbus异常响应 + * @param function_code 功能码 + * @param exception_code 异常码 + */ + static void Modbus_Send_Exception(uint8_t function_code, uint8_t exception_code) + { + uint8_t response[5]; + response[0] = ModbusSlave.slave_address; + response[1] = function_code | 0x80; + response[2] = exception_code; + + uint16_t crc = Modbus_CRC16(response, 3); + response[3] = crc & 0xFF; + response[4] = (crc >> 8) & 0xFF; + + USART1_SendData_DMA(response, 5); + } + + /** + * @brief 获取线圈位状态 + * @param addr 线圈地址 + * @return 线圈状态 (0或1) + */ + static uint8_t Get_Coil_Bit(uint16_t addr) + { + if(addr >= MODBUS_COIL_COUNT) return 0; + + uint16_t byte_index = addr / 8; + uint8_t bit_index = addr % 8; + + return (ModbusSlave.coils[byte_index] >> bit_index) & 0x01; + } + + /** + * @brief 设置线圈位状态 + * @param addr 线圈地址 + * @param value 线圈状态 (0或1) + */ + static void Set_Coil_Bit(uint16_t addr, uint8_t value) + { + if(addr >= MODBUS_COIL_COUNT) return; + + uint16_t byte_index = addr / 8; + uint8_t bit_index = addr % 8; + + if(value) + { + ModbusSlave.coils[byte_index] |= (1 << bit_index); + } + else + { + ModbusSlave.coils[byte_index] &= ~(1 << bit_index); + } + } + + /** + * @brief 设置保持寄存器值 + * @param addr 寄存器地址 + * @param value 寄存器值 + */ + void Modbus_SetHoldingRegister(uint16_t addr, uint16_t value) + { + if(addr < MODBUS_HOLDING_REG_COUNT) + { + ModbusSlave.holding_regs[addr] = value; + } + } + + /** + * @brief 获取保持寄存器值 + * @param addr 寄存器地址 + * @return 寄存器值 + */ + uint16_t Modbus_GetHoldingRegister(uint16_t addr) + { + if(addr < MODBUS_HOLDING_REG_COUNT) + { + return ModbusSlave.holding_regs[addr]; + } + return 0; + } + + /** + * @brief 设置线圈状态 + * @param addr 线圈地址 + * @param value 线圈状态 + */ + void Modbus_SetCoil(uint16_t addr, uint8_t value) + { + Set_Coil_Bit(addr, value); + } + + /** + * @brief 获取线圈状态 + * @param addr 线圈地址 + * @return 线圈状态 + */ + uint8_t Modbus_GetCoil(uint16_t addr) + { + return Get_Coil_Bit(addr); + } + + /* USER CODE END 1 */ diff --git a/PLSR/PLSR/EWARM/settings/Project.wsdt b/PLSR/PLSR/EWARM/settings/Project.wsdt index 6df03c2..6c0fb2e 100644 --- a/PLSR/PLSR/EWARM/settings/Project.wsdt +++ b/PLSR/PLSR/EWARM/settings/Project.wsdt @@ -60,7 +60,7 @@ - 78 + 182 30 30 30 @@ -90,11 +90,11 @@ 1 1 1 - E802000013001386000009000000108600003401000023920000030000000F810000010000005F860000030000000C8100000F00000056860000AD00000000840000010000000E810000010000001A860000010000001F8100001400000009860000010000000B81000002000000148600001500000011860000870000002781000006000000468100002E00000002810000010000000886000002000000 + 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34050 diff --git a/PLSR/PLSR/EWARM/settings/test.1.dnx b/PLSR/PLSR/EWARM/settings/test.1.dnx index 66b5caa..3f8abc0 100644 --- a/PLSR/PLSR/EWARM/settings/test.1.dnx +++ b/PLSR/PLSR/EWARM/settings/test.1.dnx @@ -14,13 +14,13 @@ 46232557 - 0 - 2 _ 0 _ 0 + 0 + 2 - 154654718 + 3949072944 _ 0 @@ -84,6 +84,13 @@ _ "" _ 0 + + 0 + + + 0 + 0 + 0 0 @@ -129,6 +136,9 @@ 1 0 + + 0 + 0 3 @@ -142,14 +152,4 @@ 1 - - 0 - - - 0 - - - 0 - 0 - diff --git a/PLSR/PLSR/EWARM/test.1.dep b/PLSR/PLSR/EWARM/test.1.dep index 338306d..94f136e 100644 --- a/PLSR/PLSR/EWARM/test.1.dep +++ b/PLSR/PLSR/EWARM/test.1.dep @@ -1,1329 +1,917 @@ 4 - 971238360 + 846455308 test.1 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h - $PROJ_DIR$\test.1\Obj\dma.__cstat.et - $PROJ_DIR$\..\UCOS\Source\os_time.c - $PROJ_DIR$\test.1\Obj\stm32f4xx_ll_i2c.xcl - $PROJ_DIR$\..\UCOS\Ports\os_cpu.h - $TOOLKIT_DIR$\inc\c\DLib_Product.h - $TOOLKIT_DIR$\inc\c\ysizet.h - $PROJ_DIR$\test.1\List\test.1.map - $TOOLKIT_DIR$\inc\c\DLib_Config_Full.h - $PROJ_DIR$\test.1\Obj\stm32f4xx_ll_pwr.xcl - $PROJ_DIR$\test.1\Obj\stm32f4xx_ll_rcc.o - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + $PROJ_DIR$\..\Core\Src\flash_save.c + $PROJ_DIR$\startup_stm32f407xx.s + $PROJ_DIR$\..\Core\Src\modbus_crc.c + $PROJ_DIR$\..\Core\Src\modbus_log.c + $PROJ_DIR$\..\Core\Src\main.c + $PROJ_DIR$\..\Core\Src\gpio.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c - $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c + $PROJ_DIR$\..\Core\Src\tim.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c $PROJ_DIR$\..\Core\Src\stm32f4xx_it.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_timebase_tim.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c - $PROJ_DIR$\..\Core\Src\system_stm32f4xx.c - $PROJ_DIR$\..\Core\Src\usart.c - $PROJ_DIR$\..\Core\Src\gpio.c - $PROJ_DIR$\..\Core\Src\tim.c - $PROJ_DIR$\..\Core\Src\dma.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c - $PROJ_DIR$\..\Core\Src\main.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c - $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_timebase_tim.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sram.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c - $PROJ_DIR$\startup_stm32f407xx.s + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + $PROJ_DIR$\..\Core\Src\system_stm32f4xx.c $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c - $PROJ_DIR$\test.1\Obj\stm32f4xx_ll_rcc.__cstat.et - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dac.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c - $PROJ_DIR$\..\UCOS\Ports\os_cpu_a.asm - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c - $PROJ_DIR$\..\UCOS\Source\ucos_ii.c - $PROJ_DIR$\test.1\Obj\stm32f4xx_ll_crc.o - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_usart.o - $PROJ_DIR$\..\UCOS\Ports\os_dbg.c - $PROJ_DIR$\test.1\Obj\ucos_ii.__cstat.et - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_timebase_tim.xcl - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_rcc_ex.__cstat.et - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_crc.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_spi.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_flash_ex.xcl - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_usart.c - $PROJ_DIR$\test.1\Obj\usart.xcl - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_exti.o - $PROJ_DIR$\..\UCOS\Config\app_hooks.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rng.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_wwdg.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_pwr.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_i2c.c - $PROJ_DIR$\..\UCOS\Ports\os_cpu_c.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c - $PROJ_DIR$\test.1\Obj\system_stm32f4xx.__cstat.et - $PROJ_DIR$\test.1\Obj\os_dbg.__cstat.et - $PROJ_DIR$\test.1\Obj\stm32f4xx_hal_i2c.xcl - $PROJ_DIR$\test.1\Obj\stm32f4xx_ll_dma.o - $PROJ_DIR$\..\UCOS\Source\os_mutex.c - $TOOLKIT_DIR$\inc\c\stddef.h - $PROJ_DIR$\..\UCOS\Config\app_cfg.h - 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205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 69 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 89 65 58 59 57 60 61 63 - $PROJ_DIR$\..\Core\Src\tim.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_timebase_tim.c - - BICOMP - 82 - - - __cstat - 149 - ICCARM - 154 + 116 ICCARM - 155 137 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 161 162 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Core\Src\dma.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c - - BICOMP - 191 - - - __cstat - 1 - ICCARM - 238 + 94 ICCARM - 88 137 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c - - BICOMP - 73 - - - __cstat - 230 - ICCARM - 168 + 113 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c - - BICOMP - 123 - - - __cstat - 100 - ICCARM - 180 + 119 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Core\Src\main.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c - - BICOMP - 140 - - - __cstat - 250 - ICCARM - 204 + 114 ICCARM - 137 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 245 173 77 217 139 214 4 256 155 167 88 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c - - BICOMP - 59 - - - __cstat - 201 - ICCARM - 211 + 91 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c - - BICOMP - 109 - - - __cstat - 156 - ICCARM - 153 + 118 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c - - BICOMP - 131 - - - __cstat - 185 - ICCARM - 223 + 96 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c - - BICOMP - 98 - - - __cstat - 85 - ICCARM - 110 + 109 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c - - BICOMP - 218 - - - __cstat - 181 - ICCARM - 171 + 97 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_timebase_tim.c + $PROJ_DIR$\..\Core\Src\system_stm32f4xx.c - - BICOMP - 53 - - - __cstat - 215 - ICCARM - 202 + 120 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 76 66 77 71 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c - - BICOMP - 206 - - - __cstat - 195 - ICCARM - 231 + 93 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sram.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c - - BICOMP - 103 - - - __cstat - 105 - ICCARM - 216 + 127 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 69 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c + $PROJ_DIR$\..\Core\Src\usart.c - - BICOMP - 210 - - - __cstat - 207 - ICCARM - 259 + 98 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 82 69 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 57 80 87 81 83 88 59 84 85 86 - $PROJ_DIR$\startup_stm32f407xx.s + $PROJ_DIR$\..\Core\Src\dma.c - AARM - 219 + ICCARM + 148 + + + ICCARM + 70 69 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 + + - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + $PROJ_DIR$\test.1\Exe\test.1.out - BICOMP - 193 - - - __cstat - 91 + ILINK + 42 - ICCARM - 172 + OBJCOPY + 45 - ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + ILINK + 40 48 148 136 132 122 123 124 43 39 30 33 93 95 117 118 91 90 121 94 113 109 119 114 127 96 97 99 100 101 106 102 116 108 103 104 92 107 110 111 112 115 41 37 36 47 29 44 38 120 105 28 98 46 35 34 32 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c - BICOMP - 194 - - - __cstat - 148 + ICCARM + 44 + + + + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c + ICCARM - 208 + 106 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sram.c - - BICOMP - 240 - - - __cstat - 226 - ICCARM - 107 + 101 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dac.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c - - BICOMP - 254 - - - __cstat - 132 - ICCARM - 111 + 112 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_usart.c - - BICOMP - 95 - - - __cstat - 209 - ICCARM - 74 + 38 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c + $PROJ_DIR$\..\UCOS\Source\ucos_ii.c - BICOMP - 258 - - - __cstat - 79 + ICCARM + 28 + + ICCARM - 160 + 65 58 59 57 68 74 75 79 171 178 60 61 63 56 62 64 52 54 53 180 182 181 179 - + - $PROJ_DIR$\..\UCOS\Ports\os_cpu_a.asm + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c - AARM - 186 + ICCARM + 115 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c - BICOMP - 145 - - - __cstat - 41 + ICCARM + 102 + + ICCARM - 10 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - + - $PROJ_DIR$\..\UCOS\Source\ucos_ii.c + $PROJ_DIR$\..\UCOS\Config\app_hooks.c - - BICOMP - 97 - - - __cstat - 52 - ICCARM - 94 + 48 ICCARM - 173 77 217 139 138 133 144 8 5 6 214 4 256 114 118 228 143 75 90 115 213 2 127 + 55 65 58 59 57 68 74 75 79 171 178 60 61 63 $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c - - BICOMP - 190 - - - __cstat - 104 - ICCARM - 50 + 103 ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\UCOS\Ports\os_dbg.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_crc.c - BICOMP - 212 - - - __cstat - 72 + ICCARM + 107 + + + + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_wwdg.c + ICCARM - 174 + 104 ICCARM - 173 77 217 139 138 133 144 8 5 6 214 4 256 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_crc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c - - BICOMP - 243 - - - __cstat - 92 - ICCARM - 48 + 36 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_spi.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_i2c.c - - BICOMP - 122 - - - __cstat - 121 - ICCARM - 112 + 41 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_usart.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dac.c - - BICOMP - 175 - - - __cstat - 83 - ICCARM - 184 + 110 - $PROJ_DIR$\..\UCOS\Config\app_hooks.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c - - BICOMP - 236 - - - __cstat - 198 - ICCARM - 225 + 108 ICCARM - 196 173 77 217 139 138 133 144 8 5 6 214 4 256 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rng.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c - - BICOMP - 262 - - - __cstat - 135 - ICCARM - 220 + 111 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_wwdg.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_pwr.c - - BICOMP - 237 - - - __cstat - 124 - ICCARM - 86 + 37 - - - ICCARM - 255 183 235 134 101 205 84 159 138 133 144 8 5 128 125 188 81 116 200 224 76 6 251 248 56 242 129 241 177 261 249 189 99 126 179 58 0 - - - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_pwr.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_spi.c - - BICOMP - 9 - - - __cstat - 141 - ICCARM - 120 + 29 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_i2c.c + $PROJ_DIR$\..\UCOS\Ports\os_dbg.c - BICOMP - 3 - - - __cstat - 146 + ICCARM + 30 + + ICCARM - 151 + 65 58 59 57 68 74 75 79 171 178 60 61 63 - + - $PROJ_DIR$\..\UCOS\Ports\os_cpu_c.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c - - BICOMP - 182 - - - __cstat - 142 - ICCARM - 113 + 100 ICCARM - 173 77 217 139 138 133 144 8 5 6 214 4 256 + 76 66 77 71 72 67 73 78 68 74 75 79 171 165 174 173 166 172 170 169 175 178 177 176 167 164 168 163 154 155 159 162 158 161 153 156 157 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c + $PROJ_DIR$\..\UCOS\Ports\os_cpu_a.asm - BICOMP - 260 - - - __cstat - 192 - - - ICCARM - 170 + AARM + 43 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rng.c - - BICOMP - 229 - - - __cstat - 150 - ICCARM - 252 + 47 - $PROJ_DIR$\test.1\Exe\test.1.out + $PROJ_DIR$\..\UCOS\Ports\os_cpu_c.c - ILINK - 7 - - - OBJCOPY - 221 + ICCARM + 39 - ILINK - 89 225 238 244 204 186 113 174 219 172 223 208 253 93 62 152 211 171 110 168 199 136 180 153 231 176 216 259 165 202 107 50 86 147 48 111 74 252 170 151 120 10 220 112 160 184 130 154 94 106 227 169 232 247 + ICCARM + 65 58 59 57 68 74 75 79 171 178 60 61 63 - - [ROOT_NODE] - - - ILINK - 163 7 - - - diff --git a/PLSR/PLSR/EWARM/test.1.ewp b/PLSR/PLSR/EWARM/test.1.ewp index f056ebf2f..ece3bf7 100644 --- a/PLSR/PLSR/EWARM/test.1.ewp +++ b/PLSR/PLSR/EWARM/test.1.ewp @@ -1076,12 +1076,21 @@ $PROJ_DIR$\..\Core\Src\dma.c + + $PROJ_DIR$\..\Core\Src\flash_save.c + $PROJ_DIR$\..\Core\Src\gpio.c $PROJ_DIR$\..\Core\Src\main.c + + $PROJ_DIR$\..\Core\Src\modbus_crc.c + + + $PROJ_DIR$\..\Core\Src\modbus_log.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c diff --git a/PLSR/PLSR/EWARM/test.1.ewt b/PLSR/PLSR/EWARM/test.1.ewt index 68ce3dd..6ff2276 100644 --- a/PLSR/PLSR/EWARM/test.1.ewt +++ b/PLSR/PLSR/EWARM/test.1.ewt @@ -1200,12 +1200,21 @@ $PROJ_DIR$\..\Core\Src\dma.c + + $PROJ_DIR$\..\Core\Src\flash_save.c + $PROJ_DIR$\..\Core\Src\gpio.c $PROJ_DIR$\..\Core\Src\main.c + + $PROJ_DIR$\..\Core\Src\modbus_crc.c + + + $PROJ_DIR$\..\Core\Src\modbus_log.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c diff --git a/PLSR/PLSR/EWARM/test.1/Exe/test.1.hex b/PLSR/PLSR/EWARM/test.1/Exe/test.1.hex index 199c8c9..4a5de05 100644 --- a/PLSR/PLSR/EWARM/test.1/Exe/test.1.hex +++ b/PLSR/PLSR/EWARM/test.1/Exe/test.1.hex @@ -1,29 +1,29 @@ :020000040800F2 -:1000000040370020E15800084D5700084F570008BE -:1000100051570008535700085557000800000000CA -:10002000000000000000000000000000575700081A -:1000300059570008000000005B570008635700088C -:100040002D59000831590008355900083959000860 -:100050003D59000841590008455900084959000810 -:100060004D590008515900085559000859590008C0 -:100070005D59000861590008655900086959000870 -:100080006D59000871590008755900087959000820 -:100090007D590008815900088559000889590008D0 -:1000A0008D5900086B5700089159000895590008B0 -:1000B000995900089D590008A1590008A559000840 -:1000C000A9590008AD590008B1590008B5590008F0 -:1000D000B95900087B570008BD590008C1590008EC -:1000E000C5590008C9590008CD590008D159000860 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+:0400000508006E0180 :00000001FF diff --git a/PLSR/PLSR/EWARM/test.1/Exe/test.1.out b/PLSR/PLSR/EWARM/test.1/Exe/test.1.out index f7ac4e6..08107e9 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Exe/test.1.out and b/PLSR/PLSR/EWARM/test.1/Exe/test.1.out differ diff --git a/PLSR/PLSR/EWARM/test.1/Exe/test.1.sim b/PLSR/PLSR/EWARM/test.1/Exe/test.1.sim index 0b7784e..c56a10d 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Exe/test.1.sim and b/PLSR/PLSR/EWARM/test.1/Exe/test.1.sim differ diff --git a/PLSR/PLSR/EWARM/test.1/List/test.1.map b/PLSR/PLSR/EWARM/test.1/List/test.1.map index bdffa20..a52eec5 100644 --- a/PLSR/PLSR/EWARM/test.1/List/test.1.map +++ b/PLSR/PLSR/EWARM/test.1/List/test.1.map @@ -1,6 +1,6 @@ ############################################################################### # -# IAR ELF Linker V8.40.1.212/W32 for ARM 09/Aug/2025 14:15:17 +# IAR ELF Linker V8.40.1.212/W32 for ARM 11/Aug/2025 14:04:17 # Copyright 2007-2019 IAR Systems AB. # # Output file = @@ -8,11 +8,14 @@ # Map file = # e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\List\test.1.map # Command line = -# -f C:\Users\Mortal\AppData\Local\Temp\EW606D.tmp +# -f C:\Users\Mortal\AppData\Local\Temp\EWBBCD.tmp # (e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\app_hooks.o # e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\dma.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\flash_save.o # e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\gpio.o # e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\main.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\modbus_crc.o +# e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\modbus_log.o # e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\os_cpu_a.o # e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\os_cpu_c.o # e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj\os_dbg.o @@ -106,294 +109,325 @@ initialize by copy { rw }; .intvec ro code 0x800'0000 0x188 startup_stm32f407xx.o [1] - 0x800'0188 0x188 -"P1": 0x593c +"P1": 0x6e28 .text ro code 0x800'0188 0x15dc ucos_ii.o [1] CODE ro code 0x800'1764 0xc4 os_cpu_a.o [1] .text ro code 0x800'1828 0x190 os_cpu_c.o [1] .text ro code 0x800'19b8 0x1c0 os_dbg.o [1] .text ro code 0x800'1b78 0x10 app_hooks.o [1] - .text ro code 0x800'1b88 0xf08 tim.o [1] - .text ro code 0x800'2a90 0x14 memset.o [4] - .text ro code 0x800'2aa4 0xab2 stm32f4xx_hal_tim.o [1] - .text ro code 0x800'3556 0x3a zero_init3.o [4] - .text ro code 0x800'3590 0x1c0 main.o [1] - .text ro code 0x800'3750 0xac stm32f4xx_hal_tim_ex.o [1] - .text ro code 0x800'37fc 0x25c stm32f4xx_hal_gpio.o [1] - .text ro code 0x800'3a58 0x114 stm32f4xx_hal_cortex.o [1] - .text ro code 0x800'3b6c 0x1dc cos_sin32.o [3] - .text ro code 0x800'3d48 0x66 ABImemset.o [4] - .text ro code 0x800'3dae 0x2 stm32f4xx_hal_tim.o [1] - .text ro code 0x800'3db0 0x2 stm32f4xx_hal_tim.o [1] - .text ro code 0x800'3db2 0x2 stm32f4xx_hal_tim.o [1] - .text ro code 0x800'3db4 0x2 stm32f4xx_hal_tim.o [1] - .text ro code 0x800'3db6 0x2 stm32f4xx_hal_tim_ex.o [1] - .text ro code 0x800'3db8 0x2 stm32f4xx_hal_tim.o [1] - .text ro code 0x800'3dba 0x2 stm32f4xx_hal_tim_ex.o [1] - .text ro code 0x800'3dbc 0x34 stm32f4xx_hal.o [1] - .text ro code 0x800'3df0 0x158 usart.o [1] - .text ro code 0x800'3f48 0x40 dma.o [1] - .text ro code 0x800'3f88 0x3ec stm32f4xx_hal_rcc.o [1] - .text ro code 0x800'4374 0x260 stm32f4xx_hal_rcc.o [1] - .text ro code 0x800'45d4 0xc0 stm32f4xx_hal_timebase_tim.o [1] - .text ro code 0x800'4694 0x48 stm32f4xx_hal_msp.o [1] - .text ro code 0x800'46dc 0x874 stm32f4xx_hal_uart.o [1] - .text ro code 0x800'4f50 0x488 stm32f4xx_hal_dma.o [1] - .text ro code 0x800'53d8 0xc stm32f4xx_hal.o [1] - .text ro code 0x800'53e4 0x230 I64DivMod.o [4] - .text ro code 0x800'5614 0x2 stm32f4xx_hal_uart.o [1] - .text ro code 0x800'5616 0x2 stm32f4xx_hal_uart.o [1] - .text ro code 0x800'5618 0x2 stm32f4xx_hal_uart.o [1] - .text ro code 0x800'561a 0x2 stm32f4xx_hal_uart.o [1] - .text ro code 0x800'561c 0x2 I64DivZer.o [4] - .text ro code 0x800'561e 0x2e copy_init3.o [4] - .rodata const 0x800'564c 0x100 ucos_ii.o [1] - .text ro code 0x800'574c 0x70 stm32f4xx_it.o [1] - .text ro code 0x800'57bc 0x28 data_init.o [4] - .text ro code 0x800'57e4 0x22 fpinit_M.o [3] - .iar.init_table const 0x800'5808 0x24 - Linker created - - .rodata const 0x800'582c 0x2 os_dbg.o [1] - .text ro code 0x800'5830 0x1e cmain.o [4] - .text ro code 0x800'584e 0x4 low_level_init.o [2] - .text ro code 0x800'5852 0x4 exit.o [2] - .rodata const 0x800'5856 0x2 os_dbg.o [1] - .text ro code 0x800'5858 0xa cexit.o [4] - .rodata const 0x800'5862 0x2 os_dbg.o [1] - .text ro code 0x800'5864 0x14 exit.o [5] - .rodata const 0x800'5878 0x14 ucos_ii.o [1] - .rodata const 0x800'588c 0x14 ucos_ii.o [1] - .rodata const 0x800'58a0 0x10 system_stm32f4xx.o [1] - .rodata const 0x800'58b0 0x10 ucos_ii.o [1] - .rodata const 0x800'58c0 0x10 ucos_ii.o [1] - .rodata const 0x800'58d0 0x10 ucos_ii.o [1] - .text ro code 0x800'58e0 0x10 startup_stm32f407xx.o [1] - .text ro code 0x800'58f0 0x10 system_stm32f4xx.o [1] - .text ro code 0x800'5900 0xc cstartup_M.o [4] - Initializer bytes const 0x800'590c 0xc - .rodata const 0x800'5918 0x8 stm32f4xx_hal_dma.o [1] - .rodata const 0x800'5920 0x8 system_stm32f4xx.o [1] - .rodata const 0x800'5928 0x4 os_dbg.o [1] - .text ro code 0x800'592c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5930 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5934 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5938 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'593c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5940 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5944 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5948 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'594c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5950 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5954 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5958 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'595c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5960 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5964 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5968 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'596c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5970 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5974 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5978 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'597c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5980 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5984 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5988 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'598c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5990 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5994 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5998 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'599c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59a0 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59a4 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59a8 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59ac 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59b0 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59b4 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59b8 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59bc 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59c0 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59c4 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59c8 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59cc 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59d0 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59d4 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59d8 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59dc 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59e0 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59e4 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59e8 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59ec 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59f0 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59f4 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59f8 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'59fc 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a00 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a04 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a08 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a0c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a10 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a14 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a18 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a1c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a20 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a24 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a28 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a2c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a30 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a34 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a38 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a3c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a40 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a44 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a48 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a4c 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a50 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a54 0x4 startup_stm32f407xx.o [1] - .text ro code 0x800'5a58 0x4 startup_stm32f407xx.o [1] - .rodata const 0x800'5a5c 0x2 os_dbg.o [1] - .rodata const 0x800'5a5e 0x2 os_dbg.o [1] - .rodata const 0x800'5a60 0x2 os_dbg.o [1] - .rodata const 0x800'5a62 0x2 os_dbg.o [1] - .rodata const 0x800'5a64 0x2 os_dbg.o [1] - .rodata const 0x800'5a66 0x2 os_dbg.o [1] - .rodata const 0x800'5a68 0x2 os_dbg.o [1] - .rodata const 0x800'5a6a 0x2 os_dbg.o [1] - .rodata const 0x800'5a6c 0x2 os_dbg.o [1] - .rodata const 0x800'5a6e 0x2 os_dbg.o [1] - .rodata const 0x800'5a70 0x2 os_dbg.o [1] - .rodata const 0x800'5a72 0x2 os_dbg.o [1] - .rodata const 0x800'5a74 0x2 os_dbg.o [1] - .rodata const 0x800'5a76 0x2 os_dbg.o [1] - .rodata const 0x800'5a78 0x2 os_dbg.o [1] - .rodata const 0x800'5a7a 0x2 os_dbg.o [1] - .rodata const 0x800'5a7c 0x2 os_dbg.o [1] - .rodata const 0x800'5a7e 0x2 os_dbg.o [1] - .rodata const 0x800'5a80 0x2 os_dbg.o [1] - .rodata const 0x800'5a82 0x2 os_dbg.o [1] - .rodata const 0x800'5a84 0x2 os_dbg.o [1] - .rodata const 0x800'5a86 0x2 os_dbg.o [1] - .rodata const 0x800'5a88 0x2 os_dbg.o [1] - .rodata const 0x800'5a8a 0x2 os_dbg.o [1] - .rodata const 0x800'5a8c 0x2 os_dbg.o [1] - .rodata const 0x800'5a8e 0x2 os_dbg.o [1] - .rodata const 0x800'5a90 0x2 os_dbg.o [1] - .rodata const 0x800'5a92 0x2 os_dbg.o [1] - .rodata const 0x800'5a94 0x2 os_dbg.o [1] - .rodata const 0x800'5a96 0x2 os_dbg.o [1] - .rodata const 0x800'5a98 0x2 os_dbg.o [1] - .rodata const 0x800'5a9a 0x2 os_dbg.o [1] - .rodata const 0x800'5a9c 0x2 os_dbg.o [1] - .rodata const 0x800'5a9e 0x2 os_dbg.o [1] - .rodata const 0x800'5aa0 0x2 os_dbg.o [1] - .rodata const 0x800'5aa2 0x2 os_dbg.o [1] - .rodata const 0x800'5aa4 0x2 os_dbg.o [1] - .rodata const 0x800'5aa6 0x2 os_dbg.o [1] - .rodata const 0x800'5aa8 0x2 os_dbg.o [1] - .rodata const 0x800'5aaa 0x2 os_dbg.o [1] - .rodata const 0x800'5aac 0x2 os_dbg.o [1] - .rodata const 0x800'5aae 0x2 os_dbg.o [1] - .rodata const 0x800'5ab0 0x2 os_dbg.o [1] - .rodata const 0x800'5ab2 0x2 os_dbg.o [1] - .rodata const 0x800'5ab4 0x2 os_dbg.o [1] - .rodata const 0x800'5ab6 0x2 os_dbg.o [1] - .rodata const 0x800'5ab8 0x2 os_dbg.o [1] - .rodata const 0x800'5aba 0x2 os_dbg.o [1] - .rodata const 0x800'5abc 0x2 os_dbg.o [1] - .rodata const 0x800'5abe 0x2 os_dbg.o [1] - .rodata const 0x800'5ac0 0x2 os_dbg.o [1] - .rodata const 0x800'5ac2 0x2 os_dbg.o [1] - .rodata const 0x800'5ac4 0x0 zero_init3.o [4] - .rodata const 0x800'5ac4 0x0 copy_init3.o [4] - - 0x800'5ac4 0x593c - -"P2", part 1 of 3: 0xc - P2-1 0x2000'0000 0xc - .data inited 0x2000'0000 0x4 stm32f4xx_hal.o [1] - .data inited 0x2000'0004 0x4 system_stm32f4xx.o [1] - .data inited 0x2000'0008 0x4 tim.o [1] - - 0x2000'000c 0xc - -"P2", part 2 of 3: 0x2730 - .bss zero 0x2000'000c 0x7e8 ucos_ii.o [1] - .bss zero 0x2000'07f4 0x400 main.o [1] - .bss zero 0x2000'0bf4 0x400 ucos_ii.o [1] - .bss zero 0x2000'0ff4 0x400 ucos_ii.o [1] - .bss zero 0x2000'13f4 0x280 ucos_ii.o [1] - .bss zero 0x2000'1674 0x200 main.o [1] - .bss zero 0x2000'1874 0x200 main.o [1] - .bss zero 0x2000'1a74 0x200 os_cpu_c.o [1] - .bss zero 0x2000'1c74 0x200 ucos_ii.o [1] - .bss zero 0x2000'1e74 0x1f0 tim.o [1] - .bss zero 0x2000'2064 0x100 ucos_ii.o [1] - .bss zero 0x2000'2164 0xf0 ucos_ii.o [1] - .bss zero 0x2000'2254 0x78 ucos_ii.o [1] - .bss zero 0x2000'22cc 0x60 ucos_ii.o [1] - .bss zero 0x2000'232c 0x60 usart.o [1] - .bss zero 0x2000'238c 0x60 usart.o [1] - .bss zero 0x2000'23ec 0x50 ucos_ii.o [1] - .bss zero 0x2000'243c 0x48 stm32f4xx_hal_timebase_tim.o [1] - .bss zero 0x2000'2484 0x48 tim.o [1] - .bss zero 0x2000'24cc 0x48 tim.o [1] - .bss zero 0x2000'2514 0x48 tim.o [1] - .bss zero 0x2000'255c 0x48 tim.o [1] - .bss zero 0x2000'25a4 0x48 tim.o [1] - .bss zero 0x2000'25ec 0x48 tim.o [1] - .bss zero 0x2000'2634 0x48 usart.o [1] - .bss zero 0x2000'267c 0x40 ucos_ii.o [1] - .bss zero 0x2000'26bc 0x8 ucos_ii.o [1] - .bss zero 0x2000'26c4 0x4 os_cpu_c.o [1] - .bss zero 0x2000'26c8 0x4 stm32f4xx_hal.o [1] - .bss zero 0x2000'26cc 0x4 tim.o [1] - .bss zero 0x2000'26d0 0x4 tim.o [1] - .bss zero 0x2000'26d4 0x4 tim.o [1] - .bss zero 0x2000'26d8 0x4 tim.o [1] - .bss zero 0x2000'26dc 0x4 tim.o [1] - .bss zero 0x2000'26e0 0x4 tim.o [1] - .bss zero 0x2000'26e4 0x4 ucos_ii.o [1] - .bss zero 0x2000'26e8 0x4 ucos_ii.o [1] - .bss zero 0x2000'26ec 0x4 ucos_ii.o [1] - .bss zero 0x2000'26f0 0x4 ucos_ii.o [1] - .bss zero 0x2000'26f4 0x4 ucos_ii.o [1] - .bss zero 0x2000'26f8 0x4 ucos_ii.o [1] - .bss zero 0x2000'26fc 0x4 ucos_ii.o [1] - .bss zero 0x2000'2700 0x4 ucos_ii.o [1] - .bss zero 0x2000'2704 0x4 ucos_ii.o [1] - .bss zero 0x2000'2708 0x4 ucos_ii.o [1] - .bss zero 0x2000'270c 0x4 ucos_ii.o [1] - .bss zero 0x2000'2710 0x4 ucos_ii.o [1] - .bss zero 0x2000'2714 0x4 ucos_ii.o [1] - .bss zero 0x2000'2718 0x4 ucos_ii.o [1] - .bss zero 0x2000'271c 0x4 ucos_ii.o [1] - .bss zero 0x2000'2720 0x4 ucos_ii.o [1] - .bss zero 0x2000'2724 0x4 ucos_ii.o [1] - .bss zero 0x2000'2728 0x2 os_cpu_c.o [1] - .bss zero 0x2000'272a 0x2 ucos_ii.o [1] - .bss zero 0x2000'272c 0x2 ucos_ii.o [1] - .bss zero 0x2000'272e 0x1 tim.o [1] - .bss zero 0x2000'272f 0x1 tim.o [1] - .bss zero 0x2000'2730 0x1 ucos_ii.o [1] - .bss zero 0x2000'2731 0x1 ucos_ii.o [1] - .bss zero 0x2000'2732 0x1 ucos_ii.o [1] - .bss zero 0x2000'2733 0x1 ucos_ii.o [1] - .bss zero 0x2000'2734 0x1 ucos_ii.o [1] - .bss zero 0x2000'2735 0x1 ucos_ii.o [1] - .bss zero 0x2000'2736 0x1 ucos_ii.o [1] - .bss zero 0x2000'2737 0x1 ucos_ii.o [1] - .bss zero 0x2000'2738 0x1 ucos_ii.o [1] - .bss zero 0x2000'2739 0x1 ucos_ii.o [1] - .bss zero 0x2000'273a 0x1 ucos_ii.o [1] - - 0x2000'273b 0x272f + .text ro code 0x800'1b88 0xfc0 tim.o [1] + .text ro code 0x800'2b48 0x14 memset.o [4] + .text ro code 0x800'2b5c 0xb0e stm32f4xx_hal_tim.o [1] + .text ro code 0x800'366a 0x3a zero_init3.o [4] + .text ro code 0x800'36a4 0x1d0 main.o [1] + .text ro code 0x800'3874 0xac stm32f4xx_hal_tim_ex.o [1] + .text ro code 0x800'3920 0x25c stm32f4xx_hal_gpio.o [1] + .text ro code 0x800'3b7c 0x114 stm32f4xx_hal_cortex.o [1] + .text ro code 0x800'3c90 0x220 flash_save.o [1] + .text ro code 0x800'3eb0 0x1dc cos_sin32.o [3] + .text ro code 0x800'408c 0x66 ABImemset.o [4] + .text ro code 0x800'40f2 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'40f4 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'40f6 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'40f8 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'40fa 0x2 stm32f4xx_hal_tim_ex.o [1] + .text ro code 0x800'40fc 0x2 stm32f4xx_hal_tim.o [1] + .text ro code 0x800'40fe 0x2 stm32f4xx_hal_tim_ex.o [1] + .text ro code 0x800'4100 0x34 stm32f4xx_hal.o [1] + .text ro code 0x800'4134 0xaac usart.o [1] + .text ro code 0x800'4be0 0x40 dma.o [1] + .text ro code 0x800'4c20 0x3ec stm32f4xx_hal_rcc.o [1] + .text ro code 0x800'500c 0x260 stm32f4xx_hal_rcc.o [1] + .text ro code 0x800'526c 0x1c stm32f4xx_hal_pwr.o [1] + .text ro code 0x800'5288 0x544 stm32f4xx_hal_dma.o [1] + .text ro code 0x800'57cc 0x38 stm32f4xx_hal_pwr_ex.o [1] + .text ro code 0x800'5804 0xc0 stm32f4xx_hal_timebase_tim.o [1] + .text ro code 0x800'58c4 0x48 stm32f4xx_hal_msp.o [1] + .text ro code 0x800'590c 0xc64 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'6570 0xa6 ABImemcpy.o [4] + .text ro code 0x800'6616 0x2e copy_init3.o [4] + .text ro code 0x800'6644 0x38 modbus_crc.o [1] + .text ro code 0x800'667c 0x44 modbus_log.o [1] + .text ro code 0x800'66c0 0xc stm32f4xx_hal.o [1] + .text ro code 0x800'66cc 0x230 I64DivMod.o [4] + .text ro code 0x800'68fc 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'68fe 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'6900 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'6902 0x2 stm32f4xx_hal_uart.o [1] + .text ro code 0x800'6904 0x2 stm32f4xx_hal_uart.o [1] + .rodata const 0x800'6906 0x2 os_dbg.o [1] + .text ro code 0x800'6908 0x2 I64DivZer.o [4] + .rodata const 0x800'690a 0x2 os_dbg.o [1] + .rodata const 0x800'690c 0x200 modbus_crc.o [1] + .rodata const 0x800'6b0c 0x100 ucos_ii.o [1] + .text ro code 0x800'6c0c 0xa0 stm32f4xx_it.o [1] + .text ro code 0x800'6cac 0x28 data_init.o [4] + .text ro code 0x800'6cd4 0x22 fpinit_M.o [3] + .iar.init_table const 0x800'6cf8 0x24 - Linker created - + .rodata const 0x800'6d1c 0x2 os_dbg.o [1] + .text ro code 0x800'6d20 0x1e cmain.o [4] + .text ro code 0x800'6d3e 0x4 low_level_init.o [2] + .text ro code 0x800'6d42 0x4 exit.o [2] + .rodata const 0x800'6d46 0x2 os_dbg.o [1] + .text ro code 0x800'6d48 0xa cexit.o [4] + .rodata const 0x800'6d52 0x2 os_dbg.o [1] + .text ro code 0x800'6d54 0x14 exit.o [5] + .rodata const 0x800'6d68 0x14 ucos_ii.o [1] + .rodata const 0x800'6d7c 0x14 ucos_ii.o [1] + .rodata const 0x800'6d90 0x10 system_stm32f4xx.o [1] + .rodata const 0x800'6da0 0x10 ucos_ii.o [1] + .rodata const 0x800'6db0 0x10 ucos_ii.o [1] + .rodata const 0x800'6dc0 0x10 ucos_ii.o [1] + .text ro code 0x800'6dd0 0x10 startup_stm32f407xx.o [1] + .text ro code 0x800'6de0 0x10 system_stm32f4xx.o [1] + Initializer bytes const 0x800'6df0 0x10 + .text ro code 0x800'6e00 0xc cstartup_M.o [4] + .rodata const 0x800'6e0c 0x8 stm32f4xx_hal_dma.o [1] + .rodata const 0x800'6e14 0x8 system_stm32f4xx.o [1] + .rodata const 0x800'6e1c 0x4 os_dbg.o [1] + .text ro code 0x800'6e20 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e24 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e28 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e2c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e30 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e34 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e38 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e3c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e40 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e44 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e48 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e4c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e50 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e54 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e58 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e5c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e60 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e64 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e68 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e6c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e70 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e74 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e78 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e7c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e80 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e84 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e88 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e8c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e90 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e94 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e98 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6e9c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ea0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ea4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ea8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6eac 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6eb0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6eb4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6eb8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ebc 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ec0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ec4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ec8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ecc 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ed0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ed4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ed8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6edc 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ee0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ee4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ee8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6eec 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ef0 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ef4 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6ef8 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6efc 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f00 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f04 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f08 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f0c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f10 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f14 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f18 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f1c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f20 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f24 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f28 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f2c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f30 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f34 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f38 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f3c 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f40 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f44 0x4 startup_stm32f407xx.o [1] + .text ro code 0x800'6f48 0x4 startup_stm32f407xx.o [1] + .rodata const 0x800'6f4c 0x2 os_dbg.o [1] + .rodata const 0x800'6f4e 0x2 os_dbg.o [1] + .rodata const 0x800'6f50 0x2 os_dbg.o [1] + .rodata const 0x800'6f52 0x2 os_dbg.o [1] + .rodata const 0x800'6f54 0x2 os_dbg.o [1] + .rodata const 0x800'6f56 0x2 os_dbg.o [1] + .rodata const 0x800'6f58 0x2 os_dbg.o [1] + .rodata const 0x800'6f5a 0x2 os_dbg.o [1] + .rodata const 0x800'6f5c 0x2 os_dbg.o [1] + .rodata const 0x800'6f5e 0x2 os_dbg.o [1] + .rodata const 0x800'6f60 0x2 os_dbg.o [1] + .rodata const 0x800'6f62 0x2 os_dbg.o [1] + .rodata const 0x800'6f64 0x2 os_dbg.o [1] + .rodata const 0x800'6f66 0x2 os_dbg.o [1] + .rodata const 0x800'6f68 0x2 os_dbg.o [1] + .rodata const 0x800'6f6a 0x2 os_dbg.o [1] + .rodata const 0x800'6f6c 0x2 os_dbg.o [1] + .rodata const 0x800'6f6e 0x2 os_dbg.o [1] + .rodata const 0x800'6f70 0x2 os_dbg.o [1] + .rodata const 0x800'6f72 0x2 os_dbg.o [1] + .rodata const 0x800'6f74 0x2 os_dbg.o [1] + .rodata const 0x800'6f76 0x2 os_dbg.o [1] + .rodata const 0x800'6f78 0x2 os_dbg.o [1] + .rodata const 0x800'6f7a 0x2 os_dbg.o [1] + .rodata const 0x800'6f7c 0x2 os_dbg.o [1] + .rodata const 0x800'6f7e 0x2 os_dbg.o [1] + .rodata const 0x800'6f80 0x2 os_dbg.o [1] + .rodata const 0x800'6f82 0x2 os_dbg.o [1] + .rodata const 0x800'6f84 0x2 os_dbg.o [1] + .rodata const 0x800'6f86 0x2 os_dbg.o [1] + .rodata const 0x800'6f88 0x2 os_dbg.o [1] + .rodata const 0x800'6f8a 0x2 os_dbg.o [1] + .rodata const 0x800'6f8c 0x2 os_dbg.o [1] + .rodata const 0x800'6f8e 0x2 os_dbg.o [1] + .rodata const 0x800'6f90 0x2 os_dbg.o [1] + .rodata const 0x800'6f92 0x2 os_dbg.o [1] + .rodata const 0x800'6f94 0x2 os_dbg.o [1] + .rodata const 0x800'6f96 0x2 os_dbg.o [1] + .rodata const 0x800'6f98 0x2 os_dbg.o [1] + .rodata const 0x800'6f9a 0x2 os_dbg.o [1] + .rodata const 0x800'6f9c 0x2 os_dbg.o [1] + .rodata const 0x800'6f9e 0x2 os_dbg.o [1] + .rodata const 0x800'6fa0 0x2 os_dbg.o [1] + .rodata const 0x800'6fa2 0x2 os_dbg.o [1] + .rodata const 0x800'6fa4 0x2 os_dbg.o [1] + .rodata const 0x800'6fa6 0x2 os_dbg.o [1] + .rodata const 0x800'6fa8 0x2 os_dbg.o [1] + .rodata const 0x800'6faa 0x2 os_dbg.o [1] + .rodata const 0x800'6fac 0x2 os_dbg.o [1] + .rodata const 0x800'6fae 0x2 os_dbg.o [1] + .rodata const 0x800'6fb0 0x0 zero_init3.o [4] + .rodata const 0x800'6fb0 0x0 copy_init3.o [4] + - 0x800'6fb0 0x6e28 + +"P2", part 1 of 3: 0x10 + P2-1 0x2000'0000 0x10 + .data inited 0x2000'0000 0x4 flash_save.o [1] + .data inited 0x2000'0004 0x4 stm32f4xx_hal.o [1] + .data inited 0x2000'0008 0x4 system_stm32f4xx.o [1] + .data inited 0x2000'000c 0x4 tim.o [1] + - 0x2000'0010 0x10 + +"P2", part 2 of 3: 0x3bd4 + .bss zero 0x2000'0010 0x984 usart.o [1] + .bss zero 0x2000'0994 0x7e8 ucos_ii.o [1] + .bss zero 0x2000'117c 0x400 main.o [1] + .bss zero 0x2000'157c 0x400 main.o [1] + .bss zero 0x2000'197c 0x400 main.o [1] + .bss zero 0x2000'1d7c 0x400 modbus_log.o [1] + .bss zero 0x2000'217c 0x400 ucos_ii.o [1] + .bss zero 0x2000'257c 0x400 ucos_ii.o [1] + .bss zero 0x2000'297c 0x280 ucos_ii.o [1] + .bss zero 0x2000'2bfc 0x200 os_cpu_c.o [1] + .bss zero 0x2000'2dfc 0x200 ucos_ii.o [1] + .bss zero 0x2000'2ffc 0x188 tim.o [1] + .bss zero 0x2000'3184 0x100 ucos_ii.o [1] + .bss zero 0x2000'3284 0x100 usart.o [1] + .bss zero 0x2000'3384 0x100 usart.o [1] + .bss zero 0x2000'3484 0x100 usart.o [1] + .bss zero 0x2000'3584 0xf0 ucos_ii.o [1] + .bss zero 0x2000'3674 0x78 ucos_ii.o [1] + .bss zero 0x2000'36ec 0x60 flash_save.o [1] + .bss zero 0x2000'374c 0x60 ucos_ii.o [1] + .bss zero 0x2000'37ac 0x60 usart.o [1] + .bss zero 0x2000'380c 0x60 usart.o [1] + .bss zero 0x2000'386c 0x50 ucos_ii.o [1] + .bss zero 0x2000'38bc 0x48 stm32f4xx_hal_timebase_tim.o [1] + .bss zero 0x2000'3904 0x48 tim.o [1] + .bss zero 0x2000'394c 0x48 tim.o [1] + .bss zero 0x2000'3994 0x48 tim.o [1] + .bss zero 0x2000'39dc 0x48 tim.o [1] + .bss zero 0x2000'3a24 0x48 tim.o [1] + .bss zero 0x2000'3a6c 0x48 tim.o [1] + .bss zero 0x2000'3ab4 0x48 usart.o [1] + .bss zero 0x2000'3afc 0x40 ucos_ii.o [1] + .bss zero 0x2000'3b3c 0x8 ucos_ii.o [1] + .bss zero 0x2000'3b44 0x4 os_cpu_c.o [1] + .bss zero 0x2000'3b48 0x4 stm32f4xx_hal.o [1] + .bss zero 0x2000'3b4c 0x4 tim.o [1] + .bss zero 0x2000'3b50 0x4 tim.o [1] + .bss zero 0x2000'3b54 0x4 tim.o [1] + .bss zero 0x2000'3b58 0x4 tim.o [1] + .bss zero 0x2000'3b5c 0x4 tim.o [1] + .bss zero 0x2000'3b60 0x4 tim.o [1] + .bss zero 0x2000'3b64 0x4 tim.o [1] + .bss zero 0x2000'3b68 0x4 tim.o [1] + .bss zero 0x2000'3b6c 0x4 tim.o [1] + .bss zero 0x2000'3b70 0x4 tim.o [1] + .bss zero 0x2000'3b74 0x4 tim.o [1] + .bss zero 0x2000'3b78 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b7c 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b80 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b84 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b88 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b8c 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b90 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b94 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b98 0x4 ucos_ii.o [1] + .bss zero 0x2000'3b9c 0x4 ucos_ii.o [1] + .bss zero 0x2000'3ba0 0x4 ucos_ii.o [1] + .bss zero 0x2000'3ba4 0x4 ucos_ii.o [1] + .bss zero 0x2000'3ba8 0x4 ucos_ii.o [1] + .bss zero 0x2000'3bac 0x4 ucos_ii.o [1] + .bss zero 0x2000'3bb0 0x4 ucos_ii.o [1] + .bss zero 0x2000'3bb4 0x4 ucos_ii.o [1] + .bss zero 0x2000'3bb8 0x4 ucos_ii.o [1] + .bss zero 0x2000'3bbc 0x2 modbus_log.o [1] + .bss zero 0x2000'3bbe 0x2 os_cpu_c.o [1] + .bss zero 0x2000'3bc0 0x2 tim.o [1] + .bss zero 0x2000'3bc2 0x2 ucos_ii.o [1] + .bss zero 0x2000'3bc4 0x2 ucos_ii.o [1] + .bss zero 0x2000'3bc6 0x2 usart.o [1] + .bss zero 0x2000'3bc8 0x2 usart.o [1] + .bss zero 0x2000'3bca 0x2 usart.o [1] + .bss zero 0x2000'3bcc 0x2 usart.o [1] + .bss zero 0x2000'3bce 0x1 flash_save.o [1] + .bss zero 0x2000'3bcf 0x1 tim.o [1] + .bss zero 0x2000'3bd0 0x1 tim.o [1] + .bss zero 0x2000'3bd1 0x1 tim.o [1] + .bss zero 0x2000'3bd2 0x1 tim.o [1] + .bss zero 0x2000'3bd3 0x1 tim.o [1] + .bss zero 0x2000'3bd4 0x1 tim.o [1] + .bss zero 0x2000'3bd5 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bd6 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bd7 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bd8 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bd9 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bda 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bdb 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bdc 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bdd 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bde 0x1 ucos_ii.o [1] + .bss zero 0x2000'3bdf 0x1 ucos_ii.o [1] + .bss zero 0x2000'3be0 0x1 usart.o [1] + - 0x2000'3be1 0x3bd1 "P2", part 3 of 3: 0x1000 - CSTACK 0x2000'2740 0x1000 - CSTACK uninit 0x2000'2740 0x1000 - - 0x2000'3740 0x1000 + CSTACK 0x2000'3be8 0x1000 + CSTACK uninit 0x2000'3be8 0x1000 + - 0x2000'4be8 0x1000 Unused ranges: From To Size ---- -- ---- - 0x800'5ac4 0x80f'ffff 0xf'a53c - 0x2000'273c 0x2000'273f 0x4 - 0x2000'3740 0x2001'ffff 0x1'c8c0 + 0x800'6fb0 0x80f'ffff 0xf'9050 + 0x2000'3be4 0x2000'3be7 0x4 + 0x2000'4be8 0x2001'ffff 0x1'b418 ******************************************************************************* @@ -403,14 +437,14 @@ Unused ranges: Address Size ------- ---- Zero (__iar_zero_init3) - 1 destination range, total size 0x272f: - 0x2000'000c 0x272f + 1 destination range, total size 0x3bd1: + 0x2000'0010 0x3bd1 Copy (__iar_copy_init3) - 1 source range, total size 0xc: - 0x800'590c 0xc - 1 destination range, total size 0xc: - 0x2000'0000 0xc + 1 source range, total size 0x10: + 0x800'6df0 0x10 + 1 destination range, total size 0x10: + 0x2000'0000 0x10 @@ -427,28 +461,33 @@ command line/config: e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj: [1] app_hooks.o 16 dma.o 64 - main.o 448 2'048 + flash_save.o 544 4 101 + main.o 464 3'072 + modbus_crc.o 56 512 + modbus_log.o 68 1'026 os_cpu_a.o 196 os_cpu_c.o 400 518 os_dbg.o 448 114 - startup_stm32f407xx.o 712 + startup_stm32f407xx.o 708 stm32f4xx_hal.o 64 4 8 stm32f4xx_hal_cortex.o 276 - stm32f4xx_hal_dma.o 1'160 8 + stm32f4xx_hal_dma.o 1'348 8 stm32f4xx_hal_gpio.o 604 stm32f4xx_hal_msp.o 72 + stm32f4xx_hal_pwr.o 28 + stm32f4xx_hal_pwr_ex.o 56 stm32f4xx_hal_rcc.o 1'612 - stm32f4xx_hal_tim.o 2'748 + stm32f4xx_hal_tim.o 2'840 stm32f4xx_hal_tim_ex.o 176 stm32f4xx_hal_timebase_tim.o 192 72 - stm32f4xx_hal_uart.o 2'172 - stm32f4xx_it.o 112 + stm32f4xx_hal_uart.o 3'182 + stm32f4xx_it.o 160 system_stm32f4xx.o 16 28 4 - tim.o 3'848 4 958 + tim.o 4'032 4 880 ucos_ii.o 5'596 344 6'171 - usart.o 344 264 + usart.o 2'732 3'477 ------------------------------------------------------- - Total: 21'276 502 10'043 + Total: 25'950 1'018 15'329 dl7M_tlf.a: [2] exit.o 4 @@ -463,6 +502,7 @@ m7M_tls.a: [3] Total: 510 rt7M_tl.a: [4] + ABImemcpy.o 166 ABImemset.o 102 I64DivMod.o 560 I64DivZer.o 2 @@ -474,7 +514,7 @@ rt7M_tl.a: [4] memset.o 20 zero_init3.o 58 ------------------------------------------------------- - Total: 880 + Total: 1'046 shb_l.a: [5] exit.o 20 @@ -484,7 +524,7 @@ shb_l.a: [5] Gaps 2 2 Linker created 36 4'096 ----------------------------------------------------------- - Grand Total: 22'696 540 14'139 + Grand Total: 27'536 1'056 19'425 ******************************************************************************* @@ -493,11 +533,11 @@ shb_l.a: [5] Entry Address Size Type Object ----- ------- ---- ---- ------ -.iar.init_table$$Base 0x800'5808 -- Gb - Linker created - -.iar.init_table$$Limit 0x800'582c -- Gb - Linker created - -?main 0x800'5831 Code Gb cmain.o [4] -AHBPrescTable 0x800'58a0 0x10 Data Gb system_stm32f4xx.o [1] -APBPrescTable 0x800'5920 0x8 Data Gb system_stm32f4xx.o [1] +.iar.init_table$$Base 0x800'6cf8 -- Gb - Linker created - +.iar.init_table$$Limit 0x800'6d1c -- Gb - Linker created - +?main 0x800'6d21 Code Gb cmain.o [4] +AHBPrescTable 0x800'6d90 0x10 Data Gb system_stm32f4xx.o [1] +APBPrescTable 0x800'6e14 0x8 Data Gb system_stm32f4xx.o [1] App_TCBInitHook 0x800'1b85 0x2 Code Gb app_hooks.o [1] App_TaskCreateHook 0x800'1b79 0x2 Code Gb app_hooks.o [1] App_TaskDelHook 0x800'1b7b 0x2 Code Gb app_hooks.o [1] @@ -506,223 +546,264 @@ App_TaskReturnHook 0x800'1b81 0x2 Code Gb app_hooks.o [1] App_TaskStatHook 0x800'1b7f 0x2 Code Gb app_hooks.o [1] App_TaskSwHook 0x800'1b83 0x2 Code Gb app_hooks.o [1] App_TimeTickHook 0x800'1b87 0x2 Code Gb app_hooks.o [1] -BusFault_Handler 0x800'5753 0x2 Code Gb stm32f4xx_it.o [1] -CSTACK$$Base 0x2000'2740 -- Gb - Linker created - -CSTACK$$Limit 0x2000'3740 -- Gb - Linker created - +BackupSRAM_Init 0x800'3da1 0x48 Code Gb flash_save.o [1] +BackupSRAM_RestoreData 0x800'3e33 0x5e Code Gb flash_save.o [1] +BackupSRAM_SaveRegData 0x800'3de9 0x4a Code Gb flash_save.o [1] +BusFault_Handler 0x800'6c13 0x2 Code Gb stm32f4xx_it.o [1] +CSTACK$$Base 0x2000'3be8 -- Gb - Linker created - +CSTACK$$Limit 0x2000'4be8 -- Gb - Linker created - +DMA2_Stream0_IRQHandler + 0x800'6c7f 0x12 Code Gb stm32f4xx_it.o [1] DMA2_Stream2_IRQHandler - 0x800'578f 0xa Code Gb stm32f4xx_it.o [1] + 0x800'6c5b 0x12 Code Gb stm32f4xx_it.o [1] DMA2_Stream7_IRQHandler - 0x800'5799 0xa Code Gb stm32f4xx_it.o [1] + 0x800'6c6d 0x12 Code Gb stm32f4xx_it.o [1] +DMA_Backup_Init 0x800'3cb1 0x78 Code Gb flash_save.o [1] DMA_CalcBaseAndBitshift - 0x800'52ff 0x30 Code Lc stm32f4xx_hal_dma.o [1] + 0x800'56f1 0x30 Code Lc stm32f4xx_hal_dma.o [1] DMA_CalcBaseAndBitshift::flagBitshiftOffset - 0x800'5918 0x8 Data Lc stm32f4xx_hal_dma.o [1] -DMA_CheckFifoParam 0x800'533d 0x9c Code Lc stm32f4xx_hal_dma.o [1] -DebugMon_Handler 0x800'5759 0x2 Code Gb stm32f4xx_it.o [1] -Error_Handler 0x800'374d 0x4 Code Gb main.o [1] -HAL_DMA_Abort 0x800'5033 0x9c Code Gb stm32f4xx_hal_dma.o [1] -HAL_DMA_Abort_IT 0x800'50cf 0x28 Code Gb stm32f4xx_hal_dma.o [1] -HAL_DMA_IRQHandler 0x800'50f7 0x208 Code Gb stm32f4xx_hal_dma.o [1] -HAL_DMA_Init 0x800'4f51 0xe2 Code Gb stm32f4xx_hal_dma.o [1] -HAL_GPIO_Init 0x800'37fd 0x222 Code Gb stm32f4xx_hal_gpio.o [1] -HAL_GetTick 0x800'53d9 0xc Code Wk stm32f4xx_hal.o [1] -HAL_Init 0x800'3dbd 0x30 Code Gb stm32f4xx_hal.o [1] -HAL_InitTick 0x800'45d5 0xac Code Gb stm32f4xx_hal_timebase_tim.o [1] -HAL_MspInit 0x800'4695 0x48 Code Gb stm32f4xx_hal_msp.o [1] -HAL_NVIC_EnableIRQ 0x800'3b4b 0xe Code Gb stm32f4xx_hal_cortex.o [1] -HAL_NVIC_SetPriority 0x800'3b21 0x2a Code Gb stm32f4xx_hal_cortex.o [1] + 0x800'6e0c 0x8 Data Lc stm32f4xx_hal_dma.o [1] +DMA_CheckFifoParam 0x800'5731 0x9c Code Lc stm32f4xx_hal_dma.o [1] +DMA_SetConfig 0x800'56c3 0x2e Code Lc stm32f4xx_hal_dma.o [1] +DMA_Start_CopyFromBKPSRAM + 0x800'3d65 0x3c Code Gb flash_save.o [1] +DMA_Start_CopyToBKPSRAM + 0x800'3d29 0x3c Code Gb flash_save.o [1] +DebugMon_Handler 0x800'6c19 0x2 Code Gb stm32f4xx_it.o [1] +EnableBackupDomain 0x800'3c91 0x20 Code Gb flash_save.o [1] +Error_Handler 0x800'3871 0x4 Code Gb main.o [1] +Get_Coil_Bit 0x800'4aeb 0x3e Code Lc usart.o [1] +HAL_DMA_Abort 0x800'53f7 0x9c Code Gb stm32f4xx_hal_dma.o [1] +HAL_DMA_Abort_IT 0x800'5493 0x28 Code Gb stm32f4xx_hal_dma.o [1] +HAL_DMA_IRQHandler 0x800'54bb 0x208 Code Gb stm32f4xx_hal_dma.o [1] +HAL_DMA_Init 0x800'5289 0xe2 Code Gb stm32f4xx_hal_dma.o [1] +HAL_DMA_Start_IT 0x800'536b 0x8c Code Gb stm32f4xx_hal_dma.o [1] +HAL_GPIO_Init 0x800'3921 0x222 Code Gb stm32f4xx_hal_gpio.o [1] +HAL_GetTick 0x800'66c1 0xc Code Wk stm32f4xx_hal.o [1] +HAL_Init 0x800'4101 0x30 Code Gb stm32f4xx_hal.o [1] +HAL_InitTick 0x800'5805 0xac Code Gb stm32f4xx_hal_timebase_tim.o [1] +HAL_MspInit 0x800'58c5 0x48 Code Gb stm32f4xx_hal_msp.o [1] +HAL_NVIC_EnableIRQ 0x800'3c6f 0xe Code Gb stm32f4xx_hal_cortex.o [1] +HAL_NVIC_SetPriority 0x800'3c45 0x2a Code Gb stm32f4xx_hal_cortex.o [1] HAL_NVIC_SetPriorityGrouping - 0x800'3b15 0xc Code Gb stm32f4xx_hal_cortex.o [1] -HAL_RCC_ClockConfig 0x800'4375 0x140 Code Gb stm32f4xx_hal_rcc.o [1] -HAL_RCC_GetClockConfig 0x800'44e7 0x34 Code Gb stm32f4xx_hal_rcc.o [1] -HAL_RCC_GetHCLKFreq 0x800'44b5 0x6 Code Gb stm32f4xx_hal_rcc.o [1] -HAL_RCC_GetPCLK1Freq 0x800'44bb 0x16 Code Gb stm32f4xx_hal_rcc.o [1] -HAL_RCC_GetPCLK2Freq 0x800'44d1 0x16 Code Gb stm32f4xx_hal_rcc.o [1] -HAL_RCC_OscConfig 0x800'3f89 0x3ec Code Wk stm32f4xx_hal_rcc.o [1] + 0x800'3c39 0xc Code Gb stm32f4xx_hal_cortex.o [1] +HAL_PWREx_EnableBkUpReg + 0x800'57cd 0x2e Code Gb stm32f4xx_hal_pwr_ex.o [1] +HAL_PWR_EnableBkUpAccess + 0x800'526d 0x14 Code Gb stm32f4xx_hal_pwr.o [1] +HAL_RCC_ClockConfig 0x800'500d 0x140 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_GetClockConfig 0x800'517f 0x34 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_GetHCLKFreq 0x800'514d 0x6 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_GetPCLK1Freq 0x800'5153 0x16 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_GetPCLK2Freq 0x800'5169 0x16 Code Gb stm32f4xx_hal_rcc.o [1] +HAL_RCC_OscConfig 0x800'4c21 0x3ec Code Wk stm32f4xx_hal_rcc.o [1] HAL_TIMEx_BreakCallback - 0x800'3db7 0x2 Code Wk stm32f4xx_hal_tim_ex.o [1] + 0x800'40fb 0x2 Code Wk stm32f4xx_hal_tim_ex.o [1] HAL_TIMEx_CommutCallback - 0x800'3dbb 0x2 Code Wk stm32f4xx_hal_tim_ex.o [1] + 0x800'40ff 0x2 Code Wk stm32f4xx_hal_tim_ex.o [1] HAL_TIMEx_MasterConfigSynchronization - 0x800'3751 0x8e Code Gb stm32f4xx_hal_tim_ex.o [1] -HAL_TIM_Base_Init 0x800'2aa5 0x6e Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_Base_MspInit 0x800'1f1f 0x14e Code Gb tim.o [1] -HAL_TIM_Base_Start 0x800'2b13 0x8e Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_Base_Start_IT 0x800'2bd1 0x9a Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_Base_Stop 0x800'2ba1 0x30 Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_Base_Stop_IT 0x800'2c6b 0x3c Code Gb stm32f4xx_hal_tim.o [1] + 0x800'3875 0x8e Code Gb stm32f4xx_hal_tim_ex.o [1] +HAL_TIM_Base_Init 0x800'2b5d 0x6e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_Base_MspInit 0x800'1f31 0x14c Code Gb tim.o [1] +HAL_TIM_Base_Start 0x800'2bcb 0x8e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_Base_Start_IT 0x800'2c89 0x9a Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_Base_Stop 0x800'2c59 0x30 Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_Base_Stop_IT 0x800'2d23 0x3c Code Gb stm32f4xx_hal_tim.o [1] HAL_TIM_ConfigClockSource - 0x800'3147 0xf4 Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_IRQHandler 0x800'2f0d 0x13e Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_MspPostInit 0x800'206d 0x126 Code Gb tim.o [1] + 0x800'325b 0xf4 Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_IRQHandler 0x800'3021 0x13e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_MspPostInit 0x800'207d 0x126 Code Gb tim.o [1] HAL_TIM_PWM_ConfigChannel - 0x800'304b 0xfc Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_PWM_Init 0x800'2cc5 0x6e Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_PWM_Start 0x800'2d33 0x10e Code Gb stm32f4xx_hal_tim.o [1] -HAL_TIM_PWM_Stop 0x800'2e41 0xae Code Gb stm32f4xx_hal_tim.o [1] + 0x800'315f 0xfc Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_PWM_Init 0x800'2d7d 0x6e Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_PWM_Start_IT 0x800'2e99 0x16a Code Gb stm32f4xx_hal_tim.o [1] +HAL_TIM_PWM_Stop 0x800'2deb 0xae Code Gb stm32f4xx_hal_tim.o [1] HAL_TIM_PeriodElapsedCallback - 0x800'22cf 0x22 Code Gb tim.o [1] -HAL_UART_IRQHandler 0x800'4757 0x2f6 Code Gb stm32f4xx_hal_uart.o [1] -HAL_UART_Init 0x800'46dd 0x7a Code Gb stm32f4xx_hal_uart.o [1] -HAL_UART_MspInit 0x800'3e31 0xf2 Code Gb usart.o [1] -HardFault_Handler 0x800'574f 0x2 Code Gb stm32f4xx_it.o [1] -KeyTask 0x800'3719 0x18 Code Lc main.o [1] -KeyTaskStk 0x2000'1874 0x200 Data Lc main.o [1] -LedTask 0x800'3705 0x14 Code Lc main.o [1] -LedTaskStk 0x2000'1674 0x200 Data Lc main.o [1] -MX_DMA_Init 0x800'3f49 0x40 Code Gb dma.o [1] -MX_TIM10_Init 0x800'1d41 0x7c Code Gb tim.o [1] -MX_TIM11_Init 0x800'1dbd 0x76 Code Gb tim.o [1] -MX_TIM13_Init 0x800'1e33 0x76 Code Gb tim.o [1] -MX_TIM14_Init 0x800'1ea9 0x76 Code Gb tim.o [1] -MX_TIM2_Init 0x800'1c61 0x90 Code Gb tim.o [1] -MX_TIM6_Init 0x800'1cf1 0x50 Code Gb tim.o [1] -MX_USART1_UART_Init 0x800'3df1 0x40 Code Gb usart.o [1] -MemManage_Handler 0x800'5751 0x2 Code Gb stm32f4xx_it.o [1] -NMI_Handler 0x800'574d 0x2 Code Gb stm32f4xx_it.o [1] -NVIC_EncodePriority 0x800'3ad5 0x40 Code Lc stm32f4xx_hal_cortex.o [1] -OSCPUUsage 0x2000'2730 0x1 Data Gb ucos_ii.o [1] + 0x800'22cb 0xda Code Gb tim.o [1] +HAL_UART_DMAStop 0x800'5a63 0x92 Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_IRQHandler 0x800'5af5 0x2f6 Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_Init 0x800'590d 0x7a Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_MspInit 0x800'4193 0x13c Code Gb usart.o [1] +HAL_UART_Receive_DMA 0x800'5a2d 0x36 Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_Transmit_DMA 0x800'5987 0x9a Code Gb stm32f4xx_hal_uart.o [1] +HAL_UART_TxCpltCallback + 0x800'43db 0x14 Code Gb usart.o [1] +HardFault_Handler 0x800'6c0f 0x2 Code Gb stm32f4xx_it.o [1] +KeyTask 0x800'383d 0x18 Code Lc main.o [1] +KeyTaskStk 0x2000'197c 0x400 Data Lc main.o [1] +MODBUSTask 0x800'3825 0x18 Code Lc main.o [1] +MODBUSTaskStk 0x2000'157c 0x400 Data Lc main.o [1] +MX_DMA_Init 0x800'4be1 0x40 Code Gb dma.o [1] +MX_TIM10_Init 0x800'1d53 0x7c Code Gb tim.o [1] +MX_TIM11_Init 0x800'1dcf 0x76 Code Gb tim.o [1] +MX_TIM13_Init 0x800'1e45 0x76 Code Gb tim.o [1] +MX_TIM14_Init 0x800'1ebb 0x76 Code Gb tim.o [1] +MX_TIM2_Init 0x800'1c7f 0x84 Code Gb tim.o [1] +MX_TIM6_Init 0x800'1d03 0x50 Code Gb tim.o [1] +MX_USART1_UART_Init 0x800'4135 0x5e Code Gb usart.o [1] +MemManage_Handler 0x800'6c11 0x2 Code Gb stm32f4xx_it.o [1] +ModbusSlave 0x2000'0010 0x984 Data Gb usart.o [1] +Modbus_CRC16 0x800'6645 0x34 Code Gb modbus_crc.o [1] +Modbus_Handle_SendLog 0x800'4531 0x11e Code Gb usart.o [1] +Modbus_Init 0x800'43ef 0x3a Code Gb usart.o [1] +Modbus_Log 0x800'667d 0x44 Code Gb modbus_log.o [1] +Modbus_Process 0x800'4429 0x108 Code Gb usart.o [1] +Modbus_Process_Read_Coils + 0x800'464f 0x106 Code Lc usart.o [1] +Modbus_Process_Read_Holding_Regs + 0x800'4755 0xc6 Code Lc usart.o [1] +Modbus_Process_Write_Multiple_Coils + 0x800'481b 0xfe Code Lc usart.o [1] +Modbus_Process_Write_Multiple_Regs + 0x800'499b 0xe0 Code Lc usart.o [1] +Modbus_Process_Write_Reg + 0x800'4919 0x82 Code Lc usart.o [1] +Modbus_Send_Exception 0x800'4aad 0x3e Code Lc usart.o [1] +Modbus_Send_Response 0x800'4a7b 0x32 Code Lc usart.o [1] +NMI_Handler 0x800'6c0d 0x2 Code Gb stm32f4xx_it.o [1] +NVIC_EncodePriority 0x800'3bf9 0x40 Code Lc stm32f4xx_hal_cortex.o [1] +OSCPUUsage 0x2000'3bd5 0x1 Data Gb ucos_ii.o [1] OSCtxSw 0x800'179b Code Gb os_cpu_a.o [1] -OSCtxSwCtr 0x2000'26e4 0x4 Data Gb ucos_ii.o [1] -OSDataSize 0x800'5ac2 0x2 Data Gb os_dbg.o [1] -OSDebugEn 0x800'582c 0x2 Data Gb os_dbg.o [1] +OSCtxSwCtr 0x2000'3b78 0x4 Data Gb ucos_ii.o [1] +OSDataSize 0x800'6fae 0x2 Data Gb os_dbg.o [1] +OSDebugEn 0x800'6906 0x2 Data Gb os_dbg.o [1] OSDebugInit 0x800'19b9 0x1c0 Code Gb os_dbg.o [1] -OSEndiannessTest 0x800'5928 0x4 Data Gb os_dbg.o [1] -OSEventEn 0x800'5856 0x2 Data Gb os_dbg.o [1] -OSEventFreeList 0x2000'26e8 0x4 Data Gb ucos_ii.o [1] -OSEventMax 0x800'5862 0x2 Data Gb os_dbg.o [1] -OSEventMultiEn 0x800'5a62 0x2 Data Gb os_dbg.o [1] -OSEventNameEn 0x800'5a5c 0x2 Data Gb os_dbg.o [1] +OSEndiannessTest 0x800'6e1c 0x4 Data Gb os_dbg.o [1] +OSEventEn 0x800'690a 0x2 Data Gb os_dbg.o [1] +OSEventFreeList 0x2000'3b7c 0x4 Data Gb ucos_ii.o [1] +OSEventMax 0x800'6d1c 0x2 Data Gb os_dbg.o [1] +OSEventMultiEn 0x800'6f4e 0x2 Data Gb os_dbg.o [1] +OSEventNameEn 0x800'6d46 0x2 Data Gb os_dbg.o [1] OSEventNameSet 0x800'0189 0x54 Code Gb ucos_ii.o [1] -OSEventSize 0x800'5a5e 0x2 Data Gb os_dbg.o [1] -OSEventTbl 0x2000'2164 0xf0 Data Gb ucos_ii.o [1] -OSEventTblSize 0x800'5a60 0x2 Data Gb os_dbg.o [1] -OSFlagEn 0x800'5a64 0x2 Data Gb os_dbg.o [1] -OSFlagFreeList 0x2000'26ec 0x4 Data Gb ucos_ii.o [1] -OSFlagGrpSize 0x800'5a66 0x2 Data Gb os_dbg.o [1] -OSFlagMax 0x800'5a6c 0x2 Data Gb os_dbg.o [1] -OSFlagNameEn 0x800'5a6e 0x2 Data Gb os_dbg.o [1] -OSFlagNodeSize 0x800'5a68 0x2 Data Gb os_dbg.o [1] -OSFlagTbl 0x2000'23ec 0x50 Data Gb ucos_ii.o [1] -OSFlagWidth 0x800'5a6a 0x2 Data Gb os_dbg.o [1] -OSIdleCtr 0x2000'26f8 0x4 Data Gb ucos_ii.o [1] -OSIdleCtrMax 0x2000'26f0 0x4 Data Gb ucos_ii.o [1] -OSIdleCtrRun 0x2000'26f4 0x4 Data Gb ucos_ii.o [1] +OSEventSize 0x800'6d52 0x2 Data Gb os_dbg.o [1] +OSEventTbl 0x2000'3584 0xf0 Data Gb ucos_ii.o [1] +OSEventTblSize 0x800'6f4c 0x2 Data Gb os_dbg.o [1] +OSFlagEn 0x800'6f50 0x2 Data Gb os_dbg.o [1] +OSFlagFreeList 0x2000'3b80 0x4 Data Gb ucos_ii.o [1] +OSFlagGrpSize 0x800'6f52 0x2 Data Gb os_dbg.o [1] +OSFlagMax 0x800'6f58 0x2 Data Gb os_dbg.o [1] +OSFlagNameEn 0x800'6f5a 0x2 Data Gb os_dbg.o [1] +OSFlagNodeSize 0x800'6f54 0x2 Data Gb os_dbg.o [1] +OSFlagTbl 0x2000'386c 0x50 Data Gb ucos_ii.o [1] +OSFlagWidth 0x800'6f56 0x2 Data Gb os_dbg.o [1] +OSIdleCtr 0x2000'3b8c 0x4 Data Gb ucos_ii.o [1] +OSIdleCtrMax 0x2000'3b84 0x4 Data Gb ucos_ii.o [1] +OSIdleCtrRun 0x2000'3b88 0x4 Data Gb ucos_ii.o [1] OSInit 0x800'01dd 0x38 Code Gb ucos_ii.o [1] OSInitHookBegin 0x800'1829 0x2c Code Gb os_cpu_c.o [1] OSInitHookEnd 0x800'1855 0x2 Code Gb os_cpu_c.o [1] OSIntCtxSw 0x800'17a3 Code Gb os_cpu_a.o [1] OSIntEnter 0x800'0215 0x1c Code Gb ucos_ii.o [1] OSIntExit 0x800'0231 0x78 Code Gb ucos_ii.o [1] -OSIntNesting 0x2000'2732 0x1 Data Gb ucos_ii.o [1] -OSLockNesting 0x2000'2733 0x1 Data Gb ucos_ii.o [1] -OSLowestPrio 0x800'5a70 0x2 Data Gb os_dbg.o [1] -OSMboxEn 0x800'5a72 0x2 Data Gb os_dbg.o [1] -OSMemEn 0x800'5a74 0x2 Data Gb os_dbg.o [1] -OSMemFreeList 0x2000'270c 0x4 Data Gb ucos_ii.o [1] -OSMemMax 0x800'5a76 0x2 Data Gb os_dbg.o [1] -OSMemNameEn 0x800'5a78 0x2 Data Gb os_dbg.o [1] -OSMemSize 0x800'5a7a 0x2 Data Gb os_dbg.o [1] -OSMemTbl 0x2000'2254 0x78 Data Gb ucos_ii.o [1] -OSMemTblSize 0x800'5a7c 0x2 Data Gb os_dbg.o [1] -OSMutexEn 0x800'5a7e 0x2 Data Gb os_dbg.o [1] -OSPrioCur 0x2000'2734 0x1 Data Gb ucos_ii.o [1] -OSPrioHighRdy 0x2000'2735 0x1 Data Gb ucos_ii.o [1] -OSPtrSize 0x800'5a80 0x2 Data Gb os_dbg.o [1] -OSQEn 0x800'5a82 0x2 Data Gb os_dbg.o [1] -OSQFreeList 0x2000'2710 0x4 Data Gb ucos_ii.o [1] -OSQMax 0x800'5a84 0x2 Data Gb os_dbg.o [1] -OSQSize 0x800'5a86 0x2 Data Gb os_dbg.o [1] -OSQTbl 0x2000'22cc 0x60 Data Gb ucos_ii.o [1] -OSRdyGrp 0x2000'2736 0x1 Data Gb ucos_ii.o [1] -OSRdyTbl 0x2000'26bc 0x8 Data Gb ucos_ii.o [1] -OSRdyTblSize 0x800'5a88 0x2 Data Gb os_dbg.o [1] -OSRunning 0x2000'2737 0x1 Data Gb ucos_ii.o [1] +OSIntNesting 0x2000'3bd7 0x1 Data Gb ucos_ii.o [1] +OSLockNesting 0x2000'3bd8 0x1 Data Gb ucos_ii.o [1] +OSLowestPrio 0x800'6f5c 0x2 Data Gb os_dbg.o [1] +OSMboxEn 0x800'6f5e 0x2 Data Gb os_dbg.o [1] +OSMemEn 0x800'6f60 0x2 Data Gb os_dbg.o [1] +OSMemFreeList 0x2000'3ba0 0x4 Data Gb ucos_ii.o [1] +OSMemMax 0x800'6f62 0x2 Data Gb os_dbg.o [1] +OSMemNameEn 0x800'6f64 0x2 Data Gb os_dbg.o [1] +OSMemSize 0x800'6f66 0x2 Data Gb os_dbg.o [1] +OSMemTbl 0x2000'3674 0x78 Data Gb ucos_ii.o [1] +OSMemTblSize 0x800'6f68 0x2 Data Gb os_dbg.o [1] +OSMutexEn 0x800'6f6a 0x2 Data Gb os_dbg.o [1] +OSPrioCur 0x2000'3bd9 0x1 Data Gb ucos_ii.o [1] +OSPrioHighRdy 0x2000'3bda 0x1 Data Gb ucos_ii.o [1] +OSPtrSize 0x800'6f6c 0x2 Data Gb os_dbg.o [1] +OSQEn 0x800'6f6e 0x2 Data Gb os_dbg.o [1] +OSQFreeList 0x2000'3ba4 0x4 Data Gb ucos_ii.o [1] +OSQMax 0x800'6f70 0x2 Data Gb os_dbg.o [1] +OSQSize 0x800'6f72 0x2 Data Gb os_dbg.o [1] +OSQTbl 0x2000'374c 0x60 Data Gb ucos_ii.o [1] +OSRdyGrp 0x2000'3bdb 0x1 Data Gb ucos_ii.o [1] +OSRdyTbl 0x2000'3b3c 0x8 Data Gb ucos_ii.o [1] +OSRdyTblSize 0x800'6f74 0x2 Data Gb os_dbg.o [1] +OSRunning 0x2000'3bdc 0x1 Data Gb ucos_ii.o [1] OSSchedLock 0x800'02a9 0x36 Code Gb ucos_ii.o [1] OSSchedUnlock 0x800'02df 0x58 Code Gb ucos_ii.o [1] OSSemCreate 0x800'0d33 0x4e Code Gb ucos_ii.o [1] -OSSemEn 0x800'5a8a 0x2 Data Gb os_dbg.o [1] +OSSemEn 0x800'6f76 0x2 Data Gb os_dbg.o [1] OSSemPend 0x800'0d83 0xe8 Code Gb ucos_ii.o [1] OSSemPost 0x800'0e75 0x62 Code Gb ucos_ii.o [1] OSStart 0x800'0337 0x3a Code Gb ucos_ii.o [1] OSStartHighRdy 0x800'1773 Code Gb os_cpu_a.o [1] OSStatInit 0x800'0371 0x42 Code Gb ucos_ii.o [1] -OSStatRdy 0x2000'2731 0x1 Data Gb ucos_ii.o [1] -OSStkWidth 0x800'5a8c 0x2 Data Gb os_dbg.o [1] -OSTCBCur 0x2000'26fc 0x4 Data Gb ucos_ii.o [1] -OSTCBFreeList 0x2000'2700 0x4 Data Gb ucos_ii.o [1] -OSTCBHighRdy 0x2000'2704 0x4 Data Gb ucos_ii.o [1] +OSStatRdy 0x2000'3bd6 0x1 Data Gb ucos_ii.o [1] +OSStkWidth 0x800'6f78 0x2 Data Gb os_dbg.o [1] +OSTCBCur 0x2000'3b90 0x4 Data Gb ucos_ii.o [1] +OSTCBFreeList 0x2000'3b94 0x4 Data Gb ucos_ii.o [1] +OSTCBHighRdy 0x2000'3b98 0x4 Data Gb ucos_ii.o [1] OSTCBInitHook 0x800'191f 0xc Code Gb os_cpu_c.o [1] -OSTCBList 0x2000'2708 0x4 Data Gb ucos_ii.o [1] -OSTCBPrioTbl 0x2000'2064 0x100 Data Gb ucos_ii.o [1] -OSTCBPrioTblMax 0x800'5aa6 0x2 Data Gb os_dbg.o [1] -OSTCBSize 0x800'5aa8 0x2 Data Gb os_dbg.o [1] -OSTCBTbl 0x2000'000c 0x7e8 Data Gb ucos_ii.o [1] -OSTaskCreateEn 0x800'5a8e 0x2 Data Gb os_dbg.o [1] +OSTCBList 0x2000'3b9c 0x4 Data Gb ucos_ii.o [1] +OSTCBPrioTbl 0x2000'3184 0x100 Data Gb ucos_ii.o [1] +OSTCBPrioTblMax 0x800'6f92 0x2 Data Gb os_dbg.o [1] +OSTCBSize 0x800'6f94 0x2 Data Gb os_dbg.o [1] +OSTCBTbl 0x2000'0994 0x7e8 Data Gb ucos_ii.o [1] +OSTaskCreateEn 0x800'6f7a 0x2 Data Gb os_dbg.o [1] OSTaskCreateExt 0x800'0ee1 0xd4 Code Gb ucos_ii.o [1] -OSTaskCreateExtEn 0x800'5a90 0x2 Data Gb os_dbg.o [1] +OSTaskCreateExtEn 0x800'6f7c 0x2 Data Gb os_dbg.o [1] OSTaskCreateHook 0x800'1857 0xc Code Gb os_cpu_c.o [1] -OSTaskCtr 0x2000'2738 0x1 Data Gb ucos_ii.o [1] +OSTaskCtr 0x2000'3bdd 0x1 Data Gb ucos_ii.o [1] OSTaskDel 0x800'0fb5 0x17a Code Gb ucos_ii.o [1] -OSTaskDelEn 0x800'5a92 0x2 Data Gb os_dbg.o [1] +OSTaskDelEn 0x800'6f7e 0x2 Data Gb os_dbg.o [1] OSTaskDelHook 0x800'1863 0xc Code Gb os_cpu_c.o [1] OSTaskIdleHook 0x800'186f 0x8 Code Gb os_cpu_c.o [1] -OSTaskIdleStk 0x2000'1c74 0x200 Data Gb ucos_ii.o [1] -OSTaskIdleStkSize 0x800'5a94 0x2 Data Gb os_dbg.o [1] -OSTaskMax 0x800'5a98 0x2 Data Gb os_dbg.o [1] -OSTaskNameEn 0x800'5a9a 0x2 Data Gb os_dbg.o [1] +OSTaskIdleStk 0x2000'2dfc 0x200 Data Gb ucos_ii.o [1] +OSTaskIdleStkSize 0x800'6f80 0x2 Data Gb os_dbg.o [1] +OSTaskMax 0x800'6f84 0x2 Data Gb os_dbg.o [1] +OSTaskNameEn 0x800'6f86 0x2 Data Gb os_dbg.o [1] OSTaskNameSet 0x800'112f 0x90 Code Gb ucos_ii.o [1] -OSTaskProfileEn 0x800'5a96 0x2 Data Gb os_dbg.o [1] -OSTaskRegNextAvailID 0x2000'273a 0x1 Data Gb ucos_ii.o [1] -OSTaskRegTblSize 0x800'5aa4 0x2 Data Gb os_dbg.o [1] +OSTaskProfileEn 0x800'6f82 0x2 Data Gb os_dbg.o [1] +OSTaskRegNextAvailID 0x2000'3bdf 0x1 Data Gb ucos_ii.o [1] +OSTaskRegTblSize 0x800'6f90 0x2 Data Gb os_dbg.o [1] OSTaskReturnHook 0x800'1877 0xc Code Gb os_cpu_c.o [1] -OSTaskStatEn 0x800'5a9c 0x2 Data Gb os_dbg.o [1] +OSTaskStatEn 0x800'6f88 0x2 Data Gb os_dbg.o [1] OSTaskStatHook 0x800'1883 0x8 Code Gb os_cpu_c.o [1] -OSTaskStatStk 0x2000'0bf4 0x400 Data Gb ucos_ii.o [1] -OSTaskStatStkChkEn 0x800'5aa0 0x2 Data Gb os_dbg.o [1] -OSTaskStatStkSize 0x800'5a9e 0x2 Data Gb os_dbg.o [1] +OSTaskStatStk 0x2000'217c 0x400 Data Gb ucos_ii.o [1] +OSTaskStatStkChkEn 0x800'6f8c 0x2 Data Gb os_dbg.o [1] +OSTaskStatStkSize 0x800'6f8a 0x2 Data Gb os_dbg.o [1] OSTaskStkChk 0x800'11cd 0xb4 Code Gb ucos_ii.o [1] OSTaskStkInit 0x800'188b 0x8c Code Gb os_cpu_c.o [1] OSTaskSuspend 0x800'1281 0xd6 Code Gb ucos_ii.o [1] OSTaskSwHook 0x800'1917 0x8 Code Gb os_cpu_c.o [1] -OSTaskSwHookEn 0x800'5aa2 0x2 Data Gb os_dbg.o [1] -OSTickStepState 0x2000'2739 0x1 Data Gb ucos_ii.o [1] -OSTicksPerSec 0x800'5aaa 0x2 Data Gb os_dbg.o [1] -OSTime 0x2000'2714 0x4 Data Gb ucos_ii.o [1] +OSTaskSwHookEn 0x800'6f8e 0x2 Data Gb os_dbg.o [1] +OSTickStepState 0x2000'3bde 0x1 Data Gb ucos_ii.o [1] +OSTicksPerSec 0x800'6f96 0x2 Data Gb os_dbg.o [1] +OSTime 0x2000'3ba8 0x4 Data Gb ucos_ii.o [1] OSTimeDly 0x800'1387 0x6e Code Gb ucos_ii.o [1] OSTimeDlyHMSM 0x800'1401 0xb0 Code Gb ucos_ii.o [1] OSTimeTick 0x800'03b3 0xe4 Code Gb ucos_ii.o [1] OSTimeTickHook 0x800'192b 0x1e Code Gb os_cpu_c.o [1] -OSTimeTickHookEn 0x800'5aac 0x2 Data Gb os_dbg.o [1] -OSTmrCfgMax 0x800'5ab2 0x2 Data Gb os_dbg.o [1] -OSTmrCfgNameEn 0x800'5ab4 0x2 Data Gb os_dbg.o [1] -OSTmrCfgTicksPerSec 0x800'5ab8 0x2 Data Gb os_dbg.o [1] -OSTmrCfgWheelSize 0x800'5ab6 0x2 Data Gb os_dbg.o [1] -OSTmrCtr 0x2000'2728 0x2 Data Lc os_cpu_c.o [1] -OSTmrEn 0x800'5ab0 0x2 Data Gb os_dbg.o [1] -OSTmrFree 0x2000'272a 0x2 Data Gb ucos_ii.o [1] -OSTmrFreeList 0x2000'2724 0x4 Data Gb ucos_ii.o [1] -OSTmrSem 0x2000'271c 0x4 Data Gb ucos_ii.o [1] -OSTmrSemSignal 0x2000'2720 0x4 Data Gb ucos_ii.o [1] +OSTimeTickHookEn 0x800'6f98 0x2 Data Gb os_dbg.o [1] +OSTmrCfgMax 0x800'6f9e 0x2 Data Gb os_dbg.o [1] +OSTmrCfgNameEn 0x800'6fa0 0x2 Data Gb os_dbg.o [1] +OSTmrCfgTicksPerSec 0x800'6fa4 0x2 Data Gb os_dbg.o [1] +OSTmrCfgWheelSize 0x800'6fa2 0x2 Data Gb os_dbg.o [1] +OSTmrCtr 0x2000'3bbe 0x2 Data Lc os_cpu_c.o [1] +OSTmrEn 0x800'6f9c 0x2 Data Gb os_dbg.o [1] +OSTmrFree 0x2000'3bc2 0x2 Data Gb ucos_ii.o [1] +OSTmrFreeList 0x2000'3bb8 0x4 Data Gb ucos_ii.o [1] +OSTmrSem 0x2000'3bb0 0x4 Data Gb ucos_ii.o [1] +OSTmrSemSignal 0x2000'3bb4 0x4 Data Gb ucos_ii.o [1] OSTmrSignal 0x800'14c9 0xe Code Gb ucos_ii.o [1] -OSTmrSize 0x800'5aba 0x2 Data Gb os_dbg.o [1] -OSTmrTaskStk 0x2000'0ff4 0x400 Data Gb ucos_ii.o [1] -OSTmrTbl 0x2000'13f4 0x280 Data Gb ucos_ii.o [1] -OSTmrTblSize 0x800'5abc 0x2 Data Gb os_dbg.o [1] -OSTmrTime 0x2000'2718 0x4 Data Gb ucos_ii.o [1] -OSTmrUsed 0x2000'272c 0x2 Data Gb ucos_ii.o [1] -OSTmrWheelSize 0x800'5abe 0x2 Data Gb os_dbg.o [1] -OSTmrWheelTbl 0x2000'267c 0x40 Data Gb ucos_ii.o [1] -OSTmrWheelTblSize 0x800'5ac0 0x2 Data Gb os_dbg.o [1] +OSTmrSize 0x800'6fa6 0x2 Data Gb os_dbg.o [1] +OSTmrTaskStk 0x2000'257c 0x400 Data Gb ucos_ii.o [1] +OSTmrTbl 0x2000'297c 0x280 Data Gb ucos_ii.o [1] +OSTmrTblSize 0x800'6fa8 0x2 Data Gb os_dbg.o [1] +OSTmrTime 0x2000'3bac 0x4 Data Gb ucos_ii.o [1] +OSTmrUsed 0x2000'3bc4 0x2 Data Gb ucos_ii.o [1] +OSTmrWheelSize 0x800'6faa 0x2 Data Gb os_dbg.o [1] +OSTmrWheelTbl 0x2000'3afc 0x40 Data Gb ucos_ii.o [1] +OSTmrWheelTblSize 0x800'6fac 0x2 Data Gb os_dbg.o [1] OSTmr_Init 0x800'14d7 0xcc Code Gb ucos_ii.o [1] OSTmr_InitTask 0x800'15a3 0x3a Code Lc ucos_ii.o [1] OSTmr_Link 0x800'15dd 0x72 Code Lc ucos_ii.o [1] OSTmr_Task 0x800'169d 0x88 Code Lc ucos_ii.o [1] OSTmr_Unlink 0x800'164f 0x4c Code Lc ucos_ii.o [1] -OSUnMapTbl 0x800'564c 0x100 Data Gb ucos_ii.o [1] -OSVersionNbr 0x800'5aae 0x2 Data Gb os_dbg.o [1] -OS_CPU_ExceptStk 0x2000'1a74 0x200 Data Gb os_cpu_c.o [1] -OS_CPU_ExceptStkBase 0x2000'26c4 0x4 Data Gb os_cpu_c.o [1] +OSUnMapTbl 0x800'6b0c 0x100 Data Gb ucos_ii.o [1] +OSVersionNbr 0x800'6f9a 0x2 Data Gb os_dbg.o [1] +OS_CPU_ExceptStk 0x2000'2bfc 0x200 Data Gb os_cpu_c.o [1] +OS_CPU_ExceptStkBase 0x2000'3b44 0x4 Data Gb os_cpu_c.o [1] OS_CPU_PendSVHandler 0x800'17ab Code Gb os_cpu_a.o [1] OS_CPU_SR_Restore 0x800'176d Code Gb os_cpu_a.o [1] OS_CPU_SR_Save 0x800'1765 Code Gb os_cpu_a.o [1] @@ -756,139 +837,178 @@ OS_TaskStat 0x800'0905 0xca Code Gb ucos_ii.o [1] OS_TaskStatStkChk 0x800'09cf 0x48 Code Gb ucos_ii.o [1] OS_TaskStkClr 0x800'136f 0x18 Code Gb ucos_ii.o [1] PLSR_Accel_CalculateCurve - 0x800'260d 0x4a Code Gb tim.o [1] + 0x800'269d 0x4a Code Gb tim.o [1] PLSR_Accel_CalculateSine - 0x800'265d 0x4c Code Gb tim.o [1] + 0x800'26f1 0x4c Code Gb tim.o [1] PLSR_Accel_CalculateSteps - 0x800'26b1 0x94 Code Lc tim.o [1] -PLSR_Accel_Process 0x800'2779 0x220 Code Gb tim.o [1] + 0x800'2745 0x96 Code Lc tim.o [1] +PLSR_Accel_Process 0x800'2811 0x22c Code Gb tim.o [1] PLSR_Accel_Process::start_freq_accel - 0x2000'26d4 0x4 Data Lc tim.o [1] + 0x2000'3b68 0x4 Data Lc tim.o [1] PLSR_Accel_Process::start_freq_decel - 0x2000'26dc 0x4 Data Lc tim.o [1] + 0x2000'3b70 0x4 Data Lc tim.o [1] PLSR_Accel_Process::total_accel_steps - 0x2000'26d8 0x4 Data Lc tim.o [1] + 0x2000'3b6c 0x4 Data Lc tim.o [1] PLSR_Accel_Process::total_decel_steps - 0x2000'26e0 0x4 Data Lc tim.o [1] + 0x2000'3b74 0x4 Data Lc tim.o [1] PLSR_CalculateTimerParams - 0x800'2211 0x3e Code Lc tim.o [1] -PLSR_Counter_GetCount 0x800'22b9 0xa Code Gb tim.o [1] -PLSR_Counter_Reset 0x800'22c3 0xc Code Gb tim.o [1] -PLSR_PWM_Init 0x800'2193 0x36 Code Gb tim.o [1] -PLSR_PWM_SetFrequency 0x800'224f 0x52 Code Gb tim.o [1] -PLSR_PWM_Start 0x800'21c9 0x1c Code Gb tim.o [1] -PLSR_PWM_Stop 0x800'21e5 0x2c Code Gb tim.o [1] -PLSR_Route_Init 0x800'22f1 0x7e Code Gb tim.o [1] -PLSR_Route_Start 0x800'236f 0x3e Code Gb tim.o [1] -PLSR_Route_Stop 0x800'23ad 0x22 Code Gb tim.o [1] + 0x800'2229 0x46 Code Lc tim.o [1] +PLSR_Counter_Reset 0x800'2af9 0xa Code Gb tim.o [1] +PLSR_Counter_Start 0x800'2ae9 0x10 Code Gb tim.o [1] +PLSR_PWM_Init 0x800'21a3 0x3a Code Gb tim.o [1] +PLSR_PWM_SetFrequency 0x800'226f 0x48 Code Gb tim.o [1] +PLSR_PWM_Start 0x800'21dd 0x20 Code Gb tim.o [1] +PLSR_PWM_Stop 0x800'21fd 0x2c Code Gb tim.o [1] +PLSR_Route_Init 0x800'23c5 0x86 Code Gb tim.o [1] +PLSR_Route_Start 0x800'244b 0x3e Code Gb tim.o [1] +PLSR_Route_Stop 0x800'2489 0x24 Code Gb tim.o [1] PLSR_Section_CalculateConstPulse - 0x800'25d9 0x30 Code Gb tim.o [1] + 0x800'2697 0x6 Code Gb tim.o [1] PLSR_Section_CheckPulseComplete - 0x800'2a17 0x48 Code Lc tim.o [1] + 0x800'2a75 0x44 Code Lc tim.o [1] PLSR_Section_CheckTransition - 0x800'2a5f 0x32 Code Lc tim.o [1] + 0x800'2ab9 0x30 Code Lc tim.o [1] PLSR_Section_CheckWaitCondition - 0x800'2571 0x68 Code Gb tim.o [1] -PLSR_Section_Init 0x800'23cf 0x64 Code Gb tim.o [1] -PLSR_Section_Process 0x800'2433 0x96 Code Gb tim.o [1] + 0x800'2633 0x64 Code Gb tim.o [1] +PLSR_Section_Init 0x800'24ad 0x54 Code Gb tim.o [1] +PLSR_Section_Process 0x800'2501 0x8a Code Gb tim.o [1] PLSR_Section_ProcessConstSpeed - 0x800'29dd 0x20 Code Lc tim.o [1] + 0x800'2a41 0x1a Code Lc tim.o [1] PLSR_Section_ProcessWait - 0x800'29fd 0x1a Code Lc tim.o [1] + 0x800'2a5b 0x1a Code Lc tim.o [1] PLSR_Section_StartNewSection - 0x800'24c9 0x5c Code Lc tim.o [1] + 0x800'258b 0x5e Code Lc tim.o [1] PLSR_Section_SwitchNext - 0x800'2525 0x4c Code Gb tim.o [1] -PLSR_TIM6_Start 0x800'22a1 0xc Code Gb tim.o [1] -PLSR_TIM6_Stop 0x800'22ad 0xc Code Gb tim.o [1] -PLSR_Wait_CheckActTime 0x800'1bfd 0x30 Code Gb tim.o [1] + 0x800'25e9 0x4a Code Gb tim.o [1] +PLSR_TIM6_Start 0x800'22b7 0xa Code Gb tim.o [1] +PLSR_TIM6_Stop 0x800'22c1 0xa Code Gb tim.o [1] +PLSR_Wait_CheckActTime 0x800'1c23 0x2e Code Gb tim.o [1] PLSR_Wait_CheckExtEvent - 0x800'1c2d 0x34 Code Gb tim.o [1] + 0x800'1c51 0x2e Code Gb tim.o [1] PLSR_Wait_CheckTimeCondition - 0x800'1bcd 0x30 Code Gb tim.o [1] -PLSR_Wait_StartTimer 0x800'1b89 0x44 Code Gb tim.o [1] -PendSV_Handler 0x800'575b 0x8 Code Gb stm32f4xx_it.o [1] -Region$$Table$$Base 0x800'5808 -- Gb - Linker created - -Region$$Table$$Limit 0x800'582c -- Gb - Linker created - -SVC_Handler 0x800'5757 0x2 Code Gb stm32f4xx_it.o [1] -StartupTask 0x800'3691 0x72 Code Lc main.o [1] -StartupTaskStk 0x2000'07f4 0x400 Data Lc main.o [1] -SysTick_Handler 0x800'5763 0x8 Code Gb stm32f4xx_it.o [1] -SystemClock_Config 0x800'35eb 0xa6 Code Gb main.o [1] -SystemCoreClock 0x2000'0004 0x4 Data Gb system_stm32f4xx.o [1] -SystemInit 0x800'58f1 0xc Code Gb system_stm32f4xx.o [1] + 0x800'1bf5 0x2e Code Gb tim.o [1] +PLSR_Wait_StartTimer 0x800'1b89 0x6c Code Gb tim.o [1] +PendSV_Handler 0x800'6c1b 0x8 Code Gb stm32f4xx_it.o [1] +Region$$Table$$Base 0x800'6cf8 -- Gb - Linker created - +Region$$Table$$Limit 0x800'6d1c -- Gb - Linker created - +SVC_Handler 0x800'6c17 0x2 Code Gb stm32f4xx_it.o [1] +Set_Coil_Bit 0x800'4b29 0x6a Code Lc usart.o [1] +StartupTask 0x800'37a5 0x80 Code Lc main.o [1] +StartupTaskStk 0x2000'117c 0x400 Data Lc main.o [1] +SysTick_Handler 0x800'6c23 0x8 Code Gb stm32f4xx_it.o [1] +SystemClock_Config 0x800'36f9 0xaa Code Gb main.o [1] +SystemCoreClock 0x2000'0008 0x4 Data Gb system_stm32f4xx.o [1] +SystemInit 0x800'6de1 0xc Code Gb system_stm32f4xx.o [1] TIM1_UP_TIM10_IRQHandler - 0x800'576b 0x10 Code Gb stm32f4xx_it.o [1] -TIM6_DAC_IRQHandler 0x800'5785 0xa Code Gb stm32f4xx_it.o [1] -TIM_Base_SetConfig 0x800'323b 0xcc Code Gb stm32f4xx_hal_tim.o [1] -TIM_CCxChannelCmd 0x800'3533 0x24 Code Gb stm32f4xx_hal_tim.o [1] -TIM_ETR_SetConfig 0x800'351b 0x18 Code Gb stm32f4xx_hal_tim.o [1] -TIM_ITRx_SetConfig 0x800'350b 0x10 Code Lc stm32f4xx_hal_tim.o [1] -TIM_OC1_SetConfig 0x800'3309 0x64 Code Lc stm32f4xx_hal_tim.o [1] -TIM_OC2_SetConfig 0x800'336d 0x6e Code Gb stm32f4xx_hal_tim.o [1] -TIM_OC3_SetConfig 0x800'33dd 0x6c Code Lc stm32f4xx_hal_tim.o [1] -TIM_OC4_SetConfig 0x800'3449 0x4c Code Lc stm32f4xx_hal_tim.o [1] + 0x800'6c2b 0x10 Code Gb stm32f4xx_it.o [1] +TIM6_DAC_IRQHandler 0x800'6c51 0xa Code Gb stm32f4xx_it.o [1] +TIM_Base_SetConfig 0x800'334f 0xcc Code Gb stm32f4xx_hal_tim.o [1] +TIM_CCxChannelCmd 0x800'3647 0x24 Code Gb stm32f4xx_hal_tim.o [1] +TIM_ETR_SetConfig 0x800'362f 0x18 Code Gb stm32f4xx_hal_tim.o [1] +TIM_ITRx_SetConfig 0x800'361f 0x10 Code Lc stm32f4xx_hal_tim.o [1] +TIM_OC1_SetConfig 0x800'341d 0x64 Code Lc stm32f4xx_hal_tim.o [1] +TIM_OC2_SetConfig 0x800'3481 0x6e Code Gb stm32f4xx_hal_tim.o [1] +TIM_OC3_SetConfig 0x800'34f1 0x6c Code Lc stm32f4xx_hal_tim.o [1] +TIM_OC4_SetConfig 0x800'355d 0x4c Code Lc stm32f4xx_hal_tim.o [1] TIM_TI1_ConfigInputStage - 0x800'34c1 0x24 Code Lc stm32f4xx_hal_tim.o [1] + 0x800'35d5 0x24 Code Lc stm32f4xx_hal_tim.o [1] TIM_TI2_ConfigInputStage - 0x800'34e5 0x26 Code Lc stm32f4xx_hal_tim.o [1] -UART_DMAAbortOnError 0x800'4ab5 0x12 Code Lc stm32f4xx_hal_uart.o [1] -UART_EndRxTransfer 0x800'4a4d 0x66 Code Lc stm32f4xx_hal_uart.o [1] -UART_EndTransmit_IT 0x800'4b2f 0x20 Code Lc stm32f4xx_hal_uart.o [1] -UART_Receive_IT 0x800'4b4f 0xfa Code Lc stm32f4xx_hal_uart.o [1] -UART_SetConfig 0x800'4c49 0x2fc Code Lc stm32f4xx_hal_uart.o [1] -UART_Transmit_IT 0x800'4ac9 0x66 Code Lc stm32f4xx_hal_uart.o [1] -USART1_IRQHandler 0x800'577b 0xa Code Gb stm32f4xx_it.o [1] -UsageFault_Handler 0x800'5755 0x2 Code Gb stm32f4xx_it.o [1] -__NVIC_EnableIRQ 0x800'3a89 0x20 Code Lc stm32f4xx_hal_cortex.o [1] + 0x800'35f9 0x26 Code Lc stm32f4xx_hal_tim.o [1] +UART_DMAAbortOnError 0x800'60c9 0x12 Code Lc stm32f4xx_hal_uart.o [1] +UART_DMAError 0x800'5f1d 0x58 Code Lc stm32f4xx_hal_uart.o [1] +UART_DMAReceiveCplt 0x800'5e4d 0xaa Code Lc stm32f4xx_hal_uart.o [1] +UART_DMARxHalfCplt 0x800'5ef7 0x26 Code Lc stm32f4xx_hal_uart.o [1] +UART_DMATransmitCplt 0x800'5deb 0x54 Code Lc stm32f4xx_hal_uart.o [1] +UART_DMATxHalfCplt 0x800'5e3f 0xe Code Lc stm32f4xx_hal_uart.o [1] +UART_EndRxTransfer 0x800'6061 0x66 Code Lc stm32f4xx_hal_uart.o [1] +UART_EndTransmit_IT 0x800'6143 0x20 Code Lc stm32f4xx_hal_uart.o [1] +UART_EndTxTransfer 0x800'603d 0x24 Code Lc stm32f4xx_hal_uart.o [1] +UART_Receive_IT 0x800'6163 0xfa Code Lc stm32f4xx_hal_uart.o [1] +UART_SetConfig 0x800'625d 0x2fc Code Lc stm32f4xx_hal_uart.o [1] +UART_Start_Receive_DMA 0x800'5f75 0xc8 Code Gb stm32f4xx_hal_uart.o [1] +UART_Transmit_IT 0x800'60dd 0x66 Code Lc stm32f4xx_hal_uart.o [1] +USART1_IDLE_IRQHandler 0x800'42cf 0x96 Code Gb usart.o [1] +USART1_IRQHandler 0x800'6c3b 0x16 Code Gb stm32f4xx_it.o [1] +USART1_SendData 0x800'43c5 0x16 Code Gb usart.o [1] +USART1_SendData_DMA 0x800'4365 0x60 Code Gb usart.o [1] +UsageFault_Handler 0x800'6c15 0x2 Code Gb stm32f4xx_it.o [1] +Usart1_Rx_Count 0x2000'3bca 0x2 Data Gb usart.o [1] +__NVIC_EnableIRQ 0x800'3bad 0x20 Code Lc stm32f4xx_hal_cortex.o [1] __NVIC_GetPriorityGrouping - 0x800'3a7b 0xc Code Lc stm32f4xx_hal_cortex.o [1] -__NVIC_SetPriority 0x800'3aa9 0x2c Code Lc stm32f4xx_hal_cortex.o [1] + 0x800'3b9f 0xc Code Lc stm32f4xx_hal_cortex.o [1] +__NVIC_SetPriority 0x800'3bcd 0x2c Code Lc stm32f4xx_hal_cortex.o [1] __NVIC_SetPriorityGrouping - 0x800'3a59 0x22 Code Lc stm32f4xx_hal_cortex.o [1] -__aeabi_ldiv0 0x800'561d Code Gb I64DivZer.o [4] -__aeabi_memset 0x800'3d49 Code Gb ABImemset.o [4] -__aeabi_uldivmod 0x800'53e5 Code Gb I64DivMod.o [4] -__cmain 0x800'5831 Code Gb cmain.o [4] -__exit 0x800'5865 0x14 Code Gb exit.o [5] -__iar_Memset 0x800'3d49 Code Gb ABImemset.o [4] -__iar_Memset_word 0x800'3d51 Code Gb ABImemset.o [4] -__iar_Sin32 0x800'3b6d 0x198 Code Lc cos_sin32.o [3] -__iar_copy_init3 0x800'561f 0x2e Code Gb copy_init3.o [4] -__iar_data_init3 0x800'57bd 0x28 Code Gb data_init.o [4] -__iar_init_vfp 0x800'57e5 Code Gb fpinit_M.o [3] -__iar_program_start 0x800'5901 Code Gb cstartup_M.o [4] -__iar_sin32 0x800'3d45 0x4 Code Gb cos_sin32.o [3] -__iar_sin_medium32 0x800'3d45 0x4 Code Gb cos_sin32.o [3] -__iar_sin_mediumf 0x800'3d45 0x4 Code Gb cos_sin32.o [3] -__iar_zero_init3 0x800'3557 0x3a Code Gb zero_init3.o [4] -__low_level_init 0x800'584f 0x4 Code Gb low_level_init.o [2] + 0x800'3b7d 0x22 Code Lc stm32f4xx_hal_cortex.o [1] +__aeabi_ldiv0 0x800'6909 Code Gb I64DivZer.o [4] +__aeabi_memcpy 0x800'6571 Code Gb ABImemcpy.o [4] +__aeabi_memcpy4 0x800'6591 Code Gb ABImemcpy.o [4] +__aeabi_memcpy8 0x800'6591 Code Gb ABImemcpy.o [4] +__aeabi_memset 0x800'408d Code Gb ABImemset.o [4] +__aeabi_uldivmod 0x800'66cd Code Gb I64DivMod.o [4] +__cmain 0x800'6d21 Code Gb cmain.o [4] +__exit 0x800'6d55 0x14 Code Gb exit.o [5] +__iar_Memset 0x800'408d Code Gb ABImemset.o [4] +__iar_Memset_word 0x800'4095 Code Gb ABImemset.o [4] +__iar_Sin32 0x800'3eb1 0x198 Code Lc cos_sin32.o [3] +__iar_copy_init3 0x800'6617 0x2e Code Gb copy_init3.o [4] +__iar_data_init3 0x800'6cad 0x28 Code Gb data_init.o [4] +__iar_init_vfp 0x800'6cd5 Code Gb fpinit_M.o [3] +__iar_program_start 0x800'6e01 Code Gb cstartup_M.o [4] +__iar_sin32 0x800'4089 0x4 Code Gb cos_sin32.o [3] +__iar_sin_medium32 0x800'4089 0x4 Code Gb cos_sin32.o [3] +__iar_sin_mediumf 0x800'4089 0x4 Code Gb cos_sin32.o [3] +__iar_zero_init3 0x800'366b 0x3a Code Gb zero_init3.o [4] +__low_level_init 0x800'6d3f 0x4 Code Gb low_level_init.o [2] __vector_table 0x800'0000 Data Gb startup_stm32f407xx.o [1] -_call_main 0x800'583d Code Gb cmain.o [4] -_exit 0x800'5859 Code Gb cexit.o [4] -_main 0x800'584b Code Gb cmain.o [4] -exit 0x800'5853 0x4 Code Gb exit.o [2] -g_plsr_ext_event_flag 0x2000'272e 0x1 Data Gb tim.o [1] -g_plsr_route 0x2000'1e74 0x1f0 Data Gb tim.o [1] -g_plsr_system_tick 0x2000'26cc 0x4 Data Gb tim.o [1] -hdma_usart1_rx 0x2000'232c 0x60 Data Gb usart.o [1] -hdma_usart1_tx 0x2000'238c 0x60 Data Gb usart.o [1] -htim1 0x2000'243c 0x48 Data Gb stm32f4xx_hal_timebase_tim.o [1] -htim10 0x2000'2514 0x48 Data Gb tim.o [1] -htim11 0x2000'255c 0x48 Data Gb tim.o [1] -htim13 0x2000'25a4 0x48 Data Gb tim.o [1] -htim14 0x2000'25ec 0x48 Data Gb tim.o [1] -htim2 0x2000'2484 0x48 Data Gb tim.o [1] -htim6 0x2000'24cc 0x48 Data Gb tim.o [1] -huart1 0x2000'2634 0x48 Data Gb usart.o [1] -main 0x800'3591 0x5a Code Gb main.o [1] -memset 0x800'2a91 0x14 Code Gb memset.o [4] -s_current_pwm_freq 0x2000'26d0 0x4 Data Lc tim.o [1] -s_pwm_running 0x2000'272f 0x1 Data Lc tim.o [1] -s_tim6_update_freq_us 0x2000'0008 0x4 Data Lc tim.o [1] -sinf 0x800'3d45 0x4 Code Gb cos_sin32.o [3] -uwTick 0x2000'26c8 0x4 Data Gb stm32f4xx_hal.o [1] -uwTickPrio 0x2000'0000 0x4 Data Gb stm32f4xx_hal.o [1] +_call_main 0x800'6d2d Code Gb cmain.o [4] +_exit 0x800'6d49 Code Gb cexit.o [4] +_main 0x800'6d3b Code Gb cmain.o [4] +backup_data 0x2000'0000 0x4 Data Lc flash_save.o [1] +crc_table 0x800'690c 0x200 Data Lc modbus_crc.o [1] +dma_bkpsram_done_flag 0x2000'3bce 0x1 Data Gb flash_save.o [1] +exit 0x800'6d43 0x4 Code Gb exit.o [2] +g_plsr_ext_event_flag 0x2000'3bcf 0x1 Data Gb tim.o [1] +g_plsr_route 0x2000'2ffc 0x188 Data Gb tim.o [1] +hdma_backup 0x2000'36ec 0x60 Data Gb flash_save.o [1] +hdma_usart1_rx 0x2000'37ac 0x60 Data Gb usart.o [1] +hdma_usart1_tx 0x2000'380c 0x60 Data Gb usart.o [1] +htim1 0x2000'38bc 0x48 Data Gb stm32f4xx_hal_timebase_tim.o [1] +htim10 0x2000'3994 0x48 Data Gb tim.o [1] +htim11 0x2000'39dc 0x48 Data Gb tim.o [1] +htim13 0x2000'3a24 0x48 Data Gb tim.o [1] +htim14 0x2000'3a6c 0x48 Data Gb tim.o [1] +htim2 0x2000'3904 0x48 Data Gb tim.o [1] +htim6 0x2000'394c 0x48 Data Gb tim.o [1] +huart1 0x2000'3ab4 0x48 Data Gb usart.o [1] +log_write_index 0x2000'3bbc 0x2 Data Gb modbus_log.o [1] +main 0x800'36a5 0x54 Code Gb main.o [1] +memset 0x800'2b49 0x14 Code Gb memset.o [4] +modbus_logs 0x2000'1d7c 0x400 Data Gb modbus_log.o [1] +s_act_time_counter 0x2000'3b58 0x4 Data Lc tim.o [1] +s_act_time_flag 0x2000'3bd2 0x1 Data Lc tim.o [1] +s_act_time_target 0x2000'3b5c 0x4 Data Lc tim.o [1] +s_current_pwm_freq 0x2000'3b4c 0x4 Data Lc tim.o [1] +s_freq_update_pending 0x2000'3bd3 0x1 Data Lc tim.o [1] +s_next_period 0x2000'3b60 0x4 Data Lc tim.o [1] +s_next_prescaler 0x2000'3bc0 0x2 Data Lc tim.o [1] +s_pulse_check_counter 0x2000'3b64 0x4 Data Lc tim.o [1] +s_pwm_running 0x2000'3bd0 0x1 Data Lc tim.o [1] +s_task_notification_flag + 0x2000'3bd4 0x1 Data Lc tim.o [1] +s_tim6_update_freq_us 0x2000'000c 0x4 Data Lc tim.o [1] +s_wait_time_counter 0x2000'3b50 0x4 Data Lc tim.o [1] +s_wait_time_flag 0x2000'3bd1 0x1 Data Lc tim.o [1] +s_wait_time_target 0x2000'3b54 0x4 Data Lc tim.o [1] +sinf 0x800'4089 0x4 Code Gb cos_sin32.o [3] +usart1_dma_rx_buffer 0x2000'3384 0x100 Data Gb usart.o [1] +usart1_dma_rx_len 0x2000'3bcc 0x2 Data Gb usart.o [1] +usart1_dma_tx_buffer 0x2000'3484 0x100 Data Gb usart.o [1] +usart1_rx_buffer 0x2000'3284 0x100 Data Gb usart.o [1] +usart1_rx_head 0x2000'3bc6 0x2 Data Gb usart.o [1] +usart1_rx_tail 0x2000'3bc8 0x2 Data Gb usart.o [1] +usart1_tx_busy 0x2000'3be0 0x1 Data Gb usart.o [1] +uwTick 0x2000'3b48 0x4 Data Gb stm32f4xx_hal.o [1] +uwTickPrio 0x2000'0004 0x4 Data Gb stm32f4xx_hal.o [1] [1] = e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\test.1\Obj @@ -897,9 +1017,9 @@ uwTickPrio 0x2000'0000 0x4 Data Gb stm32f4xx_hal.o [1] [4] = rt7M_tl.a [5] = shb_l.a - 22'696 bytes of readonly code memory - 540 bytes of readonly data memory - 14'139 bytes of readwrite data memory + 27'536 bytes of readonly code memory + 1'056 bytes of readonly data memory + 19'425 bytes of readwrite data memory Errors: none Warnings: none diff --git a/PLSR/PLSR/EWARM/test.1/Obj/.ninja_log b/PLSR/PLSR/EWARM/test.1/Obj/.ninja_log index 40f9c33..d1f0d74 100644 --- a/PLSR/PLSR/EWARM/test.1/Obj/.ninja_log +++ b/PLSR/PLSR/EWARM/test.1/Obj/.ninja_log @@ -1,146 +1,63 @@ # ninja log v5 -123 258 7764177383144035 stm32f4xx_ll_rng.pbi 5e12b9ea00d0b826 -865 901 7764177389514042 stm32f4xx_ll_gpio.pbi df8b54563945d41d -628 661 7764177387144037 stm32f4xx_ll_tim.pbi b88554c6464192f5 -2012 2480 7764177404774077 stm32f4xx_hal_flash_ex.pbi ac2d035774fe6a2e -771 1102 7764177391494047 stm32f4xx_hal_pwr.pbi b347497fce55b6a8 -661 722 7764177387504039 stm32f4xx_ll_pwr.pbi 952cb4e4f4edb65b -1103 1682 7764177397334057 test.1_part3.pbi 6eb1d553da066571 -716 1080 7764177391154049 stm32f4xx_hal_rcc_ex.pbi c1d751d24d77a2df -41 229 7764177382754038 app_hooks.pbi ffd399489d189d5a -1017 1345 7764177393944061 test.1_part4.pbi 4a2716eb92784a90 -186 649 7764177386924039 stm32f4xx_hal_pwr_ex.pbi b84426bf5a4ce0cf -44 123 7764177381674037 os_cpu_c.pbi eb75b848b406ea34 -34 420 7764177384704032 stm32f4xx_hal_rcc.pbi 50976e6b18f3b8bc -37 596 7764177386454061 stm32f4xx_hal_tim.pbi 71840baae88d57c4 -46 516 7764177385524038 stm32f4xx_hal_usart.pbi b368fafd8b8b8bb9 -1177 2720 7764189921464956 test.1.pbw f11e09b552b4c82f +2386 2550 7765944093266374 stm32f4xx_ll_rng.pbi 5e12b9ea00d0b826 +2623 2823 7765944095613336 stm32f4xx_ll_gpio.pbi df8b54563945d41d +1380 1740 7765944085304247 stm32f4xx_hal_flash_ex.pbi ac2d035774fe6a2e +2290 2697 7765944094956311 stm32f4xx_hal_pwr.pbi b347497fce55b6a8 +2592 2622 7765944094204558 stm32f4xx_ll_pwr.pbi 952cb4e4f4edb65b +1740 1773 7765944085671831 stm32f4xx_ll_tim.pbi b88554c6464192f5 +1353 1385 7765944081838449 test.1_part7.pbi 67c64030b23c9b51 +2898 3414 7765944102128366 test.1_part3.pbi 2c7780fc3f88c160 +1304 1667 7765944084550493 stm32f4xx_hal_rcc_ex.pbi c1d751d24d77a2df +2101 2274 7765944090683100 app_hooks.pbi ffd399489d189d5a +2103 2189 7765944089538184 os_cpu_c.pbi eb75b848b406ea34 +2614 2898 7765944096933757 stm32f4xx_hal_pwr_ex.pbi b84426bf5a4ce0cf +2868 3348 7765944101394896 test.1_part4.pbi b15d70d6e2dea5ca +2310 2613 7765944094111527 stm32f4xx_hal_rcc.pbi 50976e6b18f3b8bc +1385 1737 7765944085161127 stm32f4xx_hal_usart.pbi b368fafd8b8b8bb9 +2369 2868 7765944096522356 stm32f4xx_hal_tim.pbi 71840baae88d57c4 +2501 2553 7765944093276625 stm32f4xx_ll_dac.pbi 7dfc4be0933cdfaf 2014 2487 7762488664073707 uart.pbi 5ce52444157923c9 -517 553 7764177386084042 stm32f4xx_ll_dac.pbi 7dfc4be0933cdfaf -852 1017 7764177390414063 stm32f4xx_ll_crc.pbi dcf41d4b97590765 -553 719 7764177387484040 stm32f4xx_ll_rcc.pbi fb9ace481decf8ab -1430 1744 7764177397994062 stm32f4xx_hal_msp.pbi 8144db72f01a260b -594 627 7764177386824042 stm32f4xx_ll_spi.pbi ce805017b70a4f43 -597 771 7764177388264055 os_dbg.pbi f7287a072fe86a55 -720 865 7764177389204042 stm32f4xx_ll_usart.pbi 783190689e783d9 -1489 1912 7764177399674064 stm32f4xx_hal_crc.pbi 881b29e4c80746b3 -659 716 7764177387464040 stm32f4xx_ll_dma.pbi f9e6142ede2883b4 -39 185 7764177382404038 stm32f4xx_ll_exti.pbi 883a2fd463949e02 -933 944 7764177390014073 test.1_part5.pbi d64d2ad0ff3eb443 -723 852 7764177389074049 ucos_ii.pbi 4e0ab25e0060431e -2002 2368 7764177403764082 stm32f4xx_hal.pbi a073c739b6b34173 -901 933 7764177389864043 stm32f4xx_ll_i2c.pbi 7f1151d8874c40c9 -229 594 7764177386264071 stm32f4xx_hal_sram.pbi 4652c5af4efd4e19 -2005 2316 7764177403594076 stm32f4xx_hal_flash.pbi eccf13860e1d0c6a -945 1014 7764177390454069 test.1_part6.pbi ddc887ac32bb1191 -650 1020 7764177390704070 stm32f4xx_hal_tim_ex.pbi 3c68a2e86514987f -2148 2564 7764177406134072 stm32f4xx_hal_flash_ramfunc.pbi ae498685b336a49c -421 755 7764177388104041 stm32f4xx_hal_wwdg.pbi fca2b44f67349f99 -258 658 7764177387144037 stm32f4xx_hal_uart.pbi e7ca7ebbb4330340 +3862 5441 7765944122073337 test.1.pbw f11e09b552b4c82f +2274 2310 7765944091071942 stm32f4xx_ll_crc.pbi dcf41d4b97590765 +1737 1771 7765944085641834 stm32f4xx_ll_rcc.pbi fb9ace481decf8ab +2189 2249 7765944090156714 stm32f4xx_ll_spi.pbi ce805017b70a4f43 +422 906 7765944076954791 stm32f4xx_hal_msp.pbi 8144db72f01a260b +1771 1964 7765944087093658 stm32f4xx_ll_usart.pbi 783190689e783d9 +2249 2324 7765944091181946 os_dbg.pbi f7287a072fe86a55 +2324 2500 7765944092643679 stm32f4xx_ll_dma.pbi f9e6142ede2883b4 +45 424 7765944071933926 stm32f4xx_hal_crc.pbi 881b29e4c80746b3 +2553 2595 7765944093801880 stm32f4xx_ll_exti.pbi 883a2fd463949e02 +1213 1352 7765944081467551 ucos_ii.pbi 4e0ab25e0060431e +2823 2852 7765944096324667 test.1_part5.pbi 41f12be61ce67c27 +2141 2277 7765944090752286 stm32f4xx_ll_i2c.pbi 7f1151d8874c40c9 +39 518 7765944073106678 stm32f4xx_hal.pbi a073c739b6b34173 +1774 2103 7765944088941230 stm32f4xx_hal_sram.pbi 4652c5af4efd4e19 +2550 2592 7765944093722798 test.1_part6.pbi b9d684e502f25afa +2595 2999 7765944097872088 stm32f4xx_hal_flash.pbi eccf13860e1d0c6a +1965 2369 7765944091278927 stm32f4xx_hal_tim_ex.pbi 3c68a2e86514987f +1667 2100 7765944088871009 stm32f4xx_hal_wwdg.pbi fca2b44f67349f99 +2043 2386 7765944091674121 stm32f4xx_hal_flash_ramfunc.pbi ae498685b336a49c +1307 1797 7765944085944433 stm32f4xx_hal_uart.pbi e7ca7ebbb4330340 35 454 7762489045860992 timer.pbi 8f8acc6a162957f -2316 2631 7764177406654074 stm32f4xx_hal_i2c.pbi 74395538aa12fa10 -1763 2148 7764177401454076 stm32f4xx_hal_dma.pbi 2d6aa8f3983bf80a -1020 1430 7764177394364052 stm32f4xx_hal_timebase_tim.pbi b6f5ce0feaca8054 -1570 2002 7764177400514075 stm32f4xx_hal_dma_ex.pbi 1960c5ab56ffede7 -755 1077 7764177391224051 stm32f4xx_hal_i2c_ex.pbi 7798e48f8e6ef374 -1913 2229 7764177402714070 stm32f4xx_hal_exti.pbi 373789209d565f00 -1745 2145 7764177401774091 main.pbi 9c0a6aa02351636a -1078 1489 7764177395304063 stm32f4xx_it.pbi d01766022cb163bc -1428 1763 7764177398054059 stm32f4xx_hal_cortex.pbi 2c6d2473a153fb5a -1683 2011 7764177400604103 system_stm32f4xx.pbi f50e519d7e78a5de -1346 1677 7764177397304058 gpio.pbi a088b5271f02118a -845 1177 7764189906354929 test.1.pbd dd3dd60110e24e1b -339 844 7764189903034906 test.1_part0.pbi 524317d160cb374e -2229 2565 7764177405934099 stm32f4xx_hal_gpio.pbi 53b438f48be9a8d0 -2368 2891 7764177409414108 test.1_part1.pbi dc01e3b8207ff4ec -2631 3131 7764177411864092 test.1_part2.pbi 5b60a24e7c60e7e6 -1014 1427 7764177394414055 dma.pbi 4f5ebe00ac67ed57 -31 338 7764189897954924 tim.pbi f07c6d790a519d93 -1678 2004 7764177400524070 usart.pbi 7c2d93866867ab60 -44 80 7764217976173092 stm32f4xx_ll_dma.pbi f9e6142ede2883b4 -37 101 7764217976413106 os_cpu_c.pbi eb75b848b406ea34 -80 121 7764217976623103 stm32f4xx_ll_rcc.pbi fb9ace481decf8ab -35 167 7764217977093094 stm32f4xx_ll_gpio.pbi df8b54563945d41d -122 271 7764217978023102 stm32f4xx_ll_rng.pbi 5e12b9ea00d0b826 -31 487 7764217979423102 stm32f4xx_hal_rcc.pbi 50976e6b18f3b8bc -40 491 7764217979403106 stm32f4xx_hal_tim_ex.pbi 3c68a2e86514987f -167 510 7764217980403109 stm32f4xx_hal_rcc_ex.pbi c1d751d24d77a2df -510 555 7764217980963120 stm32f4xx_ll_dac.pbi 7dfc4be0933cdfaf -101 558 7764217980983108 stm32f4xx_hal_wwdg.pbi fca2b44f67349f99 -42 611 7764217981523111 stm32f4xx_hal_tim.pbi 71840baae88d57c4 -39 66 7764218055246764 stm32f4xx_ll_exti.pbi 883a2fd463949e02 -35 168 7764218056256766 stm32f4xx_ll_gpio.pbi df8b54563945d41d -32 171 7764218056276770 stm32f4xx_ll_tim.pbi b88554c6464192f5 -171 206 7764218056636771 stm32f4xx_ll_dma.pbi f9e6142ede2883b4 -41 377 7764218058306766 stm32f4xx_hal_rcc_ex.pbi c1d751d24d77a2df -207 381 7764218057986773 stm32f4xx_ll_i2c.pbi 7f1151d8874c40c9 -378 412 7764218058686776 stm32f4xx_ll_pwr.pbi 952cb4e4f4edb65b -412 468 7764218059256791 app_hooks.pbi ffd399489d189d5a -43 509 7764218059666769 stm32f4xx_hal_sram.pbi 4652c5af4efd4e19 -168 511 7764218059676773 stm32f4xx_hal_wwdg.pbi fca2b44f67349f99 -37 522 7764218059796775 stm32f4xx_hal_uart.pbi e7ca7ebbb4330340 -469 539 7764218059876772 os_cpu_c.pbi eb75b848b406ea34 -381 541 7764218059856770 stm32f4xx_ll_rng.pbi 5e12b9ea00d0b826 -67 543 7764218059916773 stm32f4xx_hal_rcc.pbi 50976e6b18f3b8bc -539 577 7764218060286781 stm32f4xx_ll_rcc.pbi fb9ace481decf8ab -541 580 7764218060316784 stm32f4xx_ll_spi.pbi ce805017b70a4f43 -523 584 7764218060416785 os_dbg.pbi f7287a072fe86a55 -580 593 7764218060516780 test.1_part5.pbi d64d2ad0ff3eb443 -594 749 7764218061836782 stm32f4xx_ll_crc.pbi dcf41d4b97590765 -584 752 7764218061516779 ucos_ii.pbi 4e0ab25e0060431e -753 785 7764218062426787 stm32f4xx_ll_usart.pbi 783190689e783d9 -749 789 7764218062416777 stm32f4xx_ll_dac.pbi 7dfc4be0933cdfaf -785 834 7764218062926793 test.1_part6.pbi ddc887ac32bb1191 -512 877 7764218063336785 stm32f4xx_hal_tim_ex.pbi 3c68a2e86514987f -544 918 7764218063346786 stm32f4xx_hal_pwr_ex.pbi b84426bf5a4ce0cf -509 928 7764218063856785 stm32f4xx_hal_tim.pbi 71840baae88d57c4 -578 1063 7764218064706802 stm32f4xx_hal_usart.pbi b368fafd8b8b8bb9 -789 1168 7764218065856794 stm32f4xx_hal_msp.pbi 8144db72f01a260b -835 1185 7764218066326789 dma.pbi 4f5ebe00ac67ed57 -918 1265 7764218066996795 stm32f4xx_hal_crc.pbi 881b29e4c80746b3 -877 1328 7764218067666797 stm32f4xx_hal_dma.pbi 2d6aa8f3983bf80a -1063 1350 7764218067886792 test.1_part4.pbi 4a2716eb92784a90 -929 1373 7764218068306791 gpio.pbi a088b5271f02118a -1169 1505 7764218069566789 stm32f4xx_hal_dma_ex.pbi 1960c5ab56ffede7 -1185 1508 7764218069656796 stm32f4xx_hal_timebase_tim.pbi b6f5ce0feaca8054 -1329 1688 7764218071406797 stm32f4xx_hal_flash_ramfunc.pbi ae498685b336a49c -1266 1691 7764218070906791 stm32f4xx_hal_exti.pbi 373789209d565f00 -1351 1751 7764218071656846 stm32f4xx_hal_gpio.pbi 53b438f48be9a8d0 -1505 1857 7764218073146806 stm32f4xx_hal_cortex.pbi 2c6d2473a153fb5a -1509 1860 7764218073176797 stm32f4xx_hal_flash.pbi eccf13860e1d0c6a -1373 1911 7764218073366807 tim.pbi f07c6d790a519d93 -1689 1997 7764218074406797 stm32f4xx_hal_i2c_ex.pbi 7798e48f8e6ef374 -1691 1999 7764218074516809 stm32f4xx_hal_flash_ex.pbi ac2d035774fe6a2e -1752 2177 7764218076306808 system_stm32f4xx.pbi f50e519d7e78a5de -1860 2300 7764218077576804 stm32f4xx_hal.pbi a073c739b6b34173 -1858 2366 7764218078086813 main.pbi 9c0a6aa02351636a -1911 2367 7764218078036804 stm32f4xx_hal_pwr.pbi b347497fce55b6a8 -2000 2369 7764218078056809 usart.pbi 7c2d93866867ab60 -1997 2436 7764218078246818 stm32f4xx_it.pbi d01766022cb163bc -2178 2535 7764218079506808 stm32f4xx_hal_i2c.pbi 74395538aa12fa10 -2367 2951 7764218083776823 test.1_part3.pbi 6eb1d553da066571 -2370 2951 7764218083516820 test.1_part1.pbi dc01e3b8207ff4ec -2437 2988 7764218084336837 test.1_part0.pbi 524317d160cb374e -2536 3065 7764218085236817 test.1_part2.pbi 5b60a24e7c60e7e6 -3066 3396 7764218088546845 test.1.pbd dd3dd60110e24e1b -3396 4920 7764218103477785 test.1.pbw f11e09b552b4c82f -31 334 7764230767009972 tim.pbi f07c6d790a519d93 -334 841 7764230772080115 test.1_part0.pbi 524317d160cb374e -841 1183 7764230775509986 test.1.pbd dd3dd60110e24e1b -1183 2728 7764230790630017 test.1.pbw f11e09b552b4c82f -32 354 7764230836851837 tim.pbi f07c6d790a519d93 -355 865 7764230841961851 test.1_part0.pbi 524317d160cb374e -865 1193 7764230845241838 test.1.pbd dd3dd60110e24e1b -1193 2721 7764230860219795 test.1.pbw f11e09b552b4c82f -37 350 7764231234861946 tim.pbi f07c6d790a519d93 -351 897 7764231240342996 test.1_part0.pbi 524317d160cb374e -898 1240 7764231243673001 test.1.pbd dd3dd60110e24e1b -1241 2831 7764231259343011 test.1.pbw f11e09b552b4c82f -33 368 7764233132077882 tim.pbi f07c6d790a519d93 -368 881 7764233137177890 test.1_part0.pbi 524317d160cb374e -882 1214 7764233140537918 test.1.pbd dd3dd60110e24e1b -1214 2895 7764233155807946 test.1.pbw f11e09b552b4c82f -30 505 7764247219630332 tim.pbi f07c6d790a519d93 -505 1019 7764247224790357 test.1_part0.pbi 524317d160cb374e -1020 1348 7764247228080358 test.1.pbd dd3dd60110e24e1b -1349 2879 7764247243080386 test.1.pbw f11e09b552b4c82f +2278 2682 7765944094792178 stm32f4xx_hal_i2c.pbi 74395538aa12fa10 +34 421 7765944071873918 stm32f4xx_hal_dma.pbi 2d6aa8f3983bf80a +43 533 7765944073230826 stm32f4xx_hal_timebase_tim.pbi b6f5ce0feaca8054 +1968 2290 7765944090871643 stm32f4xx_hal_i2c_ex.pbi 7798e48f8e6ef374 +425 808 7765944076026173 stm32f4xx_hal_dma_ex.pbi 1960c5ab56ffede7 +591 1022 7765944078180586 main.pbi 9c0a6aa02351636a +518 889 7765944076803026 stm32f4xx_hal_exti.pbi 373789209d565f00 +37 591 7765944073639492 stm32f4xx_it.pbi d01766022cb163bc +1023 1380 7765944081780211 stm32f4xx_hal_cortex.pbi 2c6d2473a153fb5a +929 1307 7765944080920020 system_stm32f4xx.pbi f50e519d7e78a5de +539 925 7765944077106476 gpio.pbi a088b5271f02118a +1797 2140 7765944089172990 stm32f4xx_hal_gpio.pbi 53b438f48be9a8d0 +1371 1968 7765944087547595 test.1_part0.pbi 60db414ccd7a80f4 +3523 3861 7765944106600045 test.1.pbd 363d5d355a216cdf +1441 2042 7765944088290296 test.1_part1.pbi 72148e63fe682e2f +3000 3523 7765944103216549 test.1_part2.pbi 932c7a5b50912170 +41 538 7765944073337308 dma.pbi 4f5ebe00ac67ed57 +925 1440 7765944082259040 tim.pbi f07c6d790a519d93 +906 1303 7765944080900017 usart.pbi 7c2d93866867ab60 +808 1212 7765944079931957 modbus_log.pbi 596603da5f343c45 +534 928 7765944077266980 flash_save.pbi dc7405226be28cc6 +890 1370 7765944081683497 modbus_crc.pbi 9b76681ddf289794 diff --git a/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.o b/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.o index 83ad858..f60e881 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.o and b/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.pbi b/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.pbi index 5ab9e3e..0c97fe1 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/app_hooks.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/build.ninja b/PLSR/PLSR/EWARM/test.1/Obj/build.ninja index c85a949..ee130f5 100644 --- a/PLSR/PLSR/EWARM/test.1/Obj/build.ninja +++ b/PLSR/PLSR/EWARM/test.1/Obj/build.ninja @@ -21,8 +21,11 @@ rule browsedata #Build steps build dma.pbi : index dma.xcl +build flash_save.pbi : index flash_save.xcl build gpio.pbi : index gpio.xcl build main.pbi : index main.xcl +build modbus_crc.pbi : index modbus_crc.xcl +build modbus_log.pbi : index modbus_log.xcl build stm32f4xx_hal_msp.pbi : index stm32f4xx_hal_msp.xcl build stm32f4xx_hal_timebase_tim.pbi : index stm32f4xx_hal_timebase_tim.xcl build stm32f4xx_it.pbi : index stm32f4xx_it.xcl @@ -67,14 +70,15 @@ build app_hooks.pbi : index app_hooks.xcl build os_cpu_c.pbi : index os_cpu_c.xcl build os_dbg.pbi : index os_dbg.xcl build ucos_ii.pbi : index ucos_ii.xcl -build test.1_part0.pbi : link dma.pbi gpio.pbi main.pbi stm32f4xx_hal_msp.pbi stm32f4xx_hal_timebase_tim.pbi stm32f4xx_it.pbi tim.pbi -build test.1_part1.pbi : link usart.pbi system_stm32f4xx.pbi stm32f4xx_hal.pbi stm32f4xx_hal_cortex.pbi stm32f4xx_hal_crc.pbi stm32f4xx_hal_dma.pbi stm32f4xx_hal_dma_ex.pbi -build test.1_part2.pbi : link stm32f4xx_hal_exti.pbi stm32f4xx_hal_flash.pbi stm32f4xx_hal_flash_ex.pbi stm32f4xx_hal_flash_ramfunc.pbi stm32f4xx_hal_gpio.pbi stm32f4xx_hal_i2c.pbi stm32f4xx_hal_i2c_ex.pbi -build test.1_part3.pbi : link stm32f4xx_hal_pwr.pbi stm32f4xx_hal_pwr_ex.pbi stm32f4xx_hal_rcc.pbi stm32f4xx_hal_rcc_ex.pbi stm32f4xx_hal_sram.pbi stm32f4xx_hal_tim.pbi stm32f4xx_hal_tim_ex.pbi -build test.1_part4.pbi : link stm32f4xx_hal_uart.pbi stm32f4xx_hal_usart.pbi stm32f4xx_hal_wwdg.pbi stm32f4xx_ll_crc.pbi stm32f4xx_ll_dac.pbi stm32f4xx_ll_dma.pbi stm32f4xx_ll_exti.pbi -build test.1_part5.pbi : link stm32f4xx_ll_gpio.pbi stm32f4xx_ll_i2c.pbi stm32f4xx_ll_pwr.pbi stm32f4xx_ll_rcc.pbi stm32f4xx_ll_rng.pbi stm32f4xx_ll_spi.pbi stm32f4xx_ll_tim.pbi -build test.1_part6.pbi : link stm32f4xx_ll_usart.pbi app_hooks.pbi os_cpu_c.pbi os_dbg.pbi ucos_ii.pbi -build test.1.pbd : link test.1_part0.pbi test.1_part1.pbi test.1_part2.pbi test.1_part3.pbi test.1_part4.pbi test.1_part5.pbi test.1_part6.pbi +build test.1_part0.pbi : link dma.pbi flash_save.pbi gpio.pbi main.pbi modbus_crc.pbi modbus_log.pbi stm32f4xx_hal_msp.pbi +build test.1_part1.pbi : link stm32f4xx_hal_timebase_tim.pbi stm32f4xx_it.pbi tim.pbi usart.pbi system_stm32f4xx.pbi stm32f4xx_hal.pbi stm32f4xx_hal_cortex.pbi +build test.1_part2.pbi : link stm32f4xx_hal_crc.pbi stm32f4xx_hal_dma.pbi stm32f4xx_hal_dma_ex.pbi stm32f4xx_hal_exti.pbi stm32f4xx_hal_flash.pbi stm32f4xx_hal_flash_ex.pbi stm32f4xx_hal_flash_ramfunc.pbi +build test.1_part3.pbi : link stm32f4xx_hal_gpio.pbi stm32f4xx_hal_i2c.pbi stm32f4xx_hal_i2c_ex.pbi stm32f4xx_hal_pwr.pbi stm32f4xx_hal_pwr_ex.pbi stm32f4xx_hal_rcc.pbi stm32f4xx_hal_rcc_ex.pbi +build test.1_part4.pbi : link stm32f4xx_hal_sram.pbi stm32f4xx_hal_tim.pbi stm32f4xx_hal_tim_ex.pbi stm32f4xx_hal_uart.pbi stm32f4xx_hal_usart.pbi stm32f4xx_hal_wwdg.pbi stm32f4xx_ll_crc.pbi +build test.1_part5.pbi : link stm32f4xx_ll_dac.pbi stm32f4xx_ll_dma.pbi stm32f4xx_ll_exti.pbi stm32f4xx_ll_gpio.pbi stm32f4xx_ll_i2c.pbi stm32f4xx_ll_pwr.pbi stm32f4xx_ll_rcc.pbi +build test.1_part6.pbi : link stm32f4xx_ll_rng.pbi stm32f4xx_ll_spi.pbi stm32f4xx_ll_tim.pbi stm32f4xx_ll_usart.pbi app_hooks.pbi os_cpu_c.pbi os_dbg.pbi +build test.1_part7.pbi : link ucos_ii.pbi +build test.1.pbd : link test.1_part0.pbi test.1_part1.pbi test.1_part2.pbi test.1_part3.pbi test.1_part4.pbi test.1_part5.pbi test.1_part6.pbi test.1_part7.pbi build test.1.pbw : browsedata test.1.pbd diff --git a/PLSR/PLSR/EWARM/test.1/Obj/dma.o b/PLSR/PLSR/EWARM/test.1/Obj/dma.o index 4c5e043..c783890 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/dma.o and b/PLSR/PLSR/EWARM/test.1/Obj/dma.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/dma.pbi b/PLSR/PLSR/EWARM/test.1/Obj/dma.pbi index 64d929f..d8fb29f 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/dma.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/dma.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/gpio.o b/PLSR/PLSR/EWARM/test.1/Obj/gpio.o index 78459f4..e257f77 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/gpio.o and b/PLSR/PLSR/EWARM/test.1/Obj/gpio.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/gpio.pbi b/PLSR/PLSR/EWARM/test.1/Obj/gpio.pbi index db64a36..b4b5c04 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/gpio.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/gpio.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/main.o b/PLSR/PLSR/EWARM/test.1/Obj/main.o index 707990d..de3a8a0 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/main.o and b/PLSR/PLSR/EWARM/test.1/Obj/main.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/main.pbi b/PLSR/PLSR/EWARM/test.1/Obj/main.pbi index eebb329..4549ac4 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/main.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/main.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/main.pbi.dep b/PLSR/PLSR/EWARM/test.1/Obj/main.pbi.dep index 637a2cf..c0ab4a4 100644 --- a/PLSR/PLSR/EWARM/test.1/Obj/main.pbi.dep +++ b/PLSR/PLSR/EWARM/test.1/Obj/main.pbi.dep @@ -1,12 +1,19 @@ main.pbi: \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\dma.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\usart.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_log.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\flash_save.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\modbus_crc.h \ + E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \ + E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\stdlib.h \ + E:\Software\IAR\arm\inc\c\ctype.h \ + E:\Software\IAR\arm\inc\c\DLib_Product_string.h \ + E:\Software\IAR\arm\inc\c\string.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\os_trace.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Ports\os_cpu.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\os_cfg.h \ - E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\stdio.h \ - E:\Software\IAR\arm\inc\c\stdarg.h \ + E:\Software\IAR\arm\inc\c\stdio.h E:\Software\IAR\arm\inc\c\stdarg.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Config\app_cfg.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\UCOS\Source\ucos_ii.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\gpio.h \ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_a.o b/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_a.o index 5732cf3..3f00469 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_a.o and b/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_a.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_c.o b/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_c.o index 2ef7668..d0d0993 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_c.o and b/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_c.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_c.pbi b/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_c.pbi index 93040f6..4b6a9db 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_c.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/os_cpu_c.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/os_dbg.o b/PLSR/PLSR/EWARM/test.1/Obj/os_dbg.o index c476eb6..fe3e6b2 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/os_dbg.o and b/PLSR/PLSR/EWARM/test.1/Obj/os_dbg.o differ diff --git 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int, const volatile __iar_builtin_uint *, unsigned int)", + "ID": "c:stm32f4xx_hal_rcc.h@8524@macro@RCC_HCLK_DIV16", + "What": "MacroDef", + "defdec": "Def", + "display": "RCC_HCLK_DIV16", "location": { - "column": "19", - "line": "122", - "path": "E:\\Software\\IAR\\arm\\inc\\c\\iccarm_builtin.h" + "column": "9", + "line": "245", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_rcc.h" }, - "name": "__iar_builtin_LDC_noidx", - "origin": "system_include", + "name": "RCC_HCLK_DIV16", + "origin": "user_include", "scope": null }, { - "ID": "c:@F@__iar_builtin_LDCL_noidx", - "What": "Function", - "defdec": "Dec", - "display": "void __iar_builtin_LDCL_noidx(unsigned int, unsigned int, const volatile __iar_builtin_uint *, unsigned int)", + "ID": "c:stm32f4xx_hal_rcc.h@8667@macro@RCC_RTCCLKSOURCE_NO_CLK", + "What": "MacroDef", + "defdec": "Def", + "display": "RCC_RTCCLKSOURCE_NO_CLK", "location": { - "column": "19", - "line": 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"MPU_RBAR_ADDR_Pos", "origin": "user_include", "scope": null }, { - "ID": "c:core_cm4.h@F@__NVIC_EnableIRQ", - "What": "Function", + "ID": "c:core_cm4.h@78177@macro@MPU_RBAR_ADDR_Msk", + "What": "MacroDef", "defdec": "Def", - "display": "void __NVIC_EnableIRQ(IRQn_Type)", + "display": "MPU_RBAR_ADDR_Msk", "location": { - "column": "22", - "line": "1684", + "column": "9", + "line": "1256", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\CMSIS\\Include\\core_cm4.h" }, - "name": "__NVIC_EnableIRQ", + "name": "MPU_RBAR_ADDR_Msk", "origin": "user_include", "scope": null }, { - "ID": "c:core_cm4.h@F@__NVIC_GetEnableIRQ", - "What": "Function", + "ID": "c:core_cm4.h@78296@macro@MPU_RBAR_VALID_Pos", + "What": "MacroDef", "defdec": "Def", - "display": "uint32_t __NVIC_GetEnableIRQ(IRQn_Type)", + "display": "MPU_RBAR_VALID_Pos", "location": { - "column": "26", - "line": "1703", + "column": "9", + "line": "1258", "path": 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"c:stm32_hal_legacy.h@90445@macro@HAL_PWR_DisableBkUpReg", + "ID": "c:stm32_hal_legacy.h@77538@macro@ETH_MAC_READCONTROLLER_IDLE", "What": "MacroDef", "defdec": "Def", - "display": "HAL_PWR_DisableBkUpReg", + "display": "ETH_MAC_READCONTROLLER_IDLE", "location": { "column": "9", - "line": "1900", + "line": "1628", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "HAL_PWR_DisableBkUpReg", + "name": "ETH_MAC_READCONTROLLER_IDLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@90524@macro@HAL_PWR_DisableFlashPowerDown", + "ID": "c:stm32_hal_legacy.h@77638@macro@ETH_MAC_READCONTROLLER_READING_DATA", "What": "MacroDef", "defdec": "Def", - "display": "HAL_PWR_DisableFlashPowerDown", + "display": "ETH_MAC_READCONTROLLER_READING_DATA", "location": { "column": "9", - "line": "1901", + "line": "1629", "path": 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"c:stm32_hal_legacy.h@77941@macro@ETH_MAC_READCONTROLLER_FLUSHING", "What": "MacroDef", "defdec": "Def", - "display": "HAL_PWR_EnableBkUpReg", + "display": "ETH_MAC_READCONTROLLER_FLUSHING", "location": { "column": "9", - "line": "1903", + "line": "1633", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "HAL_PWR_EnableBkUpReg", + "name": "ETH_MAC_READCONTROLLER_FLUSHING", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@90773@macro@HAL_PWR_EnableFlashPowerDown", + "ID": "c:stm32_hal_legacy.h@78128@macro@ETH_MAC_RXFIFO_WRITE_ACTIVE", "What": "MacroDef", "defdec": "Def", - "display": "HAL_PWR_EnableFlashPowerDown", + "display": "ETH_MAC_RXFIFO_WRITE_ACTIVE", "location": { "column": "9", - "line": "1904", + "line": "1635", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "HAL_PWR_EnableFlashPowerDown", + "name": "ETH_MAC_RXFIFO_WRITE_ACTIVE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@90858@macro@HAL_PWR_EnableVddio2Monitor", + "ID": "c:stm32_hal_legacy.h@78225@macro@ETH_MAC_SMALL_FIFO_NOTACTIVE", "What": "MacroDef", "defdec": "Def", - "display": "HAL_PWR_EnableVddio2Monitor", + "display": "ETH_MAC_SMALL_FIFO_NOTACTIVE", "location": { "column": "9", - "line": "1905", + "line": "1636", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "HAL_PWR_EnableVddio2Monitor", + "name": "ETH_MAC_SMALL_FIFO_NOTACTIVE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@90942@macro@HAL_PWR_PVD_PVM_IRQHandler", + "ID": "c:stm32_hal_legacy.h@78341@macro@ETH_MAC_SMALL_FIFO_READ_ACTIVE", "What": "MacroDef", "defdec": "Def", - "display": "HAL_PWR_PVD_PVM_IRQHandler", + "display": "ETH_MAC_SMALL_FIFO_READ_ACTIVE", "location": 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"c:stm32_hal_legacy.h@158778@macro@__OTGFS_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@153330@macro@__GPIOA_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__OTGFS_CLK_DISABLE", + "display": "__GPIOA_RELEASE_RESET", "location": { "column": "9", - "line": "2966", + "line": "2875", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__OTGFS_CLK_DISABLE", + "name": "__GPIOA_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@158834@macro@__OTGFS_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@153390@macro@__GPIOB_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__OTGFS_CLK_ENABLE", + "display": "__GPIOB_CLK_DISABLE", "location": { "column": "9", - "line": "2967", + "line": "2876", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__OTGFS_CLK_ENABLE", + "name": "__GPIOB_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@158888@macro@__OTGFS_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@153446@macro@__GPIOB_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__OTGFS_CLK_SLEEP_DISABLE", + "display": "__GPIOB_CLK_ENABLE", "location": { "column": "9", - "line": "2968", + "line": "2877", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__OTGFS_CLK_SLEEP_DISABLE", + "name": "__GPIOB_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@158956@macro@__OTGFS_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@153500@macro@__GPIOB_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__OTGFS_CLK_SLEEP_ENABLE", + "display": "__GPIOB_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "2969", + "line": "2878", "path": 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"__OTGFS_RELEASE_RESET", + "display": "__GPIOB_FORCE_RESET", "location": { "column": "9", - "line": "2971", + "line": "2880", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__OTGFS_RELEASE_RESET", + "name": "__GPIOB_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@159138@macro@__PWR_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@153690@macro@__GPIOB_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__PWR_CLK_DISABLE", + "display": "__GPIOB_RELEASE_RESET", "location": { "column": "9", - "line": "2972", + "line": "2881", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__PWR_CLK_DISABLE", + "name": "__GPIOB_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@159190@macro@__PWR_CLK_ENABLE", + "ID": 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"__GPIOE_CLK_DISABLE", "location": { "column": "9", - "line": "3000", + "line": "2894", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__RNG_CLK_ENABLE", + "name": "__GPIOE_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@160830@macro@__RNG_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@154526@macro@__GPIOE_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__RNG_CLK_SLEEP_DISABLE", + "display": "__GPIOE_CLK_ENABLE", "location": { "column": "9", - "line": "3001", + "line": "2895", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__RNG_CLK_SLEEP_DISABLE", + "name": "__GPIOE_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@160894@macro@__RNG_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@154580@macro@__GPIOE_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__RNG_CLK_SLEEP_ENABLE", + "display": "__GPIOE_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3002", + "line": "2896", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__RNG_CLK_SLEEP_ENABLE", + "name": "__GPIOE_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@160956@macro@__RNG_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@154648@macro@__GPIOE_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__RNG_FORCE_RESET", + "display": "__GPIOE_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3003", + "line": "2897", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__RNG_FORCE_RESET", + "name": "__GPIOE_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161008@macro@__RNG_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@154714@macro@__GPIOE_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__RNG_RELEASE_RESET", + "display": "__GPIOE_FORCE_RESET", "location": { "column": "9", - "line": "3004", + "line": "2898", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__RNG_RELEASE_RESET", + "name": "__GPIOE_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161064@macro@__SAI1_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@154770@macro@__GPIOE_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SAI1_CLK_DISABLE", + "display": "__GPIOE_RELEASE_RESET", "location": { "column": "9", - "line": "3005", + "line": "2899", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI1_CLK_DISABLE", + "name": "__GPIOE_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161118@macro@__SAI1_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@154830@macro@__GPIOF_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SAI1_CLK_ENABLE", + "display": "__GPIOF_CLK_DISABLE", "location": { "column": "9", - "line": "3006", + "line": "2900", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI1_CLK_ENABLE", + "name": "__GPIOF_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161170@macro@__SAI1_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@154886@macro@__GPIOF_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SAI1_CLK_SLEEP_DISABLE", + "display": "__GPIOF_CLK_ENABLE", "location": { "column": "9", - "line": "3007", + "line": "2901", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI1_CLK_SLEEP_DISABLE", + "name": "__GPIOF_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161236@macro@__SAI1_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@154940@macro@__GPIOF_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SAI1_CLK_SLEEP_ENABLE", + "display": "__GPIOF_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3008", + "line": "2902", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI1_CLK_SLEEP_ENABLE", + "name": "__GPIOF_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161300@macro@__SAI1_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@155008@macro@__GPIOF_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SAI1_FORCE_RESET", + "display": "__GPIOF_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3009", + "line": "2903", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI1_FORCE_RESET", + "name": "__GPIOF_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161354@macro@__SAI1_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@155074@macro@__GPIOF_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SAI1_RELEASE_RESET", + "display": "__GPIOF_FORCE_RESET", "location": { "column": "9", - "line": "3010", + "line": "2904", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI1_RELEASE_RESET", + "name": "__GPIOF_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161412@macro@__SAI2_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@155130@macro@__GPIOF_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SAI2_CLK_DISABLE", + "display": "__GPIOF_RELEASE_RESET", "location": { "column": "9", - "line": "3011", + "line": "2905", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI2_CLK_DISABLE", + "name": "__GPIOF_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161466@macro@__SAI2_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@155190@macro@__GPIOG_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SAI2_CLK_ENABLE", + "display": "__GPIOG_CLK_DISABLE", "location": { "column": "9", - "line": "3012", + "line": "2906", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI2_CLK_ENABLE", + "name": "__GPIOG_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161518@macro@__SAI2_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@155246@macro@__GPIOG_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SAI2_CLK_SLEEP_DISABLE", + "display": "__GPIOG_CLK_ENABLE", "location": { "column": "9", - "line": "3013", + "line": "2907", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI2_CLK_SLEEP_DISABLE", + "name": "__GPIOG_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161584@macro@__SAI2_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@155300@macro@__GPIOG_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SAI2_CLK_SLEEP_ENABLE", + "display": "__GPIOG_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3014", + "line": "2908", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI2_CLK_SLEEP_ENABLE", + "name": "__GPIOG_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161648@macro@__SAI2_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@155368@macro@__GPIOG_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SAI2_FORCE_RESET", + "display": "__GPIOG_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3015", + "line": "2909", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI2_FORCE_RESET", + "name": "__GPIOG_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161702@macro@__SAI2_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@155434@macro@__GPIOG_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SAI2_RELEASE_RESET", + "display": "__GPIOG_FORCE_RESET", "location": { "column": "9", - "line": "3016", + "line": "2910", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SAI2_RELEASE_RESET", + "name": "__GPIOG_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161760@macro@__SDIO_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@155490@macro@__GPIOG_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SDIO_CLK_DISABLE", + "display": "__GPIOG_RELEASE_RESET", "location": { "column": "9", - "line": "3017", + "line": "2911", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDIO_CLK_DISABLE", + "name": "__GPIOG_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161814@macro@__SDIO_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@155550@macro@__GPIOH_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDIO_CLK_ENABLE", + "display": "__GPIOH_CLK_DISABLE", "location": { "column": "9", - "line": "3018", + "line": "2912", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDIO_CLK_ENABLE", + "name": "__GPIOH_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161866@macro@__SDMMC_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@155606@macro@__GPIOH_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDMMC_CLK_DISABLE", + "display": "__GPIOH_CLK_ENABLE", "location": { "column": "9", - "line": "3019", + "line": "2913", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDMMC_CLK_DISABLE", + "name": "__GPIOH_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161922@macro@__SDMMC_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@155660@macro@__GPIOH_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDMMC_CLK_ENABLE", + "display": "__GPIOH_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3020", + "line": "2914", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDMMC_CLK_ENABLE", + "name": "__GPIOH_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@161976@macro@__SDMMC_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@155728@macro@__GPIOH_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": 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"e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOI_CLK_DISABLE", + "name": "__TIM21_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181076@macro@__GPIOI_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@174996@macro@__TIM21_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOI_FORCE_RESET", + "display": "__TIM21_FORCE_RESET", "location": { "column": "9", - "line": "3336", + "line": "3244", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOI_FORCE_RESET", + "name": "__TIM21_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181141@macro@__GPIOI_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@175054@macro@__TIM21_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOI_RELEASE_RESET", + "display": "__TIM21_RELEASE_RESET", "location": { "column": "9", - "line": "3337", + "line": "3245", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOI_RELEASE_RESET", + "name": "__TIM21_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181210@macro@__GPIOI_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@175115@macro@__TIM21_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOI_CLK_SLEEP_ENABLE", + "display": "__TIM21_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3338", + "line": "3246", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOI_CLK_SLEEP_ENABLE", + "name": "__TIM21_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181277@macro@__GPIOI_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@175183@macro@__TIM21_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOI_CLK_SLEEP_DISABLE", + "display": "__TIM21_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3339", + "line": "3247", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOI_CLK_SLEEP_DISABLE", + "name": "__TIM21_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181346@macro@__GPIOJ_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@175253@macro@__TIM22_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOJ_CLK_ENABLE", + "display": "__TIM22_CLK_ENABLE", "location": { "column": "9", - "line": "3340", + "line": "3248", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOJ_CLK_ENABLE", + "name": "__TIM22_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181409@macro@__GPIOJ_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@175309@macro@__TIM22_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOJ_CLK_DISABLE", + "display": "__TIM22_CLK_DISABLE", "location": { "column": "9", - "line": "3341", + "line": "3249", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOJ_CLK_DISABLE", + "name": "__TIM22_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181474@macro@__GPIOJ_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@175367@macro@__TIM22_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOJ_FORCE_RESET", + "display": "__TIM22_FORCE_RESET", "location": { "column": "9", - "line": "3342", + "line": "3250", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOJ_FORCE_RESET", + "name": "__TIM22_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181538@macro@__GPIOJ_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@175425@macro@__TIM22_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOJ_RELEASE_RESET", + "display": "__TIM22_RELEASE_RESET", "location": { "column": "9", - "line": "3343", + "line": "3251", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOJ_RELEASE_RESET", + "name": "__TIM22_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181607@macro@__GPIOJ_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@175486@macro@__TIM22_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOJ_CLK_SLEEP_ENABLE", + "display": "__TIM22_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3344", + "line": "3252", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOJ_CLK_SLEEP_ENABLE", + "name": "__TIM22_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181674@macro@__GPIOJ_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@175554@macro@__TIM22_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOJ_CLK_SLEEP_DISABLE", + "display": "__TIM22_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3345", + "line": "3253", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOJ_CLK_SLEEP_DISABLE", + "name": "__TIM22_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181743@macro@__GPIOK_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@175624@macro@__CRS_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOK_CLK_ENABLE", + "display": "__CRS_CLK_DISABLE", "location": { "column": "9", - "line": "3346", + "line": "3254", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOK_CLK_ENABLE", + "name": "__CRS_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181806@macro@__GPIOK_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@175676@macro@__CRS_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOK_CLK_DISABLE", + "display": "__CRS_CLK_ENABLE", "location": { "column": "9", - "line": "3347", + "line": "3255", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOK_CLK_DISABLE", + "name": "__CRS_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181871@macro@__GPIOK_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@175726@macro@__CRS_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOK_RELEASE_RESET", + "display": "__CRS_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3348", + "line": "3256", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOK_RELEASE_RESET", + "name": "__CRS_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@181940@macro@__GPIOK_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@175790@macro@__CRS_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOK_CLK_SLEEP_ENABLE", + "display": "__CRS_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3349", + "line": "3257", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOK_CLK_SLEEP_ENABLE", + "name": "__CRS_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182007@macro@__GPIOK_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@175852@macro@__CRS_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__GPIOK_CLK_SLEEP_DISABLE", + "display": "__CRS_FORCE_RESET", "location": { "column": "9", - "line": "3350", + "line": "3258", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__GPIOK_CLK_SLEEP_DISABLE", + "name": "__CRS_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182076@macro@__ETH_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@175904@macro@__CRS_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__ETH_CLK_ENABLE", + "display": "__CRS_RELEASE_RESET", "location": { "column": "9", - "line": "3351", + "line": "3259", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__ETH_CLK_ENABLE", + "name": "__CRS_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182135@macro@__ETH_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@175960@macro@__RCC_BACKUPRESET_FORCE", "What": "MacroDef", "defdec": "Def", - "display": "__ETH_CLK_DISABLE", + "display": "__RCC_BACKUPRESET_FORCE", "location": { "column": "9", - "line": "3352", + "line": "3260", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__ETH_CLK_DISABLE", + "name": "__RCC_BACKUPRESET_FORCE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182196@macro@__DCMI_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@176020@macro@__RCC_BACKUPRESET_RELEASE", "What": "MacroDef", "defdec": "Def", - "display": "__DCMI_CLK_ENABLE", + "display": "__RCC_BACKUPRESET_RELEASE", "location": { "column": "9", - "line": "3353", + "line": "3261", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__DCMI_CLK_ENABLE", + "name": "__RCC_BACKUPRESET_RELEASE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182257@macro@__DCMI_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@176085@macro@__USB_OTG_FS_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__DCMI_CLK_DISABLE", + "display": "__USB_OTG_FS_FORCE_RESET", "location": { "column": "9", - "line": "3354", + "line": "3263", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__DCMI_CLK_DISABLE", + "name": "__USB_OTG_FS_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182320@macro@__DCMI_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@176152@macro@__USB_OTG_FS_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__DCMI_FORCE_RESET", + "display": "__USB_OTG_FS_RELEASE_RESET", "location": { "column": "9", - "line": "3355", + "line": "3264", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__DCMI_FORCE_RESET", + "name": "__USB_OTG_FS_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182383@macro@__DCMI_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@176223@macro@__USB_OTG_FS_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__DCMI_RELEASE_RESET", + "display": "__USB_OTG_FS_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3356", + "line": "3265", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__DCMI_RELEASE_RESET", + "name": "__USB_OTG_FS_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182450@macro@__DCMI_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@176300@macro@__USB_OTG_FS_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__DCMI_CLK_SLEEP_ENABLE", + "display": "__USB_OTG_FS_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3357", + "line": "3266", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__DCMI_CLK_SLEEP_ENABLE", + "name": "__USB_OTG_FS_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182516@macro@__DCMI_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@176379@macro@__USB_OTG_HS_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__DCMI_CLK_SLEEP_DISABLE", + "display": "__USB_OTG_HS_CLK_DISABLE", "location": { "column": "9", - "line": "3358", + "line": "3267", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__DCMI_CLK_SLEEP_DISABLE", + "name": "__USB_OTG_HS_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182583@macro@__UART7_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@176446@macro@__USB_OTG_HS_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__UART7_CLK_ENABLE", + "display": "__USB_OTG_HS_CLK_ENABLE", "location": { "column": "9", - "line": "3359", + "line": "3268", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__UART7_CLK_ENABLE", + "name": "__USB_OTG_HS_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182646@macro@__UART7_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@176519@macro@__USB_OTG_HS_ULPI_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__UART7_CLK_DISABLE", + "display": "__USB_OTG_HS_ULPI_CLK_ENABLE", "location": { "column": "9", - "line": "3360", + "line": "3269", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__UART7_CLK_DISABLE", + "name": "__USB_OTG_HS_ULPI_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182711@macro@__UART7_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@176594@macro@__USB_OTG_HS_ULPI_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__UART7_RELEASE_RESET", + "display": "__USB_OTG_HS_ULPI_CLK_DISABLE", "location": { "column": "9", - "line": "3361", + "line": "3270", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__UART7_RELEASE_RESET", + "name": "__USB_OTG_HS_ULPI_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182777@macro@__UART7_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@176671@macro@__TIM9_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__UART7_FORCE_RESET", + "display": "__TIM9_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3362", + "line": "3271", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__UART7_FORCE_RESET", + "name": "__TIM9_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182839@macro@__UART7_CLK_SLEEP_ENABLE", + "ID": "c:stm32_hal_legacy.h@176744@macro@__TIM9_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__UART7_CLK_SLEEP_ENABLE", + "display": "__TIM9_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3363", + "line": "3272", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__UART7_CLK_SLEEP_ENABLE", + "name": "__TIM9_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@182906@macro@__UART7_CLK_SLEEP_DISABLE", + "ID": "c:stm32_hal_legacy.h@176811@macro@__TIM10_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__UART7_CLK_SLEEP_DISABLE", + "display": "__TIM10_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3364", + "line": "3273", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__UART7_CLK_SLEEP_DISABLE", + "name": "__TIM10_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": 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"__SPI4_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187330@macro@__HRTIM1_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@180948@macro@__GPIOI_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__HRTIM1_CLK_DISABLE", + "display": "__GPIOI_CLK_ENABLE", "location": { "column": "9", - "line": "3428", + "line": "3334", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__HRTIM1_CLK_DISABLE", + "name": "__GPIOI_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187395@macro@__SDADC1_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@181011@macro@__GPIOI_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC1_CLK_ENABLE", + "display": "__GPIOI_CLK_DISABLE", "location": { "column": "9", - "line": "3429", + "line": "3335", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC1_CLK_ENABLE", + "name": "__GPIOI_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187459@macro@__SDADC2_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@181076@macro@__GPIOI_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC2_CLK_ENABLE", + "display": "__GPIOI_FORCE_RESET", "location": { "column": "9", - "line": "3430", + "line": "3336", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC2_CLK_ENABLE", + "name": "__GPIOI_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187523@macro@__SDADC3_CLK_ENABLE", + "ID": "c:stm32_hal_legacy.h@181141@macro@__GPIOI_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC3_CLK_ENABLE", + "display": "__GPIOI_RELEASE_RESET", "location": { "column": "9", - "line": "3431", + "line": "3337", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC3_CLK_ENABLE", + "name": "__GPIOI_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187587@macro@__SDADC1_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@181210@macro@__GPIOI_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC1_CLK_DISABLE", + "display": "__GPIOI_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3432", + "line": "3338", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC1_CLK_DISABLE", + "name": "__GPIOI_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187652@macro@__SDADC2_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@181277@macro@__GPIOI_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC2_CLK_DISABLE", + "display": "__GPIOI_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3433", + "line": "3339", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC2_CLK_DISABLE", + "name": "__GPIOI_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187717@macro@__SDADC3_CLK_DISABLE", + "ID": "c:stm32_hal_legacy.h@181346@macro@__GPIOJ_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC3_CLK_DISABLE", + "display": "__GPIOJ_CLK_ENABLE", "location": { "column": "9", - "line": "3434", + "line": "3340", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC3_CLK_DISABLE", + "name": "__GPIOJ_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187783@macro@__ADC12_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@181409@macro@__GPIOJ_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__ADC12_FORCE_RESET", + "display": "__GPIOJ_CLK_DISABLE", "location": { "column": "9", - "line": "3436", + "line": "3341", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__ADC12_FORCE_RESET", + "name": "__GPIOJ_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187847@macro@__ADC12_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@181474@macro@__GPIOJ_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__ADC12_RELEASE_RESET", + "display": "__GPIOJ_FORCE_RESET", "location": { "column": "9", - "line": "3437", + "line": "3342", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__ADC12_RELEASE_RESET", + "name": "__GPIOJ_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187913@macro@__ADC34_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@181538@macro@__GPIOJ_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__ADC34_FORCE_RESET", + "display": "__GPIOJ_RELEASE_RESET", "location": { "column": "9", - "line": "3438", + "line": "3343", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__ADC34_FORCE_RESET", + "name": "__GPIOJ_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@187977@macro@__ADC34_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@181607@macro@__GPIOJ_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__ADC34_RELEASE_RESET", + "display": "__GPIOJ_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3439", + "line": "3344", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__ADC34_RELEASE_RESET", + "name": "__GPIOJ_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188043@macro@__DAC2_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@181674@macro@__GPIOJ_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__DAC2_FORCE_RESET", + "display": "__GPIOJ_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3440", + "line": "3345", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__DAC2_FORCE_RESET", + "name": "__GPIOJ_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188106@macro@__DAC2_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@181743@macro@__GPIOK_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__DAC2_RELEASE_RESET", + "display": "__GPIOK_CLK_ENABLE", "location": { "column": "9", - "line": "3441", + "line": "3346", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__DAC2_RELEASE_RESET", + "name": "__GPIOK_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188171@macro@__TIM18_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@181806@macro@__GPIOK_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__TIM18_FORCE_RESET", + "display": "__GPIOK_CLK_DISABLE", "location": { "column": "9", - "line": "3442", + "line": "3347", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__TIM18_FORCE_RESET", + "name": "__GPIOK_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188235@macro@__TIM18_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@181871@macro@__GPIOK_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__TIM18_RELEASE_RESET", + "display": "__GPIOK_RELEASE_RESET", "location": { "column": "9", - "line": "3443", + "line": "3348", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__TIM18_RELEASE_RESET", + "name": "__GPIOK_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188301@macro@__TIM19_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@181940@macro@__GPIOK_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__TIM19_FORCE_RESET", + "display": "__GPIOK_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3444", + "line": "3349", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__TIM19_FORCE_RESET", + "name": "__GPIOK_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188365@macro@__TIM19_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@182007@macro@__GPIOK_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__TIM19_RELEASE_RESET", + "display": "__GPIOK_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3445", + "line": "3350", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__TIM19_RELEASE_RESET", + "name": "__GPIOK_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188431@macro@__TIM20_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@182076@macro@__ETH_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__TIM20_FORCE_RESET", + "display": "__ETH_CLK_ENABLE", "location": { "column": "9", - "line": "3446", + "line": "3351", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__TIM20_FORCE_RESET", + "name": "__ETH_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188495@macro@__TIM20_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@182135@macro@__ETH_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__TIM20_RELEASE_RESET", + "display": "__ETH_CLK_DISABLE", "location": { "column": "9", - "line": "3447", + "line": "3352", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__TIM20_RELEASE_RESET", + "name": "__ETH_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188561@macro@__HRTIM1_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@182196@macro@__DCMI_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__HRTIM1_FORCE_RESET", + "display": "__DCMI_CLK_ENABLE", "location": { "column": "9", - "line": "3448", + "line": "3353", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__HRTIM1_FORCE_RESET", + "name": "__DCMI_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188626@macro@__HRTIM1_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@182257@macro@__DCMI_CLK_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__HRTIM1_RELEASE_RESET", + "display": "__DCMI_CLK_DISABLE", "location": { "column": "9", - "line": "3449", + "line": "3354", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__HRTIM1_RELEASE_RESET", + "name": "__DCMI_CLK_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188693@macro@__SDADC1_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@182320@macro@__DCMI_FORCE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC1_FORCE_RESET", + "display": "__DCMI_FORCE_RESET", "location": { "column": "9", - "line": "3450", + "line": "3355", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC1_FORCE_RESET", + "name": "__DCMI_FORCE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188758@macro@__SDADC2_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@182383@macro@__DCMI_RELEASE_RESET", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC2_FORCE_RESET", + "display": "__DCMI_RELEASE_RESET", "location": { "column": "9", - "line": "3451", + "line": "3356", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC2_FORCE_RESET", + "name": "__DCMI_RELEASE_RESET", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188823@macro@__SDADC3_FORCE_RESET", + "ID": "c:stm32_hal_legacy.h@182450@macro@__DCMI_CLK_SLEEP_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC3_FORCE_RESET", + "display": "__DCMI_CLK_SLEEP_ENABLE", "location": { "column": "9", - "line": "3452", + "line": "3357", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC3_FORCE_RESET", + "name": "__DCMI_CLK_SLEEP_ENABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188888@macro@__SDADC1_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@182516@macro@__DCMI_CLK_SLEEP_DISABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC1_RELEASE_RESET", + "display": "__DCMI_CLK_SLEEP_DISABLE", "location": { "column": "9", - "line": "3453", + "line": "3358", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC1_RELEASE_RESET", + "name": "__DCMI_CLK_SLEEP_DISABLE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32_hal_legacy.h@188955@macro@__SDADC2_RELEASE_RESET", + "ID": "c:stm32_hal_legacy.h@182583@macro@__UART7_CLK_ENABLE", "What": "MacroDef", "defdec": "Def", - "display": "__SDADC2_RELEASE_RESET", + "display": "__UART7_CLK_ENABLE", "location": { "column": "9", - "line": "3454", + "line": "3359", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\Legacy\\stm32_hal_legacy.h" }, - "name": "__SDADC2_RELEASE_RESET", + "name": "__UART7_CLK_ENABLE", "origin": "user_include", "scope": null }, { - "ID": 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"display": "TIM_LOCKLEVEL_2", + "ID": "c:@F@HAL_TIMEx_ConfigBreakDeadTime", + "What": "Function", + "defdec": "Dec", + "display": "HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *, const TIM_BreakDeadTimeConfigTypeDef *)", "location": { - "column": "9", - "line": "829", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "19", + "line": "298", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_LOCKLEVEL_2", + "name": "HAL_TIMEx_ConfigBreakDeadTime", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@46588@macro@TIM_LOCKLEVEL_3", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_LOCKLEVEL_3", + "ID": "c:@F@HAL_TIMEx_RemapConfig", + "What": "Function", + "defdec": "Dec", + "display": "HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "9", - "line": "830", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "19", + "line": "300", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_LOCKLEVEL_3", + "name": "HAL_TIMEx_RemapConfig", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@46786@macro@TIM_BREAK_ENABLE", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_BREAK_ENABLE", + "ID": "c:@F@HAL_TIMEx_RemapConfig", + "What": "Function", + "defdec": "Dec", + "display": "HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "9", - "line": "838", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "19", + "line": "300", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_BREAK_ENABLE", + "name": "HAL_TIMEx_RemapConfig", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@46902@macro@TIM_BREAK_DISABLE", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_BREAK_DISABLE", + "ID": "c:@F@HAL_TIMEx_CommutCallback", + "What": "Function", + "defdec": "Dec", + "display": "void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "839", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "310", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_BREAK_DISABLE", + "name": "HAL_TIMEx_CommutCallback", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@47105@macro@TIM_BREAKPOLARITY_LOW", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_BREAKPOLARITY_LOW", + "ID": "c:@F@HAL_TIMEx_CommutCallback", + "What": "Function", + "defdec": "Dec", + "display": "void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "847", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "310", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_BREAKPOLARITY_LOW", + "name": "HAL_TIMEx_CommutCallback", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@47224@macro@TIM_BREAKPOLARITY_HIGH", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_BREAKPOLARITY_HIGH", + "ID": "c:@F@HAL_TIMEx_CommutHalfCpltCallback", + "What": "Function", + "defdec": "Dec", + "display": "void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "848", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "311", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_BREAKPOLARITY_HIGH", + "name": "HAL_TIMEx_CommutHalfCpltCallback", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@47436@macro@TIM_AUTOMATICOUTPUT_DISABLE", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_AUTOMATICOUTPUT_DISABLE", + "ID": "c:@F@HAL_TIMEx_CommutHalfCpltCallback", + "What": "Function", + "defdec": "Dec", + "display": "void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "856", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "311", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_AUTOMATICOUTPUT_DISABLE", + "name": "HAL_TIMEx_CommutHalfCpltCallback", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@47556@macro@TIM_AUTOMATICOUTPUT_ENABLE", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_AUTOMATICOUTPUT_ENABLE", + "ID": "c:@F@HAL_TIMEx_BreakCallback", + "What": "Function", + "defdec": "Dec", + "display": "void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "857", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "312", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_AUTOMATICOUTPUT_ENABLE", + "name": "HAL_TIMEx_BreakCallback", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@47861@macro@TIM_TRGO_RESET", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_TRGO_RESET", + "ID": "c:@F@HAL_TIMEx_BreakCallback", + "What": "Function", + "defdec": "Dec", + "display": "void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "865", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "312", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_TRGO_RESET", + "name": "HAL_TIMEx_BreakCallback", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@48014@macro@TIM_TRGO_ENABLE", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_TRGO_ENABLE", + "ID": "c:@F@HAL_TIMEx_HallSensor_GetState", + "What": "Function", + "defdec": "Dec", + "display": "HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "866", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "22", + "line": "322", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_TRGO_ENABLE", + "name": "HAL_TIMEx_HallSensor_GetState", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@48167@macro@TIM_TRGO_UPDATE", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_TRGO_UPDATE", + "ID": "c:@F@HAL_TIMEx_HallSensor_GetState", + "What": "Function", + "defdec": "Dec", + "display": "HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "867", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "22", + "line": "322", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_TRGO_UPDATE", + "name": "HAL_TIMEx_HallSensor_GetState", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@48320@macro@TIM_TRGO_OC1", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_TRGO_OC1", + "ID": "c:@F@HAL_TIMEx_GetChannelNState", + "What": "Function", + "defdec": "Dec", + "display": "HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "9", - "line": "868", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "29", + "line": "323", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_TRGO_OC1", + "name": "HAL_TIMEx_GetChannelNState", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@48473@macro@TIM_TRGO_OC1REF", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_TRGO_OC1REF", + "ID": "c:@F@HAL_TIMEx_GetChannelNState", + "What": "Function", + "defdec": "Dec", + "display": "HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "9", - "line": "869", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "29", + "line": "323", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_TRGO_OC1REF", + "name": "HAL_TIMEx_GetChannelNState", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@48626@macro@TIM_TRGO_OC2REF", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_TRGO_OC2REF", + "ID": "c:@F@TIMEx_DMACommutationCplt", + "What": "Function", + "defdec": "Dec", + "display": "void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *)", "location": { - "column": "9", - "line": "870", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "337", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_TRGO_OC2REF", + "name": "TIMEx_DMACommutationCplt", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@48779@macro@TIM_TRGO_OC3REF", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_TRGO_OC3REF", + "ID": "c:@F@TIMEx_DMACommutationCplt", + "What": "Function", + "defdec": "Dec", + "display": "void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *)", "location": { - "column": "9", - "line": "871", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "337", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_TRGO_OC3REF", + "name": "TIMEx_DMACommutationCplt", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@48932@macro@TIM_TRGO_OC4REF", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_TRGO_OC4REF", + "ID": "c:@F@TIMEx_DMACommutationHalfCplt", + "What": "Function", + "defdec": "Dec", + "display": "void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *)", "location": { - "column": "9", - "line": "872", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "338", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_TRGO_OC4REF", + "name": "TIMEx_DMACommutationHalfCplt", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@49172@macro@TIM_MASTERSLAVEMODE_ENABLE", - "What": "MacroDef", - "defdec": "Def", - "display": "TIM_MASTERSLAVEMODE_ENABLE", + "ID": "c:@F@TIMEx_DMACommutationHalfCplt", + "What": "Function", + "defdec": "Dec", + "display": "void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *)", "location": { - "column": "9", - "line": "880", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "6", + "line": "338", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" }, - "name": "TIM_MASTERSLAVEMODE_ENABLE", + "name": "TIMEx_DMACommutationHalfCplt", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@49270@macro@TIM_MASTERSLAVEMODE_DISABLE", + "ID": "c:ucos_ii.h@1078@macro@OS_uCOS_II_H", "What": "MacroDef", "defdec": "Def", - "display": "TIM_MASTERSLAVEMODE_DISABLE", + "display": "OS_uCOS_II_H", "location": { - "column": "9", - "line": "881", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "11", + "line": "25", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "TIM_MASTERSLAVEMODE_DISABLE", + "name": "OS_uCOS_II_H", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@49461@macro@TIM_SLAVEMODE_DISABLE", + "ID": "c:ucos_ii.h@1436@macro@OS_VERSION", "What": "MacroDef", "defdec": "Def", - "display": "TIM_SLAVEMODE_DISABLE", + "display": "OS_VERSION", "location": { - "column": "9", - "line": "889", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "10", + "line": "37", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "TIM_SLAVEMODE_DISABLE", + "name": "OS_VERSION", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.h@49595@macro@TIM_SLAVEMODE_RESET", + "ID": "c:ucos_ii.h@2226@macro@OS_EXT", "What": "MacroDef", "defdec": "Def", - "display": "TIM_SLAVEMODE_RESET", + "display": "OS_EXT", "location": { - "column": "9", - "line": "890", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": 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"c:@F@HAL_TIM_OC_MspInit", + "ID": "c:@F@OSFlagDel", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *)", + "display": "OS_FLAG_GRP * OSFlagDel(OS_FLAG_GRP *, INT8U, INT8U *)", "location": { - "column": "6", - "line": "1916", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "871", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_MspInit", + "name": "OSFlagDel", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_MspDeInit", + "ID": "c:@F@OSFlagNameGet", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *)", + "display": "INT8U OSFlagNameGet(OS_FLAG_GRP *, INT8U **, INT8U *)", "location": { - "column": "6", - "line": "1917", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "877", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_MspDeInit", + "name": "OSFlagNameGet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_MspDeInit", + "ID": "c:@F@OSFlagNameGet", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *)", + "display": "INT8U OSFlagNameGet(OS_FLAG_GRP *, INT8U **, INT8U *)", "location": { - "column": "6", - "line": "1917", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "877", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_MspDeInit", + "name": "OSFlagNameGet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Start", + "ID": "c:@F@OSFlagNameSet", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "void OSFlagNameSet(OS_FLAG_GRP *, INT8U *, INT8U *)", "location": { - "column": "19", - "line": "1919", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "881", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Start", + "name": "OSFlagNameSet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Start", + "ID": "c:@F@OSFlagNameSet", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "void OSFlagNameSet(OS_FLAG_GRP *, INT8U *, INT8U *)", "location": { - "column": "19", - "line": "1919", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "881", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Start", + "name": "OSFlagNameSet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop", + "ID": "c:@F@OSFlagPend", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *, uint32_t)", + "display": "OS_FLAGS OSFlagPend(OS_FLAG_GRP *, OS_FLAGS, INT8U, INT32U, INT8U *)", "location": { - "column": "19", - "line": "1920", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "886", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Stop", + "name": "OSFlagPend", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop", + "ID": "c:@F@OSFlagPend", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *, uint32_t)", + "display": "OS_FLAGS OSFlagPend(OS_FLAG_GRP *, OS_FLAGS, INT8U, INT32U, INT8U *)", "location": { - "column": "19", - "line": "1920", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "886", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Stop", + "name": "OSFlagPend", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Start_IT", + "ID": "c:@F@OSFlagPendGetFlagsRdy", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "OS_FLAGS OSFlagPendGetFlagsRdy(void)", "location": { - "column": "19", - "line": "1922", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "892", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Start_IT", + "name": "OSFlagPendGetFlagsRdy", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Start_IT", + "ID": "c:@F@OSFlagPendGetFlagsRdy", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "OS_FLAGS OSFlagPendGetFlagsRdy(void)", "location": { - "column": "19", - "line": "1922", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "892", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Start_IT", + "name": "OSFlagPendGetFlagsRdy", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop_IT", + "ID": "c:@F@OSFlagPost", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "OS_FLAGS OSFlagPost(OS_FLAG_GRP *, OS_FLAGS, INT8U, INT8U *)", "location": { - "column": "19", - "line": "1923", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "893", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Stop_IT", + "name": "OSFlagPost", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop_IT", + "ID": "c:@F@OSFlagPost", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "OS_FLAGS OSFlagPost(OS_FLAG_GRP *, OS_FLAGS, INT8U, INT8U *)", "location": { - "column": "19", - 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"OSFlagQuery", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Start_DMA", + "ID": "c:@F@OSFlagQuery", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *, uint32_t, const uint32_t *, uint16_t)", + "display": "OS_FLAGS OSFlagQuery(OS_FLAG_GRP *, INT8U *)", "location": { - "column": "19", - "line": "1925", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "899", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Start_DMA", + "name": "OSFlagQuery", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop_DMA", + "ID": "c:@F@OSMboxAccept", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "void * OSMboxAccept(OS_EVENT *)", "location": { - "column": "19", - "line": "1927", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "913", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Stop_DMA", + "name": "OSMboxAccept", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop_DMA", + "ID": "c:@F@OSMboxAccept", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "void * OSMboxAccept(OS_EVENT *)", "location": { - "column": "19", - "line": "1927", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "913", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_Stop_DMA", + "name": "OSMboxAccept", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_Init", + "ID": "c:@F@OSMboxCreate", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *)", + "display": "OS_EVENT * OSMboxCreate(void *)", "location": { - "column": "19", - "line": "1937", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "916", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_PWM_Init", + "name": "OSMboxCreate", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_Init", + "ID": "c:@F@OSMboxCreate", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *)", + "display": "OS_EVENT * OSMboxCreate(void *)", "location": { - "column": "19", - "line": "1937", - "path": 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"c:@F@HAL_TIM_PWM_DeInit", + "ID": "c:@F@OSMboxDel", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *)", + "display": "OS_EVENT * OSMboxDel(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "19", - "line": "1938", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "919", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_PWM_DeInit", + "name": "OSMboxDel", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_MspInit", + "ID": "c:@F@OSMboxPend", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *)", + "display": "void * OSMboxPend(OS_EVENT *, INT32U, INT8U *)", "location": { - "column": "6", - "line": "1939", - "path": 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"c:@F@HAL_TIM_PWM_MspDeInit", + "ID": "c:@F@OSMboxPendAbort", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *)", + "display": "INT8U OSMboxPendAbort(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "6", - "line": "1940", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "929", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_PWM_MspDeInit", + "name": "OSMboxPendAbort", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_MspDeInit", + "ID": "c:@F@OSMboxPendAbort", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *)", + "display": "INT8U OSMboxPendAbort(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "6", - "line": "1940", - "path": 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HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "void OSMutexPend(OS_EVENT *, INT32U, INT8U *)", "location": { - "column": "19", - "line": "1968", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1007", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_Start_IT", + "name": "OSMutexPend", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_Stop_IT", + "ID": "c:@F@OSMutexPost", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSMutexPost(OS_EVENT *)", "location": { - "column": "19", - "line": "1969", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1011", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_Stop_IT", + "name": "OSMutexPost", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_Stop_IT", + "ID": "c:@F@OSMutexPost", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSMutexPost(OS_EVENT *)", "location": { - "column": "19", - "line": "1969", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1011", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_Stop_IT", + "name": "OSMutexPost", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_Start_DMA", + "ID": "c:@F@OSMutexQuery", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *, uint32_t, uint32_t *, uint16_t)", + "display": "INT8U OSMutexQuery(OS_EVENT *, OS_MUTEX_DATA *)", "location": { - "column": "19", - "line": "1971", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1014", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_Start_DMA", + "name": "OSMutexQuery", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_Start_DMA", + "ID": "c:@F@OSMutexQuery", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *, uint32_t, uint32_t *, uint16_t)", + "display": "INT8U OSMutexQuery(OS_EVENT *, OS_MUTEX_DATA *)", "location": { - "column": "19", - "line": "1971", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1014", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_Start_DMA", + "name": "OSMutexQuery", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_Stop_DMA", + "ID": "c:@F@OSQAccept", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "void * OSQAccept(OS_EVENT *, INT8U *)", "location": { - "column": "19", - "line": "1972", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1030", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_Stop_DMA", + "name": "OSQAccept", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_Stop_DMA", + "ID": "c:@F@OSQAccept", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "void * OSQAccept(OS_EVENT *, INT8U *)", "location": { - "column": "19", - "line": "1972", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1030", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_Stop_DMA", + "name": "OSQAccept", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Init", + "ID": "c:@F@OSQCreate", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *, uint32_t)", + "display": "OS_EVENT * OSQCreate(void **, INT16U)", "location": { - "column": "19", - "line": "1982", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1034", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Init", + "name": "OSQCreate", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Init", + "ID": "c:@F@OSQCreate", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *, uint32_t)", + "display": "OS_EVENT * OSQCreate(void **, INT16U)", "location": { - "column": "19", - "line": "1982", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1034", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Init", + "name": "OSQCreate", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_DeInit", + "ID": "c:@F@OSQDel", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *)", + "display": "OS_EVENT * OSQDel(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "19", - "line": "1983", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1038", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_DeInit", + "name": "OSQDel", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_DeInit", + "ID": "c:@F@OSQDel", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *)", + "display": "OS_EVENT * OSQDel(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "19", - "line": "1983", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1038", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_DeInit", + "name": "OSQDel", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_MspInit", + "ID": "c:@F@OSQFlush", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *)", + "display": "INT8U OSQFlush(OS_EVENT *)", "location": { - "column": "6", - "line": "1984", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1044", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_MspInit", + "name": "OSQFlush", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_MspInit", + "ID": "c:@F@OSQFlush", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *)", + "display": "INT8U OSQFlush(OS_EVENT *)", "location": { - "column": "6", - "line": "1984", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1044", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_MspInit", + "name": "OSQFlush", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_MspDeInit", + "ID": "c:@F@OSQPend", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *)", + "display": "void * OSQPend(OS_EVENT *, INT32U, INT8U *)", "location": { - "column": "6", - "line": "1985", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1047", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_MspDeInit", + "name": "OSQPend", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_MspDeInit", + "ID": "c:@F@OSQPend", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *)", + "display": "void * OSQPend(OS_EVENT *, INT32U, INT8U *)", "location": { - "column": "6", - "line": "1985", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1047", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_MspDeInit", + "name": "OSQPend", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Start", + "ID": "c:@F@OSQPendAbort", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSQPendAbort(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "19", - "line": "1987", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1052", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Start", + "name": "OSQPendAbort", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Start", + "ID": "c:@F@OSQPendAbort", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSQPendAbort(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "19", - "line": "1987", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1052", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Start", + "name": "OSQPendAbort", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Stop", + "ID": "c:@F@OSQPost", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSQPost(OS_EVENT *, void *)", "location": { - "column": "19", - "line": "1988", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1058", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Stop", + "name": "OSQPost", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Stop", + "ID": "c:@F@OSQPost", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSQPost(OS_EVENT *, void *)", "location": { - "column": "19", - "line": "1988", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1058", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Stop", + "name": "OSQPost", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Start_IT", + "ID": "c:@F@OSQPostFront", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSQPostFront(OS_EVENT *, void *)", "location": { - "column": "19", - "line": "1990", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1063", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Start_IT", + "name": "OSQPostFront", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Start_IT", + "ID": "c:@F@OSQPostFront", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSQPostFront(OS_EVENT *, void *)", "location": { - "column": "19", - "line": "1990", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1063", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Start_IT", + "name": "OSQPostFront", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Stop_IT", + "ID": "c:@F@OSQPostOpt", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSQPostOpt(OS_EVENT *, void *, INT8U)", "location": { - "column": "19", - "line": "1991", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1068", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Stop_IT", + "name": "OSQPostOpt", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Stop_IT", + "ID": "c:@F@OSQPostOpt", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSQPostOpt(OS_EVENT *, void *, INT8U)", "location": { - "column": "19", - "line": "1991", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1068", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_Stop_IT", + "name": "OSQPostOpt", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Init", + "ID": "c:@F@OSQQuery", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *, const TIM_Encoder_InitTypeDef *)", + "display": "INT8U OSQQuery(OS_EVENT *, OS_Q_DATA *)", "location": { - "column": "19", - "line": "2001", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1074", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Init", + "name": "OSQQuery", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Init", + "ID": "c:@F@OSQQuery", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *, const TIM_Encoder_InitTypeDef *)", + "display": "INT8U OSQQuery(OS_EVENT *, OS_Q_DATA *)", "location": { - "column": "19", - "line": "2001", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1074", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Init", + "name": "OSQQuery", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_DeInit", + "ID": "c:@F@OSSemAccept", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *)", + "display": "INT16U OSSemAccept(OS_EVENT *)", "location": { - "column": "19", - "line": "2002", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1089", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": 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{ - "ID": "c:@F@HAL_TIM_Encoder_MspDeInit", + "ID": "c:@F@OSSemDel", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *)", + "display": "OS_EVENT * OSSemDel(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "6", - "line": "2004", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1095", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_MspDeInit", + "name": "OSSemDel", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_MspDeInit", + "ID": "c:@F@OSSemDel", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *)", + "display": "OS_EVENT * OSSemDel(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "6", - "line": "2004", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1095", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_MspDeInit", + "name": "OSSemDel", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start", + "ID": "c:@F@OSSemPend", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "void OSSemPend(OS_EVENT *, INT32U, INT8U *)", "location": { - "column": "19", - "line": "2006", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1100", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Start", + "name": "OSSemPend", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start", + "ID": "c:@F@OSSemPend", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "void OSSemPend(OS_EVENT *, INT32U, INT8U *)", "location": { - "column": "19", - "line": "2006", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1100", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Start", + "name": "OSSemPend", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop", + "ID": "c:@F@OSSemPendAbort", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSSemPendAbort(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "19", - "line": "2007", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1105", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Stop", + "name": "OSSemPendAbort", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop", + "ID": "c:@F@OSSemPendAbort", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSSemPendAbort(OS_EVENT *, INT8U, INT8U *)", "location": { - "column": "19", - "line": "2007", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1105", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Stop", + "name": "OSSemPendAbort", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start_IT", + "ID": "c:@F@OSSemPost", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSSemPost(OS_EVENT *)", "location": { - "column": "19", - "line": "2009", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1110", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Start_IT", + "name": "OSSemPost", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start_IT", + "ID": "c:@F@OSSemPost", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSSemPost(OS_EVENT *)", "location": { - "column": "19", - "line": "2009", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1110", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Start_IT", + "name": "OSSemPost", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop_IT", + "ID": "c:@F@OSSemQuery", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSSemQuery(OS_EVENT *, OS_SEM_DATA *)", "location": { - "column": "19", - "line": "2010", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1113", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Stop_IT", + "name": "OSSemQuery", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop_IT", + "ID": "c:@F@OSSemQuery", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSSemQuery(OS_EVENT *, OS_SEM_DATA *)", "location": { - "column": "19", - "line": "2010", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1113", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Stop_IT", + "name": "OSSemQuery", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start_DMA", + "ID": "c:@F@OSSemSet", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *, uint32_t, uint32_t *, uint32_t *, uint16_t)", + "display": "void OSSemSet(OS_EVENT *, INT16U, INT8U *)", "location": { - "column": "19", - "line": "2012", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1118", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Start_DMA", + "name": "OSSemSet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start_DMA", + "ID": "c:@F@OSSemSet", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *, uint32_t, uint32_t *, uint32_t *, uint16_t)", + "display": "void OSSemSet(OS_EVENT *, INT16U, INT8U *)", "location": { - "column": "19", - "line": "2012", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1118", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Start_DMA", + "name": "OSSemSet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop_DMA", + "ID": "c:@F@OSTaskChangePrio", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSTaskChangePrio(INT8U, INT8U)", "location": { - "column": "19", - "line": "2014", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1132", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Stop_DMA", + "name": "OSTaskChangePrio", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop_DMA", + "ID": "c:@F@OSTaskChangePrio", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "INT8U OSTaskChangePrio(INT8U, INT8U)", "location": { - "column": "19", - "line": "2014", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1132", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_Encoder_Stop_DMA", + "name": "OSTaskChangePrio", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IRQHandler", + "ID": "c:@F@OSTaskCreate", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_IRQHandler(TIM_HandleTypeDef *)", + "display": "INT8U OSTaskCreate(void (*)(void *), void *, OS_STK *, INT8U)", "location": { - "column": "6", - "line": "2024", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1137", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - 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OSTaskCreateExt(void (*)(void *), void *, OS_STK *, INT8U, INT16U, OS_STK *, INT32U, void *, INT16U)", "location": { - "column": "19", - "line": "2034", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1144", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_ConfigChannel", + "name": "OSTaskCreateExt", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_ConfigChannel", + "ID": "c:@F@OSTaskCreateExt", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *, const TIM_OC_InitTypeDef *, uint32_t)", + "display": "INT8U OSTaskCreateExt(void (*)(void *), void *, OS_STK *, INT8U, INT16U, OS_STK *, INT32U, void *, INT16U)", "location": { - "column": "19", - "line": "2034", - "path": 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"user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_ConfigChannel", + "ID": "c:@F@OSTaskDel", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *, const TIM_OC_InitTypeDef *, uint32_t)", + "display": "INT8U OSTaskDel(INT8U)", "location": { - "column": "19", - "line": "2036", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1156", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_PWM_ConfigChannel", + "name": "OSTaskDel", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_ConfigChannel", + "ID": "c:@F@OSTaskDelReq", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *, const TIM_IC_InitTypeDef *, uint32_t)", + "display": "INT8U OSTaskDelReq(INT8U)", "location": { - "column": "19", - "line": "2038", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1157", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_ConfigChannel", + "name": "OSTaskDelReq", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_ConfigChannel", + "ID": "c:@F@OSTaskDelReq", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *, const TIM_IC_InitTypeDef *, uint32_t)", + "display": "INT8U OSTaskDelReq(INT8U)", "location": { - "column": "19", - "line": "2038", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1157", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_ConfigChannel", + "name": "OSTaskDelReq", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_ConfigChannel", + "ID": "c:@F@OSTaskNameGet", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *, TIM_OnePulse_InitTypeDef *, uint32_t, uint32_t)", + "display": "INT8U OSTaskNameGet(INT8U, INT8U **, INT8U *)", "location": { - "column": "19", - "line": "2040", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1161", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_ConfigChannel", + "name": "OSTaskNameGet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_ConfigChannel", + "ID": "c:@F@OSTaskNameGet", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *, TIM_OnePulse_InitTypeDef *, uint32_t, uint32_t)", + "display": "INT8U OSTaskNameGet(INT8U, INT8U **, INT8U *)", "location": { - "column": "19", - "line": "2040", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1161", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OnePulse_ConfigChannel", + "name": "OSTaskNameGet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_ConfigOCrefClear", + "ID": "c:@F@OSTaskNameSet", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *, const TIM_ClearInputConfigTypeDef *, uint32_t)", + "display": "void OSTaskNameSet(INT8U, INT8U *, INT8U *)", "location": { - "column": "19", - "line": "2042", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1165", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_ConfigOCrefClear", + "name": "OSTaskNameSet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_ConfigOCrefClear", + "ID": "c:@F@OSTaskNameSet", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *, const TIM_ClearInputConfigTypeDef *, uint32_t)", + "display": "void OSTaskNameSet(INT8U, INT8U *, INT8U *)", "location": { - "column": "19", - "line": "2042", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1165", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_ConfigOCrefClear", + "name": "OSTaskNameSet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_ConfigClockSource", + "ID": "c:@F@OSTaskResume", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *, const TIM_ClockConfigTypeDef *)", + "display": "INT8U OSTaskResume(INT8U)", "location": { - "column": "19", - "line": "2045", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1171", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_ConfigClockSource", + "name": "OSTaskResume", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_ConfigClockSource", + "ID": "c:@F@OSTaskResume", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *, const TIM_ClockConfigTypeDef *)", + "display": "INT8U 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"e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_DelayElapsedCallback", + "name": "OSTmrDel", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_DelayElapsedCallback", + "ID": "c:@F@OSTmrNameGet", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *)", + "display": "INT8U OSTmrNameGet(OS_TMR *, INT8U **, INT8U *)", "location": { - "column": "6", - "line": "2075", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "14", + "line": "1246", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_OC_DelayElapsedCallback", + "name": "OSTmrNameGet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_CaptureCallback", + "ID": "c:@F@OSTmrNameGet", "What": "Function", "defdec": "Dec", - "display": "void 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"display": "void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *)", + "display": "INT8U OSTmrStateGet(OS_TMR *, INT8U *)", "location": { - "column": "6", - "line": "2077", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "14", + "line": "1253", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_IC_CaptureHalfCpltCallback", + "name": "OSTmrStateGet", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_PulseFinishedCallback", + "ID": "c:@F@OSTmrStateGet", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *)", + "display": "INT8U OSTmrStateGet(OS_TMR *, INT8U *)", "location": { - "column": "6", - "line": "2078", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "14", + 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"Function", "defdec": "Dec", - "display": "void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *)", + "display": "BOOLEAN OSTmrStart(OS_TMR *, INT8U *)", "location": { - "column": "6", - "line": "2079", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "14", + "line": "1256", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_PWM_PulseFinishedHalfCpltCallback", + "name": "OSTmrStart", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_PulseFinishedHalfCpltCallback", + "ID": "c:@F@OSTmrStop", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *)", + "display": "BOOLEAN OSTmrStop(OS_TMR *, INT8U, void *, INT8U *)", "location": { - "column": "6", - "line": "2079", - "path": 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"scope": null }, { - "ID": "c:@F@HAL_TIM_TriggerCallback", + "ID": "c:@F@OSTmrSignal", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *)", + "display": "INT8U OSTmrSignal(void)", "location": { - "column": "6", - "line": "2080", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "14", + "line": "1264", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "HAL_TIM_TriggerCallback", + "name": "OSTmrSignal", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIM_TriggerHalfCpltCallback", + "ID": "c:@F@OSTmrSignal", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *)", + "display": "INT8U OSTmrSignal(void)", "location": { - "column": "6", - "line": "2081", - "path": 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"c:@F@OS_FlagUnlink", "What": "Function", "defdec": "Dec", - "display": "void TIM_DMACaptureCplt(DMA_HandleTypeDef *)", + "display": "void OS_FlagUnlink(OS_FLAG_NODE *)", "location": { - "column": "6", - "line": "2132", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1328", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "TIM_DMACaptureCplt", + "name": "OS_FlagUnlink", "origin": "user_include", "scope": null }, { - "ID": "c:@F@TIM_DMACaptureCplt", + "ID": "c:@F@OS_MemClr", "What": "Function", "defdec": "Dec", - "display": "void TIM_DMACaptureCplt(DMA_HandleTypeDef *)", + "display": "void OS_MemClr(INT8U *, INT16U)", "location": { - "column": "6", - "line": "2132", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1331", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "TIM_DMACaptureCplt", + "name": "OS_MemClr", "origin": "user_include", "scope": null }, { - "ID": "c:@F@TIM_DMACaptureHalfCplt", + "ID": "c:@F@OS_MemClr", "What": "Function", "defdec": "Dec", - "display": "void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *)", + "display": "void OS_MemClr(INT8U *, INT16U)", "location": { - "column": "6", - "line": "2133", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" + "column": "15", + "line": "1331", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" }, - "name": "TIM_DMACaptureHalfCplt", + "name": "OS_MemClr", "origin": "user_include", "scope": null }, { - "ID": "c:@F@TIM_DMACaptureHalfCplt", + "ID": "c:@F@OS_MemCopy", "What": "Function", "defdec": "Dec", - "display": "void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *)", + "display": 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"TIM_COMMUTATION_SOFTWARE", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSSchedLock", - "What": "Function", - "defdec": "Dec", - "display": "void OSSchedLock(void)", + "ID": "c:stm32f4xx_hal_tim.h@37905@macro@TIM_DMA_UPDATE", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_DMA_UPDATE", "location": { - "column": "15", - "line": "1283", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "696", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSSchedLock", + "name": "TIM_DMA_UPDATE", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSSchedLock", - "What": "Function", - "defdec": "Dec", - "display": "void OSSchedLock(void)", + "ID": "c:stm32f4xx_hal_tim.h@38038@macro@TIM_DMA_CC1", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_DMA_CC1", "location": { - "column": "15", - "line": "1283", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "697", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSSchedLock", + "name": "TIM_DMA_CC1", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSSchedUnlock", - "What": "Function", - "defdec": "Dec", - "display": "void OSSchedUnlock(void)", + "ID": "c:stm32f4xx_hal_tim.h@38188@macro@TIM_DMA_CC2", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_DMA_CC2", "location": { - "column": "15", - "line": "1284", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "698", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSSchedUnlock", + "name": "TIM_DMA_CC2", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSSchedUnlock", - "What": "Function", - "defdec": "Dec", - "display": "void OSSchedUnlock(void)", + "ID": "c:stm32f4xx_hal_tim.h@38344@macro@TIM_DMA_CC3", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_DMA_CC3", "location": { - "column": "15", - "line": "1284", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "699", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSSchedUnlock", + "name": "TIM_DMA_CC3", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSStart", - "What": "Function", - "defdec": "Dec", - "display": "void OSStart(void)", + "ID": "c:stm32f4xx_hal_tim.h@38500@macro@TIM_DMA_CC4", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_DMA_CC4", "location": { - "column": "15", - "line": "1287", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "700", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSStart", + "name": "TIM_DMA_CC4", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSStart", - "What": "Function", - "defdec": "Dec", - "display": "void OSStart(void)", + "ID": "c:stm32f4xx_hal_tim.h@38656@macro@TIM_DMA_COM", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_DMA_COM", "location": { - "column": "15", - "line": "1287", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "701", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSStart", + "name": "TIM_DMA_COM", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSStatInit", - "What": "Function", - "defdec": "Dec", - "display": "void OSStatInit(void)", + "ID": "c:stm32f4xx_hal_tim.h@38794@macro@TIM_DMA_TRIGGER", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_DMA_TRIGGER", "location": { - "column": "15", - "line": "1289", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "702", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSStatInit", + "name": "TIM_DMA_TRIGGER", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSStatInit", - "What": "Function", - "defdec": "Dec", - "display": "void OSStatInit(void)", + "ID": "c:stm32f4xx_hal_tim.h@39016@macro@TIM_CCDMAREQUEST_CC", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_CCDMAREQUEST_CC", "location": { - "column": "15", - "line": "1289", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "710", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSStatInit", + "name": "TIM_CCDMAREQUEST_CC", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSVersion", - "What": "Function", - "defdec": "Dec", - "display": "INT16U OSVersion(void)", + "ID": "c:stm32f4xx_hal_tim.h@39168@macro@TIM_CCDMAREQUEST_UPDATE", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_CCDMAREQUEST_UPDATE", "location": { - "column": "15", - "line": "1291", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "711", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSVersion", + "name": "TIM_CCDMAREQUEST_UPDATE", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OSVersion", - "What": "Function", - "defdec": "Dec", - "display": "INT16U OSVersion(void)", + "ID": "c:stm32f4xx_hal_tim.h@39386@macro@TIM_FLAG_UPDATE", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_UPDATE", "location": { - "column": "15", - "line": "1291", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "719", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OSVersion", + "name": "TIM_FLAG_UPDATE", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_Dummy", - "What": "Function", - "defdec": "Dec", - "display": "void OS_Dummy(void)", + "ID": "c:stm32f4xx_hal_tim.h@39504@macro@TIM_FLAG_CC1", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_CC1", "location": { - "column": "15", - "line": "1302", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "720", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_Dummy", + "name": "TIM_FLAG_CC1", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_Dummy", - "What": "Function", - "defdec": "Dec", - "display": "void OS_Dummy(void)", + "ID": "c:stm32f4xx_hal_tim.h@39625@macro@TIM_FLAG_CC2", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_CC2", "location": { - "column": "15", - "line": "1302", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "721", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_Dummy", + "name": "TIM_FLAG_CC2", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventTaskRdy", - "What": "Function", - "defdec": "Dec", - "display": "INT8U OS_EventTaskRdy(OS_EVENT *, void *, INT8U, INT8U)", + "ID": "c:stm32f4xx_hal_tim.h@39746@macro@TIM_FLAG_CC3", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_CC3", "location": { - "column": "15", - "line": "1306", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "722", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_EventTaskRdy", + "name": "TIM_FLAG_CC3", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventTaskRdy", - "What": "Function", - "defdec": "Dec", - "display": "INT8U OS_EventTaskRdy(OS_EVENT *, void *, INT8U, INT8U)", + "ID": "c:stm32f4xx_hal_tim.h@39867@macro@TIM_FLAG_CC4", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_CC4", "location": { - "column": "15", - "line": "1306", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "723", + "path": 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+ "ID": "c:stm32f4xx_hal_tim.h@40106@macro@TIM_FLAG_TRIGGER", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_TRIGGER", "location": { - "column": "15", - "line": "1311", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "725", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_EventTaskWait", + "name": "TIM_FLAG_TRIGGER", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventTaskRemove", - "What": "Function", - "defdec": "Dec", - "display": "void OS_EventTaskRemove(OS_TCB *, OS_EVENT *)", + "ID": "c:stm32f4xx_hal_tim.h@40224@macro@TIM_FLAG_BREAK", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_BREAK", "location": { - "column": "15", - "line": "1313", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "726", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_EventTaskRemove", + "name": "TIM_FLAG_BREAK", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventTaskRemove", - "What": "Function", - "defdec": "Dec", - "display": "void OS_EventTaskRemove(OS_TCB *, OS_EVENT *)", + "ID": "c:stm32f4xx_hal_tim.h@40342@macro@TIM_FLAG_CC1OF", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_CC1OF", "location": { - "column": "15", - "line": "1313", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "727", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_EventTaskRemove", + "name": "TIM_FLAG_CC1OF", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventTaskWaitMulti", - "What": "Function", - "defdec": "Dec", - "display": "void OS_EventTaskWaitMulti(OS_EVENT **)", + "ID": "c:stm32f4xx_hal_tim.h@40460@macro@TIM_FLAG_CC2OF", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_CC2OF", "location": { - "column": "15", - "line": "1317", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "728", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_EventTaskWaitMulti", + "name": "TIM_FLAG_CC2OF", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventTaskWaitMulti", - "What": "Function", - "defdec": "Dec", - "display": "void OS_EventTaskWaitMulti(OS_EVENT **)", + "ID": "c:stm32f4xx_hal_tim.h@40578@macro@TIM_FLAG_CC3OF", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_CC3OF", "location": { - "column": "15", - "line": "1317", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "729", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_EventTaskWaitMulti", + "name": "TIM_FLAG_CC3OF", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventTaskRemoveMulti", - "What": "Function", - "defdec": "Dec", - "display": "void OS_EventTaskRemoveMulti(OS_TCB *, OS_EVENT **)", + "ID": "c:stm32f4xx_hal_tim.h@40696@macro@TIM_FLAG_CC4OF", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_FLAG_CC4OF", "location": { - "column": "15", - "line": "1319", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "730", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_EventTaskRemoveMulti", + "name": "TIM_FLAG_CC4OF", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventTaskRemoveMulti", - "What": "Function", - "defdec": "Dec", - "display": "void OS_EventTaskRemoveMulti(OS_TCB *, OS_EVENT **)", + "ID": "c:stm32f4xx_hal_tim.h@40881@macro@TIM_CHANNEL_1", + "What": "MacroDef", + "defdec": "Def", + "display": "TIM_CHANNEL_1", "location": { - "column": "15", - "line": "1319", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Source\\ucos_ii.h" + "column": "9", + "line": "738", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim.h" }, - "name": "OS_EventTaskRemoveMulti", + "name": "TIM_CHANNEL_1", "origin": "user_include", "scope": null }, { - "ID": "c:@F@OS_EventWaitListInit", - "What": "Function", - "defdec": "Dec", - "display": "void OS_EventWaitListInit(OS_EVENT *)", + "ID": "c:stm32f4xx_hal_tim.h@41011@macro@TIM_CHANNEL_2", + "What": "MacroDef", + "defdec": "Def", + "display": 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null }, { - "ID": "c:stm32f4xx_hal_rcc.h@67328@macro@RCC_LSE_TIMEOUT_VALUE", + "ID": "c:stm32f4xx_hal_dma.h@16169@macro@DMA_IT_FE", "What": "MacroDef", "defdec": "Def", - "display": "RCC_LSE_TIMEOUT_VALUE", + "display": "DMA_IT_FE", "location": { "column": "9", - "line": "1331", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_rcc.h" + "line": "353", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "RCC_LSE_TIMEOUT_VALUE", + "name": "DMA_IT_FE", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.h@67384@macro@HSE_TIMEOUT_VALUE", + "ID": "c:stm32f4xx_hal_dma.h@16341@macro@DMA_FLAG_FEIF0_4", "What": "MacroDef", "defdec": "Def", - "display": "HSE_TIMEOUT_VALUE", + "display": "DMA_FLAG_FEIF0_4", "location": { "column": "9", - "line": "1333", - "path": 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"e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "627", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "TIM_TIM11_HSE", + "name": "__HAL_DMA_SET_COUNTER", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim_ex.h@7925@macro@IS_TIM_REMAP", + "ID": "c:stm32f4xx_hal_dma.h@30847@macro@__HAL_DMA_GET_COUNTER", "What": "MacroDef", "defdec": "Def", - "display": "IS_TIM_REMAP", + "display": "__HAL_DMA_GET_COUNTER", "location": { "column": "9", - "line": "161", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "635", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "IS_TIM_REMAP", + "name": "__HAL_DMA_GET_COUNTER", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Init", + "ID": "c:@F@HAL_DMA_Init", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *, const TIM_HallSensor_InitTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "209", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "652", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Init", + "name": "HAL_DMA_Init", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Init", + "ID": "c:@F@HAL_DMA_Init", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *, const TIM_HallSensor_InitTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "209", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "652", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Init", + "name": "HAL_DMA_Init", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_DeInit", + "ID": "c:@F@HAL_DMA_DeInit", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "210", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "653", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_DeInit", + "name": "HAL_DMA_DeInit", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_DeInit", + "ID": "c:@F@HAL_DMA_DeInit", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "210", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "653", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_DeInit", + "name": "HAL_DMA_DeInit", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_MspInit", + "ID": "c:@F@HAL_DMA_Start", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *, uint32_t, uint32_t, uint32_t)", "location": { - "column": "6", - "line": "212", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "column": "19", + "line": "662", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_MspInit", + "name": "HAL_DMA_Start", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_MspInit", + "ID": "c:@F@HAL_DMA_Start", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *, uint32_t, uint32_t, uint32_t)", "location": { - "column": "6", - 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"e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_MspDeInit", + "name": "HAL_DMA_Start_IT", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_MspDeInit", + "ID": "c:@F@HAL_DMA_Start_IT", "What": "Function", "defdec": "Dec", - "display": "void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *, uint32_t, uint32_t, uint32_t)", "location": { - "column": "6", - "line": "213", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "column": "19", + "line": "663", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_MspDeInit", + "name": "HAL_DMA_Start_IT", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Start", + "ID": "c:@F@HAL_DMA_Abort", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "216", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "664", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Start", + "name": "HAL_DMA_Abort", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Start", + "ID": "c:@F@HAL_DMA_Abort", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "216", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "664", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Start", + "name": "HAL_DMA_Abort", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Stop", + "ID": "c:@F@HAL_DMA_Abort_IT", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "217", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "665", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Stop", + "name": "HAL_DMA_Abort_IT", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Stop", + "ID": "c:@F@HAL_DMA_Abort_IT", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "217", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "665", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Stop", + "name": "HAL_DMA_Abort_IT", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Start_IT", + "ID": "c:@F@HAL_DMA_PollForTransfer", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *, HAL_DMA_LevelCompleteTypeDef, uint32_t)", "location": { "column": "19", - "line": "219", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "666", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Start_IT", + "name": "HAL_DMA_PollForTransfer", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Start_IT", + "ID": "c:@F@HAL_DMA_PollForTransfer", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *, HAL_DMA_LevelCompleteTypeDef, uint32_t)", "location": { "column": "19", - "line": "219", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "666", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Start_IT", + "name": "HAL_DMA_PollForTransfer", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Stop_IT", + "ID": "c:@F@HAL_DMA_IRQHandler", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *)", + "display": "void HAL_DMA_IRQHandler(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "220", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "667", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Stop_IT", + "name": "HAL_DMA_IRQHandler", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Stop_IT", + "ID": "c:@F@HAL_DMA_IRQHandler", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *)", + "display": "void HAL_DMA_IRQHandler(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "220", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "667", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Stop_IT", + "name": "HAL_DMA_IRQHandler", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Start_DMA", + "ID": "c:@F@HAL_DMA_CleanCallbacks", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *, uint32_t *, uint16_t)", + "display": "HAL_StatusTypeDef HAL_DMA_CleanCallbacks(DMA_HandleTypeDef *)", "location": { "column": "19", - "line": "222", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "668", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Start_DMA", + "name": "HAL_DMA_CleanCallbacks", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Start_DMA", + "ID": "c:@F@HAL_DMA_RegisterCallback", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *, uint32_t *, uint16_t)", + "display": "HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *, HAL_DMA_CallbackIDTypeDef, void (*)(DMA_HandleTypeDef *))", "location": { "column": "19", - "line": "222", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "669", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Start_DMA", + "name": "HAL_DMA_RegisterCallback", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Stop_DMA", + "ID": "c:@F@HAL_DMA_RegisterCallback", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *, HAL_DMA_CallbackIDTypeDef, void (*)(DMA_HandleTypeDef *))", "location": { "column": "19", - "line": "223", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "669", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Stop_DMA", + "name": "HAL_DMA_RegisterCallback", "origin": "user_include", "scope": null }, { - "ID": "c:@F@HAL_TIMEx_HallSensor_Stop_DMA", + "ID": "c:@F@HAL_DMA_UnRegisterCallback", "What": "Function", "defdec": "Dec", - "display": "HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *, HAL_DMA_CallbackIDTypeDef)", "location": { "column": "19", - "line": "223", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_tim_ex.h" + "line": "670", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma.h" }, - "name": "HAL_TIMEx_HallSensor_Stop_DMA", + "name": "HAL_DMA_UnRegisterCallback", "origin": "user_include", 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"c:stm32f4xx_hal_uart.h@43066@macro@IS_UART_BAUDRATE", + "ID": "c:os_cfg.h@8099@macro@OS_SEM_EN", "What": "MacroDef", "defdec": "Def", - "display": "IS_UART_BAUDRATE", + "display": "OS_SEM_EN", "location": { "column": "9", - "line": "856", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_uart.h" + "line": "95", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\os_cfg.h" }, - "name": "IS_UART_BAUDRATE", + "name": "OS_SEM_EN", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_uart.h@43127@macro@IS_UART_ADDRESS", + "ID": "c:os_cfg.h@8208@macro@OS_SEM_ACCEPT_EN", "What": "MacroDef", "defdec": "Def", - "display": "IS_UART_ADDRESS", + "display": "OS_SEM_ACCEPT_EN", "location": { "column": "9", - "line": "857", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_uart.h" + "line": "96", + "path": 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"OS_SEM_QUERY_EN", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_uart.h@43772@macro@UART_BRR_SAMPLING16", + "ID": "c:os_cfg.h@8657@macro@OS_SEM_SET_EN", "What": "MacroDef", "defdec": "Def", - "display": "UART_BRR_SAMPLING16", + "display": "OS_SEM_SET_EN", "location": { "column": "9", - "line": "865", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_uart.h" + "line": "100", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\os_cfg.h" }, - "name": "UART_BRR_SAMPLING16", + "name": "OS_SEM_SET_EN", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_uart.h@44110@macro@UART_DIV_SAMPLING8", + "ID": "c:os_cfg.h@8873@macro@OS_TIME_DLY_HMSM_EN", "What": "MacroDef", "defdec": "Def", - "display": "UART_DIV_SAMPLING8", + "display": "OS_TIME_DLY_HMSM_EN", "location": { "column": "9", - "line": "869", - "path": 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"c:stm32f4xx_hal_uart.h@44333@macro@UART_DIVFRAQ_SAMPLING8", + "ID": "c:os_cfg.h@9096@macro@OS_TIME_GET_SET_EN", "What": "MacroDef", "defdec": "Def", - "display": "UART_DIVFRAQ_SAMPLING8", + "display": "OS_TIME_GET_SET_EN", "location": { "column": "9", - "line": "871", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_uart.h" + "line": "105", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\os_cfg.h" }, - "name": "UART_DIVFRAQ_SAMPLING8", + "name": "OS_TIME_GET_SET_EN", "origin": "user_include", "scope": null }, { - "ID": "c:stm32f4xx_hal_uart.h@44703@macro@UART_BRR_SAMPLING8", + "ID": "c:os_cfg.h@9208@macro@OS_TIME_TICK_HOOK_EN", "What": "MacroDef", "defdec": "Def", - "display": "UART_BRR_SAMPLING8", + "display": "OS_TIME_TICK_HOOK_EN", "location": { "column": "9", - "line": "875", - "path": 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"user_include", "scope": null }, { - "ID": "c:@F@UART_Start_Receive_IT", - "What": "Function", - "defdec": "Dec", - "display": "HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *, uint8_t *, uint16_t)", + "ID": "c:os_cfg.h@9538@macro@OS_TMR_CFG_MAX", + "What": "MacroDef", + "defdec": "Def", + "display": "OS_TMR_CFG_MAX", "location": { - "column": "19", - "line": "888", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_uart.h" + "column": "9", + "line": "110", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\os_cfg.h" }, - "name": "UART_Start_Receive_IT", + "name": "OS_TMR_CFG_MAX", "origin": "user_include", "scope": null }, { - "ID": "c:@F@UART_Start_Receive_DMA", - "What": "Function", - "defdec": "Dec", - "display": "HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *, uint8_t *, uint16_t)", + "ID": "c:os_cfg.h@9649@macro@OS_TMR_CFG_NAME_EN", + "What": "MacroDef", + "defdec": "Def", + "display": "OS_TMR_CFG_NAME_EN", "location": { - "column": "19", - "line": "889", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_uart.h" + "column": "9", + "line": "111", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\os_cfg.h" }, - "name": "UART_Start_Receive_DMA", + "name": "OS_TMR_CFG_NAME_EN", "origin": "user_include", "scope": null }, { - "ID": "c:@F@UART_Start_Receive_DMA", - "What": "Function", - "defdec": "Dec", - "display": "HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *, uint8_t *, uint16_t)", + "ID": "c:os_cfg.h@9760@macro@OS_TMR_CFG_WHEEL_SIZE", + "What": "MacroDef", + "defdec": "Def", + "display": "OS_TMR_CFG_WHEEL_SIZE", "location": { - "column": "19", - "line": "889", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_uart.h" + "column": "9", + "line": "112", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\os_cfg.h" }, - "name": "UART_Start_Receive_DMA", + "name": "OS_TMR_CFG_WHEEL_SIZE", "origin": "user_include", "scope": null }, { - "ID": "c:tim.h@847@macro@__TIM_H__", + "ID": "c:os_cfg.h@9870@macro@OS_TMR_CFG_TICKS_PER_SEC", "What": "MacroDef", "defdec": "Def", - "display": "__TIM_H__", + "display": "OS_TMR_CFG_TICKS_PER_SEC", "location": { "column": "9", - "line": "22", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" + "line": "113", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\os_cfg.h" }, - "name": "__TIM_H__", + "name": "OS_TMR_CFG_TICKS_PER_SEC", "origin": "user_include", "scope": null }, { - "ID": "c:@htim2", - "What": "Variable", - "defdec": "Dec", - "display": "htim2", + "ID": "c:tim.h@847@macro@__TIM_H__", + "What": "MacroDef", + "defdec": "Def", + "display": "__TIM_H__", "location": { - "column": "26", - "line": "35", + "column": "9", + "line": "22", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, - "name": "htim2", + "name": "__TIM_H__", "origin": "user_include", "scope": null }, @@ -275722,7 +277424,7 @@ "scope": null }, { - "ID": "c:tim.h@1361@macro@PLSR_MAX_SECTIONS", + "ID": "c:tim.h@1381@macro@PLSR_MAX_SECTIONS", "What": "MacroDef", "defdec": "Def", "display": "PLSR_MAX_SECTIONS", @@ -275736,7 +277438,7 @@ "scope": null }, { - "ID": "c:tim.h@1418@macro@PLSR_PWM_FREQ_MIN", + "ID": "c:tim.h@1438@macro@PLSR_PWM_FREQ_MIN", "What": "MacroDef", "defdec": "Def", "display": "PLSR_PWM_FREQ_MIN", @@ -275750,7 +277452,7 @@ "scope": null }, { - "ID": "c:tim.h@1482@macro@PLSR_PWM_FREQ_MAX", + "ID": "c:tim.h@1502@macro@PLSR_PWM_FREQ_MAX", "What": "MacroDef", "defdec": "Def", "display": "PLSR_PWM_FREQ_MAX", @@ -275764,7 +277466,7 @@ "scope": null }, { - "ID": "c:tim.h@1549@macro@PLSR_PWM_FREQ_DEFAULT", + "ID": "c:tim.h@1569@macro@PLSR_PWM_FREQ_DEFAULT", "What": "MacroDef", "defdec": "Def", "display": "PLSR_PWM_FREQ_DEFAULT", @@ -275778,7 +277480,7 @@ "scope": null }, { - "ID": "c:tim.h@1614@macro@PLSR_DUTY_CYCLE", + "ID": "c:tim.h@1634@macro@PLSR_DUTY_CYCLE", "What": "MacroDef", "defdec": "Def", "display": "PLSR_DUTY_CYCLE", @@ -275792,7 +277494,7 @@ "scope": null }, { - "ID": "c:tim.h@1715@macro@PLSR_PWM_PIN", + "ID": "c:tim.h@1735@macro@PLSR_PWM_PIN", "What": "MacroDef", "defdec": "Def", "display": "PLSR_PWM_PIN", @@ -275806,7 +277508,7 @@ "scope": null }, { - "ID": "c:tim.h@1778@macro@PLSR_PWM_PORT", + "ID": "c:tim.h@1798@macro@PLSR_PWM_PORT", "What": "MacroDef", "defdec": "Def", "display": "PLSR_PWM_PORT", @@ -275819,34 +277521,6 @@ "origin": "user_include", "scope": null }, - { - "ID": "c:tim.h@1877@macro@PLSR_COUNTER_PIN", - "What": "MacroDef", - "defdec": "Def", - "display": "PLSR_COUNTER_PIN", - "location": { - "column": "9", - "line": "60", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_COUNTER_PIN", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:tim.h@1960@macro@PLSR_COUNTER_PORT", - "What": "MacroDef", - "defdec": "Def", - "display": "PLSR_COUNTER_PORT", - "location": { - "column": "9", - "line": "61", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_COUNTER_PORT", - "origin": "user_include", - "scope": null - }, { "ID": "c:@EA@PLSR_WaitType_t", "What": "Enum", @@ -275860,7 +277534,7 @@ "display": "PLSR_WAIT_PLUSEEND", "location": { "column": "5", - "line": "65", + "line": "63", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_WAIT_PLUSEEND", @@ -275874,7 +277548,7 @@ "display": "PLSR_WAIT_TIME", "location": { "column": "5", - "line": "66", + "line": "64", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_WAIT_TIME", @@ -275888,7 +277562,7 @@ "display": "PLSR_WAIT_CONDITION", "location": { "column": "5", - "line": "67", + "line": "65", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_WAIT_CONDITION", @@ -275902,7 +277576,7 @@ "display": "PLSR_WAIT_ACT_TIME", "location": { "column": "5", - "line": "68", + "line": "66", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_WAIT_ACT_TIME", @@ -275916,7 +277590,7 @@ "display": "PLSR_WAIT_EXT_EVENT", "location": { "column": "5", - "line": "69", + "line": "67", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_WAIT_EXT_EVENT", @@ -275930,7 +277604,7 @@ "display": "PLSR_WAIT_EXT_OR_END", "location": { "column": "5", - "line": "70", + "line": "68", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_WAIT_EXT_OR_END", @@ -275940,7 +277614,7 @@ ], "location": { "column": "9", - "line": "64", + "line": "62", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "", @@ -275960,7 +277634,7 @@ "display": "PLSR_ACCEL_LINEAR", "location": { "column": "5", - "line": "75", + "line": "73", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ACCEL_LINEAR", @@ -275974,7 +277648,7 @@ "display": "PLSR_ACCEL_CURVE", "location": { "column": "5", - "line": "76", + "line": "74", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ACCEL_CURVE", @@ -275988,7 +277662,7 @@ "display": "PLSR_ACCEL_SINE", "location": { "column": "5", - "line": "77", + "line": "75", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ACCEL_SINE", @@ -275998,7 +277672,7 @@ ], "location": { "column": "9", - "line": "74", + "line": "72", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "", @@ -276018,7 +277692,7 @@ "display": "PLSR_STATE_IDLE", "location": { "column": "5", - "line": "82", + "line": "80", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_STATE_IDLE", @@ -276032,7 +277706,7 @@ "display": "PLSR_STATE_ACCEL", "location": { "column": "5", - "line": "83", + "line": "81", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_STATE_ACCEL", @@ -276046,7 +277720,7 @@ "display": "PLSR_STATE_CONST", "location": { "column": "5", - "line": "84", + "line": "82", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_STATE_CONST", @@ -276060,7 +277734,7 @@ "display": "PLSR_STATE_DECEL", "location": { "column": "5", - "line": "85", + "line": "83", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_STATE_DECEL", @@ -276074,31 +277748,17 @@ "display": "PLSR_STATE_WAIT", "location": { "column": "5", - "line": "86", + "line": "84", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_STATE_WAIT", "origin": "user_include", "scope": null - }, - { - "ID": "c:@EA@PLSR_RunState_t@PLSR_STATE_STOP", - "What": "Enumerator", - "defdec": "Def", - "display": "PLSR_STATE_STOP", - "location": { - "column": "5", - "line": "87", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_STATE_STOP", - "origin": "user_include", - "scope": null } ], "location": { "column": "9", - "line": "81", + "line": "79", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "", @@ -276118,7 +277778,7 @@ "display": "PLSR_ROUTE_IDLE", "location": { "column": "5", - "line": "92", + "line": "90", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ROUTE_IDLE", @@ -276132,7 +277792,7 @@ "display": "PLSR_ROUTE_RUNNING", "location": { "column": "5", - "line": "93", + "line": "91", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ROUTE_RUNNING", @@ -276146,7 +277806,7 @@ "display": "PLSR_ROUTE_COMPLETED", "location": { "column": "5", - "line": "94", + "line": "92", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ROUTE_COMPLETED", @@ -276160,7 +277820,7 @@ "display": "PLSR_ROUTE_ERROR", "location": { "column": "5", - "line": "95", + "line": "93", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ROUTE_ERROR", @@ -276170,7 +277830,7 @@ ], "location": { "column": "9", - "line": "91", + "line": "89", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "", @@ -276190,7 +277850,7 @@ "display": "PLSR_SECTION_IDLE", "location": { "column": "5", - "line": "100", + "line": "98", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_SECTION_IDLE", @@ -276204,7 +277864,7 @@ "display": "PLSR_SECTION_RUNNING", "location": { "column": "5", - "line": "101", + "line": "99", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_SECTION_RUNNING", @@ -276218,7 +277878,7 @@ "display": "PLSR_SECTION_COMPLETED", "location": { "column": "5", - "line": "102", + "line": "100", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_SECTION_COMPLETED", @@ -276228,7 +277888,7 @@ ], "location": { "column": "9", - "line": "99", + "line": "97", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "", @@ -276248,7 +277908,7 @@ "display": "PLSR_MODE_RELATIVE", "location": { "column": "5", - "line": "107", + "line": "105", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_MODE_RELATIVE", @@ -276262,7 +277922,7 @@ "display": "PLSR_MODE_ABSOLUTE", "location": { "column": "5", - "line": "108", + "line": "106", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_MODE_ABSOLUTE", @@ -276272,7 +277932,7 @@ ], "location": { "column": "9", - "line": "106", + "line": "104", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "", @@ -276292,7 +277952,7 @@ "display": "PLSR_DIR_FORWARD", "location": { "column": "5", - "line": "113", + "line": "111", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_DIR_FORWARD", @@ -276306,7 +277966,7 @@ "display": "PLSR_DIR_REVERSE", "location": { "column": "5", - "line": "114", + "line": "112", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_DIR_REVERSE", @@ -276316,41 +277976,13 @@ ], "location": { "column": "9", - "line": "112", + "line": "110", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "", "origin": "user_include", "scope": null }, - { - "ID": "c:@F@MX_TIM2_Init", - "What": "Function", - "defdec": "Dec", - "display": "void MX_TIM2_Init(void)", - "location": { - "column": "6", - "line": "118", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "MX_TIM2_Init", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:@F@MX_TIM2_Init", - "What": "Function", - "defdec": "Dec", - "display": "void MX_TIM2_Init(void)", - "location": { - "column": "6", - "line": "118", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "MX_TIM2_Init", - "origin": "user_include", - "scope": null - }, { "ID": "c:@F@MX_TIM6_Init", "What": "Function", @@ -276358,7 +277990,7 @@ "display": "void MX_TIM6_Init(void)", "location": { "column": "6", - "line": "119", + "line": "117", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM6_Init", @@ -276372,7 +278004,7 @@ "display": "void MX_TIM6_Init(void)", "location": { "column": "6", - "line": "119", + "line": "117", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM6_Init", @@ -276386,7 +278018,7 @@ "display": "void MX_TIM10_Init(void)", "location": { "column": "6", - "line": "120", + "line": "118", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM10_Init", @@ -276400,7 +278032,7 @@ "display": "void MX_TIM10_Init(void)", "location": { "column": "6", - "line": "120", + "line": "118", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM10_Init", @@ -276414,7 +278046,7 @@ "display": "void MX_TIM11_Init(void)", "location": { "column": "6", - "line": "121", + "line": "119", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM11_Init", @@ -276428,7 +278060,7 @@ "display": "void MX_TIM11_Init(void)", "location": { "column": "6", - "line": "121", + "line": "119", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM11_Init", @@ -276442,7 +278074,7 @@ "display": "void MX_TIM13_Init(void)", "location": { "column": "6", - "line": "122", + "line": "120", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM13_Init", @@ -276456,7 +278088,7 @@ "display": "void MX_TIM13_Init(void)", "location": { "column": "6", - "line": "122", + "line": "120", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM13_Init", @@ -276470,7 +278102,7 @@ "display": "void MX_TIM14_Init(void)", "location": { "column": "6", - "line": "123", + "line": "121", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM14_Init", @@ -276484,7 +278116,7 @@ "display": "void MX_TIM14_Init(void)", "location": { "column": "6", - "line": "123", + "line": "121", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "MX_TIM14_Init", @@ -276498,7 +278130,7 @@ "display": "void HAL_TIM_MspPostInit(TIM_HandleTypeDef *)", "location": { "column": "6", - "line": "125", + "line": "123", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "HAL_TIM_MspPostInit", @@ -276512,7 +278144,7 @@ "display": "void HAL_TIM_MspPostInit(TIM_HandleTypeDef *)", "location": { "column": "6", - "line": "125", + "line": "123", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "HAL_TIM_MspPostInit", @@ -276526,7 +278158,7 @@ "display": "", "location": { "column": "9", - "line": "128", + "line": "126", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "members": [ @@ -276537,12 +278169,12 @@ "display": "wait_type", "location": { "column": "21", - "line": "129", + "line": "127", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "wait_type", "origin": "user_include", - "scope": "_anonymous_tim_h_128_9" + "scope": "_anonymous_tim_h_126_9" }, { "ID": "c:@SA@PLSR_WaitCondition_t@FI@wait_time_ms", @@ -276551,12 +278183,12 @@ "display": "wait_time_ms", "location": { "column": "14", - "line": "130", + "line": "128", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "wait_time_ms", "origin": "user_include", - "scope": "_anonymous_tim_h_128_9" + "scope": "_anonymous_tim_h_126_9" }, { "ID": "c:@SA@PLSR_WaitCondition_t@FI@act_time_ms", @@ -276565,12 +278197,12 @@ "display": "act_time_ms", "location": { "column": "14", - "line": "131", + "line": "129", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "act_time_ms", "origin": "user_include", - "scope": "_anonymous_tim_h_128_9" + "scope": "_anonymous_tim_h_126_9" }, { "ID": "c:@SA@PLSR_WaitCondition_t@FI@condition_flag", @@ -276579,12 +278211,12 @@ "display": "condition_flag", "location": { "column": "13", - "line": "132", + "line": "130", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "condition_flag", "origin": "user_include", - "scope": "_anonymous_tim_h_128_9" + "scope": "_anonymous_tim_h_126_9" }, { "ID": "c:@SA@PLSR_WaitCondition_t@FI@ext_event_flag", @@ -276593,12 +278225,12 @@ "display": "ext_event_flag", "location": { "column": "13", - "line": "133", + "line": "131", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "ext_event_flag", "origin": "user_include", - "scope": "_anonymous_tim_h_128_9" + "scope": "_anonymous_tim_h_126_9" }, { "ID": "c:@T@PLSR_WaitCondition_t", @@ -276607,12 +278239,12 @@ "display": "struct PLSR_WaitCondition_t", "location": { "column": "3", - "line": "134", + "line": "132", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_WaitCondition_t", "origin": "user_include", - "scope": "_anonymous_tim_h_128_9" + "scope": "_anonymous_tim_h_126_9" } ], "name": "", @@ -276626,7 +278258,7 @@ "display": "", "location": { "column": "9", - "line": "137", + "line": "135", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "members": [ @@ -276637,12 +278269,12 @@ "display": "accel_time_ms", "location": { "column": "14", - "line": "138", + "line": "136", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "accel_time_ms", "origin": "user_include", - "scope": "_anonymous_tim_h_137_9" + "scope": "_anonymous_tim_h_135_9" }, { "ID": "c:@SA@PLSR_AccelConfig_t@FI@decel_time_ms", @@ -276651,12 +278283,12 @@ "display": "decel_time_ms", "location": { "column": "14", - "line": "139", + "line": "137", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "decel_time_ms", "origin": "user_include", - "scope": "_anonymous_tim_h_137_9" + "scope": "_anonymous_tim_h_135_9" }, { "ID": "c:@SA@PLSR_AccelConfig_t@FI@accel_algorithm", @@ -276665,12 +278297,12 @@ "display": "accel_algorithm", "location": { "column": "27", - "line": "140", + "line": "138", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "accel_algorithm", "origin": "user_include", - "scope": "_anonymous_tim_h_137_9" + "scope": "_anonymous_tim_h_135_9" }, { "ID": "c:@T@PLSR_AccelConfig_t", @@ -276679,12 +278311,12 @@ "display": "struct PLSR_AccelConfig_t", "location": { "column": "3", - "line": "141", + "line": "139", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_AccelConfig_t", "origin": "user_include", - "scope": "_anonymous_tim_h_137_9" + "scope": "_anonymous_tim_h_135_9" } ], "name": "", @@ -276698,7 +278330,7 @@ "display": "", "location": { "column": "9", - "line": "144", + "line": "142", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "members": [ @@ -276709,12 +278341,12 @@ "display": "section_num", "location": { "column": "13", - "line": "145", + "line": "143", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "section_num", "origin": "user_include", - "scope": "_anonymous_tim_h_144_9" + "scope": "_anonymous_tim_h_142_9" }, { "ID": "c:@SA@PLSR_SectionConfig_t@FI@target_freq", @@ -276723,12 +278355,12 @@ "display": "target_freq", "location": { "column": "14", - "line": "146", + "line": "144", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "target_freq", "origin": "user_include", - "scope": "_anonymous_tim_h_144_9" + "scope": "_anonymous_tim_h_142_9" }, { "ID": "c:@SA@PLSR_SectionConfig_t@FI@target_pulse", @@ -276737,12 +278369,12 @@ "display": "target_pulse", "location": { "column": "14", - "line": "147", + "line": "145", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "target_pulse", "origin": "user_include", - "scope": "_anonymous_tim_h_144_9" + "scope": "_anonymous_tim_h_142_9" }, { "ID": "c:@SA@PLSR_SectionConfig_t@FI@next_section", @@ -276751,12 +278383,12 @@ "display": "next_section", "location": { "column": "13", - "line": "148", + "line": "146", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "next_section", "origin": "user_include", - "scope": "_anonymous_tim_h_144_9" + "scope": "_anonymous_tim_h_142_9" }, { "ID": "c:@SA@PLSR_SectionConfig_t@FI@section_state", @@ -276765,26 +278397,12 @@ "display": "section_state", "location": { "column": "25", - "line": "149", + "line": "147", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "section_state", "origin": "user_include", - "scope": "_anonymous_tim_h_144_9" - }, - { - "ID": "c:@SA@PLSR_SectionConfig_t@FI@accel_config", - "What": "FieldDecl", - "defdec": "Def", - "display": "accel_config", - "location": { - "column": "24", - "line": "150", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "accel_config", - "origin": "user_include", - "scope": "_anonymous_tim_h_144_9" + "scope": "_anonymous_tim_h_142_9" }, { "ID": "c:@SA@PLSR_SectionConfig_t@FI@wait_condition", @@ -276793,12 +278411,12 @@ "display": "wait_condition", "location": { "column": "26", - "line": "151", + "line": "148", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "wait_condition", "origin": "user_include", - "scope": "_anonymous_tim_h_144_9" + "scope": "_anonymous_tim_h_142_9" }, { "ID": "c:@T@PLSR_SectionConfig_t", @@ -276807,12 +278425,12 @@ "display": "struct PLSR_SectionConfig_t", "location": { "column": "3", - "line": "152", + "line": "149", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_SectionConfig_t", "origin": "user_include", - "scope": "_anonymous_tim_h_144_9" + "scope": "_anonymous_tim_h_142_9" } ], "name": "", @@ -276826,7 +278444,7 @@ "display": "", "location": { "column": "9", - "line": "155", + "line": "152", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "members": [ @@ -276837,12 +278455,12 @@ "display": "route_state", "location": { "column": "23", - "line": "156", + "line": "153", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "route_state", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@current_section_num", @@ -276851,12 +278469,12 @@ "display": "current_section_num", "location": { "column": "13", - "line": "157", + "line": "154", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "current_section_num", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@current_freq", @@ -276865,12 +278483,12 @@ "display": "current_freq", "location": { "column": "14", - "line": "158", + "line": "155", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "current_freq", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@target_freq", @@ -276879,12 +278497,12 @@ "display": "target_freq", "location": { "column": "14", - "line": "159", + "line": "156", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "target_freq", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@pulse_count", @@ -276893,12 +278511,12 @@ "display": "pulse_count", "location": { "column": "14", - "line": "160", + "line": "157", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "pulse_count", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@target_count", @@ -276907,12 +278525,12 @@ "display": "target_count", "location": { "column": "14", - "line": "161", + "line": "158", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "target_count", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@start_freq", @@ -276921,12 +278539,12 @@ "display": "start_freq", "location": { "column": "14", - "line": "162", + "line": "159", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "start_freq", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@end_freq", @@ -276935,12 +278553,12 @@ "display": "end_freq", "location": { "column": "14", - "line": "163", + "line": "160", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "end_freq", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@output_port", @@ -276949,12 +278567,12 @@ "display": "output_port", "location": { "column": "13", - "line": "164", + "line": "161", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "output_port", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@mode", @@ -276963,12 +278581,12 @@ "display": "mode", "location": { "column": "17", - "line": "165", + "line": "162", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "mode", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@direction", @@ -276977,12 +278595,26 @@ "display": "direction", "location": { "column": "22", - "line": "166", + "line": "163", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "direction", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" + }, + { + "ID": "c:@SA@PLSR_RouteConfig_t@FI@accel_config", + "What": "FieldDecl", + "defdec": "Def", + "display": "accel_config", + "location": { + "column": "24", + "line": "164", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" + }, + "name": "accel_config", + "origin": "user_include", + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@run_state", @@ -276991,12 +278623,12 @@ "display": "run_state", "location": { "column": "21", - "line": "169", + "line": "167", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "run_state", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@accel_step_count", @@ -277005,12 +278637,12 @@ "display": "accel_step_count", "location": { "column": "14", - "line": "170", + "line": "168", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "accel_step_count", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@decel_step_count", @@ -277019,12 +278651,12 @@ "display": "decel_step_count", "location": { "column": "14", - "line": "171", + "line": "169", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "decel_step_count", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@const_pulse_count", @@ -277033,12 +278665,12 @@ "display": "const_pulse_count", "location": { "column": "14", - "line": "172", + "line": "170", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "const_pulse_count", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@freq_step", @@ -277047,12 +278679,12 @@ "display": "freq_step", "location": { "column": "14", - "line": "173", + "line": "171", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "freq_step", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@wait_start_tick", @@ -277061,12 +278693,12 @@ "display": "wait_start_tick", "location": { "column": "14", - "line": "174", + "line": "172", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "wait_start_tick", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@act_start_tick", @@ -277075,12 +278707,12 @@ "display": "act_start_tick", "location": { "column": "14", - "line": "175", + "line": "173", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "act_start_tick", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@SA@PLSR_RouteConfig_t@FI@section", @@ -277089,12 +278721,12 @@ "display": "section", "location": { "column": "26", - "line": "177", + "line": "175", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "section", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" }, { "ID": "c:@T@PLSR_RouteConfig_t", @@ -277103,12 +278735,12 @@ "display": "struct PLSR_RouteConfig_t", "location": { "column": "3", - "line": "178", + "line": "176", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_RouteConfig_t", "origin": "user_include", - "scope": "_anonymous_tim_h_155_9" + "scope": "_anonymous_tim_h_152_9" } ], "name": "", @@ -277116,13 +278748,13 @@ "scope": null }, { - "ID": "c:tim.h@6288@macro@PLSR_DEFAULT_STEP_FREQ_US", + "ID": "c:tim.h@6252@macro@PLSR_DEFAULT_STEP_FREQ_US", "What": "MacroDef", "defdec": "Def", "display": "PLSR_DEFAULT_STEP_FREQ_US", "location": { "column": "9", - "line": "181", + "line": "179", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_DEFAULT_STEP_FREQ_US", @@ -277130,13 +278762,13 @@ "scope": null }, { - "ID": "c:tim.h@6374@macro@PLSR_DEFAULT_ACCEL_TIME_MS", + "ID": "c:tim.h@6338@macro@PLSR_DEFAULT_ACCEL_TIME_MS", "What": "MacroDef", "defdec": "Def", "display": "PLSR_DEFAULT_ACCEL_TIME_MS", "location": { "column": "9", - "line": "182", + "line": "180", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_DEFAULT_ACCEL_TIME_MS", @@ -277144,13 +278776,13 @@ "scope": null }, { - "ID": "c:tim.h@6446@macro@PLSR_DEFAULT_DECEL_TIME_MS", + "ID": "c:tim.h@6410@macro@PLSR_DEFAULT_DECEL_TIME_MS", "What": "MacroDef", "defdec": "Def", "display": "PLSR_DEFAULT_DECEL_TIME_MS", "location": { "column": "9", - "line": "183", + "line": "181", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_DEFAULT_DECEL_TIME_MS", @@ -277158,13 +278790,13 @@ "scope": null }, { - "ID": "c:tim.h@6518@macro@PLSR_DEFAULT_ACT_TIME_MS", + "ID": "c:tim.h@6482@macro@PLSR_DEFAULT_ACT_TIME_MS", "What": "MacroDef", "defdec": "Def", "display": "PLSR_DEFAULT_ACT_TIME_MS", "location": { "column": "9", - "line": "184", + "line": "182", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_DEFAULT_ACT_TIME_MS", @@ -277172,13 +278804,13 @@ "scope": null }, { - "ID": "c:tim.h@6587@macro@PLSR_DEFAULT_WAIT_TIME_MS", + "ID": "c:tim.h@6551@macro@PLSR_DEFAULT_WAIT_TIME_MS", "What": "MacroDef", "defdec": "Def", "display": "PLSR_DEFAULT_WAIT_TIME_MS", "location": { "column": "9", - "line": "185", + "line": "183", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_DEFAULT_WAIT_TIME_MS", @@ -277186,19 +278818,33 @@ "scope": null }, { - "ID": "c:tim.h@6659@macro@PLSR_DEFAULT_START_SECTION", + "ID": "c:tim.h@6623@macro@PLSR_DEFAULT_START_SECTION", "What": "MacroDef", "defdec": "Def", "display": "PLSR_DEFAULT_START_SECTION", "location": { "column": "9", - "line": "186", + "line": "184", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_DEFAULT_START_SECTION", "origin": "user_include", "scope": null }, + { + "ID": "c:tim.h@6693@macro@PLSR_TASK_CHECK_INTERVAL", + "What": "MacroDef", + "defdec": "Def", + "display": "PLSR_TASK_CHECK_INTERVAL", + "location": { + "column": "9", + "line": "185", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" + }, + "name": "PLSR_TASK_CHECK_INTERVAL", + "origin": "user_include", + "scope": null + }, { "ID": "c:@F@PLSR_PWM_Init", "What": "Function", @@ -277206,7 +278852,7 @@ "display": "void PLSR_PWM_Init(void)", "location": { "column": "6", - "line": "194", + "line": "193", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_Init", @@ -277220,7 +278866,7 @@ "display": "void PLSR_PWM_Init(void)", "location": { "column": "6", - "line": "194", + "line": "193", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_Init", @@ -277234,7 +278880,7 @@ "display": "void PLSR_PWM_Start(void)", "location": { "column": "6", - "line": "195", + "line": "194", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_Start", @@ -277248,7 +278894,7 @@ "display": "void PLSR_PWM_Start(void)", "location": { "column": "6", - "line": "195", + "line": "194", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_Start", @@ -277262,7 +278908,7 @@ "display": "void PLSR_PWM_Stop(void)", "location": { "column": "6", - "line": "196", + "line": "195", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_Stop", @@ -277276,7 +278922,7 @@ "display": "void PLSR_PWM_Stop(void)", "location": { "column": "6", - "line": "196", + "line": "195", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_Stop", @@ -277290,7 +278936,7 @@ "display": "void PLSR_PWM_SetFrequency(uint32_t)", "location": { "column": "6", - "line": "197", + "line": "196", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_SetFrequency", @@ -277304,7 +278950,7 @@ "display": "void PLSR_PWM_SetFrequency(uint32_t)", "location": { "column": "6", - "line": "197", + "line": "196", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_SetFrequency", @@ -277312,114 +278958,30 @@ "scope": null }, { - "ID": "c:@F@PLSR_Counter_GetCount", - "What": "Function", - "defdec": "Dec", - "display": "uint32_t PLSR_Counter_GetCount(void)", - "location": { - "column": "10", - "line": "200", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_Counter_GetCount", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:@F@PLSR_Counter_GetCount", - "What": "Function", - "defdec": "Dec", - "display": "uint32_t PLSR_Counter_GetCount(void)", - "location": { - "column": "10", - "line": "200", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_Counter_GetCount", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:@F@PLSR_Counter_Reset", - "What": "Function", - "defdec": "Dec", - "display": "void PLSR_Counter_Reset(void)", - "location": { - "column": "6", - "line": "201", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_Counter_Reset", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:@F@PLSR_Counter_Reset", + "ID": "c:@F@PLSR_PWM_SetFrequency_Immediate", "What": "Function", "defdec": "Dec", - "display": "void PLSR_Counter_Reset(void)", + "display": "void PLSR_PWM_SetFrequency_Immediate(uint32_t)", "location": { "column": "6", - "line": "201", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_Counter_Reset", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:@F@PLSR_Counter_SetTarget", - "What": "Function", - "defdec": "Dec", - "display": "void PLSR_Counter_SetTarget(uint32_t)", - "location": { - "column": "6", - "line": "202", + "line": "197", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, - "name": "PLSR_Counter_SetTarget", + "name": "PLSR_PWM_SetFrequency_Immediate", "origin": "user_include", "scope": null }, { - "ID": "c:@F@PLSR_Counter_SetTarget", + "ID": "c:@F@PLSR_PWM_SetFrequency_Immediate", "What": "Function", "defdec": "Dec", - "display": "void PLSR_Counter_SetTarget(uint32_t)", + "display": "void PLSR_PWM_SetFrequency_Immediate(uint32_t)", "location": { "column": "6", - "line": "202", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_Counter_SetTarget", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:@F@PLSR_Counter_GetTarget", - "What": "Function", - "defdec": "Dec", - "display": "uint32_t PLSR_Counter_GetTarget(void)", - "location": { - "column": "10", - "line": "203", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_Counter_GetTarget", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:@F@PLSR_Counter_GetTarget", - "What": "Function", - "defdec": "Dec", - "display": "uint32_t PLSR_Counter_GetTarget(void)", - "location": { - "column": "10", - "line": "203", + "line": "197", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, - "name": "PLSR_Counter_GetTarget", + "name": "PLSR_PWM_SetFrequency_Immediate", "origin": "user_include", "scope": null }, @@ -277430,7 +278992,7 @@ "display": "void PLSR_TIM6_SetUpdateFreq(uint32_t)", "location": { "column": "6", - "line": "206", + "line": "203", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_TIM6_SetUpdateFreq", @@ -277444,7 +279006,7 @@ "display": "void PLSR_TIM6_SetUpdateFreq(uint32_t)", "location": { "column": "6", - "line": "206", + "line": "203", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_TIM6_SetUpdateFreq", @@ -277458,7 +279020,7 @@ "display": "uint32_t PLSR_TIM6_GetUpdateFreq(void)", "location": { "column": "10", - "line": "207", + "line": "204", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_TIM6_GetUpdateFreq", @@ -277472,7 +279034,7 @@ "display": "uint32_t PLSR_TIM6_GetUpdateFreq(void)", "location": { "column": "10", - "line": "207", + "line": "204", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_TIM6_GetUpdateFreq", @@ -277486,7 +279048,7 @@ "display": "void PLSR_TIM6_Start(void)", "location": { "column": "6", - "line": "208", + "line": "205", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_TIM6_Start", @@ -277500,7 +279062,7 @@ "display": "void PLSR_TIM6_Start(void)", "location": { "column": "6", - "line": "208", + "line": "205", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_TIM6_Start", @@ -277514,7 +279076,7 @@ "display": "void PLSR_TIM6_Stop(void)", "location": { "column": "6", - "line": "209", + "line": "206", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_TIM6_Stop", @@ -277528,7 +279090,7 @@ "display": "void PLSR_TIM6_Stop(void)", "location": { "column": "6", - "line": "209", + "line": "206", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_TIM6_Stop", @@ -277542,7 +279104,7 @@ "display": "void PLSR_Route_Init(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "212", + "line": "209", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Route_Init", @@ -277556,7 +279118,7 @@ "display": "void PLSR_Route_Init(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "212", + "line": "209", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Route_Init", @@ -277570,7 +279132,7 @@ "display": "void PLSR_Route_Start(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "213", + "line": "210", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Route_Start", @@ -277584,7 +279146,7 @@ "display": "void PLSR_Route_Start(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "213", + "line": "210", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Route_Start", @@ -277598,7 +279160,7 @@ "display": "void PLSR_Route_Stop(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "214", + "line": "211", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Route_Stop", @@ -277612,7 +279174,7 @@ "display": "void PLSR_Route_Stop(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "214", + "line": "211", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Route_Stop", @@ -277626,7 +279188,7 @@ "display": "void PLSR_Section_Process(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "215", + "line": "212", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_Process", @@ -277640,7 +279202,7 @@ "display": "void PLSR_Section_Process(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "215", + "line": "212", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_Process", @@ -277654,7 +279216,7 @@ "display": "void PLSR_Section_Init(PLSR_SectionConfig_t *, uint8_t)", "location": { "column": "6", - "line": "218", + "line": "215", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_Init", @@ -277668,7 +279230,7 @@ "display": "void PLSR_Section_Init(PLSR_SectionConfig_t *, uint8_t)", "location": { "column": "6", - "line": "218", + "line": "215", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_Init", @@ -277682,7 +279244,7 @@ "display": "void PLSR_Section_SwitchNext(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "219", + "line": "216", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_SwitchNext", @@ -277696,7 +279258,7 @@ "display": "void PLSR_Section_SwitchNext(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "219", + "line": "216", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_SwitchNext", @@ -277710,7 +279272,7 @@ "display": "uint8_t PLSR_Section_CheckWaitCondition(PLSR_RouteConfig_t *)", "location": { "column": "9", - "line": "220", + "line": "217", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_CheckWaitCondition", @@ -277724,7 +279286,7 @@ "display": "uint8_t PLSR_Section_CheckWaitCondition(PLSR_RouteConfig_t *)", "location": { "column": "9", - "line": "220", + "line": "217", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_CheckWaitCondition", @@ -277738,7 +279300,7 @@ "display": "void PLSR_Section_CalculateConstPulse(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "221", + "line": "218", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_CalculateConstPulse", @@ -277752,41 +279314,13 @@ "display": "void PLSR_Section_CalculateConstPulse(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "221", + "line": "218", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Section_CalculateConstPulse", "origin": "user_include", "scope": null }, - { - "ID": "c:@F@PLSR_Accel_CalculateLinear", - "What": "Function", - "defdec": "Dec", - "display": "float PLSR_Accel_CalculateLinear(float)", - "location": { - "column": "7", - "line": "224", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_Accel_CalculateLinear", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:@F@PLSR_Accel_CalculateLinear", - "What": "Function", - "defdec": "Dec", - "display": "float PLSR_Accel_CalculateLinear(float)", - "location": { - "column": "7", - "line": "224", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" - }, - "name": "PLSR_Accel_CalculateLinear", - "origin": "user_include", - "scope": null - }, { "ID": "c:@F@PLSR_Accel_CalculateCurve", "What": "Function", @@ -277794,7 +279328,7 @@ "display": "float PLSR_Accel_CalculateCurve(float)", "location": { "column": "7", - "line": "225", + "line": "221", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Accel_CalculateCurve", @@ -277808,7 +279342,7 @@ "display": "float PLSR_Accel_CalculateCurve(float)", "location": { "column": "7", - "line": "225", + "line": "221", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Accel_CalculateCurve", @@ -277822,7 +279356,7 @@ "display": "float PLSR_Accel_CalculateSine(float)", "location": { "column": "7", - "line": "226", + "line": "222", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Accel_CalculateSine", @@ -277836,7 +279370,7 @@ "display": "float PLSR_Accel_CalculateSine(float)", "location": { "column": "7", - "line": "226", + "line": "222", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Accel_CalculateSine", @@ -277850,7 +279384,7 @@ "display": "void PLSR_Accel_Process(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "227", + "line": "223", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Accel_Process", @@ -277864,7 +279398,7 @@ "display": "void PLSR_Accel_Process(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "227", + "line": "223", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Accel_Process", @@ -277878,7 +279412,7 @@ "display": "void PLSR_Wait_StartTimer(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "230", + "line": "226", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Wait_StartTimer", @@ -277892,7 +279426,7 @@ "display": "void PLSR_Wait_StartTimer(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "230", + "line": "226", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Wait_StartTimer", @@ -277906,7 +279440,7 @@ "display": "uint8_t PLSR_Wait_CheckTimeCondition(PLSR_RouteConfig_t *)", "location": { "column": "9", - "line": "231", + "line": "227", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Wait_CheckTimeCondition", @@ -277920,7 +279454,7 @@ "display": "uint8_t PLSR_Wait_CheckTimeCondition(PLSR_RouteConfig_t *)", "location": { "column": "9", - "line": "231", + "line": "227", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Wait_CheckTimeCondition", @@ -277934,7 +279468,7 @@ "display": "uint8_t PLSR_Wait_CheckActTime(PLSR_RouteConfig_t *)", "location": { "column": "9", - "line": "232", + "line": "228", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Wait_CheckActTime", @@ -277948,7 +279482,7 @@ "display": "uint8_t PLSR_Wait_CheckActTime(PLSR_RouteConfig_t *)", "location": { "column": "9", - "line": "232", + "line": "228", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Wait_CheckActTime", @@ -277962,7 +279496,7 @@ "display": "uint8_t PLSR_Wait_CheckExtEvent(PLSR_RouteConfig_t *)", "location": { "column": "9", - "line": "233", + "line": "229", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Wait_CheckExtEvent", @@ -277976,7 +279510,7 @@ "display": "uint8_t PLSR_Wait_CheckExtEvent(PLSR_RouteConfig_t *)", "location": { "column": "9", - "line": "233", + "line": "229", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_Wait_CheckExtEvent", @@ -277990,7 +279524,7 @@ "display": "void PLSR_SetExtEvent(uint8_t)", "location": { "column": "6", - "line": "234", + "line": "230", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_SetExtEvent", @@ -278004,7 +279538,7 @@ "display": "void PLSR_SetExtEvent(uint8_t)", "location": { "column": "6", - "line": "234", + "line": "230", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_SetExtEvent", @@ -278018,7 +279552,7 @@ "display": "void PLSR_ClearExtEvent(void)", "location": { "column": "6", - "line": "235", + "line": "231", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ClearExtEvent", @@ -278032,7 +279566,7 @@ "display": "void PLSR_ClearExtEvent(void)", "location": { "column": "6", - "line": "235", + "line": "231", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_ClearExtEvent", @@ -278046,7 +279580,7 @@ "display": "void PLSR_SetSectionCondition(PLSR_RouteConfig_t *, uint8_t, uint8_t)", "location": { "column": "6", - "line": "236", + "line": "232", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_SetSectionCondition", @@ -278060,7 +279594,7 @@ "display": "void PLSR_SetSectionCondition(PLSR_RouteConfig_t *, uint8_t, uint8_t)", "location": { "column": "6", - "line": "236", + "line": "232", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_SetSectionCondition", @@ -278074,7 +279608,7 @@ "display": "uint32_t PLSR_GetSystemTick(void)", "location": { "column": "10", - "line": "239", + "line": "235", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_GetSystemTick", @@ -278088,7 +279622,7 @@ "display": "uint32_t PLSR_GetSystemTick(void)", "location": { "column": "10", - "line": "239", + "line": "235", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_GetSystemTick", @@ -278102,7 +279636,7 @@ "display": "uint32_t PLSR_PWM_GetFrequency(void)", "location": { "column": "10", - "line": "240", + "line": "236", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_GetFrequency", @@ -278116,7 +279650,7 @@ "display": "uint32_t PLSR_PWM_GetFrequency(void)", "location": { "column": "10", - "line": "240", + "line": "236", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_GetFrequency", @@ -278130,7 +279664,7 @@ "display": "void PLSR_PWM_SetDutyCycle(uint8_t)", "location": { "column": "6", - "line": "241", + "line": "237", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_SetDutyCycle", @@ -278144,7 +279678,7 @@ "display": "void PLSR_PWM_SetDutyCycle(uint8_t)", "location": { "column": "6", - "line": "241", + "line": "237", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, "name": "PLSR_PWM_SetDutyCycle", @@ -278152,44 +279686,72 @@ "scope": null }, { - "ID": "c:@g_plsr_route", - "What": "Variable", + "ID": "c:@F@PLSR_CheckTaskNotification", + "What": "Function", "defdec": "Dec", - "display": "g_plsr_route", + "display": "uint8_t PLSR_CheckTaskNotification(void)", "location": { - "column": "27", - "line": "244", + "column": "9", + "line": "240", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, - "name": "g_plsr_route", + "name": "PLSR_CheckTaskNotification", "origin": "user_include", "scope": null }, { - "ID": "c:@g_plsr_system_tick", - "What": "Variable", + "ID": "c:@F@PLSR_CheckTaskNotification", + "What": "Function", "defdec": "Dec", - "display": "g_plsr_system_tick", + "display": "uint8_t PLSR_CheckTaskNotification(void)", "location": { - "column": "17", - "line": "245", + "column": "9", + "line": "240", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" + }, + "name": "PLSR_CheckTaskNotification", + "origin": "user_include", + "scope": null + }, + { + "ID": "c:@F@PLSR_Task_SectionProcess", + "What": "Function", + "defdec": "Dec", + "display": "void PLSR_Task_SectionProcess(PLSR_RouteConfig_t *)", + "location": { + "column": "6", + "line": "241", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, - "name": "g_plsr_system_tick", + "name": "PLSR_Task_SectionProcess", "origin": "user_include", "scope": null }, { - "ID": "c:@g_plsr_system_tick", + "ID": "c:@F@PLSR_Task_SectionProcess", + "What": "Function", + "defdec": "Dec", + "display": "void PLSR_Task_SectionProcess(PLSR_RouteConfig_t *)", + "location": { + "column": "6", + "line": "241", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" + }, + "name": "PLSR_Task_SectionProcess", + "origin": "user_include", + "scope": null + }, + { + "ID": "c:@g_plsr_route", "What": "Variable", "defdec": "Dec", - "display": "g_plsr_system_tick", + "display": "g_plsr_route", "location": { - "column": "17", - "line": "245", + "column": "27", + "line": "244", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\tim.h" }, - "name": "g_plsr_system_tick", + "name": "g_plsr_route", "origin": "user_include", "scope": null }, @@ -278264,27 +279826,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@2478@macro@HAL_UART_MODULE_ENABLED", - "What": "MacroDef", - "defdec": "Def", - "display": "HAL_UART_MODULE_ENABLED", - "location": { - "column": "9", - "line": "67", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" - }, - "name": "HAL_UART_MODULE_ENABLED", - "origin": "user_include", - "scope": null - }, - { - "ID": "c:stm32f4xx_hal_conf.h@3149@macro@HAL_GPIO_MODULE_ENABLED", + "ID": "c:stm32f4xx_hal_conf.h@3190@macro@HAL_GPIO_MODULE_ENABLED", "What": "MacroDef", "defdec": "Def", "display": "HAL_GPIO_MODULE_ENABLED", "location": { "column": "9", - "line": "84", + "line": "86", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HAL_GPIO_MODULE_ENABLED", @@ -278292,13 +279840,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@3182@macro@HAL_EXTI_MODULE_ENABLED", + "ID": "c:stm32f4xx_hal_conf.h@3223@macro@HAL_EXTI_MODULE_ENABLED", "What": "MacroDef", "defdec": "Def", "display": "HAL_EXTI_MODULE_ENABLED", "location": { "column": "9", - "line": "85", + "line": "87", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HAL_EXTI_MODULE_ENABLED", @@ -278306,13 +279854,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@3215@macro@HAL_DMA_MODULE_ENABLED", + "ID": "c:stm32f4xx_hal_conf.h@3256@macro@HAL_DMA_MODULE_ENABLED", "What": "MacroDef", "defdec": "Def", "display": "HAL_DMA_MODULE_ENABLED", "location": { "column": "9", - "line": "86", + "line": "88", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HAL_DMA_MODULE_ENABLED", @@ -278320,13 +279868,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@3247@macro@HAL_RCC_MODULE_ENABLED", + "ID": "c:stm32f4xx_hal_conf.h@3288@macro@HAL_RCC_MODULE_ENABLED", "What": "MacroDef", "defdec": "Def", "display": "HAL_RCC_MODULE_ENABLED", "location": { "column": "9", - "line": "87", + "line": "89", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HAL_RCC_MODULE_ENABLED", @@ -278334,13 +279882,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@3279@macro@HAL_FLASH_MODULE_ENABLED", + "ID": "c:stm32f4xx_hal_conf.h@3320@macro@HAL_FLASH_MODULE_ENABLED", "What": "MacroDef", "defdec": "Def", "display": "HAL_FLASH_MODULE_ENABLED", "location": { "column": "9", - "line": "88", + "line": "90", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HAL_FLASH_MODULE_ENABLED", @@ -278348,13 +279896,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@3313@macro@HAL_PWR_MODULE_ENABLED", + "ID": "c:stm32f4xx_hal_conf.h@3354@macro@HAL_PWR_MODULE_ENABLED", "What": "MacroDef", "defdec": "Def", "display": "HAL_PWR_MODULE_ENABLED", "location": { "column": "9", - "line": "89", + "line": "91", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HAL_PWR_MODULE_ENABLED", @@ -278362,13 +279910,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@3345@macro@HAL_CORTEX_MODULE_ENABLED", + "ID": "c:stm32f4xx_hal_conf.h@3386@macro@HAL_CORTEX_MODULE_ENABLED", "What": "MacroDef", "defdec": "Def", "display": "HAL_CORTEX_MODULE_ENABLED", "location": { "column": "9", - "line": "90", + "line": "92", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HAL_CORTEX_MODULE_ENABLED", @@ -278376,13 +279924,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@3768@macro@HSE_VALUE", + "ID": "c:stm32f4xx_hal_conf.h@3809@macro@HSE_VALUE", "What": "MacroDef", "defdec": "Def", "display": "HSE_VALUE", "location": { "column": "11", - "line": "99", + "line": "101", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HSE_VALUE", @@ -278390,13 +279938,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@3912@macro@HSE_STARTUP_TIMEOUT", + "ID": "c:stm32f4xx_hal_conf.h@3953@macro@HSE_STARTUP_TIMEOUT", "What": "MacroDef", "defdec": "Def", "display": "HSE_STARTUP_TIMEOUT", "location": { "column": "11", - "line": "103", + "line": "105", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HSE_STARTUP_TIMEOUT", @@ -278404,13 +279952,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@4293@macro@HSI_VALUE", + "ID": "c:stm32f4xx_hal_conf.h@4334@macro@HSI_VALUE", "What": "MacroDef", "defdec": "Def", "display": "HSI_VALUE", "location": { "column": "11", - "line": "112", + "line": "114", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "HSI_VALUE", @@ -278418,13 +279966,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@4503@macro@LSI_VALUE", + "ID": "c:stm32f4xx_hal_conf.h@4544@macro@LSI_VALUE", "What": "MacroDef", "defdec": "Def", "display": "LSI_VALUE", "location": { "column": "10", - "line": "119", + "line": "121", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "LSI_VALUE", @@ -278432,13 +279980,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@4934@macro@LSE_VALUE", + "ID": "c:stm32f4xx_hal_conf.h@4975@macro@LSE_VALUE", "What": "MacroDef", "defdec": "Def", "display": "LSE_VALUE", "location": { "column": "10", - "line": "127", + "line": "129", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "LSE_VALUE", @@ -278446,13 +279994,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@5086@macro@LSE_STARTUP_TIMEOUT", + "ID": "c:stm32f4xx_hal_conf.h@5127@macro@LSE_STARTUP_TIMEOUT", "What": "MacroDef", "defdec": "Def", "display": "LSE_STARTUP_TIMEOUT", "location": { "column": "11", - "line": "131", + "line": "133", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "LSE_STARTUP_TIMEOUT", @@ -278460,13 +280008,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@5470@macro@EXTERNAL_CLOCK_VALUE", + "ID": "c:stm32f4xx_hal_conf.h@5511@macro@EXTERNAL_CLOCK_VALUE", "What": "MacroDef", "defdec": "Def", "display": "EXTERNAL_CLOCK_VALUE", "location": { "column": "11", - "line": "140", + "line": "142", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "EXTERNAL_CLOCK_VALUE", @@ -278474,13 +280022,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@5915@macro@VDD_VALUE", + "ID": "c:stm32f4xx_hal_conf.h@5956@macro@VDD_VALUE", "What": "MacroDef", "defdec": "Def", "display": "VDD_VALUE", "location": { "column": "10", - "line": "150", + "line": "152", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "VDD_VALUE", @@ -278488,13 +280036,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@5975@macro@TICK_INT_PRIORITY", + "ID": "c:stm32f4xx_hal_conf.h@6016@macro@TICK_INT_PRIORITY", "What": "MacroDef", "defdec": "Def", "display": "TICK_INT_PRIORITY", "location": { "column": "10", - "line": "151", + "line": "153", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "TICK_INT_PRIORITY", @@ -278502,13 +280050,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6051@macro@USE_RTOS", + "ID": "c:stm32f4xx_hal_conf.h@6092@macro@USE_RTOS", "What": "MacroDef", "defdec": "Def", "display": "USE_RTOS", "location": { "column": "10", - "line": "152", + "line": "154", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_RTOS", @@ -278516,13 +280064,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6093@macro@PREFETCH_ENABLE", + "ID": "c:stm32f4xx_hal_conf.h@6134@macro@PREFETCH_ENABLE", "What": "MacroDef", "defdec": "Def", "display": "PREFETCH_ENABLE", "location": { "column": "10", - "line": "153", + "line": "155", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PREFETCH_ENABLE", @@ -278530,13 +280078,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6135@macro@INSTRUCTION_CACHE_ENABLE", + "ID": "c:stm32f4xx_hal_conf.h@6176@macro@INSTRUCTION_CACHE_ENABLE", "What": "MacroDef", "defdec": "Def", "display": "INSTRUCTION_CACHE_ENABLE", "location": { "column": "10", - "line": "154", + "line": "156", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "INSTRUCTION_CACHE_ENABLE", @@ -278544,13 +280092,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6177@macro@DATA_CACHE_ENABLE", + "ID": "c:stm32f4xx_hal_conf.h@6218@macro@DATA_CACHE_ENABLE", "What": "MacroDef", "defdec": "Def", "display": "DATA_CACHE_ENABLE", "location": { "column": "10", - "line": "155", + "line": "157", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "DATA_CACHE_ENABLE", @@ -278558,13 +280106,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6221@macro@USE_HAL_ADC_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@6262@macro@USE_HAL_ADC_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_ADC_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "157", + "line": "159", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_ADC_REGISTER_CALLBACKS", @@ -278572,13 +280120,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6316@macro@USE_HAL_CAN_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@6357@macro@USE_HAL_CAN_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_CAN_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "158", + "line": "160", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_CAN_REGISTER_CALLBACKS", @@ -278586,13 +280134,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6411@macro@USE_HAL_CEC_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@6452@macro@USE_HAL_CEC_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_CEC_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "159", + "line": "161", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_CEC_REGISTER_CALLBACKS", @@ -278600,13 +280148,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6506@macro@USE_HAL_CRYP_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@6547@macro@USE_HAL_CRYP_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_CRYP_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "160", + "line": "162", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_CRYP_REGISTER_CALLBACKS", @@ -278614,13 +280162,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6601@macro@USE_HAL_DAC_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@6642@macro@USE_HAL_DAC_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_DAC_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "161", + "line": "163", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_DAC_REGISTER_CALLBACKS", @@ -278628,13 +280176,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6696@macro@USE_HAL_DCMI_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@6737@macro@USE_HAL_DCMI_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_DCMI_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "162", + "line": "164", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_DCMI_REGISTER_CALLBACKS", @@ -278642,13 +280190,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6791@macro@USE_HAL_DFSDM_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@6832@macro@USE_HAL_DFSDM_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_DFSDM_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "163", + "line": "165", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_DFSDM_REGISTER_CALLBACKS", @@ -278656,13 +280204,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6886@macro@USE_HAL_DMA2D_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@6927@macro@USE_HAL_DMA2D_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_DMA2D_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "164", + "line": "166", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_DMA2D_REGISTER_CALLBACKS", @@ -278670,13 +280218,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@6981@macro@USE_HAL_DSI_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7022@macro@USE_HAL_DSI_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_DSI_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "165", + "line": "167", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_DSI_REGISTER_CALLBACKS", @@ -278684,13 +280232,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7076@macro@USE_HAL_ETH_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7117@macro@USE_HAL_ETH_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_ETH_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "166", + "line": "168", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_ETH_REGISTER_CALLBACKS", @@ -278698,13 +280246,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7171@macro@USE_HAL_HASH_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7212@macro@USE_HAL_HASH_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_HASH_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "167", + "line": "169", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_HASH_REGISTER_CALLBACKS", @@ -278712,13 +280260,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7266@macro@USE_HAL_HCD_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7307@macro@USE_HAL_HCD_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_HCD_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "168", + "line": "170", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_HCD_REGISTER_CALLBACKS", @@ -278726,13 +280274,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7361@macro@USE_HAL_I2C_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7402@macro@USE_HAL_I2C_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_I2C_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "169", + "line": "171", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_I2C_REGISTER_CALLBACKS", @@ -278740,13 +280288,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7456@macro@USE_HAL_FMPI2C_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7497@macro@USE_HAL_FMPI2C_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_FMPI2C_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "170", + "line": "172", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_FMPI2C_REGISTER_CALLBACKS", @@ -278754,13 +280302,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7551@macro@USE_HAL_FMPSMBUS_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7592@macro@USE_HAL_FMPSMBUS_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_FMPSMBUS_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "171", + "line": "173", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_FMPSMBUS_REGISTER_CALLBACKS", @@ -278768,13 +280316,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7646@macro@USE_HAL_I2S_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7687@macro@USE_HAL_I2S_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_I2S_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "172", + "line": "174", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_I2S_REGISTER_CALLBACKS", @@ -278782,13 +280330,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7741@macro@USE_HAL_IRDA_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7782@macro@USE_HAL_IRDA_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_IRDA_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "173", + "line": "175", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_IRDA_REGISTER_CALLBACKS", @@ -278796,13 +280344,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7836@macro@USE_HAL_LPTIM_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7877@macro@USE_HAL_LPTIM_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_LPTIM_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "174", + "line": "176", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_LPTIM_REGISTER_CALLBACKS", @@ -278810,13 +280358,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@7931@macro@USE_HAL_LTDC_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@7972@macro@USE_HAL_LTDC_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_LTDC_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "175", + "line": "177", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_LTDC_REGISTER_CALLBACKS", @@ -278824,13 +280372,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8026@macro@USE_HAL_MMC_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8067@macro@USE_HAL_MMC_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_MMC_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "176", + "line": "178", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_MMC_REGISTER_CALLBACKS", @@ -278838,13 +280386,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8121@macro@USE_HAL_NAND_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8162@macro@USE_HAL_NAND_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_NAND_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "177", + "line": "179", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_NAND_REGISTER_CALLBACKS", @@ -278852,13 +280400,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8216@macro@USE_HAL_NOR_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8257@macro@USE_HAL_NOR_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_NOR_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "178", + "line": "180", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_NOR_REGISTER_CALLBACKS", @@ -278866,13 +280414,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8311@macro@USE_HAL_PCCARD_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8352@macro@USE_HAL_PCCARD_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_PCCARD_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "179", + "line": "181", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_PCCARD_REGISTER_CALLBACKS", @@ -278880,13 +280428,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8406@macro@USE_HAL_PCD_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8447@macro@USE_HAL_PCD_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_PCD_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "180", + "line": "182", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_PCD_REGISTER_CALLBACKS", @@ -278894,13 +280442,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8501@macro@USE_HAL_QSPI_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8542@macro@USE_HAL_QSPI_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_QSPI_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "181", + "line": "183", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_QSPI_REGISTER_CALLBACKS", @@ -278908,13 +280456,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8596@macro@USE_HAL_RNG_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8637@macro@USE_HAL_RNG_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_RNG_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "182", + "line": "184", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_RNG_REGISTER_CALLBACKS", @@ -278922,13 +280470,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8691@macro@USE_HAL_RTC_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8732@macro@USE_HAL_RTC_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_RTC_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "183", + "line": "185", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_RTC_REGISTER_CALLBACKS", @@ -278936,13 +280484,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8786@macro@USE_HAL_SAI_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8827@macro@USE_HAL_SAI_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_SAI_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "184", + "line": "186", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_SAI_REGISTER_CALLBACKS", @@ -278950,13 +280498,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8881@macro@USE_HAL_SD_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@8922@macro@USE_HAL_SD_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_SD_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "185", + "line": "187", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_SD_REGISTER_CALLBACKS", @@ -278964,13 +280512,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@8976@macro@USE_HAL_SMARTCARD_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9017@macro@USE_HAL_SMARTCARD_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_SMARTCARD_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "186", + "line": "188", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_SMARTCARD_REGISTER_CALLBACKS", @@ -278978,13 +280526,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9071@macro@USE_HAL_SDRAM_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9112@macro@USE_HAL_SDRAM_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_SDRAM_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "187", + "line": "189", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_SDRAM_REGISTER_CALLBACKS", @@ -278992,13 +280540,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9166@macro@USE_HAL_SRAM_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9207@macro@USE_HAL_SRAM_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_SRAM_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "188", + "line": "190", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_SRAM_REGISTER_CALLBACKS", @@ -279006,13 +280554,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9261@macro@USE_HAL_SPDIFRX_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9302@macro@USE_HAL_SPDIFRX_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_SPDIFRX_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "189", + "line": "191", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_SPDIFRX_REGISTER_CALLBACKS", @@ -279020,13 +280568,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9356@macro@USE_HAL_SMBUS_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9397@macro@USE_HAL_SMBUS_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_SMBUS_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "190", + "line": "192", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_SMBUS_REGISTER_CALLBACKS", @@ -279034,13 +280582,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9451@macro@USE_HAL_SPI_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9492@macro@USE_HAL_SPI_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_SPI_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "191", + "line": "193", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_SPI_REGISTER_CALLBACKS", @@ -279048,13 +280596,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9546@macro@USE_HAL_TIM_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9587@macro@USE_HAL_TIM_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_TIM_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "192", + "line": "194", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_TIM_REGISTER_CALLBACKS", @@ -279062,13 +280610,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9641@macro@USE_HAL_UART_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9682@macro@USE_HAL_UART_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_UART_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "193", + "line": "195", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_UART_REGISTER_CALLBACKS", @@ -279076,13 +280624,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9736@macro@USE_HAL_USART_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9777@macro@USE_HAL_USART_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_USART_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "194", + "line": "196", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_USART_REGISTER_CALLBACKS", @@ -279090,13 +280638,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@9831@macro@USE_HAL_WWDG_REGISTER_CALLBACKS", + "ID": "c:stm32f4xx_hal_conf.h@9872@macro@USE_HAL_WWDG_REGISTER_CALLBACKS", "What": "MacroDef", "defdec": "Def", "display": "USE_HAL_WWDG_REGISTER_CALLBACKS", "location": { "column": "10", - "line": "195", + "line": "197", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_HAL_WWDG_REGISTER_CALLBACKS", @@ -279104,13 +280652,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10387@macro@MAC_ADDR0", + "ID": "c:stm32f4xx_hal_conf.h@10428@macro@MAC_ADDR0", "What": "MacroDef", "defdec": "Def", "display": "MAC_ADDR0", "location": { "column": "9", - "line": "209", + "line": "211", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "MAC_ADDR0", @@ -279118,13 +280666,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10411@macro@MAC_ADDR1", + "ID": "c:stm32f4xx_hal_conf.h@10452@macro@MAC_ADDR1", "What": "MacroDef", "defdec": "Def", "display": "MAC_ADDR1", "location": { "column": "9", - "line": "210", + "line": "212", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "MAC_ADDR1", @@ -279132,13 +280680,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10435@macro@MAC_ADDR2", + "ID": "c:stm32f4xx_hal_conf.h@10476@macro@MAC_ADDR2", "What": "MacroDef", "defdec": "Def", "display": "MAC_ADDR2", "location": { "column": "9", - "line": "211", + "line": "213", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "MAC_ADDR2", @@ -279146,13 +280694,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10459@macro@MAC_ADDR3", + "ID": "c:stm32f4xx_hal_conf.h@10500@macro@MAC_ADDR3", "What": "MacroDef", "defdec": "Def", "display": "MAC_ADDR3", "location": { "column": "9", - "line": "212", + "line": "214", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "MAC_ADDR3", @@ -279160,13 +280708,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10483@macro@MAC_ADDR4", + "ID": "c:stm32f4xx_hal_conf.h@10524@macro@MAC_ADDR4", "What": "MacroDef", "defdec": "Def", "display": "MAC_ADDR4", "location": { "column": "9", - "line": "213", + "line": "215", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "MAC_ADDR4", @@ -279174,13 +280722,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10507@macro@MAC_ADDR5", + "ID": "c:stm32f4xx_hal_conf.h@10548@macro@MAC_ADDR5", "What": "MacroDef", "defdec": "Def", "display": "MAC_ADDR5", "location": { "column": "9", - "line": "214", + "line": "216", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "MAC_ADDR5", @@ -279188,13 +280736,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10597@macro@ETH_RX_BUF_SIZE", + "ID": "c:stm32f4xx_hal_conf.h@10638@macro@ETH_RX_BUF_SIZE", "What": "MacroDef", "defdec": "Def", "display": "ETH_RX_BUF_SIZE", "location": { "column": "9", - "line": "217", + "line": "219", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "ETH_RX_BUF_SIZE", @@ -279202,13 +280750,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10701@macro@ETH_TX_BUF_SIZE", + "ID": "c:stm32f4xx_hal_conf.h@10742@macro@ETH_TX_BUF_SIZE", "What": "MacroDef", "defdec": "Def", "display": "ETH_TX_BUF_SIZE", "location": { "column": "9", - "line": "218", + "line": "220", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "ETH_TX_BUF_SIZE", @@ -279216,13 +280764,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10805@macro@ETH_RXBUFNB", + "ID": "c:stm32f4xx_hal_conf.h@10846@macro@ETH_RXBUFNB", "What": "MacroDef", "defdec": "Def", "display": "ETH_RXBUFNB", "location": { "column": "9", - "line": "219", + "line": "221", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "ETH_RXBUFNB", @@ -279230,13 +280778,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@10898@macro@ETH_TXBUFNB", + "ID": "c:stm32f4xx_hal_conf.h@10939@macro@ETH_TXBUFNB", "What": "MacroDef", "defdec": "Def", "display": "ETH_TXBUFNB", "location": { "column": "9", - "line": "220", + "line": "222", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "ETH_TXBUFNB", @@ -279244,13 +280792,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11073@macro@DP83848_PHY_ADDRESS", + "ID": "c:stm32f4xx_hal_conf.h@11114@macro@DP83848_PHY_ADDRESS", "What": "MacroDef", "defdec": "Def", "display": "DP83848_PHY_ADDRESS", "location": { "column": "9", - "line": "225", + "line": "227", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "DP83848_PHY_ADDRESS", @@ -279258,13 +280806,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11175@macro@PHY_RESET_DELAY", + "ID": "c:stm32f4xx_hal_conf.h@11216@macro@PHY_RESET_DELAY", "What": "MacroDef", "defdec": "Def", "display": "PHY_RESET_DELAY", "location": { "column": "9", - "line": "227", + "line": "229", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_RESET_DELAY", @@ -279272,13 +280820,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11259@macro@PHY_CONFIG_DELAY", + "ID": "c:stm32f4xx_hal_conf.h@11300@macro@PHY_CONFIG_DELAY", "What": "MacroDef", "defdec": "Def", "display": "PHY_CONFIG_DELAY", "location": { "column": "9", - "line": "229", + "line": "231", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_CONFIG_DELAY", @@ -279286,13 +280834,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11314@macro@PHY_READ_TO", + "ID": "c:stm32f4xx_hal_conf.h@11355@macro@PHY_READ_TO", "What": "MacroDef", "defdec": "Def", "display": "PHY_READ_TO", "location": { "column": "9", - "line": "231", + "line": "233", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_READ_TO", @@ -279300,13 +280848,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11367@macro@PHY_WRITE_TO", + "ID": "c:stm32f4xx_hal_conf.h@11408@macro@PHY_WRITE_TO", "What": "MacroDef", "defdec": "Def", "display": "PHY_WRITE_TO", "location": { "column": "9", - "line": "232", + "line": "234", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_WRITE_TO", @@ -279314,13 +280862,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11463@macro@PHY_BCR", + "ID": "c:stm32f4xx_hal_conf.h@11504@macro@PHY_BCR", "What": "MacroDef", "defdec": "Def", "display": "PHY_BCR", "location": { "column": "9", - "line": "236", + "line": "238", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_BCR", @@ -279328,13 +280876,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11572@macro@PHY_BSR", + "ID": "c:stm32f4xx_hal_conf.h@11613@macro@PHY_BSR", "What": "MacroDef", "defdec": "Def", "display": "PHY_BSR", "location": { "column": "9", - "line": "237", + "line": "239", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_BSR", @@ -279342,13 +280890,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11683@macro@PHY_RESET", + "ID": "c:stm32f4xx_hal_conf.h@11724@macro@PHY_RESET", "What": "MacroDef", "defdec": "Def", "display": "PHY_RESET", "location": { "column": "9", - "line": "239", + "line": "241", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_RESET", @@ -279356,13 +280904,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11763@macro@PHY_LOOPBACK", + "ID": "c:stm32f4xx_hal_conf.h@11804@macro@PHY_LOOPBACK", "What": "MacroDef", "defdec": "Def", "display": "PHY_LOOPBACK", "location": { "column": "9", - "line": "240", + "line": "242", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_LOOPBACK", @@ -279370,13 +280918,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11855@macro@PHY_FULLDUPLEX_100M", + "ID": "c:stm32f4xx_hal_conf.h@11896@macro@PHY_FULLDUPLEX_100M", "What": "MacroDef", "defdec": "Def", "display": "PHY_FULLDUPLEX_100M", "location": { "column": "9", - "line": "241", + "line": "243", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_FULLDUPLEX_100M", @@ -279384,13 +280932,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@11962@macro@PHY_HALFDUPLEX_100M", + "ID": "c:stm32f4xx_hal_conf.h@12003@macro@PHY_HALFDUPLEX_100M", "What": "MacroDef", "defdec": "Def", "display": "PHY_HALFDUPLEX_100M", "location": { "column": "9", - "line": "242", + "line": "244", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_HALFDUPLEX_100M", @@ -279398,13 +280946,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12069@macro@PHY_FULLDUPLEX_10M", + "ID": "c:stm32f4xx_hal_conf.h@12110@macro@PHY_FULLDUPLEX_10M", "What": "MacroDef", "defdec": "Def", "display": "PHY_FULLDUPLEX_10M", "location": { "column": "9", - "line": "243", + "line": "245", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_FULLDUPLEX_10M", @@ -279412,13 +280960,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12176@macro@PHY_HALFDUPLEX_10M", + "ID": "c:stm32f4xx_hal_conf.h@12217@macro@PHY_HALFDUPLEX_10M", "What": "MacroDef", "defdec": "Def", "display": "PHY_HALFDUPLEX_10M", "location": { "column": "9", - "line": "244", + "line": "246", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_HALFDUPLEX_10M", @@ -279426,13 +280974,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12283@macro@PHY_AUTONEGOTIATION", + "ID": "c:stm32f4xx_hal_conf.h@12324@macro@PHY_AUTONEGOTIATION", "What": "MacroDef", "defdec": "Def", "display": "PHY_AUTONEGOTIATION", "location": { "column": "9", - "line": "245", + "line": "247", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_AUTONEGOTIATION", @@ -279440,13 +280988,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12390@macro@PHY_RESTART_AUTONEGOTIATION", + "ID": "c:stm32f4xx_hal_conf.h@12431@macro@PHY_RESTART_AUTONEGOTIATION", "What": "MacroDef", "defdec": "Def", "display": "PHY_RESTART_AUTONEGOTIATION", "location": { "column": "9", - "line": "246", + "line": "248", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_RESTART_AUTONEGOTIATION", @@ -279454,13 +281002,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12497@macro@PHY_POWERDOWN", + "ID": "c:stm32f4xx_hal_conf.h@12538@macro@PHY_POWERDOWN", "What": "MacroDef", "defdec": "Def", "display": "PHY_POWERDOWN", "location": { "column": "9", - "line": "247", + "line": "249", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_POWERDOWN", @@ -279468,13 +281016,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12604@macro@PHY_ISOLATE", + "ID": "c:stm32f4xx_hal_conf.h@12645@macro@PHY_ISOLATE", "What": "MacroDef", "defdec": "Def", "display": "PHY_ISOLATE", "location": { "column": "9", - "line": "248", + "line": "250", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_ISOLATE", @@ -279482,13 +281030,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12713@macro@PHY_AUTONEGO_COMPLETE", + "ID": "c:stm32f4xx_hal_conf.h@12754@macro@PHY_AUTONEGO_COMPLETE", "What": "MacroDef", "defdec": "Def", "display": "PHY_AUTONEGO_COMPLETE", "location": { "column": "9", - "line": "250", + "line": "252", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_AUTONEGO_COMPLETE", @@ -279496,13 +281044,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12820@macro@PHY_LINKED_STATUS", + "ID": "c:stm32f4xx_hal_conf.h@12861@macro@PHY_LINKED_STATUS", "What": "MacroDef", "defdec": "Def", "display": "PHY_LINKED_STATUS", "location": { "column": "9", - "line": "251", + "line": "253", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_LINKED_STATUS", @@ -279510,13 +281058,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@12927@macro@PHY_JABBER_DETECTION", + "ID": "c:stm32f4xx_hal_conf.h@12968@macro@PHY_JABBER_DETECTION", "What": "MacroDef", "defdec": "Def", "display": "PHY_JABBER_DETECTION", "location": { "column": "9", - "line": "252", + "line": "254", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_JABBER_DETECTION", @@ -279524,13 +281072,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@13077@macro@PHY_SR", + "ID": "c:stm32f4xx_hal_conf.h@13118@macro@PHY_SR", "What": "MacroDef", "defdec": "Def", "display": "PHY_SR", "location": { "column": "9", - "line": "255", + "line": "257", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_SR", @@ -279538,13 +281086,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@13192@macro@PHY_SPEED_STATUS", + "ID": "c:stm32f4xx_hal_conf.h@13233@macro@PHY_SPEED_STATUS", "What": "MacroDef", "defdec": "Def", "display": "PHY_SPEED_STATUS", "location": { "column": "9", - "line": "257", + "line": "259", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_SPEED_STATUS", @@ -279552,13 +281100,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@13303@macro@PHY_DUPLEX_STATUS", + "ID": "c:stm32f4xx_hal_conf.h@13344@macro@PHY_DUPLEX_STATUS", "What": "MacroDef", "defdec": "Def", "display": "PHY_DUPLEX_STATUS", "location": { "column": "9", - "line": "258", + "line": "260", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "PHY_DUPLEX_STATUS", @@ -279566,13 +281114,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@13666@macro@USE_SPI_CRC", + "ID": "c:stm32f4xx_hal_conf.h@13707@macro@USE_SPI_CRC", "What": "MacroDef", "defdec": "Def", "display": "USE_SPI_CRC", "location": { "column": "9", - "line": "267", + "line": "269", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "USE_SPI_CRC", @@ -279580,13 +281128,13 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_conf.h@19904@macro@assert_param", + "ID": "c:stm32f4xx_hal_conf.h@19945@macro@assert_param", "What": "MacroDef", "defdec": "Def", "display": "assert_param", "location": { "column": "11", - "line": "488", + "line": "490", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_hal_conf.h" }, "name": "assert_param", @@ -283772,3239 +285320,4293 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_dma_ex.h@799@macro@__STM32F4xx_HAL_DMA_EX_H", + "ID": "c:stm32f4xx_hal_pwr_ex.h@796@macro@__STM32F4xx_HAL_PWR_EX_H", "What": "MacroDef", "defdec": "Def", - "display": "__STM32F4xx_HAL_DMA_EX_H", + "display": "__STM32F4xx_HAL_PWR_EX_H", "location": { "column": "9", - "line": "21", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_dma_ex.h" + "line": "20", + "path": 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"e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\app_cfg.h" }, - "name": "APP_CFG_LED_TASK_PRIO", + "name": "APP_CFG_MODBUS_TASK_PRIO", "origin": "user_include", "scope": null }, { - "ID": "c:app_cfg.h@1042@macro@APP_CFG_KEY_TASK_PRIO", + "ID": "c:app_cfg.h@1045@macro@APP_CFG_KEY_TASK_PRIO", "What": "MacroDef", "defdec": "Def", "display": "APP_CFG_KEY_TASK_PRIO", @@ -294168,7 +297708,7 @@ "scope": null }, { - "ID": "c:app_cfg.h@1092@macro@OS_TASK_TMR_PRIO", + "ID": "c:app_cfg.h@1095@macro@OS_TASK_TMR_PRIO", "What": "MacroDef", "defdec": "Def", "display": "OS_TASK_TMR_PRIO", @@ -294182,7 +297722,7 @@ "scope": null }, { - "ID": "c:app_cfg.h@1444@macro@APP_CFG_STARTUP_TASK_STK_SIZE", + "ID": "c:app_cfg.h@1447@macro@APP_CFG_STARTUP_TASK_STK_SIZE", "What": "MacroDef", "defdec": "Def", "display": "APP_CFG_STARTUP_TASK_STK_SIZE", @@ -294196,21 +297736,21 @@ "scope": null }, { - "ID": "c:app_cfg.h@1492@macro@APP_CFG_LED_TASK_STK_SIZE", + "ID": "c:app_cfg.h@1495@macro@APP_CFG_MODBUS_TASK_STK_SIZE", "What": "MacroDef", "defdec": "Def", - "display": "APP_CFG_LED_TASK_STK_SIZE", + "display": "APP_CFG_MODBUS_TASK_STK_SIZE", "location": { "column": "10", "line": "35", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\UCOS\\Config\\app_cfg.h" }, - "name": "APP_CFG_LED_TASK_STK_SIZE", + "name": "APP_CFG_MODBUS_TASK_STK_SIZE", "origin": "user_include", "scope": null }, { - "ID": "c:app_cfg.h@1540@macro@APP_CFG_KEY_TASK_STK_SIZE", + "ID": "c:app_cfg.h@1543@macro@APP_CFG_KEY_TASK_STK_SIZE", "What": "MacroDef", "defdec": "Def", "display": "APP_CFG_KEY_TASK_STK_SIZE", @@ -294224,7 +297764,7 @@ "scope": null }, { - "ID": "c:app_cfg.h@1873@macro@CPU_CFG_KA_IPL_BOUNDARY", + "ID": "c:app_cfg.h@1876@macro@CPU_CFG_KA_IPL_BOUNDARY", "What": "MacroDef", "defdec": "Def", "display": "CPU_CFG_KA_IPL_BOUNDARY", @@ -294238,7 +297778,7 @@ "scope": null }, { - "ID": "c:app_cfg.h@1921@macro@CPU_CFG_NVIC_PRIO_BITS", + "ID": "c:app_cfg.h@1924@macro@CPU_CFG_NVIC_PRIO_BITS", "What": "MacroDef", "defdec": "Def", "display": "CPU_CFG_NVIC_PRIO_BITS", @@ -294252,7 +297792,7 @@ "scope": null }, { - "ID": "c:app_cfg.h@2255@macro@TRACE_LEVEL_OFF", + "ID": "c:app_cfg.h@2258@macro@TRACE_LEVEL_OFF", "What": "MacroDef", "defdec": "Def", "display": "TRACE_LEVEL_OFF", @@ -294266,7 +297806,7 @@ "scope": null }, { - "ID": "c:app_cfg.h@2303@macro@TRACE_LEVEL_INFO", + "ID": "c:app_cfg.h@2306@macro@TRACE_LEVEL_INFO", "What": "MacroDef", "defdec": "Def", "display": "TRACE_LEVEL_INFO", @@ -294280,7 +297820,7 @@ "scope": null }, { - "ID": "c:app_cfg.h@2351@macro@TRACE_LEVEL_DBG", + "ID": "c:app_cfg.h@2354@macro@TRACE_LEVEL_DBG", "What": "MacroDef", "defdec": "Def", "display": "TRACE_LEVEL_DBG", @@ -294294,7 +297834,7 @@ "scope": null }, { - "ID": "c:app_cfg.h@2401@macro@APP_TRACE_LEVEL", + "ID": "c:app_cfg.h@2404@macro@APP_TRACE_LEVEL", "What": "MacroDef", "defdec": "Def", "display": "APP_TRACE_LEVEL", @@ -294308,7 +297848,7 @@ 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"origin": "project_file", "scope": null }, { - "ID": "c:@F@DMA2_Stream7_IRQHandler", - "What": "Function", - "defdec": "Dec", - "display": "void DMA2_Stream7_IRQHandler(void)", + "ID": "c:tim.c@27937@F@PLSR_PWM_SetFrequency_Immediate@prescaler", + "What": "Variable", + "defdec": "Def", + "display": "prescaler", "location": { - "column": "6", - "line": "62", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\stm32f4xx_it.h" + "column": "14", + "line": "912", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "DMA2_Stream7_IRQHandler", - "origin": "user_include", + "name": "prescaler", + "origin": "project_file", "scope": null }, { - "ID": "c:dma.h@847@macro@__DMA_H__", - "What": "MacroDef", + "ID": "c:tim.c@27989@F@PLSR_PWM_SetFrequency_Immediate@period", + "What": "Variable", "defdec": "Def", - "display": "__DMA_H__", + "display": "period", "location": { - "column": "9", - "line": "22", - "path": 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MX_DMA_Init(void)", + "ID": "c:tim.c@29353@F@PLSR_TIM6_SetUpdateFreq@target_period_us", + "What": "Variable", + "defdec": "Def", + "display": "target_period_us", "location": { - "column": "6", - "line": "41", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\dma.h" + "column": "14", + "line": "952", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "MX_DMA_Init", - "origin": "user_include", + "name": "target_period_us", + "origin": "project_file", "scope": null }, { - "ID": "c:cmsis_compiler.h@978@macro@__CMSIS_COMPILER_H", - "What": "MacroDef", + "ID": "c:tim.c@29538@F@PLSR_TIM6_SetUpdateFreq@prescaler", + "What": "Variable", "defdec": "Def", - "display": "__CMSIS_COMPILER_H", + "display": "prescaler", "location": { - "column": "9", - "line": "26", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\CMSIS\\Include\\cmsis_compiler.h" + "column": "14", + "line": "956", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "__CMSIS_COMPILER_H", - "origin": "user_include", + "name": "prescaler", + "origin": "project_file", "scope": null }, { - "ID": "c:gpio.h@850@macro@__GPIO_H__", - "What": "MacroDef", + "ID": "c:tim.c@29613@F@PLSR_TIM6_SetUpdateFreq@period", + "What": "Variable", "defdec": "Def", - "display": "__GPIO_H__", + "display": "period", "location": { - "column": "9", - "line": "22", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\gpio.h" + "column": "14", + "line": "957", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "__GPIO_H__", - "origin": "user_include", + "name": "period", + "origin": "project_file", "scope": null }, { - "ID": "c:@F@MX_GPIO_Init", + "ID": "c:@F@PLSR_TIM6_GetUpdateFreq", "What": "Function", - "defdec": "Dec", - "display": "void MX_GPIO_Init(void)", + "defdec": "Def", + "display": "uint32_t PLSR_TIM6_GetUpdateFreq(void)", "location": { - "column": "6", - "line": "39", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\gpio.h" + "column": "10", + "line": "976", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "MX_GPIO_Init", - "origin": "user_include", + "name": "PLSR_TIM6_GetUpdateFreq", + "origin": "project_file", "scope": null }, { - "ID": "c:@F@MX_GPIO_Init", + "ID": "c:@F@PLSR_TIM6_Start", "What": "Function", - "defdec": "Dec", - "display": "void MX_GPIO_Init(void)", + "defdec": "Def", + "display": "void PLSR_TIM6_Start(void)", "location": { "column": "6", - "line": "39", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\gpio.h" + "line": "987", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "MX_GPIO_Init", - "origin": "user_include", + "name": "PLSR_TIM6_Start", + "origin": "project_file", "scope": null }, { - "ID": "c:usart.h@853@macro@__USART_H__", - "What": "MacroDef", + "ID": "c:@F@PLSR_TIM6_Stop", + "What": "Function", "defdec": "Def", - "display": "__USART_H__", + "display": "void PLSR_TIM6_Stop(void)", "location": { - "column": "9", - "line": "22", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\usart.h" + "column": "6", + "line": "998", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "__USART_H__", - "origin": "user_include", + "name": "PLSR_TIM6_Stop", + "origin": "project_file", "scope": null }, { - "ID": "c:@huart1", - "What": "Variable", - "defdec": "Dec", - "display": "huart1", + "ID": "c:@F@PLSR_PWM_GetFrequency", + "What": "Function", + "defdec": "Def", + "display": "uint32_t PLSR_PWM_GetFrequency(void)", "location": { - "column": "27", - "line": "35", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\usart.h" + "column": "10", + "line": "1010", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "huart1", - "origin": "user_include", + "name": "PLSR_PWM_GetFrequency", + "origin": "project_file", "scope": null }, { - "ID": "c:@F@MX_USART1_UART_Init", + "ID": "c:@F@PLSR_PWM_SetDutyCycle", "What": "Function", - "defdec": "Dec", - "display": "void MX_USART1_UART_Init(void)", + "defdec": "Def", + "display": "void PLSR_PWM_SetDutyCycle(uint8_t)", "location": { "column": "6", - "line": "41", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\usart.h" + "line": "1020", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "MX_USART1_UART_Init", - "origin": "user_include", + "name": "PLSR_PWM_SetDutyCycle", + "origin": "project_file", "scope": null }, { - "ID": "c:@F@MX_USART1_UART_Init", - "What": "Function", - "defdec": "Dec", - "display": "void MX_USART1_UART_Init(void)", + "ID": "c:tim.c@31297@F@PLSR_PWM_SetDutyCycle@period", + "What": "Variable", + "defdec": "Def", + "display": "period", "location": { - "column": "6", - "line": "41", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Inc\\usart.h" + "column": "14", + "line": "1024", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "MX_USART1_UART_Init", - "origin": "user_include", + "name": "period", + "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_flash_ramfunc.h@801@macro@__STM32F4xx_FLASH_RAMFUNC_H", + "ID": "c:tim.c@31355@F@PLSR_PWM_SetDutyCycle@pulse", + "What": "Variable", + "defdec": "Def", + "display": "pulse", + "location": { + "column": "14", + "line": "1025", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" + }, + "name": "pulse", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:tim.c@31884@macro@PLSR_TASK_CHECK_INTERVAL", "What": "MacroDef", "defdec": "Def", - "display": "__STM32F4xx_FLASH_RAMFUNC_H", + "display": "PLSR_TASK_CHECK_INTERVAL", "location": { "column": "9", - "line": "20", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Inc\\stm32f4xx_hal_flash_ramfunc.h" + "line": "1039", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "__STM32F4xx_FLASH_RAMFUNC_H", - "origin": "user_include", + "name": "PLSR_TASK_CHECK_INTERVAL", + "origin": "project_file", "scope": null }, { - "ID": "c:@g_plsr_route", - "What": "Variable", - "defdec": "Dec", - "display": "g_plsr_route", + "ID": "c:@F@HAL_TIM_PeriodElapsedCallback", + "What": "Function", + "defdec": "Def", + "display": "void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *)", "location": { - "column": "20", - "line": "26", + "column": "6", + "line": "1041", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "g_plsr_route", + "name": "HAL_TIM_PeriodElapsedCallback", "origin": "project_file", "scope": null }, { - "ID": "c:@g_plsr_system_tick", + "ID": "c:tim.c@33253@F@HAL_TIM_PeriodElapsedCallback@temp_counter", "What": "Variable", "defdec": "Def", - "display": "g_plsr_system_tick", + "display": "temp_counter", "location": { - "column": "10", - "line": "27", + "column": "16", + "line": "1082", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "g_plsr_system_tick", + "name": "temp_counter", "origin": "project_file", "scope": null }, { - "ID": "c:@g_plsr_ext_event_flag", + "ID": "c:tim.c@33593@F@HAL_TIM_PeriodElapsedCallback@temp_counter", "What": "Variable", "defdec": "Def", - "display": "g_plsr_ext_event_flag", + "display": "temp_counter", "location": { - "column": "9", - "line": "28", + "column": "16", + "line": "1093", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "g_plsr_ext_event_flag", + "name": "temp_counter", "origin": "project_file", "scope": null }, { - "ID": "c:tim.c@s_tim6_update_freq_us", - "What": "Variable", + "ID": "c:@F@PLSR_Route_Init", + "What": "Function", "defdec": "Def", - "display": "s_tim6_update_freq_us", + "display": "void PLSR_Route_Init(PLSR_RouteConfig_t *)", "location": { - "column": "17", - "line": "31", + "column": "6", + "line": "1122", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "s_tim6_update_freq_us", + "name": "PLSR_Route_Init", "origin": "project_file", "scope": null }, { - "ID": "c:tim.c@s_current_pwm_freq", + "ID": "c:tim.c@36626@F@PLSR_Route_Init@i", "What": "Variable", "defdec": "Def", - "display": "s_current_pwm_freq", + "display": "i", "location": { - "column": "17", - "line": "32", + "column": "18", + "line": "1154", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "s_current_pwm_freq", + "name": "i", "origin": "project_file", "scope": null }, { - "ID": "c:tim.c@s_pwm_running", - "What": "Variable", + "ID": "c:@F@PLSR_Route_Start", + "What": "Function", "defdec": "Def", - "display": "s_pwm_running", + "display": "void PLSR_Route_Start(PLSR_RouteConfig_t *)", "location": { - "column": "16", - "line": "33", + "column": "6", + "line": "1177", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "s_pwm_running", + "name": "PLSR_Route_Start", "origin": "project_file", "scope": null }, { - "ID": "c:tim.c@s_target_pulse_count", - "What": "Variable", + "ID": "c:@F@PLSR_Route_Stop", + "What": "Function", "defdec": "Def", - "display": "s_target_pulse_count", + "display": "void PLSR_Route_Stop(PLSR_RouteConfig_t *)", "location": { - "column": "17", - "line": "34", + "column": "6", + "line": "1214", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" + }, + "name": "PLSR_Route_Stop", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:@F@PLSR_Section_Init", + "What": "Function", + "defdec": "Def", + "display": "void PLSR_Section_Init(PLSR_SectionConfig_t *, uint8_t)", + "location": { + "column": "6", + "line": "1242", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "s_target_pulse_count", + "name": "PLSR_Section_Init", "origin": "project_file", "scope": null }, { - "ID": "c:@F@PLSR_Wait_StartTimer", + "ID": "c:@F@PLSR_Section_Process", "What": "Function", "defdec": "Def", - "display": "void PLSR_Wait_StartTimer(PLSR_RouteConfig_t *)", + "display": "void PLSR_Section_Process(PLSR_RouteConfig_t *)", "location": { "column": "6", - "line": "43", + "line": "1271", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "PLSR_Wait_StartTimer", + "name": "PLSR_Section_Process", "origin": "project_file", "scope": null }, { - "ID": "c:tim.c@1887@F@PLSR_Wait_StartTimer@current_section", - "What": "Variable", + "ID": "c:tim.c@F@PLSR_Section_StartNewSection", + "What": "Function", "defdec": "Def", - "display": "current_section", + "display": "void PLSR_Section_StartNewSection(PLSR_RouteConfig_t *)", "location": { - "column": "27", - "line": "47", + "column": "13", + "line": "1339", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "current_section", + "name": "PLSR_Section_StartNewSection", "origin": "project_file", "scope": null }, { - "ID": "c:tim.c@1981@F@PLSR_Wait_StartTimer@wait_cond", + "ID": "c:tim.c@43642@F@PLSR_Section_StartNewSection@current_section", "What": "Variable", "defdec": "Def", - "display": "wait_cond", + "display": "current_section", "location": { "column": "27", - "line": "48", + "line": "1342", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "wait_cond", + "name": "current_section", "origin": "project_file", "scope": null }, { - "ID": "c:@F@PLSR_Wait_CheckTimeCondition", + "ID": "c:@F@PLSR_Section_SwitchNext", "What": "Function", "defdec": "Def", - "display": "uint8_t PLSR_Wait_CheckTimeCondition(PLSR_RouteConfig_t *)", + "display": "void PLSR_Section_SwitchNext(PLSR_RouteConfig_t *)", "location": { - "column": "9", - "line": "78", + "column": "6", + "line": "1384", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, - "name": "PLSR_Wait_CheckTimeCondition", + "name": "PLSR_Section_SwitchNext", "origin": "project_file", "scope": null }, { - "ID": "c:tim.c@2973@F@PLSR_Wait_CheckTimeCondition@current_section", + "ID": "c:tim.c@45458@F@PLSR_Section_SwitchNext@current_section", "What": "Variable", "defdec": "Def", "display": "current_section", "location": { "column": "27", - "line": "82", + "line": "1388", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Core\\Src\\tim.c" }, "name": "current_section", @@ -296766,41 +301202,41 @@ "scope": null }, { - "ID": "c:tim.c@3067@F@PLSR_Wait_CheckTimeCondition@elapsed_time", + "ID": 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"e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_dma.c" + }, + "name": "DMA_CheckFifoParam", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:stm32f4xx_hal_dma.c@37710@F@DMA_CheckFifoParam@status", + "What": "Variable", + "defdec": "Def", + "display": "status", + "location": { + "column": "21", + "line": "1215", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_dma.c" + }, + "name": "status", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:stm32f4xx_hal_dma.c@37747@F@DMA_CheckFifoParam@tmp", + "What": "Variable", + "defdec": "Def", + "display": "tmp", + "location": { + "column": "12", + "line": "1216", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_dma.c" + }, + "name": "tmp", "origin": "project_file", "scope": null }, @@ -306051,6 +310991,104 @@ "origin": "project_file", "scope": null }, + { + "ID": "c:stm32f4xx_hal_dma_ex.c@F@DMA_MultiBufferSetConfig", + "What": "Function", + "defdec": "Dec", + "display": "void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *, uint32_t, uint32_t, uint32_t)", + "location": { + "column": "13", + "line": "60", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_dma_ex.c" + }, + "name": "DMA_MultiBufferSetConfig", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:@F@HAL_DMAEx_MultiBufferStart", + "What": "Function", + "defdec": "Def", + "display": "HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *, uint32_t, uint32_t, uint32_t, uint32_t)", + "location": { + "column": "19", + "line": "100", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_dma_ex.c" + }, + "name": "HAL_DMAEx_MultiBufferStart", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:stm32f4xx_hal_dma_ex.c@4108@F@HAL_DMAEx_MultiBufferStart@status", + "What": "Variable", + "defdec": "Def", + "display": "status", + "location": { + "column": "21", + "line": "102", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_dma_ex.c" + }, + "name": "status", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:@F@HAL_DMAEx_MultiBufferStart_IT", + "What": "Function", + "defdec": "Def", + "display": "HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *, uint32_t, uint32_t, uint32_t, uint32_t)", + "location": { + "column": "19", + "line": "154", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_dma_ex.c" + }, + "name": "HAL_DMAEx_MultiBufferStart_IT", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:stm32f4xx_hal_dma_ex.c@5906@F@HAL_DMAEx_MultiBufferStart_IT@status", + "What": "Variable", + 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"c:stm32f4xx_hal_tim.c@F@TIM_OC4_SetConfig", - "What": "Function", - "defdec": "Dec", - "display": "void TIM_OC4_SetConfig(TIM_TypeDef *, const TIM_OC_InitTypeDef *)", + "ID": "c:stm32f4xx_hal_rcc.c@3868@macro@MCO1_PIN", + "What": "MacroDef", + "defdec": "Def", + "display": "MCO1_PIN", "location": { - "column": "13", - "line": "209", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "9", + "line": "89", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "TIM_OC4_SetConfig", + "name": "MCO1_PIN", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI1_ConfigInputStage", - "What": "Function", - "defdec": "Dec", - "display": "void TIM_TI1_ConfigInputStage(TIM_TypeDef *, uint32_t, uint32_t)", + "ID": "c:stm32f4xx_hal_rcc.c@3910@macro@__MCO2_CLK_ENABLE", + "What": "MacroDef", + "defdec": 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"c:stm32f4xx_hal_tim.c@F@TIM_TI3_SetConfig", + "ID": "c:@F@HAL_RCC_DeInit", "What": "Function", - "defdec": "Dec", - "display": "void TIM_TI3_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", + "defdec": "Def", + "display": "HAL_StatusTypeDef HAL_RCC_DeInit(void)", "location": { - "column": "13", - "line": "214", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "26", + "line": "200", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "TIM_TI3_SetConfig", + "name": "HAL_RCC_DeInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI4_SetConfig", + "ID": "c:@F@HAL_RCC_OscConfig", "What": "Function", - "defdec": "Dec", - "display": "void TIM_TI4_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", + "defdec": "Def", + "display": "HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *)", "location": { - "column": "13", - "line": "216", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "26", + "line": "219", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "TIM_TI4_SetConfig", + "name": "HAL_RCC_OscConfig", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_ITRx_SetConfig", - "What": "Function", - "defdec": "Dec", - "display": "void TIM_ITRx_SetConfig(TIM_TypeDef *, uint32_t)", + "ID": "c:stm32f4xx_hal_rcc.c@10227@F@HAL_RCC_OscConfig@tickstart", + "What": "Variable", + "defdec": "Def", + "display": "tickstart", "location": { - "column": "13", - "line": "218", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "221", + "path": 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"c:stm32f4xx_hal_tim.c@F@TIM_DMAPeriodElapsedHalfCplt", - "What": "Function", - "defdec": "Dec", - "display": "void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *)", + "ID": "c:stm32f4xx_hal_rcc.c@15686@F@HAL_RCC_OscConfig@pwrclkchanged", + "What": "Variable", + "defdec": "Def", + "display": "pwrclkchanged", "location": { - "column": "13", - "line": "220", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "22", + "line": "391", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "TIM_DMAPeriodElapsedHalfCplt", + "name": "pwrclkchanged", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMADelayPulseCplt", - "What": "Function", - "defdec": "Dec", - "display": "void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *)", + "ID": "c:stm32f4xx_hal_rcc.c@16015@F@HAL_RCC_OscConfig@tmpreg", + "What": "Variable", + "defdec": "Def", + "display": "tmpreg", "location": { - "column": "13", - "line": "221", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "7", + "line": "400", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "TIM_DMADelayPulseCplt", + "name": "tmpreg", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMATriggerCplt", + "ID": "c:@F@HAL_RCC_ClockConfig", "What": "Function", - "defdec": "Dec", - "display": "void TIM_DMATriggerCplt(DMA_HandleTypeDef *)", + "defdec": "Def", + "display": "HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *, uint32_t)", "location": { - "column": "13", - "line": "222", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "19", + "line": "591", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "TIM_DMATriggerCplt", + "name": "HAL_RCC_ClockConfig", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMATriggerHalfCplt", - "What": "Function", - "defdec": "Dec", - "display": "void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *)", + "ID": "c:stm32f4xx_hal_rcc.c@23450@F@HAL_RCC_ClockConfig@tickstart", + "What": "Variable", + "defdec": "Def", + "display": "tickstart", "location": { - "column": "13", - "line": "223", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "593", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "TIM_DMATriggerHalfCplt", + "name": "tickstart", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_SlaveTimer_SetConfig", + "ID": "c:@F@HAL_RCC_MCOConfig", "What": "Function", - "defdec": "Dec", - "display": "HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *, const TIM_SlaveConfigTypeDef *)", + "defdec": "Def", + "display": "void HAL_RCC_MCOConfig(uint32_t, uint32_t, uint32_t)", "location": { - "column": "26", - "line": "224", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "775", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "TIM_SlaveTimer_SetConfig", + "name": "HAL_RCC_MCOConfig", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_Init", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc.c@30636@F@HAL_RCC_MCOConfig@GPIO_InitStruct", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *)", + "display": "GPIO_InitStruct", "location": { - "column": "19", - "line": "266", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "20", + "line": "777", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_Init", + "name": "GPIO_InitStruct", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_DeInit", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc.c@30914@F@HAL_RCC_MCOConfig@tmpreg", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *)", + "display": "tmpreg", "location": { - "column": "19", - "line": "326", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "5", + "line": "787", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_DeInit", + "name": "tmpreg", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_MspInit", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc.c@31745@F@HAL_RCC_MCOConfig@tmpreg", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *)", + "display": "tmpreg", "location": { - "column": "13", - "line": "369", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "5", + "line": "811", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_MspInit", + "name": "tmpreg", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_MspDeInit", + "ID": "c:@F@HAL_RCC_EnableCSS", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *)", + "display": "void HAL_RCC_EnableCSS(void)", "location": { - "column": "13", - "line": "384", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "841", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_MspDeInit", + "name": "HAL_RCC_EnableCSS", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_Start", + "ID": "c:@F@HAL_RCC_DisableCSS", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *)", + "display": "void HAL_RCC_DisableCSS(void)", "location": { - "column": "19", - "line": "400", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "850", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_Start", + "name": "HAL_RCC_DisableCSS", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@17201@F@HAL_TIM_Base_Start@tmpsmcr", - "What": "Variable", + "ID": "c:@F@HAL_RCC_GetSysClockFreq", + "What": "Function", "defdec": "Def", - "display": "tmpsmcr", + "display": "uint32_t HAL_RCC_GetSysClockFreq(void)", "location": { - "column": "12", - "line": "402", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "17", + "line": "885", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "tmpsmcr", + "name": "HAL_RCC_GetSysClockFreq", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_Stop", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc.c@34883@F@HAL_RCC_GetSysClockFreq@pllm", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *)", + "display": "pllm", "location": { - "column": "19", - "line": "439", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "887", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_Stop", + "name": "pllm", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_Start_IT", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc.c@34905@F@HAL_RCC_GetSysClockFreq@pllvco", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *)", + "display": "pllvco", "location": { - "column": "19", - "line": "459", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "888", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_Start_IT", + "name": "pllvco", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@18478@F@HAL_TIM_Base_Start_IT@tmpsmcr", + "ID": "c:stm32f4xx_hal_rcc.c@34929@F@HAL_RCC_GetSysClockFreq@pllp", "What": "Variable", "defdec": "Def", - "display": "tmpsmcr", + "display": "pllp", "location": { "column": "12", - "line": "461", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "889", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "tmpsmcr", + "name": "pllp", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_Stop_IT", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc.c@34951@F@HAL_RCC_GetSysClockFreq@sysclockfreq", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *)", + "display": "sysclockfreq", "location": { - "column": "19", - "line": "501", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "890", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_Stop_IT", + "name": "sysclockfreq", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_Start_DMA", + "ID": "c:@F@HAL_RCC_GetHCLKFreq", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *, const uint32_t *, uint16_t)", + "display": "uint32_t HAL_RCC_GetHCLKFreq(void)", "location": { - "column": "19", - "line": "526", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "10", + "line": "943", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_Start_DMA", + "name": "HAL_RCC_GetHCLKFreq", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@20111@F@HAL_TIM_Base_Start_DMA@tmpsmcr", - "What": "Variable", + "ID": "c:@F@HAL_RCC_GetPCLK1Freq", + "What": "Function", "defdec": "Def", - "display": "tmpsmcr", + "display": "uint32_t HAL_RCC_GetPCLK1Freq(void)", "location": { - "column": "12", - "line": "528", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "10", + "line": "954", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "tmpsmcr", + "name": "HAL_RCC_GetPCLK1Freq", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_Stop_DMA", + "ID": "c:@F@HAL_RCC_GetPCLK2Freq", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *)", + "display": "uint32_t HAL_RCC_GetPCLK2Freq(void)", "location": { - "column": "19", - "line": "595", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "10", + "line": "966", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_Base_Stop_DMA", + "name": "HAL_RCC_GetPCLK2Freq", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Init", + "ID": "c:@F@HAL_RCC_GetOscConfig", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *)", + "display": "void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *)", "location": { - "column": "19", - "line": "650", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "13", + "line": "979", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_OC_Init", + "name": "HAL_RCC_GetOscConfig", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_DeInit", + "ID": "c:@F@HAL_RCC_GetClockConfig", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *)", + "display": "void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *, uint32_t *)", "location": { - "column": "19", - "line": "710", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "1058", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_OC_DeInit", + "name": "HAL_RCC_GetClockConfig", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_MspInit", + "ID": "c:@F@HAL_RCC_NMI_IRQHandler", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *)", + "display": "void HAL_RCC_NMI_IRQHandler(void)", "location": { - "column": "13", - "line": "753", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "1084", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_OC_MspInit", + "name": "HAL_RCC_NMI_IRQHandler", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_MspDeInit", + "ID": "c:@F@HAL_RCC_CSSCallback", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *)", + "display": "void HAL_RCC_CSSCallback(void)", "location": { "column": "13", - "line": "768", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "1101", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" }, - "name": "HAL_TIM_OC_MspDeInit", + "name": "HAL_RCC_CSSCallback", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Start", + "ID": "c:@F@HAL_RCCEx_PeriphCLKConfig", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *)", "location": { "column": "19", - "line": "789", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "2551", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "HAL_TIM_OC_Start", + "name": "HAL_RCCEx_PeriphCLKConfig", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@27708@F@HAL_TIM_OC_Start@tmpsmcr", + "ID": "c:stm32f4xx_hal_rcc_ex.c@110484@F@HAL_RCCEx_PeriphCLKConfig@tickstart", "What": "Variable", "defdec": "Def", - "display": "tmpsmcr", + "display": "tickstart", "location": { "column": "12", - "line": "791", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "2553", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "tmpsmcr", + "name": "tickstart", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc_ex.c@110511@F@HAL_RCCEx_PeriphCLKConfig@tmpreg1", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *, uint32_t)", + "display": "tmpreg1", "location": { - "column": "19", - "line": "843", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "2554", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "HAL_TIM_OC_Stop", + "name": "tmpreg1", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Start_IT", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc_ex.c@112999@F@HAL_RCCEx_PeriphCLKConfig@tmpreg", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "tmpreg", "location": { - "column": "19", - "line": "878", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "5", + "line": "2618", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "HAL_TIM_OC_Start_IT", + "name": "tmpreg", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@30373@F@HAL_TIM_OC_Start_IT@status", - "What": "Variable", + "ID": "c:@F@HAL_RCCEx_GetPeriphCLKConfig", + "What": "Function", "defdec": "Def", - "display": "status", + "display": "void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *)", "location": { - "column": "21", - "line": "880", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "2680", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "status", + "name": "HAL_RCCEx_GetPeriphCLKConfig", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@30410@F@HAL_TIM_OC_Start_IT@tmpsmcr", + "ID": "c:stm32f4xx_hal_rcc_ex.c@115170@F@HAL_RCCEx_GetPeriphCLKConfig@tempreg", "What": "Variable", "defdec": "Def", - "display": "tmpsmcr", + "display": "tempreg", "location": { "column": "12", - "line": "881", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "2682", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "tmpsmcr", + "name": "tempreg", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop_IT", + "ID": "c:@F@HAL_RCCEx_GetPeriphCLKFreq", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t)", "location": { - "column": "19", - "line": "971", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "10", + "line": "2718", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "HAL_TIM_OC_Stop_IT", + "name": "HAL_RCCEx_GetPeriphCLKFreq", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@32726@F@HAL_TIM_OC_Stop_IT@status", + "ID": "c:stm32f4xx_hal_rcc_ex.c@116939@F@HAL_RCCEx_GetPeriphCLKFreq@frequency", "What": "Variable", "defdec": "Def", - "display": "status", + "display": "frequency", "location": { - "column": "21", - "line": "973", - "path": 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"c:stm32f4xx_hal_rcc_ex.c@117145@F@HAL_RCCEx_GetPeriphCLKFreq@vcooutput", "What": "Variable", "defdec": "Def", - "display": "tmpsmcr", + "display": "vcooutput", "location": { "column": "12", - "line": "1052", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "2726", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "tmpsmcr", + "name": "vcooutput", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_Stop_DMA", + "ID": "c:@F@HAL_RCCEx_EnablePLLI2S", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_RCCEx_EnablePLLI2S(RCC_PLLI2SInitTypeDef *)", "location": { "column": "19", - "line": "1212", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "2846", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "HAL_TIM_OC_Stop_DMA", + "name": "HAL_RCCEx_EnablePLLI2S", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@39681@F@HAL_TIM_OC_Stop_DMA@status", + "ID": "c:stm32f4xx_hal_rcc_ex.c@121739@F@HAL_RCCEx_EnablePLLI2S@tickstart", "What": "Variable", "defdec": "Def", - "display": "status", + "display": "tickstart", "location": { - "column": "21", - "line": "1214", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "2848", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "status", + "name": "tickstart", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_Init", + "ID": "c:@F@HAL_RCCEx_DisablePLLI2S", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_RCCEx_DisablePLLI2S(void)", "location": { "column": "19", - "line": "1315", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "2929", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "HAL_TIM_PWM_Init", + "name": "HAL_RCCEx_DisablePLLI2S", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_DeInit", - "What": "Function", + "ID": "c:stm32f4xx_hal_rcc_ex.c@124820@F@HAL_RCCEx_DisablePLLI2S@tickstart", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *)", + "display": "tickstart", "location": { - "column": "19", - "line": "1375", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "2931", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" }, - "name": "HAL_TIM_PWM_DeInit", + "name": "tickstart", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_MspInit", + "ID": "c:@F@HAL_RCC_DeInit", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_RCC_DeInit(void)", "location": { - "column": "13", - "line": "1418", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "19", + "line": "3186", + "path": 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"c:stm32f4xx_hal_pwr.c@1470@macro@PVD_MODE_IT", + "What": "MacroDef", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "PVD_MODE_IT", "location": { - "column": "19", - "line": "1454", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "9", + "line": "46", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "HAL_TIM_PWM_Start", + "name": "PVD_MODE_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@46585@F@HAL_TIM_PWM_Start@tmpsmcr", - "What": "Variable", + "ID": "c:stm32f4xx_hal_pwr.c@1516@macro@PVD_MODE_EVT", + "What": "MacroDef", "defdec": "Def", - "display": "tmpsmcr", + "display": "PVD_MODE_EVT", "location": { - "column": "12", - "line": "1456", - "path": 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"HAL_TIM_PWM_Stop", + "name": "PVD_RISING_EDGE", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_Start_IT", - "What": "Function", + "ID": "c:stm32f4xx_hal_pwr.c@1608@macro@PVD_FALLING_EDGE", + "What": "MacroDef", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "PVD_FALLING_EDGE", "location": { - "column": "19", - "line": "1543", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "9", + "line": "49", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "HAL_TIM_PWM_Start_IT", + "name": "PVD_FALLING_EDGE", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@49203@F@HAL_TIM_PWM_Start_IT@status", - "What": "Variable", + "ID": "c:@F@HAL_PWR_DeInit", + "What": "Function", "defdec": "Def", - "display": "status", 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"e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "tmpsmcr", + "name": "HAL_PWR_EnableBkUpAccess", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_Stop_IT", - "What": "Function", + "ID": "c:stm32f4xx_hal_pwr.c@3851@F@HAL_PWR_EnableBkUpAccess@dummyread", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "dummyread", "location": { - "column": "19", - "line": "1636", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "17", + "line": "110", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "HAL_TIM_PWM_Stop_IT", + "name": "dummyread", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@51533@F@HAL_TIM_PWM_Stop_IT@status", - "What": "Variable", + "ID": "c:@F@HAL_PWR_DisableBkUpAccess", + "What": "Function", "defdec": "Def", - "display": "status", + "display": "void HAL_PWR_DisableBkUpAccess(void)", "location": { - "column": "21", - "line": "1638", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "128", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "status", + "name": "HAL_PWR_DisableBkUpAccess", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_Start_DMA", - "What": "Function", + "ID": "c:stm32f4xx_hal_pwr.c@4641@F@HAL_PWR_DisableBkUpAccess@dummyread", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *, uint32_t, const uint32_t *, uint16_t)", + "display": "dummyread", "location": { - "column": "19", - "line": "1713", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "17", + "line": "130", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "HAL_TIM_PWM_Start_DMA", + "name": "dummyread", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@53622@F@HAL_TIM_PWM_Start_DMA@status", - "What": "Variable", + "ID": "c:@F@HAL_PWR_ConfigPVD", + "What": "Function", "defdec": "Def", - "display": "status", + "display": "void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *)", "location": { - "column": "21", - "line": "1716", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "275", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "status", + "name": "HAL_PWR_ConfigPVD", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@53659@F@HAL_TIM_PWM_Start_DMA@tmpsmcr", - "What": "Variable", + "ID": "c:@F@HAL_PWR_EnablePVD", + "What": "Function", "defdec": "Def", - "display": "tmpsmcr", + "display": "void HAL_PWR_EnablePVD(void)", "location": { - "column": "12", - "line": "1717", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "318", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "tmpsmcr", + "name": "HAL_PWR_EnablePVD", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_Stop_DMA", + "ID": "c:@F@HAL_PWR_DisablePVD", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "void HAL_PWR_DisablePVD(void)", "location": { - "column": "19", - "line": "1876", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "327", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "HAL_TIM_PWM_Stop_DMA", + "name": "HAL_PWR_DisablePVD", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@58453@F@HAL_TIM_PWM_Stop_DMA@status", - "What": "Variable", + "ID": "c:@F@HAL_PWR_EnableWakeUpPin", + "What": "Function", "defdec": "Def", - "display": "status", + "display": "void HAL_PWR_EnableWakeUpPin(uint32_t)", "location": { - "column": "21", - "line": "1878", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" 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"HAL_PWR_EnterSTANDBYMode", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_Start", + "ID": "c:@F@HAL_PWR_PVD_IRQHandler", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "void HAL_PWR_PVD_IRQHandler(void)", "location": { - "column": "19", - "line": "2118", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "509", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" }, - "name": "HAL_TIM_IC_Start", + "name": "HAL_PWR_PVD_IRQHandler", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@65515@F@HAL_TIM_IC_Start@tmpsmcr", - "What": "Variable", + "ID": "c:@F@HAL_PWR_PVDCallback", + "What": "Function", "defdec": "Def", - "display": "tmpsmcr", + "display": "void HAL_PWR_PVDCallback(void)", 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}, - "name": "status", + "name": "PWR_OVERDRIVE_TIMEOUT_VALUE", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@68317@F@HAL_TIM_IC_Start_IT@tmpsmcr", - "What": "Variable", + "ID": "c:stm32f4xx_hal_pwr_ex.c@1409@macro@PWR_UDERDRIVE_TIMEOUT_VALUE", + "What": "MacroDef", "defdec": "Def", - "display": "tmpsmcr", + "display": "PWR_UDERDRIVE_TIMEOUT_VALUE", "location": { - "column": "12", - "line": "2203", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "9", + "line": "42", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" }, - "name": "tmpsmcr", + "name": "PWR_UDERDRIVE_TIMEOUT_VALUE", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@68338@F@HAL_TIM_IC_Start_IT@channel_state", - "What": "Variable", + "ID": "c:stm32f4xx_hal_pwr_ex.c@1452@macro@PWR_BKPREG_TIMEOUT_VALUE", + "What": "MacroDef", "defdec": "Def", - "display": "channel_state", + "display": "PWR_BKPREG_TIMEOUT_VALUE", "location": { - "column": "31", - "line": "2205", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "9", + "line": "43", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" }, - "name": "channel_state", + "name": "PWR_BKPREG_TIMEOUT_VALUE", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@68422@F@HAL_TIM_IC_Start_IT@complementary_channel_state", - "What": "Variable", + "ID": "c:stm32f4xx_hal_pwr_ex.c@1495@macro@PWR_VOSRDY_TIMEOUT_VALUE", + "What": "MacroDef", "defdec": "Def", - "display": "complementary_channel_state", + "display": "PWR_VOSRDY_TIMEOUT_VALUE", "location": { - "column": "31", - "line": "2206", - "path": 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"HAL_TIM_IC_Stop_IT", + "name": "HAL_PWREx_EnableBkUpReg", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@70791@F@HAL_TIM_IC_Stop_IT@status", + "ID": "c:stm32f4xx_hal_pwr_ex.c@6556@F@HAL_PWREx_EnableBkUpReg@tickstart", "What": "Variable", "defdec": "Def", - "display": "status", + "display": "tickstart", "location": { - "column": "21", - "line": "2294", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "143", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" }, - "name": "status", + "name": "tickstart", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_Start_DMA", + "ID": "c:@F@HAL_PWREx_DisableBkUpReg", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *, uint32_t, uint32_t *, uint16_t)", + "display": "HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)", "location": { "column": "19", - "line": "2364", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "line": "165", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" }, - "name": "HAL_TIM_IC_Start_DMA", + "name": "HAL_PWREx_DisableBkUpReg", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@72784@F@HAL_TIM_IC_Start_DMA@status", + "ID": "c:stm32f4xx_hal_pwr_ex.c@7046@F@HAL_PWREx_DisableBkUpReg@tickstart", "What": "Variable", "defdec": "Def", - "display": "status", + "display": "tickstart", "location": { - "column": "21", - "line": "2366", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "12", + "line": "167", + "path": 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"What": "Variable", + "ID": "c:@F@HAL_PWREx_DisableFlashPowerDown", + "What": "Function", "defdec": "Def", - "display": "channel_state", + "display": "void HAL_PWREx_DisableFlashPowerDown(void)", "location": { - "column": "31", - "line": "2369", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "6", + "line": "198", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" }, - "name": "channel_state", + "name": "HAL_PWREx_DisableFlashPowerDown", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@72926@F@HAL_TIM_IC_Start_DMA@complementary_channel_state", - "What": "Variable", + "ID": "c:@F@HAL_PWREx_GetVoltageRange", + "What": "Function", "defdec": "Def", - "display": "complementary_channel_state", + "display": "uint32_t HAL_PWREx_GetVoltageRange(void)", "location": { - "column": "31", - "line": "2370", - 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"c:stm32f4xx_hal_pwr_ex.c@9627@F@HAL_PWREx_ControlVoltageScaling@tmpreg", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *, uint32_t)", + "display": "tmpreg", "location": { - "column": "19", - "line": "2628", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + "column": "3", + "line": "239", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" }, - "name": "HAL_TIM_OnePulse_Init", + "name": "tmpreg", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_DeInit", - "What": "Function", + "ID": "c:stm32f4xx_hal_pwr_ex.c@9678@F@HAL_PWREx_ControlVoltageScaling@tmpreg", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *)", + "display": "tmpreg", "location": { - "column": "19", - "line": "2697", + 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"c:stm32f4xx_hal_tim.c@F@TIM_TI1_ConfigInputStage", "What": "Function", - "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *, uint32_t)", + "defdec": "Dec", + "display": "void TIM_TI1_ConfigInputStage(TIM_TypeDef *, uint32_t, uint32_t)", "location": { - "column": "19", - "line": "2777", + "column": "13", + "line": "210", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_OnePulse_Start", + "name": "TIM_TI1_ConfigInputStage", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@85899@F@HAL_TIM_OnePulse_Start@channel_1_state", - "What": "Variable", - "defdec": "Def", - "display": "channel_1_state", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI2_SetConfig", + "What": "Function", + "defdec": "Dec", + "display": "void TIM_TI2_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", "location": { - "column": "31", - "line": "2779", + "column": "13", + "line": "211", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_1_state", + "name": "TIM_TI2_SetConfig", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@85991@F@HAL_TIM_OnePulse_Start@channel_2_state", - "What": "Variable", - "defdec": "Def", - "display": "channel_2_state", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI2_ConfigInputStage", + "What": "Function", + "defdec": "Dec", + "display": "void TIM_TI2_ConfigInputStage(TIM_TypeDef *, uint32_t, uint32_t)", "location": { - "column": "31", - "line": "2780", + "column": "13", + "line": "213", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_2_state", + "name": "TIM_TI2_ConfigInputStage", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@86083@F@HAL_TIM_OnePulse_Start@complementary_channel_1_state", - "What": "Variable", - "defdec": "Def", - "display": "complementary_channel_1_state", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI3_SetConfig", + "What": "Function", + "defdec": "Dec", + "display": "void TIM_TI3_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", "location": { - "column": "31", - "line": "2781", + "column": "13", + "line": "214", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_1_state", + "name": "TIM_TI3_SetConfig", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@86191@F@HAL_TIM_OnePulse_Start@complementary_channel_2_state", - "What": "Variable", - "defdec": "Def", - "display": "complementary_channel_2_state", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI4_SetConfig", + "What": "Function", + "defdec": "Dec", + "display": "void TIM_TI4_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", "location": { - "column": "31", - "line": "2782", + "column": "13", + "line": "216", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_2_state", + "name": "TIM_TI4_SetConfig", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Stop", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_ITRx_SetConfig", "What": "Function", - "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *, uint32_t)", + "defdec": "Dec", + "display": "void TIM_ITRx_SetConfig(TIM_TypeDef *, uint32_t)", "location": { - "column": "19", - "line": "2834", + "column": "13", + "line": "218", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_OnePulse_Stop", + "name": "TIM_ITRx_SetConfig", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Start_IT", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMAPeriodElapsedCplt", "What": "Function", - "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "defdec": "Dec", + "display": "void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *)", "location": { - "column": "19", - "line": "2877", + "column": "13", + "line": "219", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_OnePulse_Start_IT", + "name": "TIM_DMAPeriodElapsedCplt", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@90214@F@HAL_TIM_OnePulse_Start_IT@channel_1_state", - "What": "Variable", - "defdec": "Def", - "display": "channel_1_state", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMAPeriodElapsedHalfCplt", + "What": "Function", + "defdec": "Dec", + "display": "void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *)", "location": { - "column": "31", - "line": "2879", + "column": "13", + "line": "220", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_1_state", + "name": "TIM_DMAPeriodElapsedHalfCplt", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@90306@F@HAL_TIM_OnePulse_Start_IT@channel_2_state", - "What": "Variable", - "defdec": "Def", - "display": "channel_2_state", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMADelayPulseCplt", + "What": "Function", + "defdec": "Dec", + "display": "void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *)", "location": { - "column": "31", - "line": "2880", + "column": "13", + "line": "221", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_2_state", + "name": "TIM_DMADelayPulseCplt", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@90398@F@HAL_TIM_OnePulse_Start_IT@complementary_channel_1_state", - "What": "Variable", - "defdec": "Def", - "display": "complementary_channel_1_state", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMATriggerCplt", + "What": "Function", + "defdec": "Dec", + "display": "void TIM_DMATriggerCplt(DMA_HandleTypeDef *)", "location": { - "column": "31", - "line": "2881", + "column": "13", + "line": "222", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_1_state", + "name": "TIM_DMATriggerCplt", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@90506@F@HAL_TIM_OnePulse_Start_IT@complementary_channel_2_state", - "What": "Variable", - "defdec": "Def", - "display": "complementary_channel_2_state", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMATriggerHalfCplt", + "What": "Function", + "defdec": "Dec", + "display": "void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *)", "location": { - "column": "31", - "line": "2882", + "column": "13", + "line": "223", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_2_state", + "name": "TIM_DMATriggerHalfCplt", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_Stop_IT", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_SlaveTimer_SetConfig", "What": "Function", - "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "defdec": "Dec", + "display": "HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *, const TIM_SlaveConfigTypeDef *)", "location": { - "column": "19", - "line": "2940", + "column": "26", + "line": "224", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_OnePulse_Stop_IT", + "name": "TIM_SlaveTimer_SetConfig", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Init", + "ID": "c:@F@HAL_TIM_Base_Init", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *, const TIM_Encoder_InitTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *)", "location": { "column": "19", - "line": "3019", + "line": "266", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_Init", + "name": "HAL_TIM_Base_Init", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@96263@F@HAL_TIM_Encoder_Init@tmpsmcr", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Base_DeInit", + "What": "Function", "defdec": "Def", - "display": "tmpsmcr", + "display": "HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *)", "location": { - "column": "12", - "line": "3021", + "column": "19", + "line": "326", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpsmcr", + "name": "HAL_TIM_Base_DeInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@96283@F@HAL_TIM_Encoder_Init@tmpccmr1", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Base_MspInit", + "What": "Function", "defdec": "Def", - "display": "tmpccmr1", + "display": "void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *)", "location": { - "column": "12", - "line": "3022", + "column": "13", + "line": "369", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmr1", + "name": "HAL_TIM_Base_MspInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@96304@F@HAL_TIM_Encoder_Init@tmpccer", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Base_MspDeInit", + "What": "Function", "defdec": "Def", - "display": "tmpccer", + "display": "void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *)", "location": { - "column": "12", - "line": "3023", + "column": "13", + "line": "384", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "HAL_TIM_Base_MspDeInit", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_DeInit", + "ID": "c:@F@HAL_TIM_Base_Start", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *)", "location": { "column": "19", - "line": "3134", + "line": "400", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_DeInit", + "name": "HAL_TIM_Base_Start", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_MspInit", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@17201@F@HAL_TIM_Base_Start@tmpsmcr", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *)", + "display": "tmpsmcr", "location": { - "column": "13", - "line": "3179", + "column": "12", + "line": "402", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_MspInit", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_MspDeInit", + "ID": "c:@F@HAL_TIM_Base_Stop", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *)", "location": { - "column": "13", - "line": "3194", + "column": "19", + "line": "439", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_MspDeInit", + "name": "HAL_TIM_Base_Stop", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start", + "ID": "c:@F@HAL_TIM_Base_Start_IT", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *)", "location": { "column": "19", - "line": "3214", + "line": "459", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_Start", + "name": "HAL_TIM_Base_Start_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@102667@F@HAL_TIM_Encoder_Start@channel_1_state", + "ID": "c:stm32f4xx_hal_tim.c@18478@F@HAL_TIM_Base_Start_IT@tmpsmcr", "What": "Variable", "defdec": "Def", - "display": "channel_1_state", + "display": "tmpsmcr", "location": { - "column": "31", - "line": "3216", + "column": "12", + "line": "461", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_1_state", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@102759@F@HAL_TIM_Encoder_Start@channel_2_state", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Base_Stop_IT", + "What": "Function", "defdec": "Def", - "display": "channel_2_state", + "display": "HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *)", "location": { - "column": "31", - "line": "3217", + "column": "19", + "line": "501", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_2_state", + "name": "HAL_TIM_Base_Stop_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@102851@F@HAL_TIM_Encoder_Start@complementary_channel_1_state", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Base_Start_DMA", + "What": "Function", "defdec": "Def", - "display": "complementary_channel_1_state", + "display": "HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *, const uint32_t *, uint16_t)", "location": { - "column": "31", - "line": "3218", + "column": "19", + "line": "526", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_1_state", + "name": "HAL_TIM_Base_Start_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@102959@F@HAL_TIM_Encoder_Start@complementary_channel_2_state", + "ID": "c:stm32f4xx_hal_tim.c@20111@F@HAL_TIM_Base_Start_DMA@tmpsmcr", "What": "Variable", "defdec": "Def", - "display": "complementary_channel_2_state", + "display": "tmpsmcr", "location": { - "column": "31", - "line": "3219", + "column": "12", + "line": "528", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_2_state", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop", + "ID": "c:@F@HAL_TIM_Base_Stop_DMA", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *)", "location": { "column": "19", - "line": "3308", + "line": "595", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_Stop", + "name": "HAL_TIM_Base_Stop_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start_IT", + "ID": "c:@F@HAL_TIM_OC_Init", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *)", "location": { "column": "19", - "line": "3368", + "line": "650", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_Start_IT", + "name": "HAL_TIM_OC_Init", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@107707@F@HAL_TIM_Encoder_Start_IT@channel_1_state", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OC_DeInit", + "What": "Function", "defdec": "Def", - "display": "channel_1_state", + "display": "HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *)", "location": { - "column": "31", - "line": "3370", + "column": "19", + "line": "710", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_1_state", + "name": "HAL_TIM_OC_DeInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@107799@F@HAL_TIM_Encoder_Start_IT@channel_2_state", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OC_MspInit", + "What": "Function", "defdec": "Def", - "display": "channel_2_state", + "display": "void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *)", "location": { - "column": "31", - "line": "3371", + "column": "13", + "line": "753", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_2_state", + "name": "HAL_TIM_OC_MspInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@107891@F@HAL_TIM_Encoder_Start_IT@complementary_channel_1_state", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OC_MspDeInit", + "What": "Function", "defdec": "Def", - "display": "complementary_channel_1_state", + "display": "void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *)", "location": { - "column": "31", - "line": "3372", + "column": "13", + "line": "768", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_1_state", + "name": "HAL_TIM_OC_MspDeInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@107999@F@HAL_TIM_Encoder_Start_IT@complementary_channel_2_state", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OC_Start", + "What": "Function", "defdec": "Def", - "display": "complementary_channel_2_state", + "display": "HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "31", - "line": "3373", + "column": "19", + "line": "789", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_2_state", + "name": "HAL_TIM_OC_Start", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop_IT", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@27708@F@HAL_TIM_OC_Start@tmpsmcr", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *, uint32_t)", + "display": "tmpsmcr", "location": { - "column": "19", - "line": "3468", + "column": "12", + "line": "791", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_Stop_IT", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Start_DMA", + "ID": "c:@F@HAL_TIM_OC_Stop", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *, uint32_t, uint32_t *, uint32_t *, uint16_t)", + "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *, uint32_t)", "location": { "column": "19", - "line": "3533", + "line": "843", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_Start_DMA", + "name": "HAL_TIM_OC_Stop", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@113567@F@HAL_TIM_Encoder_Start_DMA@channel_1_state", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OC_Start_IT", + "What": "Function", "defdec": "Def", - "display": "channel_1_state", + "display": "HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "31", - "line": "3536", + "column": "19", + "line": "878", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_1_state", + "name": "HAL_TIM_OC_Start_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@113659@F@HAL_TIM_Encoder_Start_DMA@channel_2_state", + "ID": "c:stm32f4xx_hal_tim.c@30373@F@HAL_TIM_OC_Start_IT@status", "What": "Variable", "defdec": "Def", - "display": "channel_2_state", + "display": "status", "location": { - "column": "31", - "line": "3537", + "column": "21", + "line": "880", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_2_state", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@113751@F@HAL_TIM_Encoder_Start_DMA@complementary_channel_1_state", + "ID": "c:stm32f4xx_hal_tim.c@30410@F@HAL_TIM_OC_Start_IT@tmpsmcr", "What": "Variable", "defdec": "Def", - "display": "complementary_channel_1_state", + "display": "tmpsmcr", "location": { - "column": "31", - "line": "3538", + "column": "12", + "line": "881", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_1_state", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@113859@F@HAL_TIM_Encoder_Start_DMA@complementary_channel_2_state", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OC_Stop_IT", + "What": "Function", "defdec": "Def", - "display": "complementary_channel_2_state", + "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "31", - "line": "3539", + "column": "19", + "line": "971", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "complementary_channel_2_state", + "name": "HAL_TIM_OC_Stop_IT", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_Stop_DMA", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@32726@F@HAL_TIM_OC_Stop_IT@status", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", + "display": "status", "location": { - "column": "19", - "line": "3746", + "column": "21", + "line": "973", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_Stop_DMA", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_IRQHandler", + "ID": "c:@F@HAL_TIM_OC_Start_DMA", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_IRQHandler(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *, uint32_t, const uint32_t *, uint16_t)", "location": { - "column": "6", - "line": "3823", + "column": "19", + "line": "1048", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_IRQHandler", + "name": "HAL_TIM_OC_Start_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@123164@F@HAL_TIM_IRQHandler@itsource", + "ID": "c:stm32f4xx_hal_tim.c@34833@F@HAL_TIM_OC_Start_DMA@status", "What": "Variable", "defdec": "Def", - "display": "itsource", + "display": "status", "location": { - "column": "12", - "line": "3825", + "column": "21", + "line": "1051", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "itsource", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@123208@F@HAL_TIM_IRQHandler@itflag", + "ID": "c:stm32f4xx_hal_tim.c@34870@F@HAL_TIM_OC_Start_DMA@tmpsmcr", "What": "Variable", "defdec": "Def", - "display": "itflag", + "display": "tmpsmcr", "location": { "column": "12", - "line": "3826", + "line": "1052", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "itflag", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_ConfigChannel", + "ID": "c:@F@HAL_TIM_OC_Stop_DMA", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *, const TIM_OC_InitTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", "location": { "column": "19", - "line": "4041", + "line": "1212", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_OC_ConfigChannel", + "name": "HAL_TIM_OC_Stop_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@130107@F@HAL_TIM_OC_ConfigChannel@status", + "ID": "c:stm32f4xx_hal_tim.c@39681@F@HAL_TIM_OC_Stop_DMA@status", "What": "Variable", "defdec": "Def", "display": "status", "location": { "column": "21", - "line": "4045", + "line": "1214", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, "name": "status", @@ -309104,125 +314156,125 @@ "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_ConfigChannel", + "ID": "c:@F@HAL_TIM_PWM_Init", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *, const TIM_IC_InitTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *)", "location": { "column": "19", - "line": "4120", + "line": "1315", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_IC_ConfigChannel", + "name": "HAL_TIM_PWM_Init", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@132207@F@HAL_TIM_IC_ConfigChannel@status", - "What": "Variable", + "ID": "c:@F@HAL_TIM_PWM_DeInit", + "What": "Function", "defdec": "Def", - "display": "status", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *)", "location": { - "column": "21", - "line": "4122", + "column": "19", + "line": "1375", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "status", + "name": "HAL_TIM_PWM_DeInit", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_ConfigChannel", + "ID": "c:@F@HAL_TIM_PWM_MspInit", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *, const TIM_OC_InitTypeDef *, uint32_t)", + "display": "void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *)", "location": { - "column": "19", - "line": "4219", + "column": "13", + "line": "1418", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_PWM_ConfigChannel", + "name": "HAL_TIM_PWM_MspInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@135275@F@HAL_TIM_PWM_ConfigChannel@status", - "What": "Variable", + "ID": "c:@F@HAL_TIM_PWM_MspDeInit", + "What": "Function", "defdec": "Def", - "display": "status", + "display": "void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *)", "location": { - "column": "21", - "line": "4223", + "column": "13", + "line": "1433", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "status", + "name": "HAL_TIM_PWM_MspDeInit", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_ConfigChannel", + "ID": "c:@F@HAL_TIM_PWM_Start", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *, TIM_OnePulse_InitTypeDef *, uint32_t, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *, uint32_t)", "location": { "column": "19", - "line": "4333", + "line": "1454", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_OnePulse_ConfigChannel", + "name": "HAL_TIM_PWM_Start", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@138896@F@HAL_TIM_OnePulse_ConfigChannel@status", + "ID": "c:stm32f4xx_hal_tim.c@46585@F@HAL_TIM_PWM_Start@tmpsmcr", "What": "Variable", "defdec": "Def", - "display": "status", + "display": "tmpsmcr", "location": { - "column": "21", - "line": "4336", + "column": "12", + "line": "1456", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "status", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@138933@F@HAL_TIM_OnePulse_ConfigChannel@temp1", - "What": "Variable", + "ID": "c:@F@HAL_TIM_PWM_Stop", + "What": "Function", "defdec": "Def", - "display": "temp1", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "22", - "line": "4337", + "column": "19", + "line": "1508", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "temp1", + "name": "HAL_TIM_PWM_Stop", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_DMABurst_WriteStart", + "ID": "c:@F@HAL_TIM_PWM_Start_IT", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *, uint32_t, uint32_t, const uint32_t *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *, uint32_t)", "location": { "column": "19", - "line": "4481", + "line": "1543", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_DMABurst_WriteStart", + "name": "HAL_TIM_PWM_Start_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@143648@F@HAL_TIM_DMABurst_WriteStart@status", + "ID": "c:stm32f4xx_hal_tim.c@49203@F@HAL_TIM_PWM_Start_IT@status", "What": "Variable", "defdec": "Def", "display": "status", "location": { "column": "21", - "line": "4485", + "line": "1545", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, "name": "status", @@ -309230,55 +314282,41 @@ "scope": null }, { - "ID": "c:@F@HAL_TIM_DMABurst_MultiWriteStart", - "What": "Function", - "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *, uint32_t, uint32_t, const uint32_t *, uint32_t, uint32_t)", - "location": { - "column": "19", - "line": "4534", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" - }, - "name": "HAL_TIM_DMABurst_MultiWriteStart", - "origin": "project_file", - "scope": null - }, - { - "ID": "c:stm32f4xx_hal_tim.c@146034@F@HAL_TIM_DMABurst_MultiWriteStart@status", + "ID": "c:stm32f4xx_hal_tim.c@49240@F@HAL_TIM_PWM_Start_IT@tmpsmcr", "What": "Variable", "defdec": "Def", - "display": "status", + "display": "tmpsmcr", "location": { - "column": "21", - "line": "4538", + "column": "12", + "line": "1546", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "status", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_DMABurst_WriteStop", + "ID": "c:@F@HAL_TIM_PWM_Stop_IT", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *, uint32_t)", "location": { "column": "19", - "line": "4718", + "line": "1636", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_DMABurst_WriteStop", + "name": "HAL_TIM_PWM_Stop_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@151835@F@HAL_TIM_DMABurst_WriteStop@status", + "ID": "c:stm32f4xx_hal_tim.c@51533@F@HAL_TIM_PWM_Stop_IT@status", "What": "Variable", "defdec": "Def", "display": "status", "location": { "column": "21", - "line": "4720", + "line": "1638", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, "name": "status", @@ -309286,27 +314324,27 @@ "scope": null }, { - "ID": "c:@F@HAL_TIM_DMABurst_ReadStart", + "ID": "c:@F@HAL_TIM_PWM_Start_DMA", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *, uint32_t, uint32_t, uint32_t *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *, uint32_t, const uint32_t *, uint16_t)", "location": { "column": "19", - "line": "4819", + "line": "1713", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_DMABurst_ReadStart", + "name": "HAL_TIM_PWM_Start_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@155194@F@HAL_TIM_DMABurst_ReadStart@status", + "ID": "c:stm32f4xx_hal_tim.c@53622@F@HAL_TIM_PWM_Start_DMA@status", "What": "Variable", "defdec": "Def", "display": "status", "location": { "column": "21", - "line": "4822", + "line": "1716", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, "name": "status", @@ -309314,55 +314352,41 @@ "scope": null }, { - "ID": "c:@F@HAL_TIM_DMABurst_MultiReadStart", - "What": "Function", - "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *, uint32_t, uint32_t, uint32_t *, uint32_t, uint32_t)", - "location": { - "column": "19", - "line": "4870", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" - }, - "name": "HAL_TIM_DMABurst_MultiReadStart", - "origin": "project_file", - "scope": null - }, - { - "ID": "c:stm32f4xx_hal_tim.c@157559@F@HAL_TIM_DMABurst_MultiReadStart@status", + "ID": "c:stm32f4xx_hal_tim.c@53659@F@HAL_TIM_PWM_Start_DMA@tmpsmcr", "What": "Variable", "defdec": "Def", - "display": "status", + "display": "tmpsmcr", "location": { - "column": "21", - "line": "4874", + "column": "12", + "line": "1717", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "status", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_DMABurst_ReadStop", + "ID": "c:@F@HAL_TIM_PWM_Stop_DMA", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", "location": { "column": "19", - "line": "5054", + "line": "1876", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_DMABurst_ReadStop", + "name": "HAL_TIM_PWM_Stop_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@163334@F@HAL_TIM_DMABurst_ReadStop@status", + "ID": "c:stm32f4xx_hal_tim.c@58453@F@HAL_TIM_PWM_Stop_DMA@status", "What": "Variable", "defdec": "Def", "display": "status", "location": { "column": "21", - "line": "5056", + "line": "1878", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, "name": "status", @@ -309370,83 +314394,83 @@ "scope": null }, { - "ID": "c:@F@HAL_TIM_GenerateEvent", + "ID": "c:@F@HAL_TIM_IC_Init", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *)", "location": { "column": "19", - "line": "5137", + "line": "1979", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_GenerateEvent", + "name": "HAL_TIM_IC_Init", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_ConfigOCrefClear", + "ID": "c:@F@HAL_TIM_IC_DeInit", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *, const TIM_ClearInputConfigTypeDef *, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *)", "location": { "column": "19", - "line": "5174", + "line": "2039", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_ConfigOCrefClear", + "name": "HAL_TIM_IC_DeInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@167043@F@HAL_TIM_ConfigOCrefClear@status", - "What": "Variable", + "ID": "c:@F@HAL_TIM_IC_MspInit", + "What": "Function", "defdec": "Def", - "display": "status", + "display": "void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *)", "location": { - "column": "21", - "line": "5178", + "column": "13", + "line": "2082", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "status", + "name": "HAL_TIM_IC_MspInit", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_ConfigClockSource", + "ID": "c:@F@HAL_TIM_IC_MspDeInit", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *, const TIM_ClockConfigTypeDef *)", + "display": "void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *)", "location": { - "column": "19", - "line": "5304", + "column": "13", + "line": "2097", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_ConfigClockSource", + "name": "HAL_TIM_IC_MspDeInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@170794@F@HAL_TIM_ConfigClockSource@status", - "What": "Variable", + "ID": "c:@F@HAL_TIM_IC_Start", + "What": "Function", "defdec": "Def", - "display": "status", + "display": "HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "21", - "line": "5306", + "column": "19", + "line": "2118", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "status", + "name": "HAL_TIM_IC_Start", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@170831@F@HAL_TIM_ConfigClockSource@tmpsmcr", + "ID": "c:stm32f4xx_hal_tim.c@65515@F@HAL_TIM_IC_Start@tmpsmcr", "What": "Variable", "defdec": "Def", "display": "tmpsmcr", "location": { "column": "12", - "line": "5307", + "line": "2120", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, "name": "tmpsmcr", @@ -309454,895 +314478,909 @@ "scope": null }, { - "ID": "c:@F@HAL_TIM_ConfigTI1Input", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@65535@F@HAL_TIM_IC_Start@channel_state", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *, uint32_t)", + "display": "channel_state", "location": { - "column": "19", - "line": "5458", + "column": "31", + "line": "2121", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_ConfigTI1Input", + "name": "channel_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@176560@F@HAL_TIM_ConfigTI1Input@tmpcr2", + "ID": "c:stm32f4xx_hal_tim.c@65619@F@HAL_TIM_IC_Start@complementary_channel_state", "What": "Variable", "defdec": "Def", - "display": "tmpcr2", + "display": "complementary_channel_state", "location": { - "column": "12", - "line": "5460", + "column": "31", + "line": "2122", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpcr2", + "name": "complementary_channel_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_SlaveConfigSynchro", + "ID": "c:@F@HAL_TIM_IC_Stop", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *, const TIM_SlaveConfigTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *, uint32_t)", "location": { "column": "19", - "line": "5490", + "line": "2170", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_SlaveConfigSynchro", + "name": "HAL_TIM_IC_Stop", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_SlaveConfigSynchro_IT", + "ID": "c:@F@HAL_TIM_IC_Start_IT", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *, const TIM_SlaveConfigTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *, uint32_t)", "location": { "column": "19", - "line": "5530", + "line": "2200", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_SlaveConfigSynchro_IT", + "name": "HAL_TIM_IC_Start_IT", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_ReadCapturedValue", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@68280@F@HAL_TIM_IC_Start_IT@status", + "What": "Variable", + "defdec": "Def", + "display": "status", + "location": { + "column": "21", + "line": "2202", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" + }, + "name": "status", + "origin": "project_file", + "scope": null + }, + { + "ID": "c:stm32f4xx_hal_tim.c@68317@F@HAL_TIM_IC_Start_IT@tmpsmcr", + "What": "Variable", "defdec": "Def", - "display": "uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *, uint32_t)", + "display": "tmpsmcr", "location": { - "column": "10", - "line": "5573", + "column": "12", + "line": "2203", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_ReadCapturedValue", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@179985@F@HAL_TIM_ReadCapturedValue@tmpreg", + "ID": "c:stm32f4xx_hal_tim.c@68338@F@HAL_TIM_IC_Start_IT@channel_state", "What": "Variable", "defdec": "Def", - "display": "tmpreg", + "display": "channel_state", "location": { - "column": "12", - "line": "5575", + "column": "31", + "line": "2205", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpreg", + "name": "channel_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PeriodElapsedCallback", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@68422@F@HAL_TIM_IC_Start_IT@complementary_channel_state", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *)", + "display": "complementary_channel_state", "location": { - "column": "13", - "line": "5657", + "column": "31", + "line": "2206", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_PeriodElapsedCallback", + "name": "complementary_channel_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PeriodElapsedHalfCpltCallback", + "ID": "c:@F@HAL_TIM_IC_Stop_IT", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "13", - "line": "5672", + "column": "19", + "line": "2292", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_PeriodElapsedHalfCpltCallback", + "name": "HAL_TIM_IC_Stop_IT", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OC_DelayElapsedCallback", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@70791@F@HAL_TIM_IC_Stop_IT@status", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *)", + "display": "status", "location": { - "column": "13", - "line": "5687", + "column": "21", + "line": "2294", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_OC_DelayElapsedCallback", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_CaptureCallback", + "ID": "c:@F@HAL_TIM_IC_Start_DMA", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *, uint32_t, uint32_t *, uint16_t)", "location": { - "column": "13", - "line": "5702", + "column": "19", + "line": "2364", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_IC_CaptureCallback", + "name": "HAL_TIM_IC_Start_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_CaptureHalfCpltCallback", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@72784@F@HAL_TIM_IC_Start_DMA@status", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *)", + "display": "status", "location": { - "column": "13", - "line": "5717", + "column": "21", + "line": "2366", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_IC_CaptureHalfCpltCallback", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_PulseFinishedCallback", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@72821@F@HAL_TIM_IC_Start_DMA@tmpsmcr", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *)", + "display": "tmpsmcr", "location": { - "column": "13", - "line": "5732", + "column": "12", + "line": "2367", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_PWM_PulseFinishedCallback", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_PWM_PulseFinishedHalfCpltCallback", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@72842@F@HAL_TIM_IC_Start_DMA@channel_state", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *)", + "display": "channel_state", "location": { - "column": "13", - "line": "5747", + "column": "31", + "line": "2369", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_PWM_PulseFinishedHalfCpltCallback", + "name": "channel_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_TriggerCallback", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@72926@F@HAL_TIM_IC_Start_DMA@complementary_channel_state", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *)", + "display": "complementary_channel_state", "location": { - "column": "13", - "line": "5762", + "column": "31", + "line": "2370", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_TriggerCallback", + "name": "complementary_channel_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_TriggerHalfCpltCallback", + "ID": "c:@F@HAL_TIM_IC_Stop_DMA", "What": "Function", "defdec": "Def", - "display": "void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "13", - "line": "5777", + "column": "19", + "line": "2523", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_TriggerHalfCpltCallback", + "name": "HAL_TIM_IC_Stop_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_ErrorCallback", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@77818@F@HAL_TIM_IC_Stop_DMA@status", + "What": "Variable", "defdec": "Def", - "display": "void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *)", + "display": "status", "location": { - "column": "13", - "line": "5792", + "column": "21", + "line": "2525", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_ErrorCallback", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Base_GetState", + "ID": "c:@F@HAL_TIM_OnePulse_Init", "What": "Function", "defdec": "Def", - "display": "HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "22", - "line": "6339", + "column": "19", + "line": "2628", "path": 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HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *)", + "display": "void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *)", "location": { - "column": "22", - "line": "6359", + "column": "13", + "line": "2742", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_PWM_GetState", + "name": "HAL_TIM_OnePulse_MspInit", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_IC_GetState", + "ID": "c:@F@HAL_TIM_OnePulse_MspDeInit", "What": "Function", "defdec": "Def", - "display": "HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *)", + "display": "void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *)", "location": { - "column": "22", - "line": "6369", + "column": "13", + "line": "2757", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_IC_GetState", + "name": "HAL_TIM_OnePulse_MspDeInit", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_OnePulse_GetState", + "ID": "c:@F@HAL_TIM_OnePulse_Start", "What": "Function", "defdec": "Def", - "display": "HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "22", - "line": "6379", + "column": "19", + "line": "2777", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_OnePulse_GetState", + "name": "HAL_TIM_OnePulse_Start", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_Encoder_GetState", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@85899@F@HAL_TIM_OnePulse_Start@channel_1_state", + "What": "Variable", "defdec": "Def", - "display": "HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *)", + "display": "channel_1_state", "location": { - "column": "22", - "line": "6389", + "column": "31", + "line": "2779", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_Encoder_GetState", + "name": "channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_GetActiveChannel", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@85991@F@HAL_TIM_OnePulse_Start@channel_2_state", + "What": "Variable", "defdec": "Def", - "display": "HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *)", + "display": "channel_2_state", "location": { - "column": "23", - "line": "6399", + "column": "31", + "line": "2780", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_GetActiveChannel", + "name": "channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_GetChannelState", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@86083@F@HAL_TIM_OnePulse_Start@complementary_channel_1_state", + "What": "Variable", "defdec": "Def", - "display": "HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *, uint32_t)", + "display": "complementary_channel_1_state", "location": { - "column": "29", - "line": "6417", + "column": "31", + "line": "2781", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_GetChannelState", + "name": "complementary_channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@207465@F@HAL_TIM_GetChannelState@channel_state", + "ID": "c:stm32f4xx_hal_tim.c@86191@F@HAL_TIM_OnePulse_Start@complementary_channel_2_state", "What": "Variable", "defdec": "Def", - "display": "channel_state", + "display": "complementary_channel_2_state", "location": { "column": "31", - "line": "6419", + "line": "2782", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "channel_state", + "name": "complementary_channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_TIM_DMABurstState", + "ID": "c:@F@HAL_TIM_OnePulse_Stop", "What": "Function", "defdec": "Def", - "display": "HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "30", - "line": "6434", + "column": "19", + "line": "2834", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_TIM_DMABurstState", + "name": "HAL_TIM_OnePulse_Stop", "origin": "project_file", "scope": null }, { - "ID": "c:@F@TIM_DMAError", + "ID": "c:@F@HAL_TIM_OnePulse_Start_IT", "What": "Function", "defdec": "Def", - "display": "void TIM_DMAError(DMA_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "6", - "line": "6459", + "column": "19", + "line": "2877", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMAError", + "name": "HAL_TIM_OnePulse_Start_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@208266@F@TIM_DMAError@htim", + "ID": "c:stm32f4xx_hal_tim.c@90214@F@HAL_TIM_OnePulse_Start_IT@channel_1_state", "What": "Variable", "defdec": "Def", - "display": "htim", + "display": "channel_1_state", "location": { - "column": "22", - "line": "6461", + "column": "31", + "line": "2879", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMADelayPulseCplt", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@90306@F@HAL_TIM_OnePulse_Start_IT@channel_2_state", + "What": "Variable", "defdec": "Def", - "display": "void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *)", + "display": "channel_2_state", "location": { - "column": "13", - "line": "6502", + "column": "31", + "line": "2880", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMADelayPulseCplt", + "name": "channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@209499@F@TIM_DMADelayPulseCplt@htim", + "ID": "c:stm32f4xx_hal_tim.c@90398@F@HAL_TIM_OnePulse_Start_IT@complementary_channel_1_state", "What": "Variable", "defdec": "Def", - "display": "htim", + "display": "complementary_channel_1_state", "location": { - "column": "22", - "line": "6504", + "column": "31", + "line": "2881", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "complementary_channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@TIM_DMADelayPulseHalfCplt", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@90506@F@HAL_TIM_OnePulse_Start_IT@complementary_channel_2_state", + "What": "Variable", "defdec": "Def", - "display": "void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *)", + "display": "complementary_channel_2_state", "location": { - "column": "6", - "line": "6561", + "column": "31", + "line": "2882", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMADelayPulseHalfCplt", + "name": "complementary_channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@210959@F@TIM_DMADelayPulseHalfCplt@htim", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OnePulse_Stop_IT", + "What": "Function", "defdec": "Def", - "display": "htim", + "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "22", - "line": "6563", + "column": "19", + "line": "2940", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "HAL_TIM_OnePulse_Stop_IT", "origin": "project_file", "scope": null }, { - "ID": "c:@F@TIM_DMACaptureCplt", + "ID": "c:@F@HAL_TIM_Encoder_Init", "What": "Function", "defdec": "Def", - "display": "void TIM_DMACaptureCplt(DMA_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *, const TIM_Encoder_InitTypeDef *)", "location": { - "column": "6", - "line": "6600", + "column": "19", + "line": "3019", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMACaptureCplt", + "name": "HAL_TIM_Encoder_Init", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@211895@F@TIM_DMACaptureCplt@htim", + "ID": "c:stm32f4xx_hal_tim.c@96263@F@HAL_TIM_Encoder_Init@tmpsmcr", "What": "Variable", "defdec": "Def", - "display": "htim", + "display": "tmpsmcr", "location": { - "column": "22", - "line": "6602", + "column": "12", + "line": "3021", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "tmpsmcr", "origin": "project_file", "scope": null }, { - "ID": "c:@F@TIM_DMACaptureHalfCplt", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@96283@F@HAL_TIM_Encoder_Init@tmpccmr1", + "What": "Variable", "defdec": "Def", - "display": "void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *)", + "display": "tmpccmr1", "location": { - "column": "6", - "line": "6663", + "column": "12", + "line": "3022", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMACaptureHalfCplt", + "name": "tmpccmr1", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@213658@F@TIM_DMACaptureHalfCplt@htim", + "ID": "c:stm32f4xx_hal_tim.c@96304@F@HAL_TIM_Encoder_Init@tmpccer", "What": "Variable", "defdec": "Def", - "display": "htim", + "display": "tmpccer", "location": { - "column": "22", - "line": "6665", + "column": "12", + "line": "3023", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "tmpccer", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMAPeriodElapsedCplt", + "ID": "c:@F@HAL_TIM_Encoder_DeInit", "What": "Function", "defdec": "Def", - "display": "void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *)", "location": { - "column": "13", - "line": "6702", + "column": "19", + "line": "3134", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMAPeriodElapsedCplt", + "name": "HAL_TIM_Encoder_DeInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@214599@F@TIM_DMAPeriodElapsedCplt@htim", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Encoder_MspInit", + "What": "Function", "defdec": "Def", - "display": "htim", + "display": "void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *)", "location": { - "column": "22", - "line": "6704", + "column": "13", + "line": "3179", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "HAL_TIM_Encoder_MspInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMAPeriodElapsedHalfCplt", + "ID": "c:@F@HAL_TIM_Encoder_MspDeInit", "What": "Function", "defdec": "Def", - "display": "void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *)", + "display": "void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *)", "location": { "column": "13", - "line": "6723", + "line": "3194", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMAPeriodElapsedHalfCplt", + "name": "HAL_TIM_Encoder_MspDeInit", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@215159@F@TIM_DMAPeriodElapsedHalfCplt@htim", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Encoder_Start", + "What": "Function", "defdec": "Def", - "display": "htim", + "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "22", - "line": "6725", + "column": "19", + "line": "3214", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "HAL_TIM_Encoder_Start", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMATriggerCplt", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@102667@F@HAL_TIM_Encoder_Start@channel_1_state", + "What": "Variable", "defdec": "Def", - "display": "void TIM_DMATriggerCplt(DMA_HandleTypeDef *)", + "display": "channel_1_state", "location": { - "column": "13", - "line": "6739", + "column": "31", + "line": "3216", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMATriggerCplt", + "name": "channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@215595@F@TIM_DMATriggerCplt@htim", + "ID": "c:stm32f4xx_hal_tim.c@102759@F@HAL_TIM_Encoder_Start@channel_2_state", "What": "Variable", "defdec": "Def", - "display": "htim", + "display": "channel_2_state", "location": { - "column": "22", - "line": "6741", + "column": "31", + "line": "3217", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMATriggerHalfCplt", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@102851@F@HAL_TIM_Encoder_Start@complementary_channel_1_state", + "What": "Variable", "defdec": "Def", - "display": "void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *)", + "display": "complementary_channel_1_state", "location": { - "column": "13", - "line": "6760", + "column": "31", + "line": "3218", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_DMATriggerHalfCplt", + "name": "complementary_channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@216132@F@TIM_DMATriggerHalfCplt@htim", + "ID": "c:stm32f4xx_hal_tim.c@102959@F@HAL_TIM_Encoder_Start@complementary_channel_2_state", "What": "Variable", "defdec": "Def", - "display": "htim", + "display": "complementary_channel_2_state", "location": { - "column": "22", - "line": "6762", + "column": "31", + "line": "3219", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "htim", + "name": "complementary_channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@TIM_Base_SetConfig", + "ID": "c:@F@HAL_TIM_Encoder_Stop", "What": "Function", "defdec": "Def", - "display": "void TIM_Base_SetConfig(TIM_TypeDef *, const TIM_Base_InitTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "6", - "line": "6777", + "column": "19", + "line": "3308", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_Base_SetConfig", + "name": "HAL_TIM_Encoder_Stop", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@216627@F@TIM_Base_SetConfig@tmpcr1", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Encoder_Start_IT", + "What": "Function", "defdec": "Def", - "display": "tmpcr1", + "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "12", - "line": "6779", + "column": "19", + "line": "3368", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpcr1", + "name": "HAL_TIM_Encoder_Start_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_OC1_SetConfig", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@107707@F@HAL_TIM_Encoder_Start_IT@channel_1_state", + "What": "Variable", "defdec": "Def", - "display": "void TIM_OC1_SetConfig(TIM_TypeDef *, const TIM_OC_InitTypeDef *)", + "display": "channel_1_state", "location": { - "column": "13", - "line": "6829", + "column": "31", + "line": "3370", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_OC1_SetConfig", + "name": "channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@218106@F@TIM_OC1_SetConfig@tmpccmrx", + "ID": "c:stm32f4xx_hal_tim.c@107799@F@HAL_TIM_Encoder_Start_IT@channel_2_state", "What": "Variable", "defdec": "Def", - "display": "tmpccmrx", + "display": "channel_2_state", "location": { - "column": "12", - "line": "6831", + "column": "31", + "line": "3371", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmrx", + "name": "channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@218127@F@TIM_OC1_SetConfig@tmpccer", + "ID": "c:stm32f4xx_hal_tim.c@107891@F@HAL_TIM_Encoder_Start_IT@complementary_channel_1_state", "What": "Variable", "defdec": "Def", - "display": "tmpccer", + "display": "complementary_channel_1_state", "location": { - "column": "12", - "line": "6832", + "column": "31", + "line": "3372", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "complementary_channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@218147@F@TIM_OC1_SetConfig@tmpcr2", + "ID": "c:stm32f4xx_hal_tim.c@107999@F@HAL_TIM_Encoder_Start_IT@complementary_channel_2_state", "What": "Variable", "defdec": "Def", - "display": "tmpcr2", + "display": "complementary_channel_2_state", "location": { - "column": "12", - "line": "6833", + "column": "31", + "line": "3373", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpcr2", + "name": "complementary_channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:@F@TIM_OC2_SetConfig", + "ID": "c:@F@HAL_TIM_Encoder_Stop_IT", "What": "Function", "defdec": "Def", - "display": "void TIM_OC2_SetConfig(TIM_TypeDef *, const TIM_OC_InitTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "6", - "line": "6905", + "column": "19", + "line": "3468", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_OC2_SetConfig", + "name": "HAL_TIM_Encoder_Stop_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@220115@F@TIM_OC2_SetConfig@tmpccmrx", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Encoder_Start_DMA", + "What": "Function", "defdec": "Def", - "display": "tmpccmrx", + "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *, uint32_t, uint32_t *, uint32_t *, uint16_t)", "location": { - "column": "12", - "line": "6907", + "column": "19", + "line": "3533", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmrx", + "name": "HAL_TIM_Encoder_Start_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@220136@F@TIM_OC2_SetConfig@tmpccer", + "ID": "c:stm32f4xx_hal_tim.c@113567@F@HAL_TIM_Encoder_Start_DMA@channel_1_state", "What": "Variable", "defdec": "Def", - "display": "tmpccer", + "display": "channel_1_state", "location": { - "column": "12", - "line": "6908", + "column": "31", + "line": "3536", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@220156@F@TIM_OC2_SetConfig@tmpcr2", + "ID": "c:stm32f4xx_hal_tim.c@113659@F@HAL_TIM_Encoder_Start_DMA@channel_2_state", "What": "Variable", "defdec": "Def", - "display": "tmpcr2", + "display": "channel_2_state", "location": { - "column": "12", - "line": "6909", + "column": "31", + "line": "3537", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpcr2", + "name": "channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_OC3_SetConfig", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@113751@F@HAL_TIM_Encoder_Start_DMA@complementary_channel_1_state", + "What": "Variable", "defdec": "Def", - "display": "void TIM_OC3_SetConfig(TIM_TypeDef *, const TIM_OC_InitTypeDef *)", + "display": "complementary_channel_1_state", "location": { - "column": "13", - "line": "6981", + "column": "31", + "line": "3538", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_OC3_SetConfig", + "name": "complementary_channel_1_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@222175@F@TIM_OC3_SetConfig@tmpccmrx", + "ID": "c:stm32f4xx_hal_tim.c@113859@F@HAL_TIM_Encoder_Start_DMA@complementary_channel_2_state", "What": "Variable", "defdec": "Def", - "display": "tmpccmrx", + "display": "complementary_channel_2_state", "location": { - "column": "12", - "line": "6983", + "column": "31", + "line": "3539", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmrx", + "name": "complementary_channel_2_state", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@222196@F@TIM_OC3_SetConfig@tmpccer", - "What": "Variable", + "ID": "c:@F@HAL_TIM_Encoder_Stop_DMA", + "What": "Function", "defdec": "Def", - "display": "tmpccer", + "display": "HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "12", - "line": "6984", + "column": "19", + "line": "3746", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "HAL_TIM_Encoder_Stop_DMA", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@222216@F@TIM_OC3_SetConfig@tmpcr2", - "What": "Variable", + "ID": "c:@F@HAL_TIM_IRQHandler", + "What": "Function", "defdec": "Def", - "display": "tmpcr2", + "display": "void HAL_TIM_IRQHandler(TIM_HandleTypeDef *)", "location": { - "column": "12", - "line": "6985", + "column": "6", + "line": "3823", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpcr2", + "name": "HAL_TIM_IRQHandler", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_OC4_SetConfig", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@123164@F@HAL_TIM_IRQHandler@itsource", + "What": "Variable", "defdec": "Def", - "display": "void TIM_OC4_SetConfig(TIM_TypeDef *, const TIM_OC_InitTypeDef *)", + "display": "itsource", "location": { - "column": "13", - "line": "7056", + "column": "12", + "line": "3825", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_OC4_SetConfig", + "name": "itsource", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@224226@F@TIM_OC4_SetConfig@tmpccmrx", + "ID": "c:stm32f4xx_hal_tim.c@123208@F@HAL_TIM_IRQHandler@itflag", "What": "Variable", "defdec": "Def", - "display": "tmpccmrx", + "display": "itflag", "location": { "column": "12", - "line": "7058", + "line": "3826", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmrx", + "name": "itflag", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@224247@F@TIM_OC4_SetConfig@tmpccer", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OC_ConfigChannel", + "What": "Function", "defdec": "Def", - "display": "tmpccer", + "display": "HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *, const TIM_OC_InitTypeDef *, uint32_t)", "location": { - "column": "12", - "line": "7059", + "column": "19", + "line": "4041", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "HAL_TIM_OC_ConfigChannel", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@224267@F@TIM_OC4_SetConfig@tmpcr2", + "ID": "c:stm32f4xx_hal_tim.c@130107@F@HAL_TIM_OC_ConfigChannel@status", "What": "Variable", "defdec": "Def", - "display": "tmpcr2", + "display": "status", "location": { - "column": "12", - "line": "7060", + "column": "21", + "line": "4045", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpcr2", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_SlaveTimer_SetConfig", + "ID": "c:@F@HAL_TIM_IC_ConfigChannel", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *, const TIM_SlaveConfigTypeDef *)", + "display": "HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *, const TIM_IC_InitTypeDef *, uint32_t)", "location": { - "column": "26", - "line": "7117", + "column": "19", + "line": "4120", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_SlaveTimer_SetConfig", + "name": "HAL_TIM_IC_ConfigChannel", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@225796@F@TIM_SlaveTimer_SetConfig@status", + "ID": "c:stm32f4xx_hal_tim.c@132207@F@HAL_TIM_IC_ConfigChannel@status", "What": "Variable", "defdec": "Def", "display": "status", "location": { "column": "21", - "line": "7120", + "line": "4122", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, "name": "status", @@ -310350,321 +315388,321 @@ "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@225833@F@TIM_SlaveTimer_SetConfig@tmpsmcr", - "What": "Variable", + "ID": "c:@F@HAL_TIM_PWM_ConfigChannel", + "What": "Function", "defdec": "Def", - "display": "tmpsmcr", + "display": "HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *, const TIM_OC_InitTypeDef *, uint32_t)", "location": { - "column": "12", - "line": "7121", + "column": "19", + "line": "4219", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpsmcr", + "name": "HAL_TIM_PWM_ConfigChannel", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@225853@F@TIM_SlaveTimer_SetConfig@tmpccmr1", + "ID": "c:stm32f4xx_hal_tim.c@135275@F@HAL_TIM_PWM_ConfigChannel@status", "What": "Variable", "defdec": "Def", - "display": "tmpccmr1", + "display": "status", "location": { - "column": "12", - "line": "7122", + "column": "21", + "line": "4223", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmr1", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@225874@F@TIM_SlaveTimer_SetConfig@tmpccer", - "What": "Variable", + "ID": "c:@F@HAL_TIM_OnePulse_ConfigChannel", + "What": "Function", "defdec": "Def", - "display": "tmpccer", + "display": "HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *, TIM_OnePulse_InitTypeDef *, uint32_t, uint32_t)", "location": { - "column": "12", - "line": "7123", + "column": "19", + "line": "4333", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "HAL_TIM_OnePulse_ConfigChannel", "origin": "project_file", "scope": null }, { - "ID": "c:@F@TIM_TI1_SetConfig", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@138896@F@HAL_TIM_OnePulse_ConfigChannel@status", + "What": "Variable", "defdec": "Def", - "display": "void TIM_TI1_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", + "display": "status", "location": { - "column": "6", - "line": "7251", + "column": "21", + "line": "4336", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_TI1_SetConfig", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@230329@F@TIM_TI1_SetConfig@tmpccmr1", + "ID": "c:stm32f4xx_hal_tim.c@138933@F@HAL_TIM_OnePulse_ConfigChannel@temp1", "What": "Variable", "defdec": "Def", - "display": "tmpccmr1", + "display": "temp1", "location": { - "column": "12", - "line": "7254", + "column": "22", + "line": "4337", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmr1", + "name": "temp1", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@230350@F@TIM_TI1_SetConfig@tmpccer", - "What": "Variable", + "ID": "c:@F@HAL_TIM_DMABurst_WriteStart", + "What": "Function", "defdec": "Def", - "display": "tmpccer", + "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *, uint32_t, uint32_t, const uint32_t *, uint32_t)", "location": { - "column": "12", - "line": "7255", + "column": "19", + "line": "4481", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "HAL_TIM_DMABurst_WriteStart", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI1_ConfigInputStage", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@143648@F@HAL_TIM_DMABurst_WriteStart@status", + "What": "Variable", "defdec": "Def", - "display": "void TIM_TI1_ConfigInputStage(TIM_TypeDef *, uint32_t, uint32_t)", + "display": "status", "location": { - "column": "13", - "line": "7298", + "column": "21", + "line": "4485", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_TI1_ConfigInputStage", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@231671@F@TIM_TI1_ConfigInputStage@tmpccmr1", - "What": "Variable", + "ID": "c:@F@HAL_TIM_DMABurst_MultiWriteStart", + "What": "Function", "defdec": "Def", - "display": "tmpccmr1", + "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *, uint32_t, uint32_t, const uint32_t *, uint32_t, uint32_t)", "location": { - "column": "12", - "line": "7300", + "column": "19", + "line": "4534", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmr1", + "name": "HAL_TIM_DMABurst_MultiWriteStart", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@231692@F@TIM_TI1_ConfigInputStage@tmpccer", + "ID": "c:stm32f4xx_hal_tim.c@146034@F@HAL_TIM_DMABurst_MultiWriteStart@status", "What": "Variable", "defdec": "Def", - "display": "tmpccer", + "display": "status", "location": { - "column": "12", - "line": "7301", + "column": "21", + "line": "4538", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI2_SetConfig", + "ID": "c:@F@HAL_TIM_DMABurst_WriteStop", "What": "Function", "defdec": "Def", - "display": "void TIM_TI2_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "13", - "line": "7341", + "column": "19", + "line": "4718", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_TI2_SetConfig", + "name": "HAL_TIM_DMABurst_WriteStop", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@233438@F@TIM_TI2_SetConfig@tmpccmr1", + "ID": "c:stm32f4xx_hal_tim.c@151835@F@HAL_TIM_DMABurst_WriteStop@status", "What": "Variable", "defdec": "Def", - "display": "tmpccmr1", + "display": "status", "location": { - "column": "12", - "line": "7344", + "column": "21", + "line": "4720", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmr1", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@233459@F@TIM_TI2_SetConfig@tmpccer", - "What": "Variable", + "ID": "c:@F@HAL_TIM_DMABurst_ReadStart", + "What": "Function", "defdec": "Def", - "display": "tmpccer", + "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *, uint32_t, uint32_t, uint32_t *, uint32_t)", "location": { - "column": "12", - "line": "7345", + "column": "19", + "line": "4819", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "HAL_TIM_DMABurst_ReadStart", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI2_ConfigInputStage", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@155194@F@HAL_TIM_DMABurst_ReadStart@status", + "What": "Variable", "defdec": "Def", - "display": "void TIM_TI2_ConfigInputStage(TIM_TypeDef *, uint32_t, uint32_t)", + "display": "status", "location": { - "column": "13", - "line": "7381", + "column": "21", + "line": "4822", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_TI2_ConfigInputStage", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@234695@F@TIM_TI2_ConfigInputStage@tmpccmr1", - "What": "Variable", + "ID": "c:@F@HAL_TIM_DMABurst_MultiReadStart", + "What": "Function", "defdec": "Def", - "display": "tmpccmr1", + "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *, uint32_t, uint32_t, uint32_t *, uint32_t, uint32_t)", "location": { - "column": "12", - "line": "7383", + "column": "19", + "line": "4870", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmr1", + "name": "HAL_TIM_DMABurst_MultiReadStart", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@234716@F@TIM_TI2_ConfigInputStage@tmpccer", + "ID": "c:stm32f4xx_hal_tim.c@157559@F@HAL_TIM_DMABurst_MultiReadStart@status", "What": "Variable", "defdec": "Def", - "display": "tmpccer", + "display": "status", "location": { - "column": "12", - "line": "7384", + "column": "21", + "line": "4874", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI3_SetConfig", + "ID": "c:@F@HAL_TIM_DMABurst_ReadStop", "What": "Function", "defdec": "Def", - "display": "void TIM_TI3_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "13", - "line": "7424", + "column": "19", + "line": "5054", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_TI3_SetConfig", + "name": "HAL_TIM_DMABurst_ReadStop", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@236472@F@TIM_TI3_SetConfig@tmpccmr2", + "ID": "c:stm32f4xx_hal_tim.c@163334@F@HAL_TIM_DMABurst_ReadStop@status", "What": "Variable", "defdec": "Def", - "display": "tmpccmr2", + "display": "status", "location": { - "column": "12", - "line": "7427", + "column": "21", + "line": "5056", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmr2", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@236493@F@TIM_TI3_SetConfig@tmpccer", - "What": "Variable", + "ID": "c:@F@HAL_TIM_GenerateEvent", + "What": "Function", "defdec": "Def", - "display": "tmpccer", + "display": "HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "12", - "line": "7428", + "column": "19", + "line": "5137", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "HAL_TIM_GenerateEvent", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI4_SetConfig", + "ID": "c:@F@HAL_TIM_ConfigOCrefClear", "What": "Function", "defdec": "Def", - "display": "void TIM_TI4_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *, const TIM_ClearInputConfigTypeDef *, uint32_t)", "location": { - "column": "13", - "line": "7472", + "column": "19", + "line": "5174", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_TI4_SetConfig", + "name": "HAL_TIM_ConfigOCrefClear", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@238391@F@TIM_TI4_SetConfig@tmpccmr2", + "ID": "c:stm32f4xx_hal_tim.c@167043@F@HAL_TIM_ConfigOCrefClear@status", "What": "Variable", "defdec": "Def", - "display": "tmpccmr2", + "display": "status", "location": { - "column": "12", - "line": "7475", + "column": "21", + "line": "5178", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccmr2", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@238412@F@TIM_TI4_SetConfig@tmpccer", - "What": "Variable", + "ID": "c:@F@HAL_TIM_ConfigClockSource", + "What": "Function", "defdec": "Def", - "display": "tmpccer", + "display": "HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *, const TIM_ClockConfigTypeDef *)", "location": { - "column": "12", - "line": "7476", + "column": "19", + "line": "5304", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpccer", + "name": "HAL_TIM_ConfigClockSource", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@F@TIM_ITRx_SetConfig", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@170794@F@HAL_TIM_ConfigClockSource@status", + "What": "Variable", "defdec": "Def", - "display": "void TIM_ITRx_SetConfig(TIM_TypeDef *, uint32_t)", + "display": "status", "location": { - "column": "13", - "line": "7515", + "column": "21", + "line": "5306", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_ITRx_SetConfig", + "name": "status", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@239800@F@TIM_ITRx_SetConfig@tmpsmcr", + "ID": "c:stm32f4xx_hal_tim.c@170831@F@HAL_TIM_ConfigClockSource@tmpsmcr", "What": "Variable", "defdec": "Def", "display": "tmpsmcr", "location": { "column": "12", - "line": "7517", + "line": "5307", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, "name": "tmpsmcr", @@ -310672,1276 +315710,1276 @@ "scope": null }, { - "ID": "c:@F@TIM_ETR_SetConfig", + "ID": "c:@F@HAL_TIM_ConfigTI1Input", "What": "Function", "defdec": "Def", - "display": "void TIM_ETR_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "6", - "line": "7545", + "column": "19", + "line": "5458", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_ETR_SetConfig", + "name": "HAL_TIM_ConfigTI1Input", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@241199@F@TIM_ETR_SetConfig@tmpsmcr", + "ID": "c:stm32f4xx_hal_tim.c@176560@F@HAL_TIM_ConfigTI1Input@tmpcr2", "What": "Variable", "defdec": "Def", - "display": "tmpsmcr", + "display": "tmpcr2", "location": { "column": "12", - "line": "7548", + "line": "5460", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmpsmcr", + "name": "tmpcr2", "origin": "project_file", "scope": null }, { - "ID": "c:@F@TIM_CCxChannelCmd", + "ID": "c:@F@HAL_TIM_SlaveConfigSynchro", "What": "Function", "defdec": "Def", - "display": "void TIM_CCxChannelCmd(TIM_TypeDef *, uint32_t, uint32_t)", + "display": "HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *, const TIM_SlaveConfigTypeDef *)", "location": { - "column": "6", - "line": "7575", + "column": "19", + "line": "5490", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "TIM_CCxChannelCmd", + "name": "HAL_TIM_SlaveConfigSynchro", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_tim.c@242229@F@TIM_CCxChannelCmd@tmp", - "What": "Variable", + "ID": "c:@F@HAL_TIM_SlaveConfigSynchro_IT", + "What": "Function", "defdec": "Def", - "display": "tmp", + "display": "HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *, const TIM_SlaveConfigTypeDef *)", "location": { - "column": "12", - "line": "7577", + "column": "19", + "line": "5530", "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tmp", - "origin": "project_file", - "scope": null - }, - { - "ID": "c:stm32f4xx_hal_rcc.c@3773@macro@__MCO1_CLK_ENABLE", - "What": "MacroDef", - "defdec": "Def", - "display": "__MCO1_CLK_ENABLE", - "location": { - "column": "9", - "line": "87", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" - }, - "name": "__MCO1_CLK_ENABLE", + "name": "HAL_TIM_SlaveConfigSynchro_IT", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@3832@macro@MCO1_GPIO_PORT", - "What": "MacroDef", + "ID": "c:@F@HAL_TIM_ReadCapturedValue", + "What": "Function", "defdec": "Def", - "display": "MCO1_GPIO_PORT", + "display": "uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *, uint32_t)", "location": { - "column": "9", - "line": "88", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "10", + "line": "5573", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "MCO1_GPIO_PORT", + "name": "HAL_TIM_ReadCapturedValue", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@3868@macro@MCO1_PIN", - "What": "MacroDef", + "ID": "c:stm32f4xx_hal_tim.c@179985@F@HAL_TIM_ReadCapturedValue@tmpreg", + "What": "Variable", "defdec": "Def", - "display": "MCO1_PIN", + "display": "tmpreg", "location": { - "column": "9", - "line": "89", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "12", + "line": "5575", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "MCO1_PIN", + "name": "tmpreg", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@3910@macro@__MCO2_CLK_ENABLE", - "What": "MacroDef", + "ID": "c:@F@HAL_TIM_PeriodElapsedCallback", + "What": "Function", "defdec": "Def", - "display": "__MCO2_CLK_ENABLE", + "display": "void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "91", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "5657", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "__MCO2_CLK_ENABLE", + "name": "HAL_TIM_PeriodElapsedCallback", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@3969@macro@MCO2_GPIO_PORT", - "What": "MacroDef", + "ID": "c:@F@HAL_TIM_PeriodElapsedHalfCpltCallback", + "What": "Function", "defdec": "Def", - "display": "MCO2_GPIO_PORT", + "display": "void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "92", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "5672", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "MCO2_GPIO_PORT", + "name": "HAL_TIM_PeriodElapsedHalfCpltCallback", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@4006@macro@MCO2_PIN", - "What": "MacroDef", + "ID": "c:@F@HAL_TIM_OC_DelayElapsedCallback", + "What": "Function", "defdec": "Def", - "display": "MCO2_PIN", + "display": "void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *)", "location": { - "column": "9", - "line": "93", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "5687", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "MCO2_PIN", + "name": "HAL_TIM_OC_DelayElapsedCallback", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_RCC_DeInit", + "ID": "c:@F@HAL_TIM_IC_CaptureCallback", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_RCC_DeInit(void)", + "display": "void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *)", "location": { - "column": "26", - "line": "200", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "5702", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_RCC_DeInit", + "name": "HAL_TIM_IC_CaptureCallback", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_RCC_OscConfig", + "ID": "c:@F@HAL_TIM_IC_CaptureHalfCpltCallback", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *)", + "display": "void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *)", "location": { - "column": "26", - "line": "219", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "5717", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_RCC_OscConfig", + "name": "HAL_TIM_IC_CaptureHalfCpltCallback", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@10227@F@HAL_RCC_OscConfig@tickstart", - "What": "Variable", + "ID": "c:@F@HAL_TIM_PWM_PulseFinishedCallback", + "What": "Function", "defdec": "Def", - "display": "tickstart", + "display": "void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *)", "location": { - "column": "12", - "line": "221", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "5732", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tickstart", + "name": "HAL_TIM_PWM_PulseFinishedCallback", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@10249@F@HAL_RCC_OscConfig@pll_config", - "What": "Variable", + "ID": "c:@F@HAL_TIM_PWM_PulseFinishedHalfCpltCallback", + "What": "Function", "defdec": "Def", - "display": "pll_config", + "display": "void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *)", "location": { - "column": "12", - "line": "222", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "5747", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "pll_config", + "name": "HAL_TIM_PWM_PulseFinishedHalfCpltCallback", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@15686@F@HAL_RCC_OscConfig@pwrclkchanged", - "What": "Variable", + "ID": "c:@F@HAL_TIM_TriggerCallback", + "What": "Function", "defdec": "Def", - "display": "pwrclkchanged", + "display": "void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *)", "location": { - "column": "22", - "line": "391", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "5762", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "pwrclkchanged", + "name": "HAL_TIM_TriggerCallback", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@16015@F@HAL_RCC_OscConfig@tmpreg", - "What": "Variable", + "ID": "c:@F@HAL_TIM_TriggerHalfCpltCallback", + "What": "Function", "defdec": "Def", - "display": "tmpreg", + "display": "void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *)", "location": { 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"ID": "c:@F@HAL_TIM_DMABurstState", + "What": "Function", "defdec": "Def", - "display": "pllvco", + "display": "HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *)", "location": { - "column": "12", - "line": "888", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "30", + "line": "6434", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "pllvco", + "name": "HAL_TIM_DMABurstState", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc.c@34929@F@HAL_RCC_GetSysClockFreq@pllp", - "What": "Variable", + "ID": "c:@F@TIM_DMAError", + "What": "Function", "defdec": "Def", - "display": "pllp", + "display": "void TIM_DMAError(DMA_HandleTypeDef *)", "location": { - "column": "12", - "line": "889", - "path": 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"scope": null }, { - "ID": "c:@F@HAL_RCC_GetHCLKFreq", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMADelayPulseCplt", "What": "Function", "defdec": "Def", - "display": "uint32_t HAL_RCC_GetHCLKFreq(void)", + "display": "void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *)", "location": { - "column": "10", - "line": "943", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "13", + "line": "6502", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_RCC_GetHCLKFreq", + "name": "TIM_DMADelayPulseCplt", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_RCC_GetPCLK1Freq", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@209499@F@TIM_DMADelayPulseCplt@htim", + "What": "Variable", "defdec": "Def", - "display": "uint32_t HAL_RCC_GetPCLK1Freq(void)", + "display": "htim", "location": { - "column": "10", - "line": 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+ "name": "TIM_DMADelayPulseHalfCplt", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_RCC_GetOscConfig", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@210959@F@TIM_DMADelayPulseHalfCplt@htim", + "What": "Variable", "defdec": "Def", - "display": "void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *)", + "display": "htim", "location": { - "column": "13", - "line": "979", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "22", + "line": "6563", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_RCC_GetOscConfig", + "name": "htim", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_RCC_GetClockConfig", + "ID": "c:@F@TIM_DMACaptureCplt", "What": "Function", "defdec": "Def", - "display": "void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *, uint32_t *)", + "display": "void TIM_DMACaptureCplt(DMA_HandleTypeDef *)", "location": { "column": "6", - "line": "1058", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "line": "6600", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_RCC_GetClockConfig", + "name": "TIM_DMACaptureCplt", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_RCC_NMI_IRQHandler", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@211895@F@TIM_DMACaptureCplt@htim", + "What": "Variable", "defdec": "Def", - "display": "void HAL_RCC_NMI_IRQHandler(void)", + "display": "htim", "location": { - "column": "6", - "line": "1084", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc.c" + "column": "22", + "line": "6602", + "path": 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"c:stm32f4xx_hal_tim.c@213658@F@TIM_DMACaptureHalfCplt@htim", + "What": "Variable", "defdec": "Def", - "display": "PVD_MODE_IT", + "display": "htim", "location": { - "column": "9", - "line": "46", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "22", + "line": "6665", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "PVD_MODE_IT", + "name": "htim", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_pwr.c@1516@macro@PVD_MODE_EVT", - "What": "MacroDef", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMAPeriodElapsedCplt", + "What": "Function", "defdec": "Def", - "display": "PVD_MODE_EVT", + "display": "void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *)", "location": { - "column": "9", - "line": "47", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "13", + "line": "6702", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "PVD_MODE_EVT", + "name": "TIM_DMAPeriodElapsedCplt", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_pwr.c@1562@macro@PVD_RISING_EDGE", - "What": "MacroDef", + "ID": "c:stm32f4xx_hal_tim.c@214599@F@TIM_DMAPeriodElapsedCplt@htim", + "What": "Variable", "defdec": "Def", - "display": "PVD_RISING_EDGE", + "display": "htim", "location": { - "column": "9", - "line": "48", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "22", + "line": "6704", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "PVD_RISING_EDGE", + "name": "htim", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_pwr.c@1608@macro@PVD_FALLING_EDGE", - "What": "MacroDef", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMAPeriodElapsedHalfCplt", + "What": "Function", "defdec": "Def", - "display": "PVD_FALLING_EDGE", + "display": "void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *)", "location": { - "column": "9", - "line": "49", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "13", + "line": "6723", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "PVD_FALLING_EDGE", + "name": "TIM_DMAPeriodElapsedHalfCplt", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_DeInit", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@215159@F@TIM_DMAPeriodElapsedHalfCplt@htim", + "What": "Variable", "defdec": "Def", - "display": "void HAL_PWR_DeInit(void)", + "display": "htim", "location": { - "column": "6", - "line": "90", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "22", + "line": "6725", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_PWR_DeInit", + "name": "htim", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_EnableBkUpAccess", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_DMATriggerCplt", "What": "Function", "defdec": "Def", - "display": "void HAL_PWR_EnableBkUpAccess(void)", + "display": "void TIM_DMATriggerCplt(DMA_HandleTypeDef *)", "location": { - "column": "6", - "line": "108", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "13", + "line": "6739", + "path": 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"origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_EnablePVD", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@216627@F@TIM_Base_SetConfig@tmpcr1", + "What": "Variable", "defdec": "Def", - "display": "void HAL_PWR_EnablePVD(void)", + "display": "tmpcr1", "location": { - "column": "6", - "line": "318", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "12", + "line": "6779", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_PWR_EnablePVD", + "name": "tmpcr1", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_DisablePVD", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_OC1_SetConfig", "What": "Function", "defdec": "Def", - "display": "void HAL_PWR_DisablePVD(void)", + "display": "void TIM_OC1_SetConfig(TIM_TypeDef *, const TIM_OC_InitTypeDef *)", "location": { - "column": "6", - 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"name": "HAL_PWR_EnableWakeUpPin", + "name": "tmpccmrx", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_DisableWakeUpPin", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@218127@F@TIM_OC1_SetConfig@tmpccer", + "What": "Variable", "defdec": "Def", - "display": "void HAL_PWR_DisableWakeUpPin(uint32_t)", + "display": "tmpccer", "location": { - "column": "6", - "line": "359", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "12", + "line": "6832", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_PWR_DisableWakeUpPin", + "name": "tmpccer", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_EnterSLEEPMode", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@218147@F@TIM_OC1_SetConfig@tmpcr2", + "What": "Variable", "defdec": "Def", - "display": "void HAL_PWR_EnterSLEEPMode(uint32_t, uint8_t)", + "display": "tmpcr2", "location": { - "column": "6", - "line": "391", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "12", + "line": "6833", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_PWR_EnterSLEEPMode", + "name": "tmpcr2", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_EnterSTOPMode", + "ID": "c:@F@TIM_OC2_SetConfig", "What": "Function", "defdec": "Def", - "display": "void HAL_PWR_EnterSTOPMode(uint32_t, uint8_t)", + "display": "void TIM_OC2_SetConfig(TIM_TypeDef *, const TIM_OC_InitTypeDef *)", "location": { "column": "6", - "line": "445", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "line": "6905", + "path": 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"HAL_PWR_EnableSleepOnExit", + "name": "TIM_OC3_SetConfig", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_DisableSleepOnExit", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@222175@F@TIM_OC3_SetConfig@tmpccmrx", + "What": "Variable", "defdec": "Def", - "display": "void HAL_PWR_DisableSleepOnExit(void)", + "display": "tmpccmrx", "location": { - "column": "6", - "line": "553", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "12", + "line": "6983", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_PWR_DisableSleepOnExit", + "name": "tmpccmrx", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_EnableSEVOnPend", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@222196@F@TIM_OC3_SetConfig@tmpccer", + "What": "Variable", "defdec": "Def", - "display": "void HAL_PWR_EnableSEVOnPend(void)", + "display": "tmpccer", "location": { - "column": "6", - "line": "565", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "12", + "line": "6984", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_PWR_EnableSEVOnPend", + "name": "tmpccer", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWR_DisableSEVOnPend", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@222216@F@TIM_OC3_SetConfig@tmpcr2", + "What": "Variable", "defdec": "Def", - "display": "void HAL_PWR_DisableSEVOnPend(void)", + "display": "tmpcr2", "location": { - "column": "6", - "line": "577", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr.c" + "column": "12", + "line": "6985", + "path": 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"c:stm32f4xx_hal_rcc_ex.c@110484@F@HAL_RCCEx_PeriphCLKConfig@tickstart", + "ID": "c:stm32f4xx_hal_tim.c@224226@F@TIM_OC4_SetConfig@tmpccmrx", "What": "Variable", "defdec": "Def", - "display": "tickstart", + "display": "tmpccmrx", "location": { "column": "12", - "line": "2553", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_rcc_ex.c" + "line": "7058", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tickstart", + "name": "tmpccmrx", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_rcc_ex.c@110511@F@HAL_RCCEx_PeriphCLKConfig@tmpreg1", + "ID": "c:stm32f4xx_hal_tim.c@224247@F@TIM_OC4_SetConfig@tmpccer", "What": "Variable", "defdec": "Def", - "display": "tmpreg1", + "display": "tmpccer", "location": { "column": "12", - "line": "2554", - "path": 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"c:stm32f4xx_hal_pwr_ex.c@1495@macro@PWR_VOSRDY_TIMEOUT_VALUE", - "What": "MacroDef", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI3_SetConfig", + "What": "Function", "defdec": "Def", - "display": "PWR_VOSRDY_TIMEOUT_VALUE", + "display": "void TIM_TI3_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", "location": { - "column": "9", - "line": "44", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" + "column": "13", + "line": "7424", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "PWR_VOSRDY_TIMEOUT_VALUE", + "name": "TIM_TI3_SetConfig", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWREx_EnableBkUpReg", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@236472@F@TIM_TI3_SetConfig@tmpccmr2", + "What": "Variable", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)", + 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"e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tickstart", + "name": "tmpccer", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWREx_DisableBkUpReg", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_TI4_SetConfig", "What": "Function", "defdec": "Def", - "display": "HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)", + "display": "void TIM_TI4_SetConfig(TIM_TypeDef *, uint32_t, uint32_t, uint32_t)", "location": { - "column": "19", - "line": "165", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" + "column": "13", + "line": "7472", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_PWREx_DisableBkUpReg", + "name": "TIM_TI4_SetConfig", "origin": "project_file", "scope": null }, { - "ID": "c:stm32f4xx_hal_pwr_ex.c@7046@F@HAL_PWREx_DisableBkUpReg@tickstart", + "ID": "c:stm32f4xx_hal_tim.c@238391@F@TIM_TI4_SetConfig@tmpccmr2", "What": "Variable", "defdec": "Def", - "display": "tickstart", + "display": "tmpccmr2", "location": { "column": "12", - "line": "167", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" + "line": "7475", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "tickstart", + "name": "tmpccmr2", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWREx_EnableFlashPowerDown", - "What": "Function", + "ID": "c:stm32f4xx_hal_tim.c@238412@F@TIM_TI4_SetConfig@tmpccer", + "What": "Variable", "defdec": "Def", - "display": "void HAL_PWREx_EnableFlashPowerDown(void)", + "display": "tmpccer", "location": { - "column": "6", - "line": "189", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" + "column": "12", + "line": "7476", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - "name": "HAL_PWREx_EnableFlashPowerDown", + "name": "tmpccer", "origin": "project_file", "scope": null }, { - "ID": "c:@F@HAL_PWREx_DisableFlashPowerDown", + "ID": "c:stm32f4xx_hal_tim.c@F@TIM_ITRx_SetConfig", "What": "Function", "defdec": "Def", - "display": "void HAL_PWREx_DisableFlashPowerDown(void)", + "display": "void TIM_ITRx_SetConfig(TIM_TypeDef *, uint32_t)", "location": { - "column": "6", - "line": "198", - "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_pwr_ex.c" + "column": "13", + "line": "7515", + "path": "e:\\Users\\Mortal\\Desktop\\Train_Camp_PLSR\\PLSR\\PLSR\\Drivers\\STM32F4xx_HAL_Driver\\Src\\stm32f4xx_hal_tim.c" }, - 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b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part1.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part2.pbi b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part2.pbi index 7a129a0..778541a 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part2.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part2.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part3.pbi b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part3.pbi index 0c5333c..59d1787 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part3.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part3.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part4.pbi b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part4.pbi index c1c6008..4398dd6 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part4.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part4.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part6.pbi b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part6.pbi index 2dbbeba..76f60de 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part6.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part6.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part7.pbi b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part7.pbi index faa51a0..d5c7a14 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/test.1_part7.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/test.1_part7.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/tim.o b/PLSR/PLSR/EWARM/test.1/Obj/tim.o index a14c309..066a97d 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/tim.o and b/PLSR/PLSR/EWARM/test.1/Obj/tim.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/tim.pbi b/PLSR/PLSR/EWARM/test.1/Obj/tim.pbi index e6d40bc..2b937e6 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/tim.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/tim.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/tim.pbi.dep b/PLSR/PLSR/EWARM/test.1/Obj/tim.pbi.dep index a658a3c..c31bb53 100644 --- a/PLSR/PLSR/EWARM/test.1/Obj/tim.pbi.dep +++ b/PLSR/PLSR/EWARM/test.1/Obj/tim.pbi.dep @@ -1,38 +1,40 @@ -tim.pbi: E:\Software\IAR\arm\inc\c\DLib_float_setup.h \ - E:\Software\IAR\arm\inc\c\ycheck.h E:\Software\IAR\arm\inc\c\math.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h \ - E:\Software\IAR\arm\inc\c\ysizet.h E:\Software\IAR\arm\inc\c\stddef.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\mpu_armv7.h \ - E:\Software\IAR\arm\inc\c\iccarm_builtin.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_iccarm.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_compiler.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\cmsis_version.h \ - E:\Software\IAR\arm\inc\c\DLib_Product.h \ +tim.pbi: e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\tim.c \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\tim.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/main.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc\stm32f4xx_hal_conf.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_rcc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include\stm32f4xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\core_cm4.h \ + E:\Software\IAR\arm\inc\c\stdint.h E:\Software\IAR\arm\inc\c\ycheck.h \ + E:\Software\IAR\arm\inc\c\yvals.h \ E:\Software\IAR\arm\inc\c\DLib_Defaults.h \ - E:\Software\IAR\arm\inc\c\yvals.h E:\Software\IAR\arm\inc\c\stdint.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Include\core_cm4.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\stm32f4xx_hal_conf.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\main.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM\..\Core\Inc\tim.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\Core\Src\tim.c + E:\\Software\\IAR\\arm\\inc\\c\\DLib_Config_Full.h \ + E:\Software\IAR\arm\inc\c\DLib_Product.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_version.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/cmsis_compiler.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include\cmsis_iccarm.h \ + E:\Software\IAR\arm\inc\c\iccarm_builtin.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Include/mpu_armv7.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + E:\Software\IAR\arm\inc\c\stddef.h E:\Software\IAR\arm\inc\c\ysizet.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_gpio.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_exti.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_dma.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_cortex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_flash.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_pwr.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h \ + E:\Software\IAR\arm\inc\c\math.h \ + E:\Software\IAR\arm\inc\c\DLib_float_setup.h diff --git a/PLSR/PLSR/EWARM/test.1/Obj/ucos_ii.o b/PLSR/PLSR/EWARM/test.1/Obj/ucos_ii.o index fec73f4..3af329e 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/ucos_ii.o and b/PLSR/PLSR/EWARM/test.1/Obj/ucos_ii.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/ucos_ii.pbi b/PLSR/PLSR/EWARM/test.1/Obj/ucos_ii.pbi index 70552f2..08e842f 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/ucos_ii.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/ucos_ii.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/usart.o b/PLSR/PLSR/EWARM/test.1/Obj/usart.o index 1abc3cb..54fcd5a 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/usart.o and b/PLSR/PLSR/EWARM/test.1/Obj/usart.o differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/usart.pbi b/PLSR/PLSR/EWARM/test.1/Obj/usart.pbi index 54cf999..0d75a10 100644 Binary files a/PLSR/PLSR/EWARM/test.1/Obj/usart.pbi and b/PLSR/PLSR/EWARM/test.1/Obj/usart.pbi differ diff --git a/PLSR/PLSR/EWARM/test.1/Obj/usart.pbi.dep b/PLSR/PLSR/EWARM/test.1/Obj/usart.pbi.dep index 0429c96..a3c0aff 100644 --- a/PLSR/PLSR/EWARM/test.1/Obj/usart.pbi.dep +++ b/PLSR/PLSR/EWARM/test.1/Obj/usart.pbi.dep @@ -36,4 +36,13 @@ usart.pbi: \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_tim.h \ e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \ - e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Drivers/STM32F4xx_HAL_Driver/Inc\stm32f4xx_hal_uart.h \ + E:\Software\IAR\arm\inc\c\stdio.h E:\Software\IAR\arm\inc\c\string.h \ + E:\Software\IAR\arm\inc\c\DLib_Product_string.h \ + E:\Software\IAR\arm\inc\c\ctype.h E:\Software\IAR\arm\inc\c\stdlib.h \ + E:\Software\IAR\arm\inc\c\DLib_Product_stdlib.h \ + E:\Software\IAR\arm\inc\c\stdarg.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_crc.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/flash_save.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/usart.h \ + e:\Users\Mortal\Desktop\Train_Camp_PLSR\PLSR\PLSR\EWARM/../Core/Inc/modbus_log.h diff --git a/PLSR/PLSR/UCOS/Config/app_cfg.h b/PLSR/PLSR/UCOS/Config/app_cfg.h index 6e4b57e..38243cc 100644 --- a/PLSR/PLSR/UCOS/Config/app_cfg.h +++ b/PLSR/PLSR/UCOS/Config/app_cfg.h @@ -21,7 +21,7 @@ ********************************************************************************************************* */ #define APP_CFG_STARTUP_TASK_PRIO 3u -#define APP_CFG_LED_TASK_PRIO 4u +#define APP_CFG_MODBUS_TASK_PRIO 4u #define APP_CFG_KEY_TASK_PRIO 5u #define OS_TASK_TMR_PRIO (OS_LOWEST_PRIO - 2u) @@ -32,8 +32,8 @@ ********************************************************************************************************* */ #define APP_CFG_STARTUP_TASK_STK_SIZE 256u -#define APP_CFG_LED_TASK_STK_SIZE 128u -#define APP_CFG_KEY_TASK_STK_SIZE 128u +#define APP_CFG_MODBUS_TASK_STK_SIZE 256u +#define APP_CFG_KEY_TASK_STK_SIZE 256u /* ********************************************************************************************************* diff --git a/PLSR/PLSR_测试示例.c b/PLSR/PLSR_测试示例.c deleted file mode 100644 index f640e9c..0000000 --- a/PLSR/PLSR_测试示例.c +++ /dev/null @@ -1,330 +0,0 @@ -/** - * @file PLSR_测试示例.c - * @brief PLSR脉冲输出控制系统测试示例 - * @version V2.0 - * @date 2025-01 - * - * 本文件提供了PLSR系统的基本使用示例，包括： - * 1. 系统初始化 - * 2. 多段脉冲配置 - * 3. 不同等待条件的使用 - * 4. 运行时控制和监控 - */ - -#include "tim.h" -#include "main.h" - -// 外部全局变量声明 -extern PLSR_RouteConfig_t g_plsr_route; -extern uint32_t g_plsr_system_tick; - -/** - * @brief PLSR系统初始化示例 - * @retval None - */ -void PLSR_Example_Init(void) -{ - // 1. 初始化PWM和计数器 - PLSR_PWM_Init(); - - // 2. 配置TIM6更新频率为1ms (1000微秒) - PLSR_TIM6_SetUpdateFreq(1000); - - // 3. 初始化路径配置 - PLSR_Route_Init(&g_plsr_route); - - printf("PLSR系统初始化完成\r\n"); -} - -/** - * @brief 基本两段脉冲输出示例 - * @retval None - */ -void PLSR_Example_TwoSection(void) -{ - // 设置路径基本参数 - g_plsr_route.start_freq = 1000; // 起始频率1kHz - g_plsr_route.end_freq = 0; // 结束频率0Hz - g_plsr_route.mode = PLSR_MODE_RELATIVE; // 相对模式 - g_plsr_route.direction = PLSR_DIR_FORWARD; // 正向 - g_plsr_route.output_port = 1; // 输出端口1 - - // 配置第1段：加速到5kHz，发送10000个脉冲 - g_plsr_route.section[0].section_num = 1; - g_plsr_route.section[0].target_freq = 5000; // 目标频率5kHz - g_plsr_route.section[0].target_pulse = 10000; // 目标脉冲10000个 - g_plsr_route.section[0].next_section = 2; // 下一段为第2段 - - // 第1段加减速配置 - g_plsr_route.section[0].accel_config.accel_time_ms = 2000; // 加速时间2s - g_plsr_route.section[0].accel_config.decel_time_ms = 1500; // 减速时间1.5s - g_plsr_route.section[0].accel_config.accel_algorithm = PLSR_ACCEL_CURVE; // S曲线 - - // 第1段等待条件：脉冲结束后立即切换 - g_plsr_route.section[0].wait_condition.wait_type = PLSR_WAIT_PLUSEEND; - - // 配置第2段：减速到3kHz，发送5000个脉冲 - g_plsr_route.section[1].section_num = 2; - g_plsr_route.section[1].target_freq = 3000; // 目标频率3kHz - g_plsr_route.section[1].target_pulse = 5000; // 目标脉冲5000个 - g_plsr_route.section[1].next_section = 0; // 结束(下一段为0) - - // 第2段加减速配置 - g_plsr_route.section[1].accel_config.accel_time_ms = 1000; // 加速时间1s - g_plsr_route.section[1].accel_config.decel_time_ms = 2000; // 减速时间2s - g_plsr_route.section[1].accel_config.accel_algorithm = PLSR_ACCEL_LINEAR; // 线性 - - // 第2段等待条件：等待500ms后切换 - g_plsr_route.section[1].wait_condition.wait_type = PLSR_WAIT_TIME; - g_plsr_route.section[1].wait_condition.wait_time_ms = 500; - - // 启动路径执行 - PLSR_Route_Start(&g_plsr_route); - - printf("两段脉冲输出启动\r\n"); -} - -/** - * @brief 复杂多段脉冲输出示例（包含各种等待条件） - * @retval None - */ -void PLSR_Example_MultiSection(void) -{ - // 设置路径基本参数 - g_plsr_route.start_freq = 500; // 起始频率500Hz - g_plsr_route.end_freq = 0; // 结束频率0Hz - g_plsr_route.mode = PLSR_MODE_ABSOLUTE; // 绝对模式 - g_plsr_route.direction = PLSR_DIR_FORWARD; // 正向 - - // 第1段：基本加速段 - g_plsr_route.section[0].section_num = 1; - g_plsr_route.section[0].target_freq = 2000; - g_plsr_route.section[0].target_pulse = 5000; - g_plsr_route.section[0].next_section = 2; - g_plsr_route.section[0].accel_config.accel_time_ms = 1500; - g_plsr_route.section[0].accel_config.decel_time_ms = 1000; - g_plsr_route.section[0].accel_config.accel_algorithm = PLSR_ACCEL_SINE; - g_plsr_route.section[0].wait_condition.wait_type = PLSR_WAIT_PLUSEEND; - - // 第2段：等待时间条件 - g_plsr_route.section[1].section_num = 2; - g_plsr_route.section[1].target_freq = 4000; - g_plsr_route.section[1].target_pulse = 12000; - g_plsr_route.section[1].next_section = 3; - g_plsr_route.section[1].accel_config.accel_time_ms = 2000; - g_plsr_route.section[1].accel_config.decel_time_ms = 1500; - g_plsr_route.section[1].accel_config.accel_algorithm = PLSR_ACCEL_CURVE; - g_plsr_route.section[1].wait_condition.wait_type = PLSR_WAIT_TIME; - g_plsr_route.section[1].wait_condition.wait_time_ms = 1000; // 等待1秒 - - // 第3段：ACT时间条件 - g_plsr_route.section[2].section_num = 3; - g_plsr_route.section[2].target_freq = 3000; - g_plsr_route.section[2].target_pulse = 18000; - g_plsr_route.section[2].next_section = 4; - g_plsr_route.section[2].accel_config.accel_time_ms = 1000; - g_plsr_route.section[2].accel_config.decel_time_ms = 2000; - g_plsr_route.section[2].accel_config.accel_algorithm = PLSR_ACCEL_LINEAR; - g_plsr_route.section[2].wait_condition.wait_type = PLSR_WAIT_ACT_TIME; - g_plsr_route.section[2].wait_condition.act_time_ms = 3000; // ACT时间3秒 - - // 第4段：外部事件条件 - g_plsr_route.section[3].section_num = 4; - g_plsr_route.section[3].target_freq = 1500; - g_plsr_route.section[3].target_pulse = 22000; - g_plsr_route.section[3].next_section = 0; // 结束 - g_plsr_route.section[3].accel_config.accel_time_ms = 1500; - g_plsr_route.section[3].accel_config.decel_time_ms = 2500; - g_plsr_route.section[3].accel_config.accel_algorithm = PLSR_ACCEL_CURVE; - g_plsr_route.section[3].wait_condition.wait_type = PLSR_WAIT_EXT_EVENT; - - // 启动路径执行 - PLSR_Route_Start(&g_plsr_route); - - printf("多段脉冲输出启动\r\n"); -} - -/** - * @brief 运行时控制示例 - * @retval None - */ -void PLSR_Example_RuntimeControl(void) -{ - // 检查运行状态 - if (PLSR_Route_IsRunning(&g_plsr_route)) { - printf("路径正在运行中...\r\n"); - - // 获取当前状态信息 - uint8_t current_section = g_plsr_route.current_section_num; - uint32_t current_pulse = g_plsr_route.pulse_count; - uint32_t current_freq = PLSR_PWM_GetFrequency(); - PLSR_RunState_t run_state = g_plsr_route.run_state; - - printf("当前段号: %d\r\n", current_section); - printf("当前脉冲: %lu\r\n", current_pulse); - printf("当前频率: %lu Hz\r\n", current_freq); - printf("运行状态: %d\r\n", run_state); - - // 根据需要触发外部事件 - static uint32_t last_trigger_time = 0; - if (g_plsr_system_tick - last_trigger_time > 5000) { // 5秒触发一次 - PLSR_SetExtEvent(1); - last_trigger_time = g_plsr_system_tick; - printf("外部事件已触发\r\n"); - } - - // 在第2段时设置条件标志 - if (current_section == 2 && current_pulse > 8000) { - PLSR_SetSectionCondition(&g_plsr_route, 2, 1); - printf("段条件标志已设置\r\n"); - } - } else { - printf("路径已停止\r\n"); - } -} - -/** - * @brief 紧急停止示例 - * @retval None - */ -void PLSR_Example_EmergencyStop(void) -{ - if (PLSR_Route_IsRunning(&g_plsr_route)) { - PLSR_Route_Stop(&g_plsr_route); - printf("紧急停止执行\r\n"); - } -} - -/** - * @brief 路径重置示例 - * @retval None - */ -void PLSR_Example_Reset(void) -{ - PLSR_Route_Reset(&g_plsr_route); - printf("路径已重置\r\n"); -} - -/** - * @brief 系统状态监控示例 - * @retval None - */ -void PLSR_Example_StatusMonitor(void) -{ - static uint32_t last_monitor_time = 0; - - // 每1秒监控一次 - if (g_plsr_system_tick - last_monitor_time >= 1000) { - last_monitor_time = g_plsr_system_tick; - - printf("=== PLSR系统状态监控 ===\r\n"); - printf("系统时钟: %lu ms\r\n", g_plsr_system_tick); - printf("路径状态: %d\r\n", g_plsr_route.route_state); - printf("运行状态: %d\r\n", g_plsr_route.run_state); - printf("当前段号: %d\r\n", g_plsr_route.current_section_num); - printf("当前频率: %lu Hz\r\n", g_plsr_route.current_freq); - printf("目标频率: %lu Hz\r\n", g_plsr_route.target_freq); - printf("脉冲计数: %lu\r\n", g_plsr_route.pulse_count); - printf("PWM运行: %s\r\n", PLSR_PWM_IsRunning() ? "是" : "否"); - printf("TIM6频率: %lu us\r\n", PLSR_TIM6_GetUpdateFreq()); - printf("========================\r\n"); - } -} - -/** - * @brief 主测试函数 - * @retval None - */ -void PLSR_Example_Main(void) -{ - static uint8_t test_stage = 0; - static uint32_t stage_start_time = 0; - - switch (test_stage) { - case 0: // 初始化阶段 - PLSR_Example_Init(); - test_stage = 1; - stage_start_time = g_plsr_system_tick; - break; - - case 1: // 等待2秒后启动基本测试 - if (g_plsr_system_tick - stage_start_time > 2000) { - PLSR_Example_TwoSection(); - test_stage = 2; - stage_start_time = g_plsr_system_tick; - } - break; - - case 2: // 运行时监控 - PLSR_Example_RuntimeControl(); - PLSR_Example_StatusMonitor(); - - // 如果路径完成，等待5秒后启动复杂测试 - if (!PLSR_Route_IsRunning(&g_plsr_route)) { - if (g_plsr_system_tick - stage_start_time > 5000) { - PLSR_Example_Reset(); - PLSR_Example_MultiSection(); - test_stage = 3; - stage_start_time = g_plsr_system_tick; - } - } - break; - - case 3: // 复杂测试监控 - PLSR_Example_RuntimeControl(); - PLSR_Example_StatusMonitor(); - - // 测试完成后重置 - if (!PLSR_Route_IsRunning(&g_plsr_route)) { - if (g_plsr_system_tick - stage_start_time > 3000) { - PLSR_Example_Reset(); - test_stage = 1; // 循环测试 - stage_start_time = g_plsr_system_tick; - } - } - break; - - default: - test_stage = 0; - break; - } -} - -/** - * @brief 按键控制示例（可在按键中断中调用） - * @param key_num: 按键编号 - * @retval None - */ -void PLSR_Example_KeyControl(uint8_t key_num) -{ - switch (key_num) { - case 1: // 按键1：启动基本测试 - PLSR_Example_Reset(); - PLSR_Example_TwoSection(); - break; - - case 2: // 按键2：启动复杂测试 - PLSR_Example_Reset(); - PLSR_Example_MultiSection(); - break; - - case 3: // 按键3：触发外部事件 - PLSR_SetExtEvent(1); - break; - - case 4: // 按键4：紧急停止 - PLSR_Example_EmergencyStop(); - break; - - default: - break; - } -} - -/* 使用说明： - * 1. 在main函数的主循环中调用 PLSR_Example_Main() - * 2. 在按键中断中调用 PLSR_Example_KeyControl(key_num) - * 3. 确保TIM6中断正常工作 - * 4. 根据实际硬件调整PWM输出引脚配置 - * 5. 根据需要修改测试参数 - */ \ No newline at end of file diff --git a/PLSR/PLSR_系统使用说明_V2.md b/PLSR/PLSR_系统使用说明_V2.md deleted file mode 100644 index bb8aa25..0000000 --- a/PLSR/PLSR_系统使用说明_V2.md +++ /dev/null @@ -1,317 +0,0 @@ -# PLSR脉冲输出控制系统使用说明 V2.0 - -## 系统概述 - -PLSR（脉冲输出指令）系统是基于STM32 HAL库和UCOSII实时操作系统的多段脉冲输出控制系统，兼容信捷PLC的PLSR指令规范。系统支持10段独立配置的脉冲输出，每段可设置不同的频率、脉冲数、加减速算法和等待条件。 - -## 硬件配置 - -### 定时器配置 -- **TIM10**: PWM脉冲输出定时器，输出频率可动态调整 -- **TIM2**: 脉冲计数定时器，对TIM10的PWM输出进行计数 -- **TIM6**: 系统控制定时器，用于加减速控制和段切换，更新频率可配置 - -### 引脚配置 -- PWM输出引脚：根据TIM10配置确定 -- 方向控制引脚：可选配置 -- 外部事件输入引脚：可选配置 - -## 核心数据结构 - -### 1. 等待条件结构体 (PLSR_WaitCondition_t) -```c -typedef struct { - PLSR_WaitType_t wait_type; // 等待条件类型 - uint32_t wait_time_ms; // 等待时间(ms) - uint32_t act_time_ms; // ACT时间(ms) - uint8_t condition_flag; // 条件标志 - uint8_t ext_event_flag; // 外部事件标志 -} PLSR_WaitCondition_t; -``` - -### 2. 加减速配置结构体 (PLSR_AccelConfig_t) -```c -typedef struct { - uint32_t accel_time_ms; // 加速时间(ms) - uint32_t decel_time_ms; // 减速时间(ms) - PLSR_AccelAlgorithm_t accel_algorithm; // 加减速算法 -} PLSR_AccelConfig_t; -``` - -### 3. 段配置结构体 (PLSR_SectionConfig_t) -```c -typedef struct { - uint8_t section_num; // 段号(1-10) - uint32_t target_freq; // 目标频率(Hz) - uint32_t target_pulse; // 目标脉冲数 - uint8_t next_section; // 下一段号(0表示结束) - PLSR_SectionState_t section_state; // 段状态 - PLSR_AccelConfig_t accel_config; // 加减速配置 - PLSR_WaitCondition_t wait_condition; // 等待条件 -} PLSR_SectionConfig_t; -``` - -### 4. 路径控制结构体 (PLSR_RouteConfig_t) -```c -typedef struct { - PLSR_RouteState_t route_state; // 路径状态 - uint8_t current_section_num; // 当前段号 - uint32_t current_freq; // 当前频率 - uint32_t target_freq; // 目标频率 - uint32_t pulse_count; // 当前脉冲计数 - uint32_t start_freq; // 起始频率 - uint32_t end_freq; // 结束频率 - uint8_t output_port; // 输出端口选择 - PLSR_Mode_t mode; // 模式(相对/绝对) - PLSR_Direction_t direction; // 方向 - - // 运行状态参数 - PLSR_RunState_t run_state; // 运行状态 - uint32_t accel_step_count; // 加速步数计数 - uint32_t decel_step_count; // 减速步数计数 - uint32_t const_pulse_count; // 匀速脉冲计数 - uint32_t freq_step; // 频率步长 - uint32_t wait_start_tick; // 等待开始时间 - uint32_t act_start_tick; // ACT开始时间 - - PLSR_SectionConfig_t section[PLSR_MAX_SECTIONS]; // 段配置数组 -} PLSR_RouteConfig_t; -``` - -## 等待条件类型详解 - -### 1. PLSR_WAIT_PLUSEEND -- **功能**: 脉冲发送完成后立即切换到下一段 -- **使用场景**: 标准的段切换模式 -- **特点**: 不需要额外等待时间 - -### 2. PLSR_WAIT_TIME -- **功能**: 等待指定时间后切换段 -- **逻辑**: - - 如果等待时间先到达，脉冲发送完成后立即切换 - - 如果脉冲先发送完成，等待时间到达后切换 -- **默认时间**: 200ms - -### 3. PLSR_WAIT_CONDITION -- **功能**: 等待外部条件标志后切换段 -- **逻辑**: 与WAIT_TIME类似，但等待的是条件标志 -- **控制方式**: 通过`PLSR_SetSectionCondition()`设置 - -### 4. PLSR_WAIT_ACT_TIME -- **功能**: ACT时间控制段切换 -- **特殊逻辑**: - - ACT时间短：在加速段时直接切换到下一段 - - ACT时间长：在减速段时直接切换到下一段 - - ACT时间很长：等待当前段完成后再等待ACT时间 -- **默认时间**: 200ms - -### 5. PLSR_WAIT_EXT_EVENT -- **功能**: 等待外部事件触发 -- **控制方式**: 通过`PLSR_SetExtEvent()`设置 -- **特点**: 不触发则一直等待 - -### 6. PLSR_WAIT_EXT_OR_END -- **功能**: 外部事件或脉冲结束，任一条件满足即切换 -- **特点**: 提供更灵活的切换控制 - -## 运行模式说明 - -### 相对模式 (PLSR_MODE_RELATIVE) -- **脉冲数含义**: 相对于上一段的脉冲增量 -- **计算方式**: 直接使用配置的target_pulse值 -- **适用场景**: 增量式运动控制 - -### 绝对模式 (PLSR_MODE_ABSOLUTE) -- **脉冲数含义**: 绝对位置坐标 -- **计算方式**: target_pulse - current_pulse_count -- **适用场景**: 位置式运动控制 - -## 加减速算法 - -### 1. 线性加减速 (PLSR_ACCEL_LINEAR) -- **特点**: 频率线性变化 -- **公式**: freq = start_freq + (target_freq - start_freq) * progress -- **适用**: 简单应用场景 - -### 2. 曲线加减速 (PLSR_ACCEL_CURVE) -- **特点**: S型曲线，平滑过渡 -- **公式**: f(x) = 3x² - 2x³ -- **适用**: 需要平滑启停的场景 - -### 3. 正弦加减速 (PLSR_ACCEL_SINE) -- **特点**: 基于正弦函数的平滑变化 -- **公式**: f(x) = sin(π/2 * x) -- **适用**: 高精度平滑控制 - -## 系统使用流程 - -### 1. 系统初始化 -```c -// 初始化PWM和计数器 -PLSR_PWM_Init(); - -// 配置TIM6更新频率(微秒) -PLSR_TIM6_SetUpdateFreq(1000); // 1ms更新频率 - -// 初始化路径配置 -PLSR_Route_Init(&g_plsr_route); -``` - -### 2. 路径参数配置 -```c -// 设置基本参数 -g_plsr_route.start_freq = 1000; // 起始频率1kHz -g_plsr_route.end_freq = 0; // 结束频率0Hz -g_plsr_route.mode = PLSR_MODE_RELATIVE; // 相对模式 -g_plsr_route.direction = PLSR_DIR_FORWARD; // 正向 -``` - -### 3. 段参数配置示例 -```c -// 配置第1段 -g_plsr_route.section[0].target_freq = 5000; // 目标频率5kHz -g_plsr_route.section[0].target_pulse = 10000; // 目标脉冲10000个 -g_plsr_route.section[0].next_section = 2; // 下一段为第2段 -g_plsr_route.section[0].accel_config.accel_time_ms = 2000; // 加速时间2s -g_plsr_route.section[0].accel_config.decel_time_ms = 1500; // 减速时间1.5s -g_plsr_route.section[0].accel_config.accel_algorithm = PLSR_ACCEL_CURVE; // S曲线 -g_plsr_route.section[0].wait_condition.wait_type = PLSR_WAIT_PLUSEEND; // 脉冲结束切换 - -// 配置第2段 -g_plsr_route.section[1].target_freq = 3000; // 目标频率3kHz -g_plsr_route.section[1].target_pulse = 5000; // 目标脉冲5000个 -g_plsr_route.section[1].next_section = 0; // 结束(下一段为0) -g_plsr_route.section[1].wait_condition.wait_type = PLSR_WAIT_TIME; -g_plsr_route.section[1].wait_condition.wait_time_ms = 500; // 等待500ms -``` - -### 4. 启动路径执行 -```c -// 启动路径执行 -PLSR_Route_Start(&g_plsr_route); - -// 检查运行状态 -if (PLSR_Route_IsRunning(&g_plsr_route)) { - // 路径正在执行 -} -``` - -### 5. 运行时控制 -```c -// 设置外部事件 -PLSR_SetExtEvent(1); - -// 设置段条件标志 -PLSR_SetSectionCondition(&g_plsr_route, 2, 1); - -// 获取当前脉冲计数 -uint32_t current_pulse = PLSR_Counter_GetCount(); - -// 获取当前PWM频率 -uint32_t current_freq = PLSR_PWM_GetFrequency(); - -// 停止路径执行 -PLSR_Route_Stop(&g_plsr_route); -``` - -## 状态机说明 - -### 路径状态 (PLSR_RouteState_t) -- **PLSR_ROUTE_IDLE**: 空闲状态 -- **PLSR_ROUTE_RUNNING**: 运行状态 -- **PLSR_ROUTE_COMPLETED**: 完成状态 -- **PLSR_ROUTE_ERROR**: 错误状态 - -### 运行状态 (PLSR_RunState_t) -- **PLSR_STATE_IDLE**: 空闲状态 -- **PLSR_STATE_ACCEL**: 加速状态 -- **PLSR_STATE_CONST**: 匀速状态 -- **PLSR_STATE_DECEL**: 减速状态 -- **PLSR_STATE_WAIT**: 等待状态 -- **PLSR_STATE_STOP**: 停止状态 - -### 段状态 (PLSR_SectionState_t) -- **PLSR_SECTION_IDLE**: 段空闲 -- **PLSR_SECTION_RUNNING**: 段运行中 -- **PLSR_SECTION_COMPLETED**: 段完成 - -## 中断处理 - -### TIM6中断回调 -```c -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) -{ - if (htim->Instance == TIM6) { - // PLSR路径控制处理 - PLSR_Route_Process(&g_plsr_route); - - // 系统时钟递增 - g_plsr_system_tick++; - } -} -``` - -## 调试和监控 - -### 状态监控函数 -```c -// 获取系统时钟 -uint32_t tick = PLSR_GetSystemTick(); - -// 获取当前段号 -uint8_t section = g_plsr_route.current_section_num; - -// 获取运行状态 -PLSR_RunState_t state = g_plsr_route.run_state; - -// 获取脉冲计数 -uint32_t pulse = g_plsr_route.pulse_count; -``` - -### 调试建议 -1. 使用串口输出关键状态信息 -2. 监控段切换过程 -3. 检查等待条件的触发时机 -4. 验证加减速曲线的平滑性 - -## 注意事项 - -1. **频率范围**: PWM频率建议在1Hz-100kHz范围内 -2. **TIM6频率**: 建议设置为1ms，过快会增加CPU负担 -3. **段号管理**: 段号从1开始，0表示结束 -4. **内存管理**: 结构体较大，注意栈空间使用 -5. **中断优先级**: 确保TIM6中断优先级适当 -6. **线程安全**: 在多线程环境下注意数据保护 - -## 常见问题 - -### Q1: 脉冲输出不稳定 -**A**: 检查TIM6更新频率设置，建议不要设置过快 - -### Q2: 段切换不正常 -**A**: 检查next_section设置和等待条件配置 - -### Q3: 加减速不平滑 -**A**: 调整加减速时间或选择合适的算法 - -### Q4: 外部事件不响应 -**A**: 确认外部事件标志设置正确 - -## 版本信息 - -- **版本**: V2.0 -- **更新日期**: 2025年1月 -- **兼容性**: STM32 HAL库, UCOSII, 信捷PLC PLSR指令 -- **作者**: AI Assistant - -## 技术支持 - -如有技术问题，请检查： -1. 硬件连接是否正确 -2. 定时器配置是否匹配 -3. 中断是否正常触发 -4. 参数配置是否合理 - ---- - -**注意**: 本文档基于重构后的PLSR系统V2.0版本，与之前版本不兼容。使用前请仔细阅读并理解各个功能模块的工作原理。 \ No newline at end of file diff --git a/PLSR/项目重构总结.md b/PLSR/项目重构总结.md deleted file mode 100644 index 5a82af2..0000000 --- a/PLSR/项目重构总结.md +++ /dev/null @@ -1,415 +0,0 @@ -# PLSR脉冲输出控制系统重构总结 - -## 项目概述 - -本项目对原有的PLSR（脉冲输出指令）系统进行了全面重构，以符合信捷PLC的PLSR指令规范，并基于STM32 HAL库和UCOSII实时操作系统实现了完整的多段脉冲输出控制功能。 - -## 重构目标 - -1. **兼容信捷PLC PLSR指令规范** -2. **实现多段脉冲输出控制**（最多10段） -3. **支持多种加减速算法**（线性、曲线、正弦） -4. **提供灵活的等待条件控制**（6种等待类型） -5. **支持相对和绝对两种运行模式** -6. **模块化设计，便于维护和扩展** - -## 核心技术架构 - -### 硬件资源配置 -- **TIM10**: PWM脉冲输出定时器 -- **TIM2**: 脉冲计数定时器（对TIM10输出计数） -- **TIM6**: 系统控制定时器（加减速控制和段切换） - -### 软件架构层次 -``` -应用层 (Application Layer) -├── 用户配置接口 -├── 状态监控接口 -└── 控制命令接口 - -控制层 (Control Layer) -├── 路径控制模块 (Route Control) -├── 段控制模块 (Section Control) -├── 加减速控制模块 (Acceleration Control) -└── 等待条件处理模块 (Wait Condition) - -驱动层 (Driver Layer) -├── PWM输出控制 -├── 脉冲计数控制 -└── 定时器中断处理 -``` - -## 重构内容详解 - -### 1. 数据结构重新设计 - -#### 原有问题 -- 结构体命名不规范 -- 变量定义不清晰 -- 缺少必要的状态管理 - -#### 重构方案 -```c -// 等待条件结构体 -typedef struct { - PLSR_WaitType_t wait_type; // 等待条件类型 - uint32_t wait_time_ms; // 等待时间(ms) - uint32_t act_time_ms; // ACT时间(ms) - uint8_t condition_flag; // 条件标志 - uint8_t ext_event_flag; // 外部事件标志 -} PLSR_WaitCondition_t; - -// 加减速配置结构体 -typedef struct { - uint32_t accel_time_ms; // 加速时间(ms) - uint32_t decel_time_ms; // 减速时间(ms) - PLSR_AccelAlgorithm_t accel_algorithm; // 加减速算法 -} PLSR_AccelConfig_t; - -// 段配置结构体 -typedef struct { - uint8_t section_num; // 段号(1-10) - uint32_t target_freq; // 目标频率(Hz) - uint32_t target_pulse; // 目标脉冲数 - uint8_t next_section; // 下一段号(0表示结束) - PLSR_SectionState_t section_state; // 段状态 - PLSR_AccelConfig_t accel_config; // 加减速配置 - PLSR_WaitCondition_t wait_condition; // 等待条件 -} PLSR_SectionConfig_t; - -// 路径控制结构体 -typedef struct { - PLSR_RouteState_t route_state; // 路径状态 - uint8_t current_section_num; // 当前段号 - uint32_t current_freq; // 当前频率 - uint32_t target_freq; // 目标频率 - uint32_t pulse_count; // 当前脉冲计数 - uint32_t start_freq; // 起始频率 - uint32_t end_freq; // 结束频率 - uint8_t output_port; // 输出端口选择 - PLSR_Mode_t mode; // 模式(相对/绝对) - PLSR_Direction_t direction; // 方向 - - // 运行状态参数 - PLSR_RunState_t run_state; // 运行状态 - uint32_t accel_step_count; // 加速步数计数 - uint32_t decel_step_count; // 减速步数计数 - uint32_t const_pulse_count; // 匀速脉冲计数 - uint32_t freq_step; // 频率步长 - uint32_t wait_start_tick; // 等待开始时间 - uint32_t act_start_tick; // ACT开始时间 - - PLSR_SectionConfig_t section[PLSR_MAX_SECTIONS]; // 段配置数组 -} PLSR_RouteConfig_t; -``` - -### 2. 功能模块化重构 - -#### PWM控制模块 -```c -// PWM基础控制 -void PLSR_PWM_Init(void); -void PLSR_PWM_Start(uint32_t frequency); -void PLSR_PWM_Stop(void); -uint8_t PLSR_PWM_IsRunning(void); - -// PWM参数控制 -void PLSR_PWM_SetFrequency(uint32_t frequency); -uint32_t PLSR_PWM_GetFrequency(void); -void PLSR_PWM_SetDutyCycle(uint32_t duty_cycle); -``` - -#### TIM6控制模块 -```c -// TIM6频率配置 -void PLSR_TIM6_SetUpdateFreq(uint32_t freq_us); -uint32_t PLSR_TIM6_GetUpdateFreq(void); -void PLSR_TIM6_Start(void); -void PLSR_TIM6_Stop(void); -``` - -#### 路径控制模块 -```c -// 路径基础控制 -void PLSR_Route_Init(PLSR_RouteConfig_t* route); -void PLSR_Route_Start(PLSR_RouteConfig_t* route); -void PLSR_Route_Stop(PLSR_RouteConfig_t* route); -void PLSR_Route_Reset(PLSR_RouteConfig_t* route); -uint8_t PLSR_Route_IsRunning(PLSR_RouteConfig_t* route); -void PLSR_Route_Process(PLSR_RouteConfig_t* route); -``` - -#### 段控制模块 -```c -// 段控制函数 -void PLSR_Section_Init(PLSR_SectionConfig_t* section, uint8_t section_num); -void PLSR_Section_Process(PLSR_RouteConfig_t* route); -void PLSR_Section_StartNewSection(PLSR_RouteConfig_t* route); -void PLSR_Section_SwitchNext(PLSR_RouteConfig_t* route); -uint8_t PLSR_Section_CheckWaitCondition(PLSR_RouteConfig_t* route); -``` - -#### 加减速控制模块 -```c -// 加减速算法 -float PLSR_Accel_CalculateCurve(float progress, PLSR_AccelAlgorithm_t algorithm); -void PLSR_Accel_Process(PLSR_RouteConfig_t* route); -``` - -#### 等待条件处理模块 -```c -// 等待条件控制 -void PLSR_Wait_StartTimer(PLSR_RouteConfig_t* route); -uint8_t PLSR_Wait_CheckTimeCondition(PLSR_RouteConfig_t* route); -uint8_t PLSR_Wait_CheckActTime(PLSR_RouteConfig_t* route); -uint8_t PLSR_Wait_CheckExtEvent(PLSR_RouteConfig_t* route); - -// 外部事件控制 -void PLSR_SetExtEvent(uint8_t flag); -void PLSR_ClearExtEvent(void); -void PLSR_SetSectionCondition(PLSR_RouteConfig_t* route, uint8_t section_num, uint8_t flag); -``` - -### 3. 等待条件实现 - -#### 六种等待条件详解 - -1. **PLSR_WAIT_PLUSEEND**: 脉冲发送完成后立即切换 -2. **PLSR_WAIT_TIME**: 等待指定时间，与脉冲完成取最晚者 -3. **PLSR_WAIT_CONDITION**: 等待外部条件标志 -4. **PLSR_WAIT_ACT_TIME**: ACT时间控制，支持中途切换 -5. **PLSR_WAIT_EXT_EVENT**: 等待外部事件触发 -6. **PLSR_WAIT_EXT_OR_END**: 外部事件或脉冲结束，任一满足即切换 - -#### 复杂逻辑处理 -- **ACT_TIME特殊逻辑**: 根据ACT时间长短，在加速段、匀速段或减速段进行切换 -- **时间与脉冲竞争**: 等待时间和脉冲完成的先后顺序处理 -- **外部事件响应**: 实时响应外部事件触发 - -### 4. 加减速算法实现 - -#### 三种算法支持 - -1. **线性加减速 (PLSR_ACCEL_LINEAR)** - ```c - // 线性变化 - freq = start_freq + (target_freq - start_freq) * progress - ``` - -2. **曲线加减速 (PLSR_ACCEL_CURVE)** - ```c - // S型曲线，平滑过渡 - curve_factor = 3 * progress * progress - 2 * progress * progress * progress - freq = start_freq + (target_freq - start_freq) * curve_factor - ``` - -3. **正弦加减速 (PLSR_ACCEL_SINE)** - ```c - // 正弦函数平滑变化 - curve_factor = sin(PI/2 * progress) - freq = start_freq + (target_freq - start_freq) * curve_factor - ``` - -### 5. 运行模式支持 - -#### 相对模式 (PLSR_MODE_RELATIVE) -- 脉冲数表示相对于上一段的增量 -- 适用于增量式运动控制 - -#### 绝对模式 (PLSR_MODE_ABSOLUTE) -- 脉冲数表示绝对位置坐标 -- 当前段脉冲数 = 目标位置 - 当前位置 -- 适用于位置式运动控制 - -### 6. 状态机设计 - -#### 路径状态机 -``` -IDLE → RUNNING → COMPLETED - ↓ ↓ ↑ -ERROR ←──┴─────────┘ -``` - -#### 运行状态机 -``` -IDLE → ACCEL → CONST → DECEL → WAIT → STOP - ↑ ↓ ↓ ↓ ↓ ↓ - └──────┴───────┴───────┴───────┴──────┘ -``` - -#### 段状态机 -``` -IDLE → RUNNING → COMPLETED - ↑ ↓ ↓ - └───────┴─────────┘ -``` - -## 重构成果 - -### 1. 文件结构 -``` -PLSR/ -├── Core/ -│ ├── Inc/ -│ │ └── tim.h # 头文件定义 -│ └── Src/ -│ └── tim.c # 主要实现文件 -├── PLSR_系统使用说明_V2.md # 详细使用说明 -├── PLSR_测试示例.c # 测试示例代码 -└── 项目重构总结.md # 本文档 -``` - -### 2. 代码统计 -- **总代码行数**: 约2000行 -- **函数数量**: 50+个 -- **结构体定义**: 4个核心结构体 -- **枚举类型**: 8个 -- **注释覆盖率**: 90%+ - -### 3. 功能特性 - -#### ✅ 已实现功能 -- [x] 多段脉冲输出控制（最多10段） -- [x] 三种加减速算法（线性、曲线、正弦） -- [x] 六种等待条件支持 -- [x] 相对/绝对模式支持 -- [x] PWM频率动态调整 -- [x] TIM6更新频率可配置 -- [x] 完整的状态机管理 -- [x] 外部事件控制接口 -- [x] 运行时状态监控 -- [x] 紧急停止功能 -- [x] 路径重置功能 -- [x] 模块化设计 -- [x] 详细的代码注释 - -#### 🔄 可扩展功能 -- [ ] 多路并行输出支持 -- [ ] 更多加减速算法 -- [ ] 网络通信接口 -- [ ] 参数存储功能 -- [ ] 图形化配置界面 - -### 4. 性能指标 - -- **PWM频率范围**: 1Hz - 100kHz -- **TIM6更新频率**: 可配置（建议1ms） -- **段切换延迟**: < 1ms -- **频率调整精度**: ±1Hz -- **内存占用**: 约2KB（单路径配置） - -## 测试验证 - -### 1. 单元测试 -- PWM输出功能测试 -- 频率设置精度测试 -- 脉冲计数准确性测试 -- 加减速算法验证 - -### 2. 集成测试 -- 多段连续运行测试 -- 等待条件触发测试 -- 外部事件响应测试 -- 紧急停止功能测试 - -### 3. 压力测试 -- 长时间连续运行 -- 高频率切换测试 -- 内存泄漏检查 - -## 使用指南 - -### 1. 快速开始 -```c -// 1. 系统初始化 -PLSR_PWM_Init(); -PLSR_TIM6_SetUpdateFreq(1000); // 1ms -PLSR_Route_Init(&g_plsr_route); - -// 2. 配置段参数 -g_plsr_route.section[0].target_freq = 5000; -g_plsr_route.section[0].target_pulse = 10000; -// ... 其他配置 - -// 3. 启动执行 -PLSR_Route_Start(&g_plsr_route); -``` - -### 2. 详细配置 -参考 `PLSR_系统使用说明_V2.md` 文档 - -### 3. 测试示例 -参考 `PLSR_测试示例.c` 文件 - -## 技术难点与解决方案 - -### 1. 加减速平滑过渡 -**问题**: 频率切换时的平滑性 -**解决**: 实现S型曲线算法，确保加速度连续 - -### 2. 等待条件复杂逻辑 -**问题**: 多种等待条件的优先级和组合 -**解决**: 状态机设计，明确各种条件的处理逻辑 - -### 3. 实时性要求 -**问题**: 中断处理的实时性 -**解决**: 优化中断处理函数，减少计算复杂度 - -### 4. 内存管理 -**问题**: 结构体较大，栈空间限制 -**解决**: 使用全局变量，合理设计数据结构 - -## 兼容性说明 - -### 1. 硬件兼容性 -- 支持STM32F系列、H系列等 -- 需要至少3个定时器资源 -- GPIO配置灵活 - -### 2. 软件兼容性 -- 基于STM32 HAL库 -- 兼容UCOSII实时操作系统 -- 符合信捷PLC PLSR指令规范 - -### 3. 向后兼容性 -- 与原版本不兼容（全面重构） -- 提供迁移指南 -- 保留核心功能接口 - -## 维护与支持 - -### 1. 代码维护 -- 模块化设计便于维护 -- 详细注释便于理解 -- 统一的命名规范 - -### 2. 功能扩展 -- 预留扩展接口 -- 可插拔的算法模块 -- 灵活的配置机制 - -### 3. 问题排查 -- 完整的状态监控 -- 详细的错误信息 -- 调试接口支持 - -## 总结 - -本次PLSR系统重构是一次全面的系统升级，从数据结构设计到功能实现都进行了重新规划。重构后的系统具有以下优势： - -1. **功能完整**: 支持信捷PLC PLSR指令的所有核心功能 -2. **设计合理**: 模块化设计，便于维护和扩展 -3. **性能优秀**: 实时性好，精度高，稳定可靠 -4. **易于使用**: 接口简洁，文档完善，示例丰富 -5. **可扩展性**: 预留扩展接口，支持功能增强 - -该系统可以广泛应用于步进电机控制、伺服电机控制、数控机床、自动化设备等领域，为工业自动化提供可靠的脉冲输出控制解决方案。 - ---- - -**项目信息** -- 重构版本: V2.0 -- 重构日期: 2025年1月 -- 技术栈: STM32 HAL + UCOSII + C语言 -- 兼容标准: 信捷PLC PLSR指令规范 -- 代码质量: 工业级标准 \ No newline at end of file diff --git a/加减速算法优化说明.md b/加减速算法优化说明.md deleted file mode 100644 index abfcf47..0000000 --- a/加减速算法优化说明.md +++ /dev/null @@ -1,118 +0,0 @@ -# PLSR加减速算法优化说明 - -## 问题描述 - -原始的加减速算法存在以下问题： -1. **直线加速算法**：使用进度计算频率变化，导致每步频率变化量不一致 -2. **进度计算错误**：原始公式 `1.0f - ((float)route->accel_step_count / (float)(route->accel_step_count + 1))` 无法产生正确的线性进度 -3. **频率计算基准不稳定**：每次都基于当前频率计算，导致累积误差 - -## 优化方案 - -### 1. 算法分类处理 - -**直线加速/减速（PLSR_ACCEL_LINEAR）**： -- 使用固定频率增量/减量 -- 每步频率变化量完全一致 -- 计算公式： - ```c - // 加速 - freq_increment = (target_freq - start_freq) / total_steps - new_freq = start_freq + (freq_increment * completed_steps) - - // 减速 - freq_decrement = (start_freq - target_freq) / total_steps - new_freq = start_freq - (freq_decrement * completed_steps) - ``` - -**曲线加速/减速（PLSR_ACCEL_CURVE）和正弦加速/减速（PLSR_ACCEL_SINE）**： -- 使用进度计算频率变化 -- 通过算法函数产生非线性变化曲线 -- 计算公式： - ```c - progress = completed_steps / total_steps - freq_ratio = algorithm_function(progress) // 0.0 到 1.0 - new_freq = start_freq + (freq_range * freq_ratio) - ``` - -### 2. 静态变量管理 - -引入静态变量记录关键参数： -- `total_accel_steps` / `total_decel_steps`：记录总步数 -- `start_freq_accel` / `start_freq_decel`：记录起始频率 - -这样确保： -- 频率计算基准稳定 -- 避免累积误差 -- 进度计算准确 - -### 3. 进度计算修正 - -**修正前**： -```c -float progress = 1.0f - ((float)route->accel_step_count / (float)(route->accel_step_count + 1)); -``` - -**修正后**： -```c -float progress = (float)(total_steps - remaining_steps) / (float)total_steps; -``` - -## 算法特点对比 - -| 算法类型 | 频率变化特点 | 适用场景 | 计算方式 | -|---------|-------------|----------|----------| -| 直线加速 | 每步变化量固定 | 需要均匀加速的场合 | 固定增量 | -| 曲线加速 | 先慢后快的变化 | 需要平滑启动的场合 | 进度函数 | -| 正弦加速 | 正弦曲线变化 | 需要最平滑过渡的场合 | 进度函数 | - -## 代码实现要点 - -### 1. 状态初始化 -```c -// 记录总步数和起始频率（仅在第一次进入时） -if (total_accel_steps == 0) { - total_accel_steps = route->accel_step_count; - start_freq_accel = route->current_freq; -} -``` - -### 2. 算法选择 -```c -switch (current_section->accel_config.accel_algorithm) { - case PLSR_ACCEL_LINEAR: - // 直线算法：固定增量 - break; - case PLSR_ACCEL_CURVE: - case PLSR_ACCEL_SINE: - // 非线性算法：进度计算 - break; -} -``` - -### 3. 状态重置 -```c -// 加速/减速完成时重置静态变量 -total_accel_steps = 0; -start_freq_accel = 0; -``` - -## 优化效果 - -1. **直线加速**：真正实现每步频率变化量一致 -2. **曲线/正弦加速**：保持原有的非线性特性，但进度计算更准确 -3. **数值稳定性**：避免累积误差，频率变化更精确 -4. **代码清晰性**：不同算法分别处理，逻辑更清晰 - -## 测试建议 - -1. **直线加速测试**：验证每步频率增量是否完全一致 -2. **曲线加速测试**：验证频率变化曲线是否符合预期 -3. **边界条件测试**：验证起始和结束频率是否准确 -4. **多段切换测试**：验证段间切换时静态变量重置是否正确 - -## 注意事项 - -1. 静态变量在函数内部，多路径同时运行时可能需要考虑重入问题 -2. 除法运算需要注意除零保护 -3. 浮点运算精度可能影响最终结果，必要时可考虑定点运算 \ No newline at end of file diff --git a/思路.drawio b/思路.drawio index 4ab0a3b..781daa5 100644 --- a/思路.drawio +++ b/思路.drawio @@ -1,6 +1,6 @@ - + @@ -366,11 +366,8 @@ - - - - - + + @@ -441,21 +438,6 @@ - - - - - - - - - - - - - - - @@ -528,7 +510,7 @@ - + @@ -537,6 +519,9 @@ + + + @@ -627,35 +612,28 @@ - - + + + + - + - + - - - - - - - - - - - + + @@ -664,7 +642,7 @@ - + @@ -676,16 +654,16 @@ - + - + - + @@ -694,19 +672,19 @@ - + - + - + - + - + @@ -715,400 +693,731 @@ - + + + + + + + + + + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - + + + + + + + + + + + + + + - + - + + + + + + + + + + + + + + + + + + + + + + - - + - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + - - + + - - + + + + + + + + + + + + + + + + + - - + + - - + + + + + - + - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - + + - - + + diff --git a/设计方案书.doc b/设计方案书.doc index ed847f7..cee87b0 100644 Binary files a/设计方案书.doc and b/设计方案书.doc differ diff --git a/需求规格书.doc b/需求规格书.doc index 7b34726..56b440b 100644 Binary files a/需求规格书.doc and b/需求规格书.doc differ