From 7fccad5180e6495f721aefcc24011fb3ac476bf1 Mon Sep 17 00:00:00 2001 From: Chiri Date: Thu, 21 Aug 2025 16:02:05 +0800 Subject: [PATCH] =?UTF-8?q?=E8=AE=BE=E8=AE=A1=E4=BA=86=E8=AE=BE=E7=BD=AE?= =?UTF-8?q?=E8=84=89=E5=86=B2=E5=90=8E=E7=AB=8B=E5=8D=B3=E7=94=9F=E6=95=88?= =?UTF-8?q?=E7=9A=84=E4=BB=A3=E7=A0=81?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Core/Src/main.c | 68 +- Core/Src/stm32f4xx_it.c | 8 +- EWARM/PLSR.dep | 1428 ++++++++++---------- EWARM/settings/PLSR.dbgdt | 7 +- EWARM/settings/PLSR.dnx | 14 +- EWARM/settings/Project.wsdt | 38 +- EWARM/settings/Project_EditorBookmarks.xml | 43 + Hardware/PLSR.c | 4 +- Hardware/PLSR.h | 2 +- 9 files changed, 855 insertions(+), 757 deletions(-) create mode 100644 EWARM/settings/Project_EditorBookmarks.xml diff --git a/Core/Src/main.c b/Core/Src/main.c index 5b2eb3a..7ac2827 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -44,6 +44,7 @@ int32_t CNT_Only[10] = {0}; uint8_t EXT_Flag = 0; uint8_t PulseStartFlag = 0; uint8_t ArrTimes = 0; +uint8_t FixArrFlag = 0; extern uint8_t Register_H[16384]; ///<寄存器的高字节 extern uint8_t Register_L[16384]; ///<寄存器的低字节 @@ -234,7 +235,10 @@ int main(void) /* 掉电数据读取 */ ModbusLoadSRAM(); - + PLSRPluseLoad(); //读取脉冲设置 + PLSROptionLoad(); //读取脉冲基础设置 + NowFrequency = PulseOutput[0].Frequency; + NowPulse = Options.StartPulse; CPU_CRITICAL_EXIT() ; ///退出临界区 OSStart(&err); @@ -309,10 +313,22 @@ void Y1Direction(void *p_arg) while(1) { - + if (NowFrequency != PulseOutput[NowPulse].Frequency)/* 如果现在寄存器内的频率与实际输出的频率不一致 */ + { + FixArrFlag = 1; //使能频率修改脉冲加减速 + if (PulseOutput[NowPulse].Frequency > NowFrequency) + { + Acc = (PulseOutput[NowPulse].Frequency - NowFrequency ) / Options.AccUpTime; + } + else + { + Acc = (PulseOutput[NowPulse].Frequency - NowFrequency ) / Options.AccDownTime; + } + HAL_TIM_Base_Start_IT(&htim3); /* 启动定时器3和中断 */ + } OSTimeDly(100, OS_OPT_TIME_DLY, &err); // 延时 100 个节拍 } -} +} /** * @brief 任务2，脉冲开始,数据处理 @@ -333,7 +349,7 @@ void PulseStartTsk(void *p_arg) { EN = 0; PulseStartFlag = 1; - //NowFrequeny = PulseOutput[NowPulse].Frequency; /* 保存当前脉冲的频率 */ + NowFrequency = PulseOutput[NowPulse].Frequency; /* 保存当前脉冲的频率 */ PulseStart(); HAL_TIM_Base_Start_IT(&htim3); /* 启动定时器3和中断 */ } @@ -510,10 +526,11 @@ void EXTSet(void *p_arg) */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - //OSIntEnter(); /* 进入中断 */ + OSIntEnter(); /* 进入中断 */ if (htim == (&htim3)) { + /* 段切换的加减速 */ if (ArrFlag == 1) { /* 脉冲加速 */ @@ -551,6 +568,44 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) } } } + /* 实时修改频率的加减速 */ + if (FixArrFlag == 1) + { + /* 脉冲加速 */ + if (Acc > 0) + { + if (ArrTimes <= Options.AccUpTime) + { + SetFrequency(Options.SentPost, NowFrequency + ArrTimes * Acc); + if(ArrTimes == 0) PulseStart(); /* 开始产生脉冲 */ + ArrTimes++; + } + else + { + SetFrequency(Options.SentPost, PulseOutput[NowPulse].Frequency); + ArrTimes = 0; + FixArrFlag = 0; + HAL_TIM_Base_Stop_IT(&htim3); // 停止定时器并禁用中断 + } + } + /* 脉冲减速 */ + else if (Acc <= 0) + { + if (ArrTimes <= Options.AccDownTime) + { + SetFrequency(Options.SentPost, NowFrequency + ArrTimes * Acc); + if (ArrTimes == 0) PulseStart(); /* 开始产生脉冲 */ + ArrTimes++; + } + else + { + SetFrequency(Options.SentPost, PulseOutput[NowPulse].Frequency); + ArrTimes = 0; + FixArrFlag = 0; + HAL_TIM_Base_Stop_IT(&htim3); // 停止定时器并禁用中断 + } + } + } /* 第一段脉冲的加速 */ if (NowPulse == Options.StartPulse && PulseStartFlag == 1) @@ -561,7 +616,6 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) ArrTimes++; SetFrequency(Options.SentPost, ArrTimes * Acc); if (ArrTimes == 1) PulseStart(); /* 开始产生脉冲 */ - } else { @@ -580,7 +634,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) } } - //OSIntExit(); /* 退出中断 */ + OSIntExit(); /* 退出中断 */ } /* USER CODE END 4 */ diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c index 74e8674..d80a020 100644 --- a/Core/Src/stm32f4xx_it.c +++ b/Core/Src/stm32f4xx_it.c @@ -213,7 +213,7 @@ void SysTick_Handler(void) void TIM2_IRQHandler(void) { /* USER CODE BEGIN TIM2_IRQn 0 */ -// OSIntEnter(); /* 进入中断 */ + OSIntEnter(); /* 进入中断 */ /* USER CODE END TIM2_IRQn 0 */ HAL_TIM_IRQHandler(&htim2); /* USER CODE BEGIN TIM2_IRQn 1 */ @@ -250,7 +250,7 @@ void TIM2_IRQHandler(void) } ArrFlag = 1; SetNextPulse();/* 设置下一次进入中断的脉冲数 */ - //NowFrequeny = PulseOutput[NowPulse].Frequency; /* 保存当前脉冲的频率 */ + NowFrequency = PulseOutput[NowPulse].Frequency; /* 保存当前脉冲的频率 */ HAL_TIM_Base_Start_IT(&htim3); /* 启动定时器3和中断 */ } @@ -299,7 +299,7 @@ void TIM2_IRQHandler(void) } ArrFlag = 1; SetNextPulse();/* 设置下一次进入中断的脉冲数 */ - //NowFrequeny = PulseOutput[NowPulse].Frequency; /* 保存当前脉冲的频率 */ + NowFrequency = PulseOutput[NowPulse].Frequency; /* 保存当前脉冲的频率 */ HAL_TIM_Base_Start_IT(&htim3); /* 启动定时器3和中断 */ } @@ -312,7 +312,7 @@ void TIM2_IRQHandler(void) HAL_TIM_PWM_Stop_IT(&htim10,TIM_CHANNEL_1); /* 停止PWM输出 */ } } -// OSIntExit(); /* 退出中断 */ + OSIntExit(); /* 退出中断 */ /* USER CODE END TIM2_IRQn 1 */ } diff --git a/EWARM/PLSR.dep b/EWARM/PLSR.dep index eff49e1..057d057 100644 --- a/EWARM/PLSR.dep +++ b/EWARM/PLSR.dep @@ -5,554 +5,521 @@ PLSR + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_pwr.__cstat.et + $PROJ_DIR$\PLSR\Obj\os_tick.xcl + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_msp.__cstat.et + $PROJ_DIR$\PLSR\Obj\os_var.__cstat.et + $PROJ_DIR$\PLSR\Obj\os_cpu_c.__cstat.et + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_rcc.o + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_type.h + $PROJ_DIR$\PLSR\Obj\cpu_core.o + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_flash_ex.__cstat.et + $PROJ_DIR$\PLSR\Obj\PLSR.pbd + $PROJ_DIR$\PLSR\Obj\os_dbg.__cstat.et + $PROJ_DIR$\PLSR\Exe\PLSR.hex + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h + $PROJ_DIR$\..\Hardware\PLSR.h + $PROJ_DIR$\PLSR\Obj\BitSet.xcl + $PROJ_DIR$\PLSR\Obj\sram.o + $PROJ_DIR$\..\Core\Inc\main.h + $PROJ_DIR$\PLSR\Obj\lib_mem.xcl + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_tim_ex.__cstat.et + $TOOLKIT_DIR$\inc\c\string.h + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h + $PROJ_DIR$\PLSR\Obj\dma.xcl + $PROJ_DIR$\PLSR\Obj\system_stm32f4xx.xcl + $PROJ_DIR$\PLSR\Obj\os_msg.o + $PROJ_DIR$\PLSR\Obj\os_mutex.xcl + $PROJ_DIR$\PLSR\Obj\os_pend_multi.o + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os.h + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal.xcl + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_pwr.o + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h + $PROJ_DIR$\PLSR\Obj\os_mutex.o + $PROJ_DIR$\PLSR\Obj\os_int.o + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_dma_ex.o + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_flash_ramfunc.xcl + $PROJ_DIR$\PLSR\Obj\gpio.xcl + $PROJ_DIR$\PLSR\Obj\os_sem.__cstat.et + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_msp.o + $PROJ_DIR$\PLSR\Obj\os_msg.xcl + $TOOLKIT_DIR$\inc\c\math.h + $PROJ_DIR$\PLSR\Obj\os_stat.o + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_dma.xcl + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_pwr_ex.o + $PROJ_DIR$\PLSR\Obj\cpu_a.o + $PROJ_DIR$\PLSR\Obj\os_sem.xcl + $PROJ_DIR$\PLSR\Obj\os_mutex.__cstat.et + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h + $TOOLKIT_DIR$\inc\c\ctype.h + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_flash_ramfunc.__cstat.et + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_dma.o + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + $PROJ_DIR$\startup_stm32f407xx.s + $PROJ_DIR$\..\Core\Src\main.c + $PROJ_DIR$\..\Core\Src\dma.c + $PROJ_DIR$\..\Core\Src\gpio.c + $PROJ_DIR$\..\Core\Src\tim.c + $PROJ_DIR$\..\Core\Src\usart.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c + $PROJ_DIR$\..\Core\Src\system_stm32f4xx.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + $PROJ_DIR$\..\Core\Src\stm32f4xx_it.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c + $PROJ_DIR$\..\Hardware\BitSet.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_dbg.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + $PROJ_DIR$\..\Hardware\sram.c + $PROJ_DIR$\..\cmsis\uCOS-BSP\bsp.h + $PROJ_DIR$\..\cmsis\uCOS-Config\app_cfg.h + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_cfg_app.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_flag.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_int.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_msg.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_mutex.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_core.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_pend_multi.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + $PROJ_DIR$\..\cmsis\uCOS-Config\os_cfg.h + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_prio.c + $PROJ_DIR$\..\Hardware\modbus.c + $PROJ_DIR$\..\Hardware\PLSR.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_mem.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c + $PROJ_DIR$\..\Hardware\CRC.c + $PROJ_DIR$\..\Hardware\PSCARR.c + $PROJ_DIR$\..\cmsis\uCOS-Config\cpu_cfg.h + $PROJ_DIR$\..\cmsis\uCOS-Config\includes.h + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + $PROJ_DIR$\..\cmsis\uCOS-BSP\bsp.c + $PROJ_DIR$\..\cmsis\uCOS-Config\lib_cfg.h + $PROJ_DIR$\..\cmsis\uCOS-Config\os_app_hooks.c + $PROJ_DIR$\..\cmsis\uCOS-Config\os_app_hooks.h + $PROJ_DIR$\..\cmsis\uCOS-Config\os_cfg_app.h + $PROJ_DIR$\..\cmsis\uC-LIB\lib_mem.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_q.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_stat.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_var.c + $PROJ_DIR$\..\cmsis\uC-LIB\lib_math.c + $PROJ_DIR$\..\cmsis\uC-CPU\ARM-Cortex-M4\IAR\cpu_c.c + $PROJ_DIR$\..\cmsis\uC-CPU\cpu_core.c + $PROJ_DIR$\..\cmsis\uC-LIB\lib_mem.h + $PROJ_DIR$\..\cmsis\uCOS-III\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu.h + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_tmr.c + $PROJ_DIR$\..\cmsis\uC-CPU\ARM-Cortex-M4\IAR\cpu_a.asm + $PROJ_DIR$\..\cmsis\uC-LIB\lib_def.h + $PROJ_DIR$\..\cmsis\uC-CPU\ARM-Cortex-M4\IAR\cpu.h + $PROJ_DIR$\..\cmsis\uC-LIB\lib_math.h + $PROJ_DIR$\..\cmsis\uC-LIB\lib_str.h + $PROJ_DIR$\..\cmsis\uC-LIB\lib_str.c + $PROJ_DIR$\..\cmsis\uCOS-III\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_c.c $PROJ_DIR$\PLSR\Obj\os_time.o $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_flash.o $PROJ_DIR$\..\Hardware\modbus.h + $PROJ_DIR$\..\cmsis\uC-CPU\cpu_def.h $PROJ_DIR$\PLSR\Obj\CRC.xcl + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_sem.c + $PROJ_DIR$\..\cmsis\uC-LIB\Ports\ARM-Cortex-M4\IAR\lib_mem_a.asm $TOOLKIT_DIR$\lib\shb_l.a - $PROJ_DIR$\..\Hardware\sram.h - $PROJ_DIR$\PLSR\Obj\os_app_hooks.o - $PROJ_DIR$\PLSR\Obj\os_prio.o + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_time.c + $PROJ_DIR$\..\cmsis\uC-CPU\cpu_core.h + $PROJ_DIR$\..\cmsis\uCOS-III\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_a.asm + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_task.c + $PROJ_DIR$\..\cmsis\uC-LIB\lib_ascii.h + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_tick.c + $PROJ_DIR$\..\cmsis\uC-LIB\lib_ascii.c $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_flash_ramfunc.o - $TOOLKIT_DIR$\lib\dl7M_tlf.a - $PROJ_DIR$\..\Core\Inc\tim.h - $PROJ_DIR$\PLSR\Obj\os_var.xcl + $TOOLKIT_DIR$\lib\m7M_tl.a + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_gpio.__cstat.et + $PROJ_DIR$\PLSR\Obj\os_prio.o $PROJ_DIR$\PLSR\Obj\lib_mem.__cstat.et + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_exti.__cstat.et + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_exti.xcl + $PROJ_DIR$\PLSR\Obj\os_tmr.xcl + $PROJ_DIR$\..\Hardware\sram.h + $PROJ_DIR$\..\Core\Inc\tim.h $PROJ_DIR$\PLSR\Obj\os_q.o $PROJ_DIR$\PLSR\Obj\lib_ascii.__cstat.et - $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_pwr.xcl - $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_exti.__cstat.et - $PROJ_DIR$\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h - $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_gpio.__cstat.et $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_rcc.xcl - $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_exti.xcl $PROJ_DIR$\PLSR\Obj\os_task.xcl - $PROJ_DIR$\PLSR\Obj\usart.xcl + $PROJ_DIR$\PLSR\Obj\stm32f4xx_it.xcl + $PROJ_DIR$\PLSR\Obj\bsp.xcl $PROJ_DIR$\..\Hardware\CRC.h + $PROJ_DIR$\PLSR\Obj\lib_math.__cstat.et + $PROJ_DIR$\..\Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_exti.o + $PROJ_DIR$\PLSR\Obj\main.xcl + $PROJ_DIR$\..\Hardware\PSCARR.h $PROJ_DIR$\PLSR\Obj\os_dbg.xcl - $PROJ_DIR$\PLSR\Obj\bsp.xcl - $PROJ_DIR$\PLSR\Obj\os_stat.__cstat.et + $PROJ_DIR$\PLSR\Obj\usart.xcl $PROJ_DIR$\PLSR\Obj\bsp.__cstat.et - $PROJ_DIR$\PLSR\Obj\os_tmr.xcl - $PROJ_DIR$\PLSR\Obj\stm32f4xx_it.xcl - $TOOLKIT_DIR$\lib\m7M_tl.a - $PROJ_DIR$\PLSR\Obj\lib_math.__cstat.et - $PROJ_DIR$\PLSR\Obj\main.xcl + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_pwr.xcl + $PROJ_DIR$\PLSR\Obj\os_stat.__cstat.et + $TOOLKIT_DIR$\lib\dl7M_tlf.a + $PROJ_DIR$\PLSR\Obj\os_app_hooks.o $PROJ_DIR$\PLSR\Obj\system_stm32f4xx.__cstat.et - $PROJ_DIR$\..\Hardware\PSCARR.h $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_gpio.o - $PROJ_DIR$\PLSR\Obj\PLSR.__cstat.et - $TOOLKIT_DIR$\inc\c\DLib_Product_string.h - $PROJ_DIR$\..\Drivers\CMSIS\Include\cmsis_iccarm.h - $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_tim.o - $PROJ_DIR$\PLSR\Obj\os_mem.xcl - $PROJ_DIR$\PLSR\Obj\tim.__cstat.et - $PROJ_DIR$\PLSR\Obj\os_app_hooks.__cstat.et + $PROJ_DIR$\PLSR\Obj\os_var.xcl + $PROJ_DIR$\PLSR\List\PLSR.map $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h - $PROJ_DIR$\PLSR\Obj\os_time.__cstat.et + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h + $PROJ_DIR$\PLSR\Obj\stm32f4xx_hal_tim.o + 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315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 305 @@ -560,22 +527,22 @@ $PROJ_DIR$\..\Core\Src\stm32f4xx_hal_msp.c - __cstat - 300 + ICCARM + 37 - ICCARM - 309 + __cstat + 2 BICOMP - 249 + 294 ICCARM - 281 44 263 111 241 265 17 254 72 146 47 250 247 123 67 94 39 257 89 71 262 65 243 215 297 100 86 49 287 51 110 312 283 323 269 242 251 238 + 16 166 314 259 273 317 151 303 219 290 173 311 319 229 193 199 179 313 218 203 315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 @@ -583,960 +550,942 @@ $PROJ_DIR$\..\Core\Src\system_stm32f4xx.c - __cstat - 34 + ICCARM + 227 - ICCARM - 76 + __cstat + 162 BICOMP - 290 + 22 ICCARM - 265 17 254 72 146 47 250 247 123 67 94 39 257 89 71 44 263 111 241 262 65 243 215 297 100 86 49 287 51 110 312 283 323 269 242 251 238 + 317 151 303 219 290 173 311 319 229 193 199 179 313 218 203 166 314 259 273 315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 - $PROJ_DIR$\startup_stm32f407xx.s + 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$PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + $PROJ_DIR$\..\Hardware\modbus.c - __cstat - 208 + ICCARM + 232 - ICCARM - 317 + __cstat + 275 BICOMP - 311 + 283 ICCARM - 44 263 111 241 265 17 254 72 146 47 250 247 123 67 94 39 257 89 71 262 65 243 215 297 100 86 49 287 51 110 312 283 323 269 242 251 238 + 120 177 16 166 314 259 273 317 151 303 219 290 173 311 319 229 193 199 179 313 218 203 315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 141 149 19 176 304 200 13 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + $PROJ_DIR$\..\Hardware\PLSR.c - __cstat - 264 + ICCARM + 277 - ICCARM - 102 + __cstat + 169 BICOMP - 235 + 205 ICCARM - 44 263 111 241 265 17 254 72 146 47 250 247 123 67 94 39 257 89 71 262 65 243 215 297 100 86 49 287 51 110 312 283 323 269 242 251 238 + 13 219 290 173 311 319 229 154 39 212 142 16 166 314 259 273 317 151 303 193 199 179 313 218 203 315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 141 19 176 120 177 149 304 200 276 305 - $PROJ_DIR$\..\Hardware\CRC.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_mem.c - __cstat - 103 + ICCARM + 245 - ICCARM - 79 + __cstat + 194 BICOMP - 3 + 185 ICCARM - 23 72 146 47 250 247 123 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 - $PROJ_DIR$\..\Hardware\modbus.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c - __cstat - 137 + ICCARM + 28 - ICCARM - 125 + __cstat + 0 BICOMP - 239 + 158 ICCARM - 2 52 281 44 263 111 241 265 17 254 72 146 47 250 247 123 67 94 39 257 89 71 262 65 243 215 297 100 86 49 287 51 110 312 283 323 269 242 251 238 5 23 284 38 267 95 274 + 166 314 259 273 317 151 303 219 290 173 311 319 229 193 199 179 313 218 203 315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 - $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + $PROJ_DIR$\..\Hardware\CRC.c - __cstat - 124 + ICCARM + 213 - ICCARM - 318 + __cstat + 251 BICOMP - 259 + 122 ICCARM - 44 263 111 241 265 17 254 72 146 47 250 247 123 67 94 39 257 89 71 262 65 243 215 297 100 86 49 287 51 110 312 283 323 269 242 251 238 + 149 219 290 173 311 319 229 - $PROJ_DIR$\..\Hardware\sram.c + $PROJ_DIR$\..\Hardware\PSCARR.c - __cstat - 134 + ICCARM + 260 - ICCARM - 278 + __cstat + 249 BICOMP - 83 + 182 ICCARM - 5 281 44 263 111 241 265 17 254 72 146 47 250 247 123 67 94 39 257 89 71 262 65 243 215 297 100 86 49 287 51 110 312 283 323 269 242 251 238 + 154 219 290 173 311 319 229 39 212 - $PROJ_DIR$\..\cmsis\uCOS-Config\os_app_hooks.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c - __cstat - 43 + ICCARM + 152 - ICCARM - 6 + __cstat + 138 BICOMP - 253 + 139 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 192 + 166 314 259 273 317 151 303 219 290 173 311 319 229 193 199 179 313 218 203 315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_tmr.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c - __cstat - 129 + ICCARM + 175 - ICCARM - 240 + __cstat + 181 BICOMP - 29 + 223 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 166 314 259 273 317 151 303 219 290 173 311 319 229 193 199 179 313 218 203 315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 - $PROJ_DIR$\..\cmsis\uC-CPU\cpu_core.c + $PROJ_DIR$\..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c - __cstat - 119 + ICCARM + 42 - ICCARM - 305 + __cstat + 243 BICOMP - 96 + 320 ICCARM - 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 + 166 314 259 273 317 151 303 219 290 173 311 319 229 193 199 179 313 218 203 315 189 316 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_q.c + $PROJ_DIR$\..\cmsis\uCOS-BSP\bsp.c - __cstat - 92 + ICCARM + 215 - ICCARM - 13 + __cstat + 157 BICOMP - 261 + 148 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 92 305 290 173 311 319 229 316 19 176 47 304 200 264 39 212 26 83 127 113 228 313 210 121 91 112 108 97 115 130 6 109 114 74 73 166 314 259 273 317 151 303 219 193 199 179 218 203 315 189 261 12 217 202 174 29 167 237 46 20 32 298 274 307 270 - $PROJ_DIR$\..\cmsis\uC-LIB\lib_ascii.c + $PROJ_DIR$\..\cmsis\uCOS-Config\os_app_hooks.c - __cstat - 14 + ICCARM + 161 - ICCARM - 133 + __cstat + 187 BICOMP - 84 + 295 ICCARM - 213 218 82 257 47 250 247 123 87 204 176 210 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 99 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_stat.c + $PROJ_DIR$\..\cmsis\uC-LIB\lib_mem.c - __cstat - 27 + ICCARM + 188 - ICCARM - 316 + __cstat + 137 BICOMP - 256 + 17 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 108 113 228 313 173 311 319 229 210 121 91 127 112 115 130 97 114 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_prio.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_q.c - __cstat - 85 + ICCARM + 143 - ICCARM - 7 + __cstat + 220 BICOMP - 75 + 321 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_time.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_stat.c - __cstat - 45 + ICCARM + 40 - ICCARM - 0 + __cstat + 159 BICOMP - 48 + 300 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 - $PROJ_DIR$\..\cmsis\uCOS-III\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_a.asm + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_var.c - AARM - 101 + ICCARM + 171 - - - - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_task.c - __cstat - 232 - - - ICCARM - 97 + 3 BICOMP - 21 + 164 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 - $PROJ_DIR$\..\cmsis\uCOS-III\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_c.c + $PROJ_DIR$\..\cmsis\uC-LIB\lib_math.c - __cstat - 302 + ICCARM + 292 - ICCARM - 136 + __cstat + 150 BICOMP - 70 + 195 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 114 113 228 313 173 311 319 229 210 121 91 127 112 108 97 115 130 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_mutex.c + $PROJ_DIR$\..\cmsis\uC-CPU\ARM-Cortex-M4\IAR\cpu_c.c - __cstat - 307 + ICCARM + 302 - ICCARM - 288 + __cstat + 198 BICOMP - 291 + 262 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 113 228 313 173 311 319 229 210 121 91 127 112 108 97 115 130 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_tick.c + $PROJ_DIR$\..\cmsis\uC-CPU\cpu_core.c - __cstat - 143 + ICCARM + 7 - ICCARM - 271 + __cstat + 257 BICOMP - 292 + 224 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_pend_multi.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_tmr.c - __cstat - 108 + ICCARM + 272 - ICCARM - 294 + __cstat + 241 BICOMP - 69 + 140 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 @@ -1545,76 +1494,76 @@ AARM - 320 + 43 - $PROJ_DIR$\..\cmsis\uC-LIB\lib_math.c + $PROJ_DIR$\..\cmsis\uC-LIB\lib_str.c - __cstat - 32 + ICCARM + 296 - ICCARM - 147 + __cstat + 312 BICOMP - 53 + 222 ICCARM - 221 218 82 257 47 250 247 123 87 204 176 209 210 228 191 198 213 + 115 113 228 313 173 311 319 229 210 121 91 112 130 97 - $PROJ_DIR$\..\cmsis\uC-LIB\lib_mem.c + $PROJ_DIR$\..\cmsis\uCOS-III\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_c.c - __cstat - 12 + ICCARM + 280 - ICCARM - 58 + __cstat + 4 BICOMP - 282 + 221 ICCARM - 228 218 82 257 47 250 247 123 87 204 176 209 210 198 213 191 221 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 - $PROJ_DIR$\..\cmsis\uC-CPU\ARM-Cortex-M4\IAR\cpu_c.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_sem.c - __cstat - 81 + ICCARM + 180 - ICCARM - 258 + __cstat + 36 BICOMP - 140 + 44 ICCARM - 218 82 257 47 250 247 123 87 204 176 209 210 228 191 198 213 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 @@ -1623,76 +1572,127 @@ AARM - 77 + 211 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_var.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_time.c - __cstat - 301 + ICCARM + 118 - ICCARM - 57 + __cstat + 196 BICOMP - 11 + 170 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 - $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_sem.c + $PROJ_DIR$\..\cmsis\uCOS-III\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_a.asm - __cstat - 310 + AARM + 247 + + + + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_task.c + ICCARM - 60 + 226 + + + __cstat + 279 BICOMP - 322 + 146 ICCARM - 293 186 209 218 82 257 47 250 247 123 87 204 176 210 228 191 198 213 304 214 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 - $PROJ_DIR$\..\cmsis\uC-LIB\lib_str.c + $PROJ_DIR$\..\cmsis\uCOS-III\Source\os_tick.c + + ICCARM + 293 + __cstat - 252 + 285 + + + BICOMP + 1 + + ICCARM - 248 + 26 83 127 113 228 313 173 311 319 229 210 121 91 112 108 97 115 130 6 109 + + + + + $PROJ_DIR$\..\cmsis\uC-LIB\lib_ascii.c + + + ICCARM + 267 + + + __cstat + 144 BICOMP - 91 + 225 ICCARM - 198 218 82 257 47 250 247 123 87 204 176 210 213 191 + 130 113 228 313 173 311 319 229 210 121 91 112 + + + + + $PROJ_DIR$\PLSR\Exe\PLSR.out + + + ILINK + 165 + + + OBJCOPY + 11 + + + + + ILINK + 216 246 215 43 302 7 213 309 191 267 292 188 211 296 263 232 161 190 248 247 280 234 236 31 245 23 30 25 136 143 180 40 226 293 118 272 171 277 260 15 284 242 235 49 33 152 119 231 133 163 37 28 42 5 183 168 172 175 287 227 233 308 125 214 134 160 @@ -1701,7 +1701,7 @@ ILINK - 116 54 + 239 165 diff --git a/EWARM/settings/PLSR.dbgdt b/EWARM/settings/PLSR.dbgdt index 030f54d..491d17d 100644 --- a/EWARM/settings/PLSR.dbgdt +++ b/EWARM/settings/PLSR.dbgdt @@ -153,7 +153,7 @@ 1 1 1 - 2D10000022001386000005000000298100000400000010860000BB0500002CE100000200000029E1000004000000239200000600000020810000050000000F810000010000005F860000040000001D810000010000000C8100001000000004860000030000005986000001000000288100000300000056860000E80200002BE100000700000000840000030000001F810000EF0000000E81000002000000098600000100000025E10000010000000B8100000600000000E100000200000014860000230200005886000001000000008600000200000005810000010000001186000015030000468100001001000060860000010000005D86000012000000088600000500000005860000010000001686000001000000 + C210000025001386000005000000298100000A00000010860000EE0500002CE100000200000029E1000004000000239200000600000020810000050000000F810000010000005F860000040000001D810000010000000C8100001000000004860000030000005986000001000000288100001100000056860000E90200002BE100000700000000840000030000001F810000FB0000000E81000002000000098600000100000025E10000010000000B8100000600000000E1000002000000148600003D0200005886000001000000278100000F0000000086000002000000058100000100000011860000320300000281000001000000468100001601000060860000010000001E810000060000005D86000016000000088600000500000005860000010000001686000001000000 300020870000238700002487000021870000198600000D8400000F84000008840000FFFFFFFF54840000328100001C810000098400002AE10000008200001C8200000182000067860000838600005886000004DC00007784000007840000808C000044D500007486000045D5000046D5000047D5000048D5000049D500004AD500004BD500004CD500001C8F00001E8F00001F8F0000208F0000218F0000118F000000DC000001DC000002DC000003DC0000A4860000A38600005486000059860000 @@ -1012,6 +1012,7 @@ arr PulseNum CNT_Only + NowFrequency @@ -1120,7 +1121,7 @@ Debug - 00200000010000000800FFFF01001100434D4643546F6F6C426172427574746F6E568600000000000035000000FFFEFF0000000000000000000000000001000000010000000180138600000000000031000000FFFEFF00000000000000000000000000010000000100000001805E8600000000000037000000FFFEFF0000000000000000000000000001000000010000000180608600000000000039000000FFFEFF00000000000000000000000000010000000100000001805D8600000000000036000000FFFEFF000000000000000000000000000100000001000000018010860000000000002F000000FFFEFF0000000000000000000000000001000000010000000180118600000000040030000000FFFEFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E148600000000000032000000FFFEFF205200650073006500740020007400680065002000640065006200750067006700650064002000700072006F006700720061006D000A00520065007300650074000000000000000000000000000100000001000000000000000000000001000000060009802087000000000000FFFFFFFFFFFEFF06530079007300740065006D000100000000000000000000000100000001000000000000000000000001000000000009802387000000000000FFFFFFFFFFFEFF0443006F00720065000100000000000000000000000100000001000000000000000000000001000000000009802487000000000000FFFFFFFFFFFEFF0853006F006600740077006100720065000100000000000000000000000100000001000000000000000000000001000000000009802187000000000000FFFFFFFFFFFEFF12480061007200640077006100720065002000720065007300650074002000700069006E000100000000000000000000000100000001000000000000000000000001000000000009800000000000000400FFFFFFFFFFFEFF000000000000000000000000000100000001000000000000000000000001000000000009801986000000000000FFFFFFFFFFFEFF000100000000000000000000000100000001000000000000000000000001000000000000000000FFFEFF0544006500620075006700C6000000 + 00200000010000000800FFFF01001100434D4643546F6F6C426172427574746F6E568600000000040035000000FFFEFF0000000000000000000000000001000000010000000180138600000000040031000000FFFEFF00000000000000000000000000010000000100000001805E8600000000040037000000FFFEFF0000000000000000000000000001000000010000000180608600000000040039000000FFFEFF00000000000000000000000000010000000100000001805D8600000000040036000000FFFEFF000000000000000000000000000100000001000000018010860000000004002F000000FFFEFF0000000000000000000000000001000000010000000180118600000000000030000000FFFEFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E148600000000040032000000FFFEFF205200650073006500740020007400680065002000640065006200750067006700650064002000700072006F006700720061006D000A00520065007300650074000000000000000000000000000100000001000000000000000000000001000000060009802087000000000000FFFFFFFFFFFEFF06530079007300740065006D000100000000000000000000000100000001000000000000000000000001000000000009802387000000000000FFFFFFFFFFFEFF0443006F00720065000100000000000000000000000100000001000000000000000000000001000000000009802487000000000000FFFFFFFFFFFEFF0853006F006600740077006100720065000100000000000000000000000100000001000000000000000000000001000000000009802187000000000000FFFFFFFFFFFEFF12480061007200640077006100720065002000720065007300650074002000700069006E000100000000000000000000000100000001000000000000000000000001000000000009800000000000000400FFFFFFFFFFFEFF000000000000000000000000000100000001000000000000000000000001000000000009801986000000000000FFFFFFFFFFFEFF000100000000000000000000000100000001000000000000000000000001000000000000000000FFFEFF0544006500620075006700C6000000 34049 @@ -1154,7 +1155,7 @@ Main - 00200000010000002100FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000067000000FFFEFF000000000000000000000000000100000001000000018001E100000000000068000000FFFEFF000000000000000000000000000100000001000000018003E10000000000006A000000FFFEFF000000000000000000000000000100000001000000018000810000000000004B000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000018007E10000000000006D000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000018023E10000000004006F000000FFFEFF000000000000000000000000000100000001000000018022E10000000004006E000000FFFEFF000000000000000000000000000100000001000000018025E100000000000071000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001802BE100000000000074000000FFFEFF00000000000000000000000000010000000100000001802CE100000000040075000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6E4281000000000000FFFFFFFFFFFEFF0000000000000000000100000000000000010000007800000002002050FFFFFFFFFFFEFF0096000000000000000000018021810000000004005E000000FFFEFF000000000000000000000000000100000001000000018024E100000000000070000000FFFEFF000000000000000000000000000100000001000000018028E100000000040072000000FFFEFF000000000000000000000000000100000001000000018029E100000000000073000000FFFEFF000000000000000000000000000100000001000000018002810000000000004D000000FFFEFF0000000000000000000000000001000000010000000180298100000000000062000000FFFEFF0000000000000000000000000001000000010000000180278100000000000060000000FFFEFF0000000000000000000000000001000000010000000180288100000000000061000000FFFEFF00000000000000000000000000010000000100000001801D810000000000005A000000FFFEFF00000000000000000000000000010000000100000001801E810000000004005B000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001800B8100000000000051000000FFFEFF00000000000000000000000000010000000100000001800C8100000000000052000000FFFEFF00000000000000000000000000010000000100000001805F8600000000000066000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001801F810000000000005C000000FFFEFF000000000000000000000000000100000001000000018020810000000000005D000000FFFEFF0000000000000000000000000001000000010000000180468100000000020064000000FFFEFF00000000000000000000000000010000000100000000000000FFFEFF044D00610069006E00FF020000 + 00200000010000002100FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000067000000FFFEFF000000000000000000000000000100000001000000018001E100000000000068000000FFFEFF000000000000000000000000000100000001000000018003E10000000000006A000000FFFEFF000000000000000000000000000100000001000000018000810000000000004B000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000018007E10000000000006D000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000018023E10000000004006F000000FFFEFF000000000000000000000000000100000001000000018022E10000000004006E000000FFFEFF000000000000000000000000000100000001000000018025E100000000000071000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001802BE100000000040074000000FFFEFF00000000000000000000000000010000000100000001802CE100000000040075000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6E4281000000000000FFFFFFFFFFFEFF0000000000000000000100000000000000010000007800000002002050FFFFFFFFFFFEFF0096000000000000000000018021810000000004005E000000FFFEFF000000000000000000000000000100000001000000018024E100000000000070000000FFFEFF000000000000000000000000000100000001000000018028E100000000040072000000FFFEFF000000000000000000000000000100000001000000018029E100000000000073000000FFFEFF000000000000000000000000000100000001000000018002810000000000004D000000FFFEFF0000000000000000000000000001000000010000000180298100000000000062000000FFFEFF0000000000000000000000000001000000010000000180278100000000000060000000FFFEFF0000000000000000000000000001000000010000000180288100000000000061000000FFFEFF00000000000000000000000000010000000100000001801D810000000000005A000000FFFEFF00000000000000000000000000010000000100000001801E810000000004005B000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001800B8100000000000051000000FFFEFF00000000000000000000000000010000000100000001800C8100000000000052000000FFFEFF00000000000000000000000000010000000100000001805F8600000000000066000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001801F810000000000005C000000FFFEFF000000000000000000000000000100000001000000018020810000000000005D000000FFFEFF0000000000000000000000000001000000010000000180468100000000020064000000FFFEFF00000000000000000000000000010000000100000000000000FFFEFF044D00610069006E00FF020000 34051 diff --git a/EWARM/settings/PLSR.dnx b/EWARM/settings/PLSR.dnx index 766467d..04e0a93 100644 --- a/EWARM/settings/PLSR.dnx +++ b/EWARM/settings/PLSR.dnx @@ -12,15 +12,15 @@ 50 + 44142557 + 0 2 _ 0 _ 0 - 44142557 - - 1343253174 + 4243162381 _ 0 @@ -126,6 +126,10 @@ 1 0 + + _ 0 + _ "" + _ 0 _ "" @@ -155,8 +159,4 @@ 1 0 - - _ 0 - _ "" - diff --git a/EWARM/settings/Project.wsdt b/EWARM/settings/Project.wsdt index b71fc17..ec2c1e4 100644 --- a/EWARM/settings/Project.wsdt +++ b/EWARM/settings/Project.wsdt @@ -11,7 +11,7 @@ 20 1157 2 - + 0 -1 @@ -50,7 +50,7 @@ 33054 0 33035 - 33037 + 33036 34399 0 33038 @@ -60,7 +60,7 @@ - 182 + 129 30 30 30 @@ -86,11 +86,11 @@ 1 1 1 - F60E00002200298100000400000013860000050000002CE1000001000000108600004E050000239200000600000029E10000040000005F860000060000000F8100000100000020810000040000000C810000330000001D81000001000000598600000100000004860000030000005686000097020000288100000300000000840000030000002BE100000700000025E100000100000009860000010000000E810000180000001F810000DC00000000E10000020000000B81000006000000588600000100000014860000D901000011860000D60200000581000001000000008600000200000046810000FF000000608600000100000008860000050000005D8600000E00000016860000010000000586000001000000 + 4A0F000025001386000005000000298100000A000000108600004E0500002CE100000100000029E1000006000000239200000600000020810000040000000F810000010000005F860000060000001D810000070000000C8100004D00000004860000030000005986000001000000288100001100000056860000970200002BE100000700000000840000030000001F810000DC0000000E8100001F000000098600000100000025E10000010000000B8100000600000000E100000200000014860000D9010000588600000100000027810000100000000086000002000000058100000100000011860000D6020000028100000100000046810000FF00000060860000010000001E810000060000005D8600000E000000088600000500000005860000010000001686000001000000 - 0A00FFFFFFFF2AE10000008200001C82000001820000678600007784000007840000808C000044D50000 - 3000048400004C00000015810000250000002CE100004300000007E100003B0000002392000000000000318400005300000004E10000390000005F860000340000000F81000023000000208100002B0000000D8000001700000001E100003600000023E100003D0000000C810000200000001982000015000000068400004E00000017810000270000004A810000470000001682000013000000038400004B000000148100002400000000840000480000002BE1000042000000008100001900000030840000520000000E8400005000000003E100003800000025E100003F0000002F820000160000000E810000220000001F8100002A00000000E100003500000022E100003C0000000B8100001F00000041E10000450000001882000014000000058400004D000000D18400000C00000016810000260000004981000046000000028400004A00000032840000540000001084000051000000518400005600000005E100003A00000002E10000370000000D810000210000000A8400004F000000 + 1100FFFFFFFF2AE10000008200001C82000001820000678600007784000007840000808C000044D500000D8400000F8400000884000054840000328100001C81000009840000 + 3000048400004C0000002CE100004300000015810000250000003184000053000000239200000000000007E100003B000000208100002B0000000F810000230000005F8600003400000004E10000390000000C8100002000000023E100003D00000001E10000360000000D80000017000000068400004E0000001982000015000000038400004B00000016820000130000004A8100004700000017810000270000002BE1000042000000008400004800000014810000240000000E84000050000000308400005200000000810000190000001F8100002A0000000E810000220000002F8200001600000025E100003F00000003E10000380000000B8100001F00000022E100003C00000000E1000035000000D18400000C000000058400004D000000188200001400000041E1000045000000028400004A000000498100004600000016810000260000001084000051000000328400005400000005E100003A00000051840000560000000A8400004F0000000D8100002100000002E1000037000000 0 @@ -135,8 +135,8 @@ 4294967295 - 020100009C020000000600004D030000 - 02010000850200000006000036030000 + CD00000080020000000600004D030000 + CD000000690200000006000036030000 4096 0 0 @@ -149,7 +149,7 @@ 34052 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diff --git a/EWARM/settings/Project_EditorBookmarks.xml b/EWARM/settings/Project_EditorBookmarks.xml new file mode 100644 index 0000000..73e7db5 --- /dev/null +++ b/EWARM/settings/Project_EditorBookmarks.xml @@ -0,0 +1,43 @@ + + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 315 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 592 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 318 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 305 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 333 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 366 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 427 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 457 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 523 + + + C:\Users\Chiri\Desktop\TrainCamp-Jiangyunsong-PLSR\Core\Src\main.c + 595 + + diff --git a/Hardware/PLSR.c b/Hardware/PLSR.c index 01772c4..cb187a1 100644 --- a/Hardware/PLSR.c +++ b/Hardware/PLSR.c @@ -20,7 +20,7 @@ int32_t AccUpCount; /* int32_t AccDownCount; /* 减速脉冲数 */ int32_t NowMAXPulse; /* 当前要达到的总脉冲 */ -uint32_t NowFrequeny; +uint32_t NowFrequency; int32_t PulseCount = 0; @@ -33,7 +33,7 @@ int32_t PulseCount = 0; void SetFrequency(uint8_t SentPost, uint32_t Frequency) { CalculatePSCARR(Frequency, 72000000, 65535, &psc, &arr); - //printf("Fre=%d,",Frequency); + printf("Fre=%d,",Frequency); switch (SentPost) { case 0: TIM10->ARR = arr, TIM10->PSC = psc, TIM10->CCR1 = arr / 2; break; diff --git a/Hardware/PLSR.h b/Hardware/PLSR.h index e6ca88b..b1da6aa 100644 --- a/Hardware/PLSR.h +++ b/Hardware/PLSR.h @@ -41,7 +41,7 @@ extern int32_t AccUpCount; ///<< extern int32_t AccDownCount;///<<减速脉冲数 extern int32_t NowMAXPulse; ///<<当前要达到的总脉冲 extern int32_t PulseCount; -extern uint32_t NowFrequeny; +extern uint32_t NowFrequency; extern int32_t NextPulseEND;