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Ladder Basic Instructions And Common Patterns

Use this P2 reference for Xinje XD/XL/XG ladder basics, basic sequential instructions, timers/counters, data compare/transfer, and common field patterns.

Source anchors:

  • XD/XL basic instruction manual v1.6.1 PDF pages 22-25: LD/ST instruction quick table.
  • PDF pages 69-90: double-coil behavior and chapter 3 basic sequential instructions.
  • PDF pages 53-59 and 91-94: timers and counters.
  • PDF pages 118-121: integer/floating compare examples and notes.
  • PDF pages 117+ and chapter 4: MOV, data transfer, arithmetic, shift, conversion, and clock instruction groups.

Core Contacts And Coils

Instruction Meaning Typical use
LD Start with normally-open contact. Start a network/rung.
LDI Start with normally-closed contact. Start with inverse condition.
AND / ANI Series NO/NC contact. Add permissive/interlock.
OR / ORI Parallel NO/NC contact. Add alternate path.
OUT Drive coil/output. Normal non-latched output.
SET Latch/set bit. Start latch, command memory, step set.
RST Reset bit/current value. Stop/reset latch, timer/counter reset.

Edge And Pulse Instructions

Instruction Meaning Use
LDP, ANDP, ORP Rising-edge contact. One-scan event from a bit transition.
LDF, ANDF, ORF Falling-edge contact. One-scan event on OFF transition.
PLS Output one scan after drive turns ON. Generate one-shot bit.
PLF Output one scan after drive turns OFF. Generate OFF-edge one-shot.
MEP / MEF Pulse the current logic result. Pulse a whole condition block.
ALT Toggle target bit. Use only with edge drive; avoid always-ON/level drive.

Rule: Use edges for HMI buttons and toggle logic. A continuously true condition can repeatedly execute edge-sensitive/toggle behavior if used incorrectly.

Block Instructions

Instruction Meaning Notes
ORB OR a series circuit block. Use when parallel branch contains multiple series contacts.
ANB AND a parallel circuit block. Use when a branch block is connected in series with prior logic.
MCS / MCR Master control start/reset. Must be paired; nesting is limited; in software use ladder wiring where direct entry is unavailable.

Timers

Use TMR / TMR_A forms rather than assuming fixed timer types.

Form Behavior
TMR Non-retentive/non-accumulative timer.
TMR_A Retentive/accumulative timer.
Third operand K1 1 ms base.
Third operand K10 10 ms base.
Third operand K100 100 ms base.

Example plan:

X0 drives TMR T0 K200 K10
T0 contact turns ON after 2 s
RST T0 resets timer current value and contact

Notes:

  • Timer identifiers can be contacts/coils or current-value words depending on instruction context.
  • MOV T11 D0 treats T11 as current value; LD T11 treats it as a bit contact.

Counters

Instruction Meaning
CNT 16-bit count instruction.
CNT_D 16-bit down-count form.
DCNT 32-bit count instruction.
DCNT_D 32-bit down-count form.
RST C0 Reset counter current value and contact.

Use HC for retentive counter areas when the model/manual supports it. Use a reset condition separate from count input.

Compare, Move, Arithmetic

Group Examples Use
Contact compare LD=, LD>, DLD>, QLD> Compare values as rung conditions.
Data compare CMP, ZCP Generate comparison results or range checks.
Move MOV, DMOV, QMOV, BMOV, FMOV Assign values, initialize blocks, copy data.
Arithmetic ADD, SUB, MUL, DIV, INC, DEC Parameter calculation and counters.
Bit/word logic WAND, WOR, WXOR, CML, SWAP Masks, packing bits, byte order.

Width matters:

  • Use 32-bit instructions for 32-bit counters/register pairs.
  • Use 64-bit instructions only on supported models/firmware.
  • For floats, convert/confirm floating format before floating operations or comparison.

Double-Coil Rule

The XD/XL manual shows that if the same coil is driven more than once, later execution can overwrite the earlier state. Avoid double coils for outputs and shared internal bits.

Bad pattern:

Network 1: X0 -> OUT Y0
Network 2: X1 -> OUT Y0

Better pattern:

M10 = auto request
M11 = manual request
Y0 = safety_ok AND (M10 OR M11)

Start/Stop Latch Pattern

Address plan:

Address Purpose
X0 Start button.
X1 Stop button, NC logic if wired normally closed.
M0 Run latch.
Y0 Motor/contactor output.
M10 Safety/permissive OK.
M20 Fault active.

Logic plan:

  1. X0 and M10 and not M20 set M0.
  2. X1 stop, fault, or missing permissive resets M0.
  3. M0 and final safety/permissive drives Y0.
  4. HMI start/stop commands should write separate command bits, not Y0 directly.

HMI Command Pattern

Use HMI command bits as requests:

Address Purpose
M100 HMI start request.
M101 HMI stop request.
M102 PLC acknowledge/clear request.
M0 PLC run latch.
Y0 Actual output.

Logic:

  • Rising edge of M100 acts like start button.
  • Rising edge of M101 acts like stop button.
  • PLC clears or acknowledges command bits after processing when appropriate.
  • HMI displays M0/Y0/fault bits as status, not just the command bits.

Initialization Pattern

Use SM002 / SM2, not SM000, for one-time initialization:

SM002 -> MOV K0 D100
SM002 -> RST M50
SM002 -> MOV K10 D200

Do not initialize process values every scan with SM000 unless repeated overwrite is intended.

Review Checklist

  • No unintended double coils.
  • HMI command bits are separated from PLC output/status bits.
  • SET/RST targets are not also driven by ordinary OUT unless deliberately documented.
  • Timers/counters have explicit reset conditions.
  • Data width matches the instruction.
  • Retentive areas are used only where retention is required.
  • Safety, permissive, alarm, and command logic are separate enough to monitor.