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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_cryp_ex.c
  4. * @author MCD Application Team
  5. * @brief Extended CRYP HAL module driver
  6. * This file provides firmware functions to manage the following
  7. * functionalities of CRYP extension peripheral:
  8. * + Extended AES processing functions
  9. *
  10. @verbatim
  11. ==============================================================================
  12. ##### How to use this driver #####
  13. ==============================================================================
  14. [..]
  15. The CRYP extension HAL driver can be used as follows:
  16. (#)After AES-GCM or AES-CCM Encryption/Decryption user can start following API
  17. to get the authentication messages :
  18. (##) HAL_CRYPEx_AESGCM_GenerateAuthTAG
  19. (##) HAL_CRYPEx_AESCCM_GenerateAuthTAG
  20. @endverbatim
  21. ******************************************************************************
  22. * @attention
  23. *
  24. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  25. * All rights reserved.</center></h2>
  26. *
  27. * This software component is licensed by ST under BSD 3-Clause license,
  28. * the "License"; You may not use this file except in compliance with the
  29. * License. You may obtain a copy of the License at:
  30. * opensource.org/licenses/BSD-3-Clause
  31. *
  32. ******************************************************************************
  33. */
  34. /* Includes ------------------------------------------------------------------*/
  35. #include "stm32f4xx_hal.h"
  36. /** @addtogroup STM32F4xx_HAL_Driver
  37. * @{
  38. */
  39. #if defined (AES) || defined (CRYP)
  40. #if defined (CRYP_CR_ALGOMODE_AES_GCM)|| defined (AES)
  41. /** @defgroup CRYPEx CRYPEx
  42. * @brief CRYP Extension HAL module driver.
  43. * @{
  44. */
  45. #ifdef HAL_CRYP_MODULE_ENABLED
  46. /* Private typedef -----------------------------------------------------------*/
  47. /* Private define ------------------------------------------------------------*/
  48. /** @addtogroup CRYPEx_Private_Defines
  49. * @{
  50. */
  51. #if defined(AES)
  52. #define CRYP_PHASE_INIT 0x00000000U /*!< GCM/GMAC (or CCM) init phase */
  53. #define CRYP_PHASE_HEADER AES_CR_GCMPH_0 /*!< GCM/GMAC or CCM header phase */
  54. #define CRYP_PHASE_PAYLOAD AES_CR_GCMPH_1 /*!< GCM(/CCM) payload phase */
  55. #define CRYP_PHASE_FINAL AES_CR_GCMPH /*!< GCM/GMAC or CCM final phase */
  56. #define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U /*!< Encryption mode */
  57. #define CRYP_OPERATINGMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode only used when performing ECB and CBC decryptions */
  58. #define CRYP_OPERATINGMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */
  59. #define CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption only used when performing ECB and CBC decryptions */
  60. #else /* CRYP */
  61. #define CRYP_PHASE_INIT 0x00000000U
  62. #define CRYP_PHASE_HEADER CRYP_CR_GCM_CCMPH_0
  63. #define CRYP_PHASE_PAYLOAD CRYP_CR_GCM_CCMPH_1
  64. #define CRYP_PHASE_FINAL CRYP_CR_GCM_CCMPH
  65. #define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U
  66. #define CRYP_OPERATINGMODE_DECRYPT CRYP_CR_ALGODIR
  67. #endif /* End AES or CRYP */
  68. #define CRYPEx_PHASE_PROCESS 0x02U /*!< CRYP peripheral is in processing phase */
  69. #define CRYPEx_PHASE_FINAL 0x03U /*!< CRYP peripheral is in final phase this is relevant only with CCM and GCM modes */
  70. /* CTR0 information to use in CCM algorithm */
  71. #define CRYP_CCM_CTR0_0 0x07FFFFFFU
  72. #define CRYP_CCM_CTR0_3 0xFFFFFF00U
  73. /**
  74. * @}
  75. */
  76. /* Private macro -------------------------------------------------------------*/
  77. /* Private variables ---------------------------------------------------------*/
  78. /* Private function prototypes -----------------------------------------------*/
  79. /* Exported functions---------------------------------------------------------*/
  80. /** @addtogroup CRYPEx_Exported_Functions
  81. * @{
  82. */
  83. /** @defgroup CRYPEx_Exported_Functions_Group1 Extended AES processing functions
  84. * @brief Extended processing functions.
  85. *
  86. @verbatim
  87. ==============================================================================
  88. ##### Extended AES processing functions #####
  89. ==============================================================================
  90. [..] This section provides functions allowing to generate the authentication
  91. TAG in Polling mode
  92. (#)HAL_CRYPEx_AESGCM_GenerateAuthTAG
  93. (#)HAL_CRYPEx_AESCCM_GenerateAuthTAG
  94. they should be used after Encrypt/Decrypt operation.
  95. @endverbatim
  96. * @{
  97. */
  98. /**
  99. * @brief generate the GCM authentication TAG.
  100. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  101. * the configuration information for CRYP module
  102. * @param AuthTag: Pointer to the authentication buffer
  103. * @param Timeout: Timeout duration
  104. * @retval HAL status
  105. */
  106. HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
  107. {
  108. uint32_t tickstart;
  109. uint64_t headerlength = (uint64_t)(hcryp->Init.HeaderSize) * 32U; /* Header length in bits */
  110. uint64_t inputlength = (uint64_t)(hcryp->Size) * 8U; /* input length in bits */
  111. uint32_t tagaddr = (uint32_t)AuthTag;
  112. if(hcryp->State == HAL_CRYP_STATE_READY)
  113. {
  114. /* Process locked */
  115. __HAL_LOCK(hcryp);
  116. /* Change the CRYP peripheral state */
  117. hcryp->State = HAL_CRYP_STATE_BUSY;
  118. /* Check if initialization phase has already been performed */
  119. if(hcryp->Phase == CRYPEx_PHASE_PROCESS)
  120. {
  121. /* Change the CRYP phase */
  122. hcryp->Phase = CRYPEx_PHASE_FINAL;
  123. }
  124. else /* Initialization phase has not been performed*/
  125. {
  126. /* Disable the Peripheral */
  127. __HAL_CRYP_DISABLE(hcryp);
  128. /* Sequence error code field */
  129. hcryp->ErrorCode |= HAL_CRYP_ERROR_AUTH_TAG_SEQUENCE;
  130. /* Change the CRYP peripheral state */
  131. hcryp->State = HAL_CRYP_STATE_READY;
  132. /* Process unlocked */
  133. __HAL_UNLOCK(hcryp);
  134. return HAL_ERROR;
  135. }
  136. #if defined(CRYP)
  137. /* Disable CRYP to start the final phase */
  138. __HAL_CRYP_DISABLE(hcryp);
  139. /* Select final phase */
  140. MODIFY_REG(hcryp->Instance->CR, CRYP_CR_GCM_CCMPH, CRYP_PHASE_FINAL);
  141. /*ALGODIR bit must be set to ‘0’.*/
  142. hcryp->Instance->CR &= ~CRYP_CR_ALGODIR;
  143. /* Enable the CRYP peripheral */
  144. __HAL_CRYP_ENABLE(hcryp);
  145. /* Write the number of bits in header (64 bits) followed by the number of bits
  146. in the payload */
  147. if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
  148. {
  149. hcryp->Instance->DIN = 0U;
  150. hcryp->Instance->DIN = __RBIT((uint32_t)(headerlength));
  151. hcryp->Instance->DIN = 0U;
  152. hcryp->Instance->DIN = __RBIT((uint32_t)(inputlength));
  153. }
  154. else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
  155. {
  156. hcryp->Instance->DIN = 0U;
  157. hcryp->Instance->DIN = __REV((uint32_t)(headerlength));
  158. hcryp->Instance->DIN = 0U;
  159. hcryp->Instance->DIN = __REV((uint32_t)(inputlength));
  160. }
  161. else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
  162. {
  163. hcryp->Instance->DIN = 0U;
  164. hcryp->Instance->DIN = __ROR((uint32_t)headerlength, 16U);
  165. hcryp->Instance->DIN = 0U;
  166. hcryp->Instance->DIN = __ROR((uint32_t)inputlength, 16U);
  167. }
  168. else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
  169. {
  170. hcryp->Instance->DIN = 0U;
  171. hcryp->Instance->DIN = (uint32_t)(headerlength);
  172. hcryp->Instance->DIN = 0U;
  173. hcryp->Instance->DIN = (uint32_t)(inputlength);
  174. }
  175. else
  176. {
  177. /* Nothing to do */
  178. }
  179. /* Wait for OFNE flag to be raised */
  180. tickstart = HAL_GetTick();
  181. while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
  182. {
  183. /* Check for the Timeout */
  184. if(Timeout != HAL_MAX_DELAY)
  185. {
  186. if(((HAL_GetTick() - tickstart ) > Timeout)||(Timeout == 0U))
  187. {
  188. /* Disable the CRYP Peripheral Clock */
  189. __HAL_CRYP_DISABLE(hcryp);
  190. /* Change state */
  191. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  192. hcryp->State = HAL_CRYP_STATE_READY;
  193. /* Process unlocked */
  194. __HAL_UNLOCK(hcryp);
  195. return HAL_ERROR;
  196. }
  197. }
  198. }
  199. /* Read the authentication TAG in the output FIFO */
  200. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
  201. tagaddr+=4U;
  202. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
  203. tagaddr+=4U;
  204. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
  205. tagaddr+=4U;
  206. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
  207. #else /* AES*/
  208. /* Select final phase */
  209. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_FINAL);
  210. /* Write the number of bits in header (64 bits) followed by the number of bits
  211. in the payload */
  212. if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
  213. {
  214. hcryp->Instance->DINR = 0U;
  215. hcryp->Instance->DINR = __RBIT((uint32_t)(headerlength));
  216. hcryp->Instance->DINR = 0U;
  217. hcryp->Instance->DINR = __RBIT((uint32_t)(inputlength));
  218. }
  219. else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
  220. {
  221. hcryp->Instance->DINR = 0U;
  222. hcryp->Instance->DINR = __REV((uint32_t)(headerlength));
  223. hcryp->Instance->DINR = 0U;
  224. hcryp->Instance->DINR = __REV((uint32_t)(inputlength));
  225. }
  226. else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
  227. {
  228. hcryp->Instance->DINR = 0U;
  229. hcryp->Instance->DINR = __ROR((uint32_t)headerlength, 16U);
  230. hcryp->Instance->DINR = 0U;
  231. hcryp->Instance->DINR = __ROR((uint32_t)inputlength, 16U);
  232. }
  233. else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
  234. {
  235. hcryp->Instance->DINR = 0U;
  236. hcryp->Instance->DINR = (uint32_t)(headerlength);
  237. hcryp->Instance->DINR = 0U;
  238. hcryp->Instance->DINR = (uint32_t)(inputlength);
  239. }
  240. else
  241. {
  242. /* Nothing to do */
  243. }
  244. /* Wait for CCF flag to be raised */
  245. tickstart = HAL_GetTick();
  246. while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
  247. {
  248. /* Check for the Timeout */
  249. if(Timeout != HAL_MAX_DELAY)
  250. {
  251. if(((HAL_GetTick() - tickstart ) > Timeout)||(Timeout == 0U))
  252. {
  253. /* Disable the CRYP peripheral clock */
  254. __HAL_CRYP_DISABLE(hcryp);
  255. /* Change state */
  256. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  257. hcryp->State = HAL_CRYP_STATE_READY;
  258. /* Process unlocked */
  259. __HAL_UNLOCK(hcryp);
  260. return HAL_ERROR;
  261. }
  262. }
  263. }
  264. /* Read the authentication TAG in the output FIFO */
  265. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  266. tagaddr+=4U;
  267. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  268. tagaddr+=4U;
  269. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  270. tagaddr+=4U;
  271. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  272. /* Clear CCF flag */
  273. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  274. #endif /* End AES or CRYP */
  275. /* Disable the peripheral */
  276. __HAL_CRYP_DISABLE(hcryp);
  277. /* Change the CRYP peripheral state */
  278. hcryp->State = HAL_CRYP_STATE_READY;
  279. /* Process unlocked */
  280. __HAL_UNLOCK(hcryp);
  281. }
  282. else
  283. {
  284. /* Busy error code field */
  285. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  286. return HAL_ERROR;
  287. }
  288. /* Return function status */
  289. return HAL_OK;
  290. }
  291. /**
  292. * @brief AES CCM Authentication TAG generation.
  293. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  294. * the configuration information for CRYP module
  295. * @param AuthTag: Pointer to the authentication buffer
  296. * @param Timeout: Timeout duration
  297. * @retval HAL status
  298. */
  299. HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
  300. {
  301. uint32_t tagaddr = (uint32_t)AuthTag;
  302. uint32_t ctr0 [4]={0};
  303. uint32_t ctr0addr = (uint32_t)ctr0;
  304. uint32_t tickstart;
  305. if(hcryp->State == HAL_CRYP_STATE_READY)
  306. {
  307. /* Process locked */
  308. __HAL_LOCK(hcryp);
  309. /* Change the CRYP peripheral state */
  310. hcryp->State = HAL_CRYP_STATE_BUSY;
  311. /* Check if initialization phase has already been performed */
  312. if(hcryp->Phase == CRYPEx_PHASE_PROCESS)
  313. {
  314. /* Change the CRYP phase */
  315. hcryp->Phase = CRYPEx_PHASE_FINAL;
  316. }
  317. else /* Initialization phase has not been performed*/
  318. {
  319. /* Disable the peripheral */
  320. __HAL_CRYP_DISABLE(hcryp);
  321. /* Sequence error code field */
  322. hcryp->ErrorCode |= HAL_CRYP_ERROR_AUTH_TAG_SEQUENCE;
  323. /* Change the CRYP peripheral state */
  324. hcryp->State = HAL_CRYP_STATE_READY;
  325. /* Process unlocked */
  326. __HAL_UNLOCK(hcryp);
  327. return HAL_ERROR;
  328. }
  329. #if defined(CRYP)
  330. /* Disable CRYP to start the final phase */
  331. __HAL_CRYP_DISABLE(hcryp);
  332. /* Select final phase & ALGODIR bit must be set to ‘0’. */
  333. MODIFY_REG(hcryp->Instance->CR, CRYP_CR_GCM_CCMPH|CRYP_CR_ALGODIR, CRYP_PHASE_FINAL|CRYP_OPERATINGMODE_ENCRYPT);
  334. /* Enable the CRYP peripheral */
  335. __HAL_CRYP_ENABLE(hcryp);
  336. /* Write the counter block in the IN FIFO, CTR0 information from B0
  337. data has to be swapped according to the DATATYPE*/
  338. ctr0[0]=(hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0;
  339. ctr0[1]=hcryp->Init.B0[1];
  340. ctr0[2]=hcryp->Init.B0[2];
  341. ctr0[3]=hcryp->Init.B0[3] & CRYP_CCM_CTR0_3;
  342. if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
  343. {
  344. hcryp->Instance->DIN = __REV(*(uint32_t*)(ctr0addr));
  345. ctr0addr+=4U;
  346. hcryp->Instance->DIN = __REV(*(uint32_t*)(ctr0addr));
  347. ctr0addr+=4U;
  348. hcryp->Instance->DIN = __REV(*(uint32_t*)(ctr0addr));
  349. ctr0addr+=4U;
  350. hcryp->Instance->DIN = __REV(*(uint32_t*)(ctr0addr));
  351. }
  352. else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
  353. {
  354. hcryp->Instance->DIN = __ROR(*(uint32_t*)(ctr0addr), 16U);
  355. ctr0addr+=4U;
  356. hcryp->Instance->DIN = __ROR(*(uint32_t*)(ctr0addr), 16U);
  357. ctr0addr+=4U;
  358. hcryp->Instance->DIN = __ROR(*(uint32_t*)(ctr0addr), 16U);
  359. ctr0addr+=4U;
  360. hcryp->Instance->DIN = __ROR(*(uint32_t*)(ctr0addr), 16U);
  361. }
  362. else if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
  363. {
  364. hcryp->Instance->DIN = __RBIT(*(uint32_t*)(ctr0addr));
  365. ctr0addr+=4U;
  366. hcryp->Instance->DIN = __RBIT(*(uint32_t*)(ctr0addr));
  367. ctr0addr+=4U;
  368. hcryp->Instance->DIN = __RBIT(*(uint32_t*)(ctr0addr));
  369. ctr0addr+=4U;
  370. hcryp->Instance->DIN = __RBIT(*(uint32_t*)(ctr0addr));
  371. }
  372. else
  373. {
  374. hcryp->Instance->DIN = *(uint32_t*)(ctr0addr);
  375. ctr0addr+=4U;
  376. hcryp->Instance->DIN = *(uint32_t*)(ctr0addr);
  377. ctr0addr+=4U;
  378. hcryp->Instance->DIN = *(uint32_t*)(ctr0addr);
  379. ctr0addr+=4U;
  380. hcryp->Instance->DIN = *(uint32_t*)(ctr0addr);
  381. }
  382. /* Wait for OFNE flag to be raised */
  383. tickstart = HAL_GetTick();
  384. while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
  385. {
  386. /* Check for the Timeout */
  387. if(Timeout != HAL_MAX_DELAY)
  388. {
  389. if(((HAL_GetTick() - tickstart ) > Timeout)||(Timeout == 0U))
  390. {
  391. /* Disable the CRYP peripheral Clock */
  392. __HAL_CRYP_DISABLE(hcryp);
  393. /* Change state */
  394. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  395. hcryp->State = HAL_CRYP_STATE_READY;
  396. /* Process unlocked */
  397. __HAL_UNLOCK(hcryp);
  398. return HAL_ERROR;
  399. }
  400. }
  401. }
  402. /* Read the Auth TAG in the IN FIFO */
  403. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
  404. tagaddr+=4U;
  405. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
  406. tagaddr+=4U;
  407. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
  408. tagaddr+=4U;
  409. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
  410. #else /* AES */
  411. /* Select final phase */
  412. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_FINAL);
  413. /* Write the counter block in the IN FIFO, CTR0 information from B0
  414. data has to be swapped according to the DATATYPE*/
  415. if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
  416. {
  417. ctr0[0]=(__REV(hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0);
  418. ctr0[1]=__REV(hcryp->Init.B0[1]);
  419. ctr0[2]=__REV(hcryp->Init.B0[2]);
  420. ctr0[3]=(__REV(hcryp->Init.B0[3])& CRYP_CCM_CTR0_3);
  421. hcryp->Instance->DINR = __REV(*(uint32_t*)(ctr0addr));
  422. ctr0addr+=4U;
  423. hcryp->Instance->DINR = __REV(*(uint32_t*)(ctr0addr));
  424. ctr0addr+=4U;
  425. hcryp->Instance->DINR = __REV(*(uint32_t*)(ctr0addr));
  426. ctr0addr+=4U;
  427. hcryp->Instance->DINR = __REV(*(uint32_t*)(ctr0addr));
  428. }
  429. else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
  430. {
  431. ctr0[0]= ( __ROR((hcryp->Init.B0[0]), 16U)& CRYP_CCM_CTR0_0);
  432. ctr0[1]= __ROR((hcryp->Init.B0[1]), 16U);
  433. ctr0[2]= __ROR((hcryp->Init.B0[2]), 16U);
  434. ctr0[3]= ( __ROR((hcryp->Init.B0[3]), 16U)& CRYP_CCM_CTR0_3);
  435. hcryp->Instance->DINR = __ROR(*(uint32_t*)(ctr0addr), 16U);
  436. ctr0addr+=4U;
  437. hcryp->Instance->DINR = __ROR(*(uint32_t*)(ctr0addr), 16U);
  438. ctr0addr+=4U;
  439. hcryp->Instance->DINR = __ROR(*(uint32_t*)(ctr0addr), 16U);
  440. ctr0addr+=4U;
  441. hcryp->Instance->DINR = __ROR(*(uint32_t*)(ctr0addr), 16U);
  442. }
  443. else if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
  444. {
  445. ctr0[0]=(__RBIT(hcryp->Init.B0[0])& CRYP_CCM_CTR0_0);
  446. ctr0[1]=__RBIT(hcryp->Init.B0[1]);
  447. ctr0[2]=__RBIT(hcryp->Init.B0[2]);
  448. ctr0[3]=(__RBIT(hcryp->Init.B0[3])& CRYP_CCM_CTR0_3);
  449. hcryp->Instance->DINR = __RBIT(*(uint32_t*)(ctr0addr));
  450. ctr0addr+=4U;
  451. hcryp->Instance->DINR = __RBIT(*(uint32_t*)(ctr0addr));
  452. ctr0addr+=4U;
  453. hcryp->Instance->DINR = __RBIT(*(uint32_t*)(ctr0addr));
  454. ctr0addr+=4U;
  455. hcryp->Instance->DINR = __RBIT(*(uint32_t*)(ctr0addr));
  456. }
  457. else
  458. {
  459. ctr0[0]=(hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0;
  460. ctr0[1]=hcryp->Init.B0[1];
  461. ctr0[2]=hcryp->Init.B0[2];
  462. ctr0[3]=hcryp->Init.B0[3] & CRYP_CCM_CTR0_3;
  463. hcryp->Instance->DINR = *(uint32_t*)(ctr0addr);
  464. ctr0addr+=4U;
  465. hcryp->Instance->DINR = *(uint32_t*)(ctr0addr);
  466. ctr0addr+=4U;
  467. hcryp->Instance->DINR = *(uint32_t*)(ctr0addr);
  468. ctr0addr+=4U;
  469. hcryp->Instance->DINR = *(uint32_t*)(ctr0addr);
  470. }
  471. /* Wait for CCF flag to be raised */
  472. tickstart = HAL_GetTick();
  473. while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
  474. {
  475. /* Check for the Timeout */
  476. if(Timeout != HAL_MAX_DELAY)
  477. {
  478. if(((HAL_GetTick() - tickstart ) > Timeout)||(Timeout == 0U))
  479. {
  480. /* Disable the CRYP peripheral Clock */
  481. __HAL_CRYP_DISABLE(hcryp);
  482. /* Change state */
  483. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  484. hcryp->State = HAL_CRYP_STATE_READY;
  485. /* Process unlocked */
  486. __HAL_UNLOCK(hcryp);
  487. return HAL_ERROR;
  488. }
  489. }
  490. }
  491. /* Read the authentication TAG in the output FIFO */
  492. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  493. tagaddr+=4U;
  494. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  495. tagaddr+=4U;
  496. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  497. tagaddr+=4U;
  498. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  499. /* Clear CCF Flag */
  500. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  501. #endif /* End of AES || CRYP */
  502. /* Change the CRYP peripheral state */
  503. hcryp->State = HAL_CRYP_STATE_READY;
  504. /* Process unlocked */
  505. __HAL_UNLOCK(hcryp);
  506. /* Disable CRYP */
  507. __HAL_CRYP_DISABLE(hcryp);
  508. }
  509. else
  510. {
  511. /* Busy error code field */
  512. hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
  513. return HAL_ERROR;
  514. }
  515. /* Return function status */
  516. return HAL_OK;
  517. }
  518. /**
  519. * @}
  520. */
  521. #if defined (AES)
  522. /** @defgroup CRYPEx_Exported_Functions_Group2 Key Derivation functions
  523. * @brief AutoKeyDerivation functions
  524. *
  525. @verbatim
  526. ==============================================================================
  527. ##### Key Derivation functions #####
  528. ==============================================================================
  529. [..] This section provides functions allowing to Enable or Disable the
  530. the AutoKeyDerivation parameter in CRYP_HandleTypeDef structure
  531. These function are allowed only in TinyAES IP.
  532. @endverbatim
  533. * @{
  534. */
  535. /**
  536. * @brief AES enable key derivation functions
  537. * @param hcryp: pointer to a CRYP_HandleTypeDef structure.
  538. * @retval None
  539. */
  540. void HAL_CRYPEx_EnableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
  541. {
  542. if(hcryp->State == HAL_CRYP_STATE_READY)
  543. {
  544. hcryp->AutoKeyDerivation = ENABLE;
  545. }
  546. else
  547. {
  548. /* Busy error code field */
  549. hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
  550. }
  551. }
  552. /**
  553. * @brief AES disable key derivation functions
  554. * @param hcryp: pointer to a CRYP_HandleTypeDef structure.
  555. * @retval None
  556. */
  557. void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
  558. {
  559. if(hcryp->State == HAL_CRYP_STATE_READY)
  560. {
  561. hcryp->AutoKeyDerivation = DISABLE;
  562. }
  563. else
  564. {
  565. /* Busy error code field */
  566. hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
  567. }
  568. }
  569. /**
  570. * @}
  571. */
  572. #endif /* AES or GCM CCM defined*/
  573. #endif /* AES */
  574. #endif /* HAL_CRYP_MODULE_ENABLED */
  575. /**
  576. * @}
  577. */
  578. #endif /* TinyAES or CRYP*/
  579. /**
  580. * @}
  581. */
  582. /**
  583. * @}
  584. */
  585. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/